JP5436422B2 - 高インテグリティと高可用性のコンピュータ処理モジュール - Google Patents

高インテグリティと高可用性のコンピュータ処理モジュール Download PDF

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JP5436422B2
JP5436422B2 JP2010518384A JP2010518384A JP5436422B2 JP 5436422 B2 JP5436422 B2 JP 5436422B2 JP 2010518384 A JP2010518384 A JP 2010518384A JP 2010518384 A JP2010518384 A JP 2010518384A JP 5436422 B2 JP5436422 B2 JP 5436422B2
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lane
module
processing
data
lanes
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Japanese (ja)
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JP2010534888A5 (zh
JP2010534888A (ja
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プルイエット，ジェイ・アール
サイクス，グレゴリー・アール
スカット，ティモシー・ディー
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ジーイー・アビエイション・システムズ・エルエルシー
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1687—Temporal synchronisation or re-synchronisation of redundant processing components at event level, e.g. by interrupt or result of polling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/14—Time supervision arrangements, e.g. real time clock
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1683—Temporal synchronisation or re-synchronisation of redundant processing components at instruction level
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/845—Systems in which the redundancy can be transformed in increased performance

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Hardware Redundancy (AREA)
JP2010518384A 2007-07-24 2008-07-24 高インテグリティと高可用性のコンピュータ処理モジュール Expired - Fee Related JP5436422B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US93504407P 2007-07-24 2007-07-24
US60/935,044 2007-07-24
US13871708A 2008-06-13 2008-06-13
US12/138,717 2008-06-13
PCT/US2008/071023 WO2009015276A2 (en) 2007-07-24 2008-07-24 High integrity and high availability computer processing module

Publications (3)

Publication Number Publication Date
JP2010534888A JP2010534888A (ja) 2010-11-11
JP2010534888A5 JP2010534888A5 (zh) 2013-03-28
JP5436422B2 true JP5436422B2 (ja) 2014-03-05

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JP2010518384A Expired - Fee Related JP5436422B2 (ja) 2007-07-24 2008-07-24 高インテグリティと高可用性のコンピュータ処理モジュール

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Country Link
EP (1) EP2174221A2 (zh)
JP (1) JP5436422B2 (zh)
CN (1) CN101861569B (zh)
BR (1) BRPI0813077B8 (zh)
CA (1) CA2694198C (zh)
WO (1) WO2009015276A2 (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102011078630A1 (de) * 2011-07-05 2013-01-10 Robert Bosch Gmbh Verfahren zum Einrichten einer Anordnung technischer Einheiten
US8924780B2 (en) * 2011-11-10 2014-12-30 Ge Aviation Systems Llc Method of providing high integrity processing
CN104699550B (zh) * 2014-12-05 2017-09-12 中国航空工业集团公司第六三一研究所 一种基于lockstep架构的错误恢复方法
US10248156B2 (en) 2015-03-20 2019-04-02 Renesas Electronics Corporation Data processing device
US10599513B2 (en) * 2017-11-21 2020-03-24 The Boeing Company Message synchronization system
US10802932B2 (en) 2017-12-04 2020-10-13 Nxp Usa, Inc. Data processing system having lockstep operation

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2003338A1 (en) * 1987-11-09 1990-06-09 Richard W. Cutts, Jr. Synchronization of fault-tolerant computer system having multiple processors
US5226152A (en) * 1990-12-07 1993-07-06 Motorola, Inc. Functional lockstep arrangement for redundant processors
JP3123844B2 (ja) * 1992-12-18 2001-01-15 日本電気通信システム株式会社 二重化装置
US6327668B1 (en) * 1998-06-30 2001-12-04 Sun Microsystems, Inc. Determinism in a multiprocessor computer system and monitor and processor therefor
US6615366B1 (en) * 1999-12-21 2003-09-02 Intel Corporation Microprocessor with dual execution core operable in high reliability mode
EP1398700A1 (de) * 2002-09-12 2004-03-17 Siemens Aktiengesellschaft Verfahren und Schaltungsanordnung zur Synchronisation redundanter Verarbeitungseinheiten
US7290169B2 (en) * 2004-04-06 2007-10-30 Hewlett-Packard Development Company, L.P. Core-level processor lockstepping
EP1812855B1 (de) * 2004-10-25 2009-01-07 Robert Bosch Gmbh Verfahren und vorrichtung zur modusumschaltung und zum signalvergleich bei einem rechnersystem mit wenigstens zwei verarbeitungseinheiten
CN100392420C (zh) * 2005-03-17 2008-06-04 上海华虹集成电路有限责任公司 非接触式应用芯片的多通道测试仪
US8826288B2 (en) * 2005-04-19 2014-09-02 Hewlett-Packard Development Company, L.P. Computing with both lock-step and free-step processor modes

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Publication number Publication date
CA2694198C (en) 2017-08-08
BRPI0813077B1 (pt) 2020-01-28
BRPI0813077A2 (pt) 2017-06-20
JP2010534888A (ja) 2010-11-11
WO2009015276A2 (en) 2009-01-29
EP2174221A2 (en) 2010-04-14
WO2009015276A3 (en) 2009-07-23
CN101861569A (zh) 2010-10-13
CA2694198A1 (en) 2009-01-29
BRPI0813077B8 (pt) 2020-02-27
CN101861569B (zh) 2014-03-19

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