BRPI0813077A2 - sistemas de módulo de processamento de computador - Google Patents

sistemas de módulo de processamento de computador

Info

Publication number
BRPI0813077A2
BRPI0813077A2 BRPI0813077A BRPI0813077A BRPI0813077A2 BR PI0813077 A2 BRPI0813077 A2 BR PI0813077A2 BR PI0813077 A BRPI0813077 A BR PI0813077A BR PI0813077 A BRPI0813077 A BR PI0813077A BR PI0813077 A2 BRPI0813077 A2 BR PI0813077A2
Authority
BR
Brazil
Prior art keywords
processing module
computer processing
module systems
systems
computer
Prior art date
Application number
BRPI0813077A
Other languages
English (en)
Inventor
R Sykes Gregory
E Pruiett Jay
D Skutt Thimothy
Original Assignee
Ge Aviation Systems Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ge Aviation Systems Llc filed Critical Ge Aviation Systems Llc
Publication of BRPI0813077A2 publication Critical patent/BRPI0813077A2/pt
Publication of BRPI0813077B1 publication Critical patent/BRPI0813077B1/pt
Publication of BRPI0813077B8 publication Critical patent/BRPI0813077B8/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1687—Temporal synchronisation or re-synchronisation of redundant processing components at event level, e.g. by interrupt or result of polling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/14—Time supervision arrangements, e.g. real time clock
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1683—Temporal synchronisation or re-synchronisation of redundant processing components at instruction level
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/845—Systems in which the redundancy can be transformed in increased performance
BRPI0813077A 2007-07-24 2008-07-24 sistema de módulo de processamento de computador BRPI0813077B8 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US93504407P 2007-07-24 2007-07-24
US13871708A 2008-06-13 2008-06-13
PCT/US2008/071023 WO2009015276A2 (en) 2007-07-24 2008-07-24 High integrity and high availability computer processing module

Publications (3)

Publication Number Publication Date
BRPI0813077A2 true BRPI0813077A2 (pt) 2017-06-20
BRPI0813077B1 BRPI0813077B1 (pt) 2020-01-28
BRPI0813077B8 BRPI0813077B8 (pt) 2020-02-27

Family

ID=40149643

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI0813077A BRPI0813077B8 (pt) 2007-07-24 2008-07-24 sistema de módulo de processamento de computador

Country Status (6)

Country Link
EP (1) EP2174221A2 (pt)
JP (1) JP5436422B2 (pt)
CN (1) CN101861569B (pt)
BR (1) BRPI0813077B8 (pt)
CA (1) CA2694198C (pt)
WO (1) WO2009015276A2 (pt)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102011078630A1 (de) * 2011-07-05 2013-01-10 Robert Bosch Gmbh Verfahren zum Einrichten einer Anordnung technischer Einheiten
US8924780B2 (en) 2011-11-10 2014-12-30 Ge Aviation Systems Llc Method of providing high integrity processing
CN104699550B (zh) * 2014-12-05 2017-09-12 中国航空工业集团公司第六三一研究所 一种基于lockstep架构的错误恢复方法
KR20170130346A (ko) * 2015-03-20 2017-11-28 르네사스 일렉트로닉스 가부시키가이샤 데이터 처리 장치
US10599513B2 (en) * 2017-11-21 2020-03-24 The Boeing Company Message synchronization system
US10802932B2 (en) 2017-12-04 2020-10-13 Nxp Usa, Inc. Data processing system having lockstep operation

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2003338A1 (en) * 1987-11-09 1990-06-09 Richard W. Cutts, Jr. Synchronization of fault-tolerant computer system having multiple processors
US5226152A (en) * 1990-12-07 1993-07-06 Motorola, Inc. Functional lockstep arrangement for redundant processors
JP3123844B2 (ja) * 1992-12-18 2001-01-15 日本電気通信システム株式会社 二重化装置
US6247143B1 (en) * 1998-06-30 2001-06-12 Sun Microsystems, Inc. I/O handling for a multiprocessor computer system
US6615366B1 (en) * 1999-12-21 2003-09-02 Intel Corporation Microprocessor with dual execution core operable in high reliability mode
EP1398700A1 (de) * 2002-09-12 2004-03-17 Siemens Aktiengesellschaft Verfahren und Schaltungsanordnung zur Synchronisation redundanter Verarbeitungseinheiten
US7290169B2 (en) * 2004-04-06 2007-10-30 Hewlett-Packard Development Company, L.P. Core-level processor lockstepping
ATE420402T1 (de) * 2004-10-25 2009-01-15 Bosch Gmbh Robert Verfahren und vorrichtung zur modusumschaltung und zum signalvergleich bei einem rechnersystem mit wenigstens zwei verarbeitungseinheiten
CN100392420C (zh) * 2005-03-17 2008-06-04 上海华虹集成电路有限责任公司 非接触式应用芯片的多通道测试仪
US8826288B2 (en) * 2005-04-19 2014-09-02 Hewlett-Packard Development Company, L.P. Computing with both lock-step and free-step processor modes

Also Published As

Publication number Publication date
BRPI0813077B8 (pt) 2020-02-27
BRPI0813077B1 (pt) 2020-01-28
CA2694198C (en) 2017-08-08
CN101861569A (zh) 2010-10-13
EP2174221A2 (en) 2010-04-14
JP2010534888A (ja) 2010-11-11
WO2009015276A3 (en) 2009-07-23
WO2009015276A2 (en) 2009-01-29
CA2694198A1 (en) 2009-01-29
JP5436422B2 (ja) 2014-03-05
CN101861569B (zh) 2014-03-19

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Legal Events

Date Code Title Description
B06T Formal requirements before examination [chapter 6.20 patent gazette]
B07A Technical examination (opinion): publication of technical examination (opinion) [chapter 7.1 patent gazette]
B07A Technical examination (opinion): publication of technical examination (opinion) [chapter 7.1 patent gazette]
B07C Technical examination (opinion): republication [chapter 7.3 patent gazette]

Free format text: REPUBLICACAO

B07B Technical examination (opinion): publication cancelled [chapter 7.2 patent gazette]

Free format text: ANULADA A PUBLICACAO CODIGO 7.3 NA RPI NO 2547 DE 29/10/2019 POR TER SIDO INDEVIDA.

B07B Technical examination (opinion): publication cancelled [chapter 7.2 patent gazette]

Free format text: ANULADA A PUBLICACAO CODIGO 7.1 NA RPI NO 2545 DE 15/10/2019 POR TER SIDO INDEVIDA.

B09A Decision: intention to grant [chapter 9.1 patent gazette]
B16A Patent or certificate of addition of invention granted

Free format text: PRAZO DE VALIDADE: 10 (DEZ) ANOS CONTADOS A PARTIR DE 28/01/2020, OBSERVADAS AS CONDICOES LEGAIS.

B16C Correction of notification of the grant

Free format text: REF. RPI 2560 DE 28/01/2020 QUANTO AO INVENTOR.

B21F Lapse acc. art. 78, item iv - on non-payment of the annual fees in time

Free format text: REFERENTE A 13A ANUIDADE.

B24J Lapse because of non-payment of annual fees (definitively: art 78 iv lpi, resolution 113/2013 art. 12)

Free format text: EM VIRTUDE DA EXTINCAO PUBLICADA NA RPI 2629 DE 25-05-2021 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDA A EXTINCAO DA PATENTE E SEUS CERTIFICADOS, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013.