JP5348002B2 - Method for manufacturing thin film transistor substrate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the efficiency of a manufacturing process by reducing the number of mask sheets used. <P>SOLUTION: According to this method of manufacturing a thin film transistor substrate, a common mask sheet is used in a channel protective film forming process of forming a channel protective film and in a terminal exposure process of exposing a part of an input terminal. The mask sheet has: a light-shielding part for the protective film, which is formed in a position superposed on an installation position of the channel protective film; and a light-shielding part for the terminal, which is formed at a position superposed on an installation position of the input terminal, wherein an area outside of the light-shielding parts has translucency. In the channel protective film forming process, light is emitted from the lower surface side of a transparent substrate and the upper surface side of the mask sheet, thereby developing a positive photoresist of a part superposed on the light-shielding part for the protective film and a gate electrode and a part superposed on the light-shielding part for the terminal and the input terminal to remain. In the terminal exposure process, light is emitted from the upper surface side of the mask sheet, thereby developing a negative photoresist outside of the part superposed on the light-shielding part for the protective film and the light-shielding part for the terminal to remain. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

  The present invention relates to a method for manufacturing a thin film transistor substrate.

A thin film transistor substrate includes a pixel portion, a gate terminal portion, a drain terminal portion, and the like (see, for example, Patent Document 1). The pixel portion is connected to each of the pixel electrodes arranged in a matrix on the substrate, and controls a signal for the pixel electrode. The gate terminal portion is connected to a gate driver and outputs a gate signal to the gate electrode of the transistor in the pixel portion. The drain terminal is connected to the drain driver, and outputs a drain signal to the drain electrode of the transistor in the pixel portion.
A method for manufacturing the thin film transistor substrate will be described with reference to FIG. FIG. 13 is a cross-sectional view showing each step of a conventional method of manufacturing a thin film transistor substrate. Note that in FIG. 13, the pixel portion, the gate terminal portion, and the drain terminal portion are shown in separate sectional views.

  First, a Cr layer is formed on the glass substrate 101 by a sputtering method, and the Cr layer is patterned by a photolithography method (hereinafter referred to as a PL method). Thereby, the gate electrode 102, the gate wiring 103, and the gate terminal 104 are formed on the glass substrate 101 (FIG. 13A).

  Next, a gate insulating film 105 made of silicon nitride, an intrinsic amorphous silicon film 106a and a silicon nitride film are successively formed by CVD on the gate electrode 102, the gate wiring 103, the gate terminal 104, and the glass substrate 101 in order from the lower layer. Form a film. The silicon nitride film is a film for forming a channel protective film. Thereafter, the silicon nitride film is patterned by the PL method, thereby forming the channel protective film 107 (FIG. 13B).

  Then, after removing the natural oxide film on the intrinsic amorphous silicon film 106a by the ammonium fluoride solution treatment, an n-type amorphous silicon film is formed on the channel protective film 107 and the intrinsic amorphous silicon film 106a by the CVD method. . The n-type amorphous silicon film is an ohmic contact layer forming film. A Cr film is formed thereon by sputtering. Thereafter, the Cr film is etched and patterned using the photoresist as a mask to form the source electrode 109, the drain electrode 110, and the drain terminal 111, and the n-type amorphous silicon film and the intrinsic amorphous silicon are formed using the same photoresist as a mask. The ohmic contact layer 108 and the channel film 106 are formed by patterning the film 106a by dry etching. (FIG. 13 (c)).

  Thereafter, an insulating film, which is an overcoat film forming film made of silicon nitride, is formed on the source electrode 109, the drain electrode 110, the gate insulating film 105, the drain terminal 111, and the channel protective film 107 by a CVD method. Then, by patterning the insulating film by the PL method so as to expose the source electrode 109, the gate terminal 104, and the drain terminal 111, contact holes 112 are formed on the source electrode 109, the gate terminal 104, and the drain terminal 111. The At this time, the remaining insulating film becomes the overcoat film 113 (FIG. 13D).

  Then, an ITO film is formed on the overcoat film 113, the source electrode 109, the gate terminal 104, and the drain terminal 111 by a sputtering method, and the ITO film is patterned by the PL method, whereby the pixel electrode 114 is formed. Then, protective films 115 and 116 are formed on the gate terminal 104 and the drain terminal 111 (FIG. 13E).

  Then, a Cr layer is formed on the uppermost layer by sputtering, and the Cr layer is patterned by PL so as to cover the channel protective film 107. This remaining Cr layer becomes the light shielding film 117. Thereby, the thin film transistor substrate 100 is formed.

JP 2007-157717 A

Here, conventionally, in a method of manufacturing a thin film transistor substrate, a different mask sheet is used for each process during patterning of each process. However, since the mask sheet is expensive, it is desired to reduce the number of used mask sheets.
An object of the present invention is to provide a method of manufacturing a thin film transistor substrate that can reduce the number of mask sheets used.

In order to solve the above problems, according to one aspect of the present invention,
A gate electrode provided on a transparent substrate, a first insulating film, a channel film, a channel protective film and an ohmic contact layer stacked in that order from the lower layer on the gate electrode, and a source stacked directly on the ohmic contact layer A transistor having an electrode and a drain electrode;
An input terminal formed simultaneously with the gate electrode on the transparent substrate and connected to the gate electrode or the drain electrode;
A second insulating film stacked on the transistor;
In a method of manufacturing a thin film transistor substrate comprising a light shielding film laminated on the second insulating film so as to overlap the entire channel protective film,
A thin film laminating step of laminating a third insulating film constituting the channel protective film;
A channel protective film forming step of forming the channel protective film after the thin film stacking step;
A light shielding film forming step of forming the light shielding film after the channel protective film forming step;
A terminal exposing step of exposing a part of the input terminal after the light shielding film forming step;
In the thin film stacking step, the first insulating film, the intrinsic semiconductor film forming the channel film, and the third insulating film forming the channel protective film are sequentially formed on the gate electrode, the input terminal, and the transparent substrate from the lower layer. Including the step of laminating,
The channel protective film forming step includes:
A positive photoresist lamination step of laminating a positive photoresist on the third insulating film;
A protective film light-shielding portion overlaid on the channel protective film installation position; and a terminal light-shielding portion overlaid on the input terminal installation position, and a region other than the light-shielding portion is a translucent mask sheet. A first mask sheet disposing step of disposing the protective light shielding portion on the upper surface of the positive photoresist so that the protective light shielding portion overlaps the installation position of the channel protective film and the terminal light shielding portion overlaps the installation position of the input terminal; ,
Light is irradiated from the lower surface side of the transparent substrate and the upper surface side of the mask sheet, respectively, and the portion overlaid on the protective film light shielding portion and the gate electrode, and the terminal light shielding portion and the input terminal are overlaid. A positive photoresist developing step of developing and remaining the positive photoresist with the portion,
Etching using the remaining positive photoresist as a mask, and forming a channel protective film, and a first etching step,
The light shielding film forming step includes a step of laminating the second insulating film and the conductive film forming the light shielding film in order from the lower layer at least in a region overlapping with the transistor, and patterning the conductive film to form the light shielding film. Including
The terminal exposing step includes
A negative photoresist laminating step of laminating a negative photoresist in a region overlapping at least the transistor and the input terminal;
The mask sheet is disposed on the upper surface of the negative photoresist so that the protective film light-shielding portion overlaps the installation position of the channel protective film and the terminal light-shielding portion overlaps the installation position of the input terminal. A two-mask sheet placement process;
A negative photoresist developing step of irradiating light from the upper surface side of the mask sheet to develop and leave the negative photoresist other than the portion overlaid on the protective film light shielding part and the terminal light shielding part;
And a contact hole forming step of forming a first contact hole exposing a part of the input terminal by etching using the remaining negative photoresist and the light shielding film as a mask. A method is provided.

  In the method for manufacturing a thin film transistor substrate, preferably, the light shielding film forming step includes laminating the second insulating film in a region overlapping at least the transistor and the input terminal.

According to another aspect of the invention,
A gate electrode provided on a transparent substrate, a first insulating film, a channel film, a channel protective film and an ohmic contact layer stacked in that order from the lower layer on the gate electrode, and a source stacked directly on the ohmic contact layer A transistor having an electrode and a drain electrode;
An input terminal formed simultaneously with the source electrode and the drain electrode on the first insulating film, and connected to the gate electrode or the drain electrode;
A second insulating film stacked on the transistor and the input terminal;
In a method of manufacturing a thin film transistor substrate comprising a light shielding film laminated on the second insulating film so as to overlap the entire channel protective film,
A thin film laminating step of laminating a third insulating film constituting the channel protective film;
A channel protective film forming step of forming the channel protective film after the thin film stacking step;
A light shielding film forming step of forming the light shielding film after the channel protective film forming step;
A terminal exposing step of exposing a part of the input terminal after the light shielding film forming step;
The thin film stacking step includes a step of stacking the first insulating film, the intrinsic semiconductor film forming the channel film, and the third insulating film forming the channel protective film in order from the lower layer on the gate electrode and the transparent substrate,
The channel protective film forming step includes:
A positive photoresist laminating step of laminating a positive photoresist on the third insulating film;
A protective film light-shielding portion overlaid on the channel protective film installation position; and a terminal light-shielding portion overlaid on the input terminal installation position, and a region other than the light-shielding portion is a translucent mask sheet. A first mask sheet arrangement step of arranging the protective film light-shielding portion so as to overlap the installation position of the channel protective film and the terminal light-shielding portion overlapping the installation position of the input terminal;
A positive photo that irradiates light from the lower surface side of the transparent substrate and the upper surface side of the mask sheet, and develops and remains the positive photoresist in the portion overlaid on the light shielding portion for the protective film and the gate electrode. Resist development process;
Etching using the remaining positive photoresist as a mask, and forming a channel protective film, and a first etching step,
In the light shielding film forming step, the second insulating film and the conductive film forming the light shielding film are stacked in order from the lower layer in a region overlapping at least the transistor and the input terminal, and the conductive film is patterned to form the light shielding film. Including the step of forming the terminal exposing step,
A negative photoresist laminating step of laminating a negative photoresist in a region overlapping at least the transistor and the input terminal;
The mask sheet is disposed on the upper surface of the negative photoresist so that the protective film light-shielding portion overlaps the installation position of the channel protective film and the terminal light-shielding portion overlaps the installation position of the input terminal. A mask sheet arranging step;
A negative photoresist developing step of irradiating light from the upper surface side of the mask sheet to develop and leave the negative photoresist other than the portion overlaid on the protective film light shielding part and the terminal light shielding part;
And a contact hole forming step of forming a first contact hole exposing a part of the input terminal by performing etching using the remaining negative photoresist and the light shielding film as a mask. A manufacturing method is provided.

In the method of manufacturing a thin film transistor substrate, preferably, the mask sheet further includes a source electrode light-shielding portion that is overlapped with a part of the source electrode excluding a region that overlaps the light-shielding film.
In the negative photoresist developing step, light is irradiated from the upper surface side of the mask sheet, and the negative except for the portions overlaid on the protective film light-shielding portion, the terminal light-shielding portion, and the source electrode light-shielding portion. Develop and leave the mold photoresist,
The contact hole forming step performs etching using the remaining negative photoresist and the light shielding film as a mask to form the first contact hole and a second contact hole exposing a part of the source electrode.

According to another aspect of the invention,
A gate electrode provided directly on the transparent substrate, a first insulating film, a channel film, a channel protective film, and an ohmic contact layer stacked in that order from the lower layer on the gate electrode, and stacked directly on the ohmic contact layer A transistor having a source electrode and a drain electrode;
Two types of input terminals provided on the transparent substrate and individually connected to the gate electrode or the drain electrode;
A second insulating film laminated on the transistor and the two types of input terminals;
In a method of manufacturing a thin film transistor substrate comprising a light shielding film laminated on the second insulating film so as to overlap the entire channel protective film,
Forming a first conductive film on the transparent substrate and patterning the first conductive film to form one input terminal of the gate electrode and the two types of input terminals; and
Next, the first insulating film, the intrinsic semiconductor film forming the channel film, and the third insulating film forming the channel protective film are stacked in order from the lower layer on the gate electrode, the one input terminal, and the transparent substrate. A thin film lamination process;
Next, a positive photoresist laminating step of laminating a positive photoresist on the third insulating film,
Next, a protective film light-shielding part overlaid on the installation position of the channel protective film, a first terminal light-shielding part overlaid on the installation position of the one input terminal, and the other input terminal of the two types of input terminals A second terminal light-shielding portion that is overlaid at the installation position, a region other than the light-shielding portion is a translucent mask sheet, and the protective film light-shielding portion overlaps the installation position of the channel protective film, The first terminal light-shielding portion overlaps the installation position of the one input terminal, and the second terminal light-shielding portion overlaps the installation position of the other input terminal. A mask sheet placement step;
Next, light is irradiated from the lower surface side of the transparent substrate and the upper surface side of the mask sheet, respectively, the portion overlaid on the light shielding portion for the protective film and the gate electrode, the light shielding portion for the first terminal, and the one of the ones A positive photoresist developing step of developing and remaining the positive photoresist with the portion overlaid on the input terminal;
Next, etching is performed using the remaining positive photoresist as a mask to form the channel protective film; and
Next, on the intrinsic semiconductor film and the channel protective film, an n-type semiconductor film forming the ohmic contact layer in order from a lower layer, a second conductive film forming the source electrode, the drain electrode, and the other input terminal And the intrinsic semiconductor film, the n-type semiconductor film, and the second conductive film are patterned to form the channel layer, the ohmic contact layer, the source electrode, the drain electrode, and the other input terminal. A device area forming step to be formed;
Next, the second insulating film is stacked on the source electrode, the drain electrode, the channel protective film, the two types of input terminals, and the first insulating film, and the second insulating film is formed on the second insulating film. A step of forming a light shielding film by laminating a third conductive film forming a light shielding film, and patterning the third conductive film so as to overlap the entire channel protective film;
A negative photoresist lamination step of laminating a negative photoresist on the second insulating film and the light shielding film;
The protective film light-shielding portion overlaps with the installation position of the channel protective film, the first terminal light-shielding portion overlaps with the installation position of the one input terminal, and the second terminal light-shielding portion overlaps with the other input terminal. A second mask sheet arrangement step of arranging the mask sheet on the upper surface of the negative photoresist so as to overlap the installation position;
Irradiate light from the upper surface side of the mask sheet to develop the negative photoresist other than the portion overlaid on the protective film light shielding part, the first terminal light shielding part, and the second terminal light shielding part. A negative photoresist development process to be left;
Etching the remaining negative photoresist and the light-shielding film as a mask to form a pair of first contact holes exposing a part of each of the two types of input terminals. A method for manufacturing a thin film transistor substrate is provided.

In the method of manufacturing a thin film transistor substrate, preferably, the mask sheet further includes a source electrode light-shielding portion that is overlapped with a part of the source electrode excluding a region that overlaps the light-shielding film.
In the negative photoresist developing step, light is irradiated from the upper surface side of the mask sheet, and the light shielding part for the protective film, the light shielding part for the first terminal, the light shielding part for the second terminal, and the light shielding for the source electrode. The negative photoresist other than the part overlaid on the part is developed and left,
The contact hole forming step performs etching using the remaining negative photoresist and the light shielding film as a mask to form the first contact hole and a second contact hole exposing a part of the source electrode.
In the method of manufacturing a thin film transistor substrate, preferably, the input terminal is connected to one of the drain electrode and the gate electrode that is formed simultaneously with the formation of the input terminal.

According to another aspect of the invention,
A method of manufacturing a thin film transistor substrate in which a bottom gate type transistor and a pixel electrode connected to a drain electrode of the transistor are formed on a transparent substrate,
Forming a light-shielding first conductive film on the transparent substrate and patterning the first conductive film to form a gate electrode;
Applying a positive resist on the first insulating film formed on the gate electrode; and
Exposing the positive resist through a mask sheet disposed on the positive resist and exposing the positive resist from the back surface of the transparent substrate;
Forming a first resist pattern by developing the exposed positive resist; and
Etching the first insulating film using the first resist pattern as a mask to form a channel protection portion disposed so as to overlap the gate electrode;
Forming a drain electrode by patterning the second conductive film while forming a second conductive film on the channel protection portion; and
Forming the second insulating film on the drain electrode;
A light shielding film is formed on the second insulating film, and the light shielding film is patterned to form a light shielding pattern that covers the channel protection portion and exposes at least a part of the drain electrode from the light shielding film. Process,
Applying a negative resist to the upper layer of the light shielding pattern;
Exposing the negative resist through the mask sheet disposed on the negative resist;
Forming a second resist pattern by developing the exposed negative resist;
Forming a contact hole connecting the drain electrode and the pixel electrode in a region corresponding to the drain electrode by etching the second insulating film using the second resist pattern as a mask. ,
The mask sheet is provided with a method of manufacturing a thin film transistor substrate, wherein a light shielding portion is formed in a region corresponding to the channel protection portion and a region corresponding to the light shielding pattern.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the thin-film transistor substrate which can reduce the use number of mask sheets can be provided.

It is the front view which showed typically the whole structure of the thin-film transistor substrate of this embodiment. FIG. 2 is a transmission plan view showing a schematic configuration of a pixel portion provided in the thin film transistor substrate of FIG. 1. FIG. 2 is a transmission plan view illustrating a schematic configuration of a drain terminal portion provided in the thin film transistor substrate of FIG. 1. FIG. 2 is a transmission plan view showing a schematic configuration of a gate terminal portion provided in the thin film transistor substrate of FIG. 1. FIG. 5 is a cross-sectional view taken along the line VV in FIGS. 2, 3, and 4, and is a cross-sectional view illustrating a cross-sectional configuration of a pixel portion, a gate terminal portion, and a drain terminal portion. It is the front view which showed typically schematic structure of the mask sheet used with the manufacturing method of the thin-film transistor substrate of this embodiment. It is process drawing of the manufacturing method of the thin-film transistor substrate of this embodiment. It is sectional drawing which looked at each process of the manufacturing method of the thin-film transistor substrate of this embodiment from the VV cut line of FIG. It is sectional drawing which looked at each process of the manufacturing method of the thin-film transistor substrate of this embodiment from the VV cut line of FIG. It is sectional drawing which looked at each process of the manufacturing method of the thin-film transistor substrate of this embodiment from the VV cut line of FIG. FIG. 8 is an explanatory diagram showing the relationship between each part of the mask sheet and the positive photoresist during the positive photoresist developing process of FIG. 7. It is explanatory drawing which shows the relationship between each part of a mask sheet at the time of the negative photoresist development process of FIG. 7, and a negative photoresist. It is sectional drawing which shows each process of the manufacturing method of the conventional thin-film transistor substrate.

  The best mode for carrying out the present invention will be described below with reference to the drawings. However, although various technically preferable limitations for implementing the present invention are given to the embodiments described below, the scope of the invention is not limited to the following embodiments and illustrated examples.

FIG. 1 is a front view schematically showing the entire configuration of the thin film transistor substrate of the present embodiment.
As shown in FIG. 1, the thin film transistor substrate 1 includes a plurality of gate wirings 2 arranged in a row direction on one surface of a transparent substrate P made of a glass substrate, and a plurality of gate wirings 2 orthogonal to the plurality of gate wirings 2. Drain wiring 3 is arranged in the column direction. A single auxiliary capacitance line 4 is arranged in parallel with each gate line 2. Further, a gate terminal portion 21 is provided at one end of each gate wiring 2. A drain terminal portion 31 is provided at one end of each drain wiring 3. In this case, each region formed by the two adjacent gate wirings 2 and 2 and the two adjacent drain wirings 3 and 3 forms a pixel portion 5, and a plurality of pixel portions 5 are arranged in a matrix. Thus, the thin film transistor substrate 1 is formed.

  FIG. 2 is a transmission plan view showing a schematic configuration of the pixel unit 5. As shown in FIG. 2, each pixel unit 5 has a substantially rectangular pixel electrode 51 formed in a region surrounded by the gate wiring 2 and the drain wiring 3. A bottom gate type transistor 6 as a switching element is disposed at one corner of the pixel electrode 51. The pixel electrode 51 is electrically connected to the gate wiring 2 and the drain wiring 3 through the transistor 6.

FIG. 3 is a transmission plan view showing a schematic configuration of the drain terminal portion 31. As shown in FIG. 3, the drain terminal portion 31 is formed by stacking drain metals in a substantially square shape. One end of the drain terminal portion 31 is connected to the drain wiring 3.
FIG. 4 is a transparent plan view showing a schematic configuration of the gate terminal portion 21. As shown in FIG. 4, the gate terminal portion 21 is formed by stacking gate metals in a substantially square shape. One end of the gate terminal portion 21 is connected to the gate wiring 2.

  Next, the cross-sectional structures of the pixel portion 5, the gate wiring 2, and the drain wiring 3 will be described. FIG. 5 is a cross-sectional view taken along the line VV in FIGS. 2, 3, and 4, and is a cross-sectional view showing a cross-sectional configuration of the pixel portion 5, the gate terminal portion 21, and the drain terminal portion 31.

  First, the cross-sectional structure of the pixel unit 5 will be described. As shown in FIG. 5, the pixel unit 5 includes a gate electrode 22 and a gate wiring 2 made of a conductive film formed on the transparent substrate P. The conductive film that forms the gate electrode 22 and the gate wiring 2 is formed of, for example, at least one metal film of Cr, Al, or Mo, or an alloy film thereof. The gate electrode 22 and the gate wiring 2 are integrally formed so as to be electrically connected. The gate electrode 22 is disposed at a position where the transistor 6 is formed.

  In the pixel portion 5, a first insulating film 61 made of, for example, silicon oxide or silicon nitride is formed on the gate electrode 22, the gate wiring 2, and the transparent substrate P. As a result, the gate electrode 22 is disposed on the lower layer side of the first insulating film 61.

Above the gate electrode 22 on the upper surface of the first insulating film 61, a channel film 62a made of an intrinsic semiconductor film 62 such as intrinsic amorphous silicon is provided. A channel protective film 63 made of silicon nitride or the like is provided at substantially the center of the upper surface of the channel film 62a.
Then, ohmic contact layers 64 and 65 made of n-type amorphous silicon, which is an n-type semiconductor film, are provided on both sides of the upper surface of the channel protective film 63 and on the upper surface of the channel film 62a on both sides thereof.

  A source electrode 66 and a drain electrode 67 made of, for example, Cr are provided on the upper surfaces of the ohmic contact layers 64 and 65. As a result, the source electrode 66 and the drain electrode 67 are arranged on the upper layer side of the first insulating film 61. The drain electrode 67 is electrically connected to the drain wiring 3 (see FIG. 2). Thus, the transistor 6 includes the gate electrode 22, the first insulating film 61, the channel film 62a, the channel protective film 63, the ohmic contact layers 64 and 65, the source electrode 66, and the drain electrode 67.

  A second insulating film 68 made of silicon oxide or the like is formed on the first insulating film 61, the channel protective film 63, the source electrode 66 and the drain electrode 67. A transistor contact hole 69 as an opening penetrating the second insulating film 68 is formed above the source electrode 66 in the second insulating film 68. Specifically, the transistor contact hole 69 is formed in a portion that does not overlap with the channel protective film 63 when viewed from the upper side where the mask is disposed.

A transparent pixel electrode 51 made of ITO or the like is electrically connected to the source electrode 66 through the transistor contact hole 69 at a position facing the pixel portion 5 on the upper surface of the second insulating film 68. It is formed as follows.
Further, a light shielding film 70 made of a metal film such as Cr is formed at least in a region overlapping with the channel protective film 63 on the upper surface of the second insulating film 68.

  Next, the cross-sectional structure of the gate terminal portion 21 will be described. As shown in FIG. 5, the gate terminal portion 21 includes a gate terminal 23 made of a metal film such as Cr formed on the transparent substrate P. The first insulating film 61 is formed on the peripheral portion excluding the central portion of the gate terminal 23 in the gate terminal portion 21, and is formed on the transparent substrate P in the periphery of the gate terminal portion 21. An insulating film 61 is formed so as to cover the periphery of the gate terminal 23. The second insulating film 68 is formed on the first insulating film 61 in the gate terminal portion 21, and the second insulating film 68 covers the periphery of the gate terminal 23. The central portion of the upper surface of the gate terminal 23 is exposed from the first insulating film 61 and the second insulating film 68 by the gate contact hole 24 formed through the first insulating film 61 and the second insulating film 68. . Then, a transparent protective film 25 made of ITO or the like is formed from the gate terminal 23 to the second insulating film 68 while being connected to the upper surface of the gate terminal 23 exposed in the gate contact hole 24. Yes.

  Next, the cross-sectional structure of the drain terminal portion 31 will be described. As shown in FIG. 5, the drain terminal portion 31 is formed on the first insulating film 61 formed on the transparent substrate P, for example, an intrinsic semiconductor film 33 for drain made of intrinsic amorphous silicon or the like, n-type amorphous silicon or the like. A drain n-type semiconductor film 34 and a drain terminal 35 made of a metal film such as Cr are laminated in order from the lower layer. The second insulating film 68 is formed on the periphery of the drain terminal portion 31 excluding the central portion of the drain terminal 35 and on the first insulating film 61, and the second insulating film covers the periphery of the drain terminal 35. The central portion of the upper surface of the drain terminal 35 is exposed from the second insulating film 68 through a drain contact hole 36 formed so as to penetrate the second insulating film 68. A transparent protective film 37 made of ITO or the like is formed from the drain terminal 35 to the second insulating film 68 in a state of being connected to the upper surface of the drain terminal 35 exposed in the drain contact hole 36. .

  Next, a mask sheet 90 used in the method for manufacturing the thin film transistor substrate 1 will be described with reference to FIG. FIG. 6 is a front view schematically showing a schematic configuration of the mask sheet 90. In FIG. 6, a two-dot chain line L <b> 1 along the row direction indicates the installation position of the gate wiring 2, and a two-dot chain line L <b> 2 along the column direction indicates the installation position of the drain wiring 3. These two-dot chain lines L1 and L2 are shown for convenience and are not provided on the actual mask sheet 90.

  The mask sheet 90 is a translucent sheet material and is formed in a size that overlaps the entire thin film transistor substrate 1. As shown in FIG. 6, the mask sheet 90 includes a plurality of first terminal light shielding portions 91, second terminal light shielding portions 92, protective film light shielding portions 93, and source electrode light shielding portions 94.

The first terminal light-shielding portions 91 are formed at positions where they are overlapped with the installation positions of the respective gate terminals 23, and are formed in a shape slightly smaller than the gate terminals 23.
The second terminal light-shielding portions 92 are formed at positions where the drain terminals 35 are overlapped with the installation positions of the respective drain terminals 35, and are formed in a shape slightly smaller than the drain terminals 35.
The protective film light-shielding portion 93 is formed at a position overlapping the installation position of the channel protective film 63 of each pixel unit 5, and is formed in the same shape as the channel protective film 63.
The source electrode light-shielding portion 94 is formed at a position overlapping with a part of the source electrode 66 of each pixel portion 5 except for the region overlapping the light-shielding film 70, and is formed in the same shape as the transistor contact hole 69. Has been.

  Next, a method for manufacturing the thin film transistor substrate 1 will be described with reference to FIGS. FIG. 7 is a process diagram of the method of manufacturing the thin film transistor substrate 1, and FIGS. 8 to 10 are explanatory views schematically showing states in each process.

  In the electrode formation step S1, as shown in FIG. 8A, a first conductive film made of Cr is formed on the transparent substrate P by sputtering. After the film formation, the first conductive film is patterned by the PL method to form the gate electrode 22, the gate wiring 2, the gate terminal 23, and the auxiliary capacitance line 4 (not shown).

  In the thin film stacking step S2, as shown in FIG. 8 (b), first on the gate electrode 22 formed on the upper surface of the transparent substrate P, on the gate wiring 2, on the gate terminal 23, and on the transparent substrate P in order from the lower layer. The insulating film 61, the intrinsic semiconductor film 62, and the third insulating film 72 are stacked by the CVD method.

  In the positive photoresist lamination step S3, a positive photoresist 73 is laminated on the upper surface of the third insulating film 72 by coating.

  In the first mask sheet arranging step S4, the mask sheet 90 is arranged on the upper surface of the positive photoresist 73 so that the plurality of light shielding portions provided in the mask sheet 90 overlap each predetermined position to be arranged accurately. Specifically, the first terminal light-shielding portion 91 is disposed so as to overlap the installation position of each gate terminal 23, and the second terminal light-shielding portion 92 is disposed so as to overlap the installation position of each drain terminal 35, and the protective film The light shielding portion 93 is disposed so as to overlap with the installation position of the channel protection film 63 of each pixel portion 5, and the source electrode light shielding portion 94 is the installation position of the source electrode 66 among the source electrodes 66 of each pixel portion 5. Thus, they are arranged so as to overlap a part of the region excluding the region overlapping the light shielding film 70.

  In the positive photoresist developing step S5, light is irradiated from the lower surface side of the transparent substrate P and the upper surface side of the mask sheet 90, respectively. In FIG. 8B, arrows A and B indicate irradiation light. The light A irradiated from the upper surface side of the mask sheet 90 is blocked by the first terminal light shielding portion 91, the second terminal light shielding portion 92, the protective film light shielding portion 93, and the source electrode light shielding portion 94. On the other hand, the light B irradiated from the lower surface side of the transparent substrate P is blocked by the gate electrode 22 and the gate terminal 23. That is, light is not irradiated to the region overlapping the gate electrode 22 and the light shielding portion 93 for the protective film and the region overlapping the gate terminal 23 and the light shielding portion 91 for the first terminal, and light is irradiated to the other regions. Is done.

FIG. 11 shows the relationship between each part of the mask sheet 90 and the positive photoresist 73 during the positive photoresist developing step S5. As shown in FIG. 11A, the protective film light-shielding portion 93 and the source electrode light-shielding portion 94 of the mask sheet 90 shield light A, and the gate electrode 22 shields light B from below. The portion of the positive photoresist 73 superimposed on the source electrode light-shielding portion 94 is not developed because it is irradiated with light B from below. Further, the portion of the positive photoresist 73 that is superimposed on the protective film light-shielding portion 93 is developed because it is not irradiated with the light B from below. In FIG. 11D, the area where the positive photoresist 73 remains is an area to be developed.
Further, as shown in FIGS. 11B and 11C, the first terminal light-shielding portion 91 and the second terminal light-shielding portion 92 of the mask sheet 90 shield light A, and the gate terminal 23 is viewed from below. Light B is shielded. The portion of the positive photoresist 73 superimposed on the second terminal light-shielding portion 92 is not developed because it is irradiated with light B from below. Further, the positive photoresist 73 in the portion superimposed on the one-terminal light-shielding portion 91 is developed because the light B from below is not irradiated. In FIGS. 11E and 11F, the area where the positive photoresist 73 remains is an area to be developed.

  Thus, the positive photoresist 73 in a region not irradiated with light, that is, a portion overlapped with the gate electrode 22 and the light shielding portion 93 for the protective film and a portion overlapped with the gate terminal 23 and the light shielding portion 91 for the first terminal. Is developed and remains (see FIG. 8C). This remaining region becomes the first resist pattern.

  In the first etching step S6, dry etching is performed using the remaining positive photoresist 73 as a mask. As a result, the third insulating film 72 remains on the gate electrode 22 and the gate terminal 23. Among these, the third insulating film 72 on the gate electrode 22 becomes the channel protective film 63, and the third insulating film 72 on the gate terminal 23 becomes the third insulating film 27 for the gate. (See FIG. 8D).

  As shown in FIG. 7, the channel protective film forming step for forming the channel protective film 63 includes a positive photoresist laminating step S3, a first mask sheet arranging step S4, a positive photoresist developing step S5, and a first etching step S6. Is included.

  Next, in a device area forming step S7, the native oxide film of the intrinsic semiconductor film 62 is removed by an ammonium fluoride solution treatment, and then CVD is performed on the intrinsic semiconductor film 62, the channel protective film 63, and the gate third insulating film 27. Then, an n-type semiconductor film 74 is formed. Then, a second conductive film 75 made of Cr or the like is formed on the n-type semiconductor film 74 by sputtering. Thereafter, the second conductive film 75 made of Cr or the like is etched and patterned using a photoresist as a mask. By this patterning, the source electrode 66 and the drain electrode 67 are formed on the n-type semiconductor film 62 in the pixel portion 5, and the drain terminal 35 is formed on the n-type semiconductor film 74 in the drain terminal portion 31. Further, in the gate terminal portion 21, all of the second conductive film 75b formed on the n-type semiconductor film 74 is removed.

  Further, the n-type semiconductor film 74 and the intrinsic semiconductor film 62 are patterned by dry etching using the same photoresist as a mask. By this patterning, in the pixel portion 5, a channel film 62 a is formed on the first insulating film 61, and the ohmic contact layer 64 is overlaid on the channel film 62 a and the channel protective film 63 so as to overlap the source electrode 66 and the drain electrode 67. , 65 are formed. In the drain terminal portion 31, a drain intrinsic semiconductor film 33 is formed on the first insulating film 61, and a drain n-type semiconductor film 34 is formed on the drain intrinsic semiconductor film 33 so as to overlap the drain terminal 35. The In the gate terminal portion 21, the gate intrinsic semiconductor film 26 is formed on the first insulating film 61 so as to overlap the gate third insulating film, and n formed on the gate third insulating film 27. All of the mold semiconductor film 74 is removed. (See FIG. 9A).

  In the light shielding film forming step S8, as shown in FIG. 9B, on the source electrode 66, on the drain electrode 67, on the channel protective film 63, on the gate third insulating film 27, on the drain terminal 35, and on the first insulating film. A second insulating film 68 is formed on 61 by CVD. Then, as shown in FIG. 9C, after the third conductive film 76 is formed on the second insulating film 68, the third conductive film 76 is patterned by the PL method to cover the channel protective film 63. A film 70 is formed. The light shielding film 70 forms a light shielding pattern that covers the channel protection portion 63 and exposes at least a part of the drain electrode 67.

  In the negative photoresist lamination step S9, as shown in FIG. 9D, a negative photoresist 77 is laminated on the second insulating film 68 and the light shielding film 70 by coating.

  In the second mask sheet arranging step S10, as in the first mask sheet arranging step S4 described above, the masks are provided so that the plurality of light shielding portions provided in the mask sheet 90 are accurately overlapped with the respective predetermined positions to be arranged. A sheet 90 is placed on the upper surface of the negative photoresist 77.

  In the negative photoresist developing step S <b> 11, light is irradiated from the upper surface side of the mask sheet 90. In FIG. 9D, an arrow C indicates the irradiation light. The light C irradiated from the upper surface side of the mask sheet 90 is blocked by the first terminal light-blocking portion 91, the second terminal light-blocking portion 92, the protective film light-blocking portion 93, and the source electrode light-blocking portion 94.

FIG. 12 shows the relationship between each part of the mask sheet 90 and the negative photoresist 77 in the negative photoresist developing step S11. As shown in FIG. 12A, the protective film light-shielding portion 93 and the source electrode light-shielding portion 94 of the mask sheet 90 shield light C. Accordingly, the negative type photoresist 77 other than the portion overlaid on the light shielding portions 93 and 94 is developed because it is irradiated with the light C from above. In FIG. 12D, the area where the negative photoresist 77 remains is an area to be developed.
Further, as shown in FIGS. 12B and 12C, the first terminal light shielding portion 91 and the second terminal light shielding portion 92 of the mask sheet 90 shield light C. Accordingly, the negative type photoresist 77 other than the portion overlaid on the light shielding portions 91 and 92 is developed because it is irradiated with the light C from above. In FIGS. 11E and 11F, the area where the negative photoresist 77 remains is an area to be developed.

  In this way, a negative type other than a region irradiated with light, that is, a portion overlaid on the first terminal light shielding portion 91, the second terminal light shielding portion 92, the protective film light shielding portion 93, and the source electrode light shielding portion 94. The photoresist 77 is developed and remains (see FIG. 10A). This remaining region becomes the second resist pattern.

  In the contact hole forming step S12, dry etching is performed using the remaining negative photoresist 77 and the light-shielding film 70 exposed in the negative photoresist developing step S11 as a mask, so that a transistor contact hole 69 and a gate contact hole are formed. 24 and the drain contact hole 36 are formed, and the negative photoresist 77 is removed (see FIG. 10B).

  As shown in FIG. 7, the terminal exposure process for exposing a part of the input terminals (gate terminal 23 and drain terminal 35) includes the negative photoresist lamination process S9, the second mask sheet placement process S10, and the negative photoresist development. The process S11 and the contact hole formation process S12 are included.

  In the pixel electrode stacking step S13, an ITO film is formed on the second insulating film 60, the light shielding film 70, the source electrode, the gate terminal, and the drain terminal by sputtering, and then patterned by the PL method. Thus, the pixel electrode 51 and the protective films 25 and 37 are formed. Thereby, the thin film transistor substrate 1 shown in FIG. 5 is manufactured.

  As described above, according to this embodiment, in the channel protective film forming step of forming the channel protective film, the positive photoresist is exposed by exposing from the upper surface side of the mask sheet 90 and the lower surface side of the transparent substrate P. 73 development is possible. Further, in the terminal exposure process in which a part of the input terminal is exposed, the negative photoresist 77 can be developed by exposing from the upper surface side of the mask sheet 90. Thus, even if the common mask sheet 90 is used in the channel protective film forming step and the terminal exposing step, the mask according to each step can be used. Can be reduced.

  Prior to the negative photoresist lamination step S9, in the gate terminal portion 21, the second insulating film 68 is gated through the first insulating film 61, the gate intrinsic semiconductor film 26, and the gate third insulating film 27. The negative photoresist 77 is laminated on the second insulating film 68 in the gate terminal portion 21 in the negative photoresist laminating step S <b> 9 covering the terminal 23. Thereafter, when the contact hole forming step S12 is performed, the first insulating film 61, the second insulating film 68, the gate intrinsic semiconductor film 26, and the gate third insulating film 27 on the gate terminal 23 are removed to form the gate. A contact hole 24 is formed. Thus, even if a plurality of insulating films and semiconductor films are stacked on the gate terminal 23, the gate contact hole 24 can be formed in one contact hole forming step S12.

  In the negative photoresist developing step S11, light is irradiated from the upper surface side of the mask sheet 90 to protect the light shielding part 93 for the protective film, the light shielding part 91 for the first terminal, the light shielding part 92 for the second terminal, and the source electrode. The negative photoresist 77 other than the portion overlapping the light shielding portion 94 is developed and left. In the contact hole forming step S12, etching is performed using the remaining negative photoresist 77 and the light shielding film 70 as a mask, and the gate contact hole 24 is formed. A drain contact hole 36 and a transistor contact hole 69 are formed. In this way, the first contact holes (gate contact hole 24 and drain contact hole 36) formed on the input terminal and the transistor contact hole 69 formed on the transistor can be formed in a lump. It becomes possible.

Note that the present embodiment is not limited to the above embodiment and can be modified as appropriate.
For example, in the above embodiment, in the gate terminal portion 21, the second insulating film, the gate intrinsic semiconductor film 26, the gate third insulating film 27, and the first insulating film are removed to expose the gate terminal 23. Although the contact hole 24 is formed, the present invention is also applied to the case where the intrinsic semiconductor film for gate, the third insulating film for gate, and the first insulating film are removed to form the contact hole 24 in order to expose the gate terminal 23. Is possible.

DESCRIPTION OF SYMBOLS 1 Thin-film transistor substrate 2 Gate wiring 3 Drain wiring 4 Auxiliary capacity line 5 Pixel part 6 Transistor 21 Gate terminal part 22 Gate electrode 23 Gate terminal 24 Gate contact hole (first contact hole)
25 protective film 26 intrinsic semiconductor film for gate 27 third insulating film for gate 31 drain terminal portion 33 intrinsic semiconductor film for drain 34 n-type semiconductor film for drain 35 drain terminal 36 drain contact hole (first contact hole)
37 protective film 51 pixel electrode 61 first insulating film 62 intrinsic semiconductor film 62a channel film 63 channel protective film 64, 65 ohmic contact layer 66 source electrode 67 drain electrode 68 second insulating film 69 transistor contact hole (second contact hole)
70 light shielding film 72 third insulating film 73 positive photoresist 74 n type semiconductor film 75 second conductive film 76 third conductive film 77 negative photoresist 90 mask sheet 91 first terminal light shielding part (terminal light shielding part)
92 2nd terminal shading part (terminal shading part)
93 light shielding part for protective film 94 light shielding part for source electrode

Claims (8)

A gate electrode provided on a transparent substrate, a first insulating film, a channel film, a channel protective film and an ohmic contact layer stacked in that order from the lower layer on the gate electrode, and a source stacked directly on the ohmic contact layer A transistor having an electrode and a drain electrode;
An input terminal formed simultaneously with the gate electrode on the transparent substrate and connected to the gate electrode or the drain electrode;
A second insulating film stacked on the transistor;
In a method of manufacturing a thin film transistor substrate comprising a light shielding film laminated on the second insulating film so as to overlap the entire channel protective film,
A thin film laminating step of laminating a third insulating film constituting the channel protective film;
A channel protective film forming step of forming the channel protective film after the thin film stacking step;
A light shielding film forming step of forming the light shielding film after the channel protective film forming step;
A terminal exposing step of exposing a part of the input terminal after the light shielding film forming step;
In the thin film stacking step, the first insulating film, the intrinsic semiconductor film forming the channel film, and the third insulating film forming the channel protective film are sequentially formed on the gate electrode, the input terminal, and the transparent substrate from the lower layer. Including the step of laminating,
The channel protective film forming step includes:
A positive photoresist lamination step of laminating a positive photoresist on the third insulating film;
A protective film light-shielding portion overlaid on the channel protective film installation position; and a terminal light-shielding portion overlaid on the input terminal installation position, and a region other than the light-shielding portion is a translucent mask sheet. A first mask sheet disposing step of disposing the protective light shielding portion on the upper surface of the positive photoresist so that the protective light shielding portion overlaps the installation position of the channel protective film and the terminal light shielding portion overlaps the installation position of the input terminal; ,
Light is irradiated from the lower surface side of the transparent substrate and the upper surface side of the mask sheet, respectively, and the portion overlaid on the protective film light shielding portion and the gate electrode, and the terminal light shielding portion and the input terminal are overlaid. A positive photoresist developing step of developing and remaining the positive photoresist with the portion,
Etching using the remaining positive photoresist as a mask, and forming a channel protective film, and a first etching step,
The light shielding film forming step includes a step of laminating the second insulating film and the conductive film forming the light shielding film in order from the lower layer at least in a region overlapping with the transistor, and patterning the conductive film to form the light shielding film. Including
The terminal exposing step includes
A negative photoresist laminating step of laminating a negative photoresist in a region overlapping at least the transistor and the input terminal;
The mask sheet is disposed on the upper surface of the negative photoresist so that the protective film light-shielding portion overlaps the installation position of the channel protective film and the terminal light-shielding portion overlaps the installation position of the input terminal. A two-mask sheet placement process;
A negative photoresist developing step of irradiating light from the upper surface side of the mask sheet to develop and leave the negative photoresist other than the portion overlaid on the protective film light shielding part and the terminal light shielding part;
And a contact hole forming step of forming a first contact hole exposing a part of the input terminal by etching using the remaining negative photoresist and the light shielding film as a mask. Method. In the manufacturing method of the thin-film transistor substrate of Claim 1,
The method of manufacturing a thin film transistor substrate, wherein the light shielding film forming step includes laminating the second insulating film at least in a region overlapping with the transistor and the input terminal. A gate electrode provided on a transparent substrate, a first insulating film, a channel film, a channel protective film and an ohmic contact layer stacked in that order from the lower layer on the gate electrode, and a source stacked directly on the ohmic contact layer A transistor having an electrode and a drain electrode;
An input terminal formed simultaneously with the source electrode and the drain electrode on the first insulating film, and connected to the gate electrode or the drain electrode;
A second insulating film stacked on the transistor and the input terminal;
In a method of manufacturing a thin film transistor substrate comprising a light shielding film laminated on the second insulating film so as to overlap the entire channel protective film,
A thin film laminating step of laminating a third insulating film constituting the channel protective film;
A channel protective film forming step of forming the channel protective film after the thin film stacking step;
A light shielding film forming step of forming the light shielding film after the channel protective film forming step;
A terminal exposing step of exposing a part of the input terminal after the light shielding film forming step;
The thin film stacking step includes a step of stacking the first insulating film, the intrinsic semiconductor film forming the channel film, and the third insulating film forming the channel protective film in order from the lower layer on the gate electrode and the transparent substrate,
The channel protective film forming step includes:
A positive photoresist laminating step of laminating a positive photoresist on the third insulating film;
A protective film light-shielding portion overlaid on the channel protective film installation position; and a terminal light-shielding portion overlaid on the input terminal installation position, and a region other than the light-shielding portion is a translucent mask sheet. A first mask sheet arrangement step of arranging the protective film light-shielding portion so as to overlap the installation position of the channel protective film and the terminal light-shielding portion overlapping the installation position of the input terminal;
A positive photo that irradiates light from the lower surface side of the transparent substrate and the upper surface side of the mask sheet, and develops and remains the positive photoresist in the portion overlaid on the light shielding portion for the protective film and the gate electrode. Resist development process;
Etching using the remaining positive photoresist as a mask, and forming a channel protective film, and a first etching step,
In the light shielding film forming step, the second insulating film and the conductive film forming the light shielding film are stacked in order from the lower layer in a region overlapping at least the transistor and the input terminal, and the conductive film is patterned to form the light shielding film. Including the step of forming the terminal exposing step,
A negative photoresist laminating step of laminating a negative photoresist in a region overlapping at least the transistor and the input terminal;
The mask sheet is disposed on the upper surface of the negative photoresist so that the protective film light-shielding portion overlaps the installation position of the channel protective film and the terminal light-shielding portion overlaps the installation position of the input terminal. A mask sheet arranging step;
A negative photoresist developing step of irradiating light from the upper surface side of the mask sheet to develop and leave the negative photoresist other than the portion overlaid on the protective film light shielding part and the terminal light shielding part;
And a contact hole forming step of forming a first contact hole exposing a part of the input terminal by performing etching using the remaining negative photoresist and the light shielding film as a mask. Production method. In the manufacturing method of the thin-film transistor substrate as described in any one of Claims 1-3,
The mask sheet further includes a source electrode light-shielding portion that is overlapped with a part of the source electrode excluding a region that overlaps the light-shielding film.
In the negative photoresist developing step, light is irradiated from the upper surface side of the mask sheet, and the negative except for the portions overlaid on the protective film light-shielding portion, the terminal light-shielding portion, and the source electrode light-shielding portion. Develop and leave the mold photoresist,
The contact hole forming step performs etching using the remaining negative photoresist and the light shielding film as a mask to form the first contact hole and a second contact hole exposing a part of the source electrode. A method of manufacturing a thin film transistor substrate, characterized in that: A gate electrode provided directly on the transparent substrate, a first insulating film, a channel film, a channel protective film, and an ohmic contact layer stacked in that order from the lower layer on the gate electrode, and stacked directly on the ohmic contact layer A transistor having a source electrode and a drain electrode;
Two types of input terminals provided on the transparent substrate and individually connected to the gate electrode or the drain electrode;
A second insulating film laminated on the transistor and the two types of input terminals;
In a method of manufacturing a thin film transistor substrate comprising a light shielding film laminated on the second insulating film so as to overlap the entire channel protective film,
Forming a first conductive film on the transparent substrate and patterning the first conductive film to form one input terminal of the gate electrode and the two types of input terminals; and
Next, the first insulating film, the intrinsic semiconductor film forming the channel film, and the third insulating film forming the channel protective film are stacked in order from the lower layer on the gate electrode, the one input terminal, and the transparent substrate. A thin film lamination process;
Next, a positive photoresist laminating step of laminating a positive photoresist on the third insulating film,
Next, a protective film light-shielding part overlaid on the installation position of the channel protective film, a first terminal light-shielding part overlaid on the installation position of the one input terminal, and the other input terminal of the two types of input terminals A second terminal light-shielding portion that is overlaid at the installation position, a region other than the light-shielding portion is a translucent mask sheet, and the protective film light-shielding portion overlaps the installation position of the channel protective film, The first terminal light-shielding portion overlaps the installation position of the one input terminal, and the second terminal light-shielding portion overlaps the installation position of the other input terminal. A mask sheet placement step;
Next, light is irradiated from the lower surface side of the transparent substrate and the upper surface side of the mask sheet, respectively, the portion overlaid on the light shielding portion for the protective film and the gate electrode, the light shielding portion for the first terminal, and the one of the ones A positive photoresist developing step of developing and remaining the positive photoresist with the portion overlaid on the input terminal;
Next, etching is performed using the remaining positive photoresist as a mask to form the channel protective film; and
Next, on the intrinsic semiconductor film and the channel protective film, an n-type semiconductor film forming the ohmic contact layer in order from a lower layer, a second conductive film forming the source electrode, the drain electrode, and the other input terminal And the intrinsic semiconductor film, the n-type semiconductor film, and the second conductive film are patterned to form the channel layer, the ohmic contact layer, the source electrode, the drain electrode, and the other input terminal. A device area forming step to be formed;
Next, the second insulating film is stacked on the source electrode, the drain electrode, the channel protective film, the two types of input terminals, and the first insulating film, and the second insulating film is formed on the second insulating film. A step of forming a light shielding film by laminating a third conductive film forming a light shielding film, and patterning the third conductive film so as to overlap the entire channel protective film;
A negative photoresist lamination step of laminating a negative photoresist on the second insulating film and the light shielding film;
The protective film light-shielding portion overlaps with the installation position of the channel protective film, the first terminal light-shielding portion overlaps with the installation position of the one input terminal, and the second terminal light-shielding portion overlaps with the other input terminal. A second mask sheet arrangement step of arranging the mask sheet on the upper surface of the negative photoresist so as to overlap the installation position;
Irradiate light from the upper surface side of the mask sheet to develop the negative photoresist other than the portion overlaid on the protective film light shielding part, the first terminal light shielding part, and the second terminal light shielding part. A negative photoresist development process to be left;
Etching the remaining negative photoresist and the light-shielding film as a mask to form a pair of first contact holes exposing a part of each of the two types of input terminals. A method for manufacturing a thin film transistor substrate. In the manufacturing method of the thin-film transistor substrate of Claim 5,
The mask sheet further includes a source electrode light-shielding portion that is overlapped with a part of the source electrode excluding a region that overlaps the light-shielding film.
In the negative photoresist developing step, light is irradiated from the upper surface side of the mask sheet, and the light shielding part for the protective film, the light shielding part for the first terminal, the light shielding part for the second terminal, and the light shielding for the source electrode. The negative photoresist other than the part overlaid on the part is developed and left,
The contact hole forming step performs etching using the remaining negative photoresist and the light shielding film as a mask to form the first contact hole and a second contact hole exposing a part of the source electrode. A method of manufacturing a thin film transistor substrate, characterized in that: In the manufacturing method of the thin-film transistor substrate as described in any one of Claims 1-6,
The method of manufacturing a thin film transistor substrate, wherein the input terminal is connected to one of the drain electrode and the gate electrode that is formed simultaneously when the input terminal is formed. A method of manufacturing a thin film transistor substrate in which a bottom gate type transistor and a pixel electrode connected to a drain electrode of the transistor are formed on a transparent substrate,
Forming a light-shielding first conductive film on the transparent substrate and patterning the first conductive film to form a gate electrode;
Applying a positive resist on the first insulating film formed on the gate electrode; and
Exposing the positive resist through a mask sheet disposed on the positive resist and exposing the positive resist from the back surface of the transparent substrate;
Forming a first resist pattern by developing the exposed positive resist; and
Etching the first insulating film using the first resist pattern as a mask to form a channel protection portion disposed so as to overlap the gate electrode;
Forming a drain electrode by patterning the second conductive film while forming a second conductive film on the channel protection portion; and
Forming the second insulating film on the drain electrode;
A light shielding film is formed on the second insulating film, and the light shielding film is patterned to form a light shielding pattern that covers the channel protection portion and exposes at least a part of the drain electrode from the light shielding film. Process,
Applying a negative resist to the upper layer of the light shielding pattern;
Exposing the negative resist through the mask sheet disposed on the negative resist;
Forming a second resist pattern by developing the exposed negative resist;
Forming a contact hole connecting the drain electrode and the pixel electrode in a region corresponding to the drain electrode by etching the second insulating film using the second resist pattern as a mask. ,
The method of manufacturing a thin film transistor substrate, wherein the mask sheet has a light shielding portion formed in a region corresponding to the channel protection portion and a region corresponding to the light shielding pattern.

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