JP5339398B2 - Multilayer inductor - Google Patents

Multilayer inductor Download PDF

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JP5339398B2
JP5339398B2 JP2006191611A JP2006191611A JP5339398B2 JP 5339398 B2 JP5339398 B2 JP 5339398B2 JP 2006191611 A JP2006191611 A JP 2006191611A JP 2006191611 A JP2006191611 A JP 2006191611A JP 5339398 B2 JP5339398 B2 JP 5339398B2
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magnetic
pattern
electrically insulating
conductor
layer
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JP2008021788A (en
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清久 山内
誠 川口
健二 奥田
真也 比田勝
茂徳 鈴木
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FDK Corp
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Priority to PCT/JP2007/063820 priority patent/WO2008007705A1/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/0006Printed inductances
    • H01F17/0013Printed inductances with stacked layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F3/00Cores, Yokes, or armatures
    • H01F3/10Composite arrangements of magnetic circuits
    • H01F3/14Constrictions; Gaps, e.g. air-gaps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F37/00Fixed inductances not covered by group H01F17/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/04Fixed inductances of the signal type  with magnetic core

Description

本発明は、磁性体中にコイルが埋設された構造の積層インダクタに関し、更に詳しく述べると、積層面全体にわたる電気絶縁性の非磁性層が1層以上配置されると共に、間隔をおいて重なり合う導体パターンの間で該導体パターンに近接して該導体パターン形状に対応した電気絶縁性の非磁性パターンが配置されている構造の積層インダクタに関するものである。この積層インダクタは、特に高バイアスを必要とするようなDC−DCコンバータ用のインダクタに有用である。   The present invention relates to a multilayer inductor having a structure in which a coil is embedded in a magnetic body. More specifically, the present invention relates to a conductor in which one or more electrically insulating nonmagnetic layers are disposed over the entire multilayer surface and overlap each other at intervals. The present invention relates to a multilayer inductor having a structure in which an electrically insulating nonmagnetic pattern corresponding to the shape of the conductor pattern is disposed between the patterns in proximity to the conductor pattern. This multilayer inductor is particularly useful as an inductor for a DC-DC converter that requires a high bias.

DC−DCコンバータなどの電源回路に使用されるトランスやチョークコイルなどは、かつては磁気コアにコイルを巻線する構成が一般的であったが、近年の電源回路部品の小型化、薄型化の要望に沿い、積層構造のチップ部品が開発され実用化されている。   Transformers and choke coils used in power supply circuits such as DC-DC converters were once configured to have a coil wound around a magnetic core. However, in recent years, power supply circuit components have become smaller and thinner. In accordance with demands, chip components with a laminated structure have been developed and put into practical use.

積層インダクタは、電気絶縁性の磁性層と導体パターンが交互に積層され前記導体パターンが順次接続されることで、磁性体中で積層方向に重畳しながら螺旋状に周回するコイルが形成され、該コイルの両端がそれぞれ引出導体を介して積層体チップ外表面に引き出され電極端子に接続されている構造である。つまり、チップ型の磁性体中にコイルが埋設される状態である。磁性層や導体パターンは、例えばスクリーン印刷の技法などを使用して形成され積層される。   In a laminated inductor, an electrically insulating magnetic layer and a conductor pattern are alternately laminated and the conductor patterns are sequentially connected to form a coil that spirals around the magnetic material while being superimposed in the lamination direction. In this structure, both ends of the coil are drawn to the outer surface of the multilayer chip via lead conductors and connected to electrode terminals. That is, the coil is embedded in a chip-type magnetic body. The magnetic layer and the conductor pattern are formed and stacked using, for example, a screen printing technique.

このような積層インダクタは、コイルの周囲が磁性体で囲まれているため、磁気漏洩が少なく、比較的少ない巻数で必要なインダクタンスが得られる特徴があり、小型化、薄型化に適している。しかしながら、低直流バイアス電流(DCバアイアス)時に交流抵抗が高くなり、小さなコイル電流(励磁電流)であっても、磁性体の磁気飽和により急激なインダクタンスの低下が生じる(つまり、直流重畳特性が悪い)などの問題がある。特に、低直流バイアス電流時に交流抵抗が高いことは、待機電流による損失が大きいことを意味し、例えば携帯端末のような機器における待ち受け時間が短くなるなど、大きな問題となる。   Such a multilayer inductor is characterized in that since the coil is surrounded by a magnetic material, there is little magnetic leakage, and a necessary inductance can be obtained with a relatively small number of turns, which is suitable for downsizing and thinning. However, the AC resistance increases at the time of a low DC bias current (DC bias), and even with a small coil current (excitation current), a sudden inductance drop occurs due to magnetic saturation of the magnetic material (that is, the DC superposition characteristics are poor). ) And other problems. In particular, a high AC resistance at a low DC bias current means that a loss due to a standby current is large, which causes a serious problem such as a shortened standby time in a device such as a portable terminal.

そこで、一部の磁性層全体を非磁性層で置き換えることにより、積層インダクタ中に磁気的なギャップを介在させ、それによって磁気飽和レベルを高め、トランスやチョークコイルなどとして十分な定格電流が得られるようにした積層インダクタが提案された(特許文献1参照)。   Therefore, by replacing a part of the entire magnetic layer with a nonmagnetic layer, a magnetic gap is interposed in the multilayer inductor, thereby increasing the magnetic saturation level and obtaining a sufficient rated current as a transformer or choke coil. Such a multilayer inductor has been proposed (see Patent Document 1).

確かに、このような構造にすると、低直流バイアス電流時の交流抵抗上昇の抑制、及び直流重畳特性劣化の軽減に一定の効果がある。しかし、それらの効果は、必ずしも十分とは言えず、またコイル巻数が増加するに従って、その効果が減少するなど問題も認められた。
特開2005−45108号公報
Certainly, such a structure has a certain effect in suppressing the increase in AC resistance at the time of a low DC bias current and reducing the deterioration of DC superposition characteristics. However, these effects are not always sufficient, and problems such as a decrease in the effect as the number of coil turns increases have been recognized.
JP-A-2005-45108

本発明が解決しようとする課題は、優れた直流重畳特性を呈し、低直流バイアス電流時の交流抵抗を抑えることができると共に、コイル電流が定格範囲内の全電流領域でインダクタンス変化が比較的緩やかな高特性が得られるようにすることである。   The problem to be solved by the present invention is that it exhibits excellent DC superposition characteristics, can suppress AC resistance at the time of low DC bias current, and the inductance change is relatively gradual in the entire current region where the coil current is within the rated range. It is to obtain a high characteristic.

本発明は、電気絶縁性の磁性層と導体パターンが積層され前記導体パターンが順次接続されることで、磁性体中で積層方向に重畳しながら螺旋状に周回するコイルが形成され、該コイルの両端がそれぞれ引出導体を介して積層体チップ外表面に引き出され電極端子に接続されている積層インダクタにおいて、積層面全体にわたる電気絶縁性の磁気ギャップ層が1層以上配置されると共に、間隔をおいて重なり合う導体パターンの間には、該導体パターンに近接して該導体パターン形状に対応した形状の電気絶縁性の非磁性パターンが配置されており、前記導体パターンの外側には、該導体パターンの部分を除いた形状の磁性層が設けられていることを特徴とするDC−DCコンバータ用の積層インダクタである。

According to the present invention, an electrically insulating magnetic layer and a conductor pattern are laminated and the conductor patterns are sequentially connected to form a coil that spirals around the magnetic material while overlapping in the lamination direction. In a multilayer inductor in which both ends are led out to the outer surface of the multilayer chip through lead conductors and connected to electrode terminals, one or more electrically insulating magnetic gap layers over the entire multilayer surface are disposed and spaced apart. Between the overlapping conductor patterns, an electrically insulating nonmagnetic pattern having a shape corresponding to the conductor pattern shape is disposed in the vicinity of the conductor pattern, and outside the conductor pattern, the conductor pattern A multilayer inductor for a DC-DC converter, wherein a magnetic layer having a shape excluding a portion is provided.

ここで、電気絶縁性の非磁性パターンは、導体パターンに合致する形状でもよいが、導体パターンより一回り大きめの形状もしくは一回り小さめの形状とするのが好ましい。なかでも導体パターンより一回り大きめの形状とする方がより好ましい。また前記電気絶縁性の磁気ギャップ層及び前記電気絶縁性の非磁性パターンを積層方向の中央に対して対称的に配置するのが好ましい。電気絶縁性の磁気ギャップ層が1層の場合には、該磁気ギャップ層を積層方向のほぼ中央に配置し、前記電気絶縁性の非磁性パターンを積層方向の中央に対して対称的に2層以上配置する。前記電気絶縁性の磁気ギャップ層の厚さは、互いに重なり合う導体パターンの間隔よりも小さく設定することもできる。前記電気絶縁性の非磁性パターンは、間隔をおいて重なり合う全ての導体パターンの間に配置するのが好ましい。
Here, the electrically insulating nonmagnetic pattern may have a shape matching the conductor pattern, but is preferably a shape slightly larger than or slightly smaller than the conductor pattern. In particular, it is more preferable to make the shape slightly larger than the conductor pattern . Preferably symmetrically disposed with or the electrically insulating magnetic gap layer and the electrically insulating non-magnetic pattern to the central direction of lamination. In the case where there is one electrically insulating magnetic gap layer, the magnetic gap layer is disposed at substantially the center in the stacking direction, and the electrically insulating nonmagnetic pattern is symmetrically formed with respect to the center in the stacking direction. Arrange above. The thickness of the electrically insulating magnetic gap layer may be set smaller than the interval between the conductor patterns that overlap each other. The electrically insulating nonmagnetic pattern is preferably disposed between all overlapping conductor patterns.

本発明に係る積層インダクタは、積層面全体にわたる電気絶縁性の磁気ギャップ層が1層以上配置されるので、全体的な磁気飽和レベルが高まり、直流重畳特性を伸ばし、定格電流(所定以上のインダクタンスを保証できる電流上限値)を増大させることができる。また、本発明に係る積層インダクタは、間隔をおいて重なり合う導体パターンの間で該導体パターンに近接して該導体パターン形状に対応した電気絶縁性の非磁性パターンが配置されているので、低直流バイアス電流時におけるコイル周辺での微小磁化ループの発生を防止し、そのため導体パターン間への磁束の急激な流れ込みが生じず、インダクタンスの急激な変化を防ぎ、交流抵抗上昇を抑制することができる。   In the multilayer inductor according to the present invention, since one or more electrically insulating magnetic gap layers are disposed over the entire multilayer surface, the overall magnetic saturation level is increased, the DC superposition characteristics are increased, and the rated current (inductance above a predetermined value) is increased. Can be increased. In the multilayer inductor according to the present invention, an electrically insulating non-magnetic pattern corresponding to the conductor pattern shape is disposed between conductor patterns that overlap with each other at an interval. Generation of a minute magnetization loop around the coil at the time of bias current is prevented, so that a rapid flow of magnetic flux between the conductor patterns does not occur, a sudden change in inductance can be prevented, and an increase in AC resistance can be suppressed.

直流重畳電流の増加によるインダクタンスの低下は、直流電流の増加によりコイルから発生する磁束が増え、磁性体を飽和させることにより生じる。また低直流バイアス電流時のインダクタンスの急減、交流抵抗の上昇は、導体パターン周辺の微小磁化ループにより生じる。磁性体の磁気飽和を抑制し、インダクタンスの低下を最小限にして直流重畳特性を伸ばし、交流抵抗の上昇を抑えるためには、導体パターンに対して磁性体と非磁性体の位置及び形状をどのように配置するかが重要となる。   The decrease in inductance due to the increase in the DC superimposed current is caused by increasing the magnetic flux generated from the coil due to the increase in DC current and saturating the magnetic material. In addition, a sudden decrease in inductance and an increase in AC resistance at a low DC bias current are caused by a minute magnetization loop around the conductor pattern. In order to suppress the magnetic saturation of the magnetic material, extend the DC superposition characteristics by minimizing the decrease in inductance, and suppress the increase in AC resistance, the position and shape of the magnetic material and the non-magnetic material with respect to the conductor pattern It is important to arrange them in such a way.

そこで本発明の積層インダクタでは、積層面全体にわたる電気絶縁性の磁気ギャップ層を配置すると共に、間隔をおいて重なり合う導体パターンの間で該導体パターンに近接して該導体パターン形状にほぼ合致した電気絶縁性の非磁性パターンを配置する。典型的には、前記電気絶縁性の磁気ギャップ層が積層方向の中央に位置し、前記電気絶縁性の非磁性パターンを、間隔をおいて重なり合う全ての導体パターンの間に配置する。   Therefore, in the multilayer inductor according to the present invention, an electrically insulating magnetic gap layer is disposed over the entire multilayer surface, and between the conductor patterns that overlap with each other at an interval, the conductor pattern is close to the conductor pattern and substantially matches the conductor pattern shape. An insulating nonmagnetic pattern is disposed. Typically, the electrically insulating magnetic gap layer is located at the center in the stacking direction, and the electrically insulating nonmagnetic pattern is disposed between all the overlapping conductor patterns.

このような構造にすることにより、全体的な磁気飽和を制御し、直流重畳特性を伸ばすことができる。また、低直流バイアス電流時の導体パターン−導体パターン間への磁束の急激な流れ込みを防止でき、インダクタンスの急減を防止し、交流抵抗の上昇を抑えることができる。   By adopting such a structure, the overall magnetic saturation can be controlled and the DC superposition characteristics can be extended. In addition, it is possible to prevent a magnetic flux from abruptly flowing between the conductor pattern at the time of a low DC bias current, to prevent a sudden decrease in inductance, and to suppress an increase in AC resistance.

図1は、本発明に係る積層インダクタの一実施例を示す説明図である。図1において、Aは外観を、Bは導体パターンの上面から見た透視状態を、Cは縦断面を、Dは導体パターンと非磁性パターンの構造を、それぞれ示している。   FIG. 1 is an explanatory view showing an embodiment of the multilayer inductor according to the present invention. In FIG. 1, A is an external appearance, B is a see-through state viewed from the top surface of a conductor pattern, C is a longitudinal section, and D is a structure of a conductor pattern and a nonmagnetic pattern.

この積層インダクタ10は、ほぼ直方体状をなす表面実装用のチップ部品であり、大部分が磁性体(例えばNi−Zn系フェライト材)からなる材料中にコイルが埋設されており、そのコイル両端がチップ両端部に形成されている電極端子12に電気的に接続されている構造である(図1のA参照)。   The multilayer inductor 10 is a chip component for surface mounting that has a substantially rectangular parallelepiped shape, and most of the coil is embedded in a material made of a magnetic material (for example, a Ni—Zn ferrite material), and both ends of the coil are formed. It is a structure electrically connected to the electrode terminals 12 formed at both ends of the chip (see A in FIG. 1).

内部のコイル構造は、ほぼ環状(あるいは半環状など)の導体パターン20と電気絶縁性の磁性層22などを、スクリーン印刷法などにより印刷し積層することにより形成される。導体パターン20は、磁性層22による磁性体中で、積層方向に重畳しながら螺旋状に周回するように接続されてコイルを形成する。図1のBでは、導体パターン20は、直角に屈曲しながら矩形状に巻回されているが、勿論、円形や長円形などでもよい。コイルの両端は、それぞれ引出導体24を介して積層体チップ外表面の相対向する端面に引き出され、電極端子12に接続されることになる。   The internal coil structure is formed by printing and laminating a substantially annular (or semi-annular) conductor pattern 20 and an electrically insulating magnetic layer 22 by a screen printing method or the like. The conductor pattern 20 is connected to form a coil in a magnetic body by the magnetic layer 22 so as to circulate spirally while being superimposed in the stacking direction. In FIG. 1B, the conductor pattern 20 is wound in a rectangular shape while being bent at a right angle, but of course, it may be circular or oval. Both ends of the coil are respectively drawn out to opposite end faces of the outer surface of the multilayer chip via the lead conductor 24 and connected to the electrode terminal 12.

ここで本発明では、図1のCに示すように、コイルの一部を形成する導体パターン20の層とそれに間隔をおいて重なり合う別の導体パターン20の層の間は、全て電気絶縁性の非磁性体(例えばZnフェライト材)で構成されている。その一部は、積層面全体にわたる電気絶縁性の磁気ギャップ層26であり、他は導体パターン形状にほぼ合致した非磁性パターン28(図1のD参照)である。例えば非磁性パターンを印刷し、その部分を除いた形の磁性層を印刷する(手順は逆でもよい)。また導体パターンを印刷し、その部分を除いた形の磁性層を印刷する(手順は逆でもよい)。このような操作を繰り返すことによって、印刷積層することができる。なお、上下の導体パターン間は、ビア穴などを利用して電気的に接続すればよい。この実施例では、導体パターン20を4層設けており、下から第2層と第3層の間は積層面全体にわたる磁気ギャップ層26とし、下から第1層と第2層の間、及び第3層と第4層の間を非磁性パターン28としている。導体パターン20を印刷する際、導体ペーストの流れ込みによる短絡発生を防ぐため、非磁性パターン28と磁性体の境界は、導体パターン20よりも全体的に一回り大きくして導体パターン20が非磁性パターンに余裕をもって載るか、あるいは一回り小さくして、磁性層に載るように設定するのが好ましい。   Here, in the present invention, as shown in FIG. 1C, the conductive pattern 20 that forms a part of the coil and the other conductive pattern 20 that overlaps with each other are all electrically insulating. It is comprised with the nonmagnetic material (for example, Zn ferrite material). One part is an electrically insulating magnetic gap layer 26 over the entire laminated surface, and the other part is a nonmagnetic pattern 28 (see D in FIG. 1) substantially matching the shape of the conductor pattern. For example, a non-magnetic pattern is printed, and a magnetic layer in a shape excluding that portion is printed (the procedure may be reversed). In addition, a conductor pattern is printed, and a magnetic layer in a shape excluding that portion is printed (the procedure may be reversed). By repeating such operations, printing lamination can be performed. In addition, what is necessary is just to electrically connect between upper and lower conductor patterns using a via hole. In this embodiment, four conductor patterns 20 are provided, and the gap between the second layer and the third layer from the bottom is the magnetic gap layer 26 over the entire laminated surface, the bottom is between the first layer and the second layer, and A nonmagnetic pattern 28 is formed between the third layer and the fourth layer. When the conductor pattern 20 is printed, the boundary between the nonmagnetic pattern 28 and the magnetic material is made larger than the conductor pattern 20 as a whole in order to prevent a short circuit from occurring due to the inflow of the conductor paste. It is preferable to set the magnetic layer so that it can be mounted on the magnetic layer with a sufficient margin.

本発明の構造の積層インダクタは、DC−DCコンバータなどの用途では、通常、比較的少ないコイル巻数で要求される仕様を満たすことができる。磁気ギャップ層及び非磁性パターンを挿入する位置は、コイル形状、巻数などに応じて適宜決定する。   The multilayer inductor having the structure of the present invention can satisfy the specifications usually required with a relatively small number of coil turns in applications such as a DC-DC converter. The positions where the magnetic gap layer and the nonmagnetic pattern are inserted are appropriately determined according to the coil shape, the number of turns, and the like.

本発明に係る積層インダクタの他の実施例を図2に示す。図2のAは、電気絶縁性の磁気ギャップ層26の厚さを、互いに重なり合う導体パターン20同士の間隔よりも小さく設定した例である。基本的な構成は、図1に示すものと同様であるため、対応する部分には同一符号を付し、詳細な説明は省略する。上下に間隔をおいて重なり合う導体パターン20の間隔は、電気絶縁性を確保するために通常15μm程度にする必要がある。反面、磁気飽和レベルを制御するためには、積層面全体にわたる磁気ギャップ層26の厚みを自由に制御できるようにすることが望ましい。そこで、磁気ギャップ層26の厚みを所望の大きさ(例えば7.5μm程度)に設定し、導体パターン20間の距離との差(ここでは7.5μm)の厚みで薄い非磁性パターンを追加配置する(この例では磁気ギャップ層の上側に設けているが、下側に設けてもよいし、上下両側に均等に設けてもよい)。これによって、導体パターン20同士の間隔は電気絶縁性を十分に確保できる大きさに設定しつつ(コイルの短絡に気遣うことなく)、磁気ギャップ層26を所望の厚さに設定することができる。   Another embodiment of the multilayer inductor according to the present invention is shown in FIG. FIG. 2A shows an example in which the thickness of the electrically insulating magnetic gap layer 26 is set smaller than the interval between the conductor patterns 20 that overlap each other. Since the basic configuration is the same as that shown in FIG. 1, the corresponding parts are denoted by the same reference numerals, and detailed description thereof is omitted. The interval between the conductor patterns 20 that overlap with each other at an interval in the vertical direction is usually required to be about 15 μm in order to ensure electrical insulation. On the other hand, in order to control the magnetic saturation level, it is desirable to be able to freely control the thickness of the magnetic gap layer 26 over the entire laminated surface. Therefore, the thickness of the magnetic gap layer 26 is set to a desired size (for example, about 7.5 μm), and a thin nonmagnetic pattern is additionally arranged with a difference from the distance between the conductor patterns 20 (here 7.5 μm). (In this example, it is provided on the upper side of the magnetic gap layer, but it may be provided on the lower side or may be provided on both upper and lower sides equally). Thus, the magnetic gap layer 26 can be set to a desired thickness while the interval between the conductor patterns 20 is set to a size that can sufficiently ensure electrical insulation (without worrying about a short circuit of the coil).

図2のBは、図2のAに示す積層インダクタの変形例であり、これも基本的には図1に示すものと同様の構成であるため、対応する部分には同一符号を付し、詳細な説明は省略する。この例は、コイルの一部を形成する導体パターン20の層を6層、間隔をおいて互いに重なり合うように積層したものである。導体パターン20同士の間の領域は、全て電気絶縁性の非磁性体で構成され、その一部(ここでは2箇所)に積層面全体にわたる電気絶縁性の磁気ギャップ層26となっている。具体的には、下から第2層と第3層の間、及び第4層と第5層の間は積層面全体にわたる磁気ギャップ層26とし、下から第1層と第2層の間、第3層と第4層の間、及び第5層と第5層の間を非磁性パターン28としている。またここでも、磁気ギャップ層26の厚みを薄く(例えば7.5μm程度)設定し、導体パターン間隔との差(ここでは7.5μm)の厚みの非磁性パターンを追加配置している。   2B is a modified example of the multilayer inductor shown in FIG. 2A, and this is also basically the same configuration as that shown in FIG. Detailed description is omitted. In this example, six layers of conductor patterns 20 forming a part of the coil are laminated so as to overlap each other at intervals. The regions between the conductor patterns 20 are all made of an electrically insulating non-magnetic material, and part of them (here, two locations) is an electrically insulating magnetic gap layer 26 over the entire laminated surface. Specifically, the gap between the second layer and the third layer from the bottom, and between the fourth layer and the fifth layer is a magnetic gap layer 26 over the entire laminated surface, and from the bottom between the first layer and the second layer, A nonmagnetic pattern 28 is formed between the third layer and the fourth layer and between the fifth layer and the fifth layer. Also in this case, the thickness of the magnetic gap layer 26 is set to be thin (for example, about 7.5 μm), and a nonmagnetic pattern having a thickness different from the conductor pattern interval (here 7.5 μm) is additionally arranged.

このように、本発明では、要求仕様に応じてコイルを形成する導体パターンの層数を増減することができ、磁気ギャップ層の数、磁気ギャップ層の厚み、非磁性パターンの層数などは適宜変更することができる。前記のように、磁性体材料としては、例えばNi−Zn系フェライトが使用でき、磁気ギャップ層や非磁性パターンを形成する非磁性材料としては、例えばZn系フェライトが使用できる。   As described above, according to the present invention, the number of conductor patterns forming a coil can be increased or decreased according to required specifications. The number of magnetic gap layers, the thickness of magnetic gap layers, the number of nonmagnetic patterns, etc. Can be changed. As described above, for example, Ni—Zn based ferrite can be used as the magnetic material, and for example, Zn based ferrite can be used as the nonmagnetic material for forming the magnetic gap layer and the nonmagnetic pattern.

測定結果の一例を図3及び図4に示す。同一材料、同一寸法で、しかも内部構造の異なる2種の積層インダクタについて、それらの直流重畳特性を測定した。本発明品としているものは、図1に示す積層インダクタと同じ構造であり、中央に積層面全体にわたる電気絶縁性の磁気ギャップ層が1層形成されていると共に、間隔をおいて重なり合う導体パターンの間全てに電気絶縁性の非磁性パターンが配置されている構造である。それに対して比較例は、中央に積層面全体にわたる電気絶縁性の磁気ギャップ層が1層形成されているだけ(電気絶縁性の非磁性パターンは無い)の構造である。いずれも導体パターンは4層で、4.5ターンのコイルが形成されている。   An example of the measurement result is shown in FIGS. The DC superposition characteristics of two types of laminated inductors of the same material, the same dimensions, and different internal structures were measured. The product of the present invention has the same structure as the multilayer inductor shown in FIG. 1, and has an electrically insulating magnetic gap layer formed at the center over the entire multilayer surface, and with a conductor pattern overlapping at intervals. This is a structure in which an electrically insulating non-magnetic pattern is disposed between all the spaces. On the other hand, the comparative example has a structure in which only one electrically insulating magnetic gap layer is formed at the center over the entire laminated surface (there is no electrically insulating nonmagnetic pattern). In any case, the conductor pattern is four layers, and a coil of 4.5 turns is formed.

図3は、直流バイアス電流特性を示している。図3のAはインダクタンスの変化を示しており、本発明品と比較例を比べると、本発明品は比較的高いインダクタンスを高い電流まで維持でき、直流電流が変化してもインダクタンスの変化が少ないことが分かる。また図3のBは交流抵抗の変化を示しており、本発明品と比較例を比べると、本発明品は特に低電流で交流抵抗が低く、直流電流が変化しても交流抵抗の変化が少ないことが分かる。これらの測定結果から、本発明のように、積層面全体にわたる電気絶縁性の磁気ギャップ層を形成すると共に、間隔をおいて重なり合う導体パターンの間に電気絶縁性の非磁性パターンを配置することで、直流重畳特性を改善でき、低直流バイアス電流時での交流抵抗を低減できることが分かる。   FIG. 3 shows the DC bias current characteristics. FIG. 3A shows a change in inductance. When the product of the present invention is compared with the comparative example, the product of the present invention can maintain a relatively high inductance up to a high current, and the change in inductance is small even if the direct current changes. I understand that. FIG. 3B shows the change in AC resistance. Compared with the product of the present invention and the comparative example, the product of the present invention has a particularly low AC resistance at a low current, and the AC resistance changes even when the DC current changes. I understand that there are few. From these measurement results, as in the present invention, an electrically insulating magnetic gap layer is formed over the entire laminated surface, and an electrically insulating nonmagnetic pattern is disposed between conductor patterns overlapping each other at intervals. It can be seen that the DC superposition characteristics can be improved and the AC resistance at the time of a low DC bias current can be reduced.

図4は周波数特性を示している。図4のAはQ値、Bはインダクタンス、Cは交流特性を、それぞれ示している。本発明品の方が、Q値が高く、交流抵抗も低い。インダクタンスが若干低いが、周波数にかかわらずほぼ一定にすることができる。現在、DC−DCコンバータの動作周波数は1〜3MHz程度であるが、将来的にはより高くなる(例えば10MHzに近づく)と予想されている。本発明品は高周波特性が良好であることから、周波数が高まるにつれて、本発明はより一層有利になるものと考えられる。   FIG. 4 shows frequency characteristics. 4A shows the Q value, B shows the inductance, and C shows the AC characteristics. The product of the present invention has a higher Q value and lower AC resistance. Although the inductance is slightly low, it can be made almost constant regardless of the frequency. At present, the operating frequency of the DC-DC converter is about 1 to 3 MHz, but it is expected to become higher in the future (for example, approaching 10 MHz). Since the product of the present invention has good high frequency characteristics, it is considered that the present invention becomes more advantageous as the frequency increases.

なお、コイル巻数は要求仕様に応じて適宜増減することができる。但し、コイル巻数が過度に多くなると、製造工程数が増えコストも高くなるので、コイル巻数は必要最少限とすることが好ましい。   The number of coil turns can be increased or decreased as appropriate according to the required specifications. However, if the number of coil turns is excessively large, the number of manufacturing steps is increased and the cost is increased. Therefore, the number of coil turns is preferably set to the minimum necessary.

本発明に係る積層インダクタの一実施例を示す説明図。BRIEF DESCRIPTION OF THE DRAWINGS Explanatory drawing which shows one Example of the multilayer inductor which concerns on this invention. 本発明の他の実施例を示す縦断面図。The longitudinal cross-sectional view which shows the other Example of this invention. 本発明品と比較例との直流重畳特性の違いを示すグラフ。The graph which shows the difference of the direct current | flow superimposition characteristic of this invention product and a comparative example. 本発明品と比較例との周波数特性の違いを示すグラフ。The graph which shows the difference in the frequency characteristic of this invention product and a comparative example.

符号の説明Explanation of symbols

10 積層インダクタ
12 電極端子
20 導体パターン
22 磁性層
24 引出導体
26 磁気ギャップ層
28 非磁性パターン
DESCRIPTION OF SYMBOLS 10 Multilayer inductor 12 Electrode terminal 20 Conductor pattern 22 Magnetic layer 24 Leader conductor 26 Magnetic gap layer 28 Nonmagnetic pattern

Claims (5)

電気絶縁性の磁性層と導体パターンが積層され前記導体パターンが順次接続されることで、磁性体中で積層方向に重畳しながら螺旋状に周回するコイルが形成され、該コイルの両端がそれぞれ引出導体を介して積層体チップ外表面に引き出され電極端子に接続されている積層インダクタにおいて、
積層面全体にわたる電気絶縁性の磁気ギャップ層が1層以上配置されると共に、間隔をおいて重なり合う導体パターンの間には、該導体パターンに近接して該導体パターン形状に対応した形状の電気絶縁性の非磁性パターンが配置されており、前記導体パターンの外側には、該導体パターンの部分を除いた形状の磁性層が設けられていることを特徴とするDC−DCコンバータ用の積層インダクタ。
An electrically insulative magnetic layer and a conductor pattern are laminated and the conductor patterns are sequentially connected to form a coil that spirals around the magnetic material while overlapping in the lamination direction, and both ends of the coil are drawn out. In the multilayer inductor that is drawn to the outer surface of the multilayer chip through the conductor and connected to the electrode terminal,
One or more electrically insulative magnetic gap layers over the entire laminated surface are arranged, and between conductor patterns that overlap with each other at an interval, electrical insulation having a shape corresponding to the conductor pattern shape is provided close to the conductor pattern. A laminated inductor for a DC-DC converter , characterized in that a magnetic non-magnetic pattern is disposed and a magnetic layer having a shape excluding the portion of the conductor pattern is provided outside the conductor pattern.
前記電気絶縁性の磁気ギャップ層及び前記電気絶縁性の非磁性パターンが積層方向の中央に対して対称的に配置されている請求項1記載のDC−DCコンバータ用の積層インダクタ。 2. The multilayer inductor for a DC-DC converter according to claim 1, wherein the electrically insulating magnetic gap layer and the electrically insulating nonmagnetic pattern are arranged symmetrically with respect to a center in the stacking direction. 前記電気絶縁性の磁気ギャップ層が積層方向の中央に位置し、前記電気絶縁性の非磁性パターンが積層方向の中央に対して対称的に2層以上配置されている請求項1記載のDC−DCコンバータ用の積層インダクタ。 2. The DC− according to claim 1, wherein the electrically insulating magnetic gap layer is located in the center in the stacking direction, and the electrically insulating nonmagnetic pattern is arranged symmetrically with respect to the center in the stacking direction. Multilayer inductor for DC converter . 前記電気絶縁性の磁気ギャップ層の厚さが、互いに重なり合う導体パターンの間隔よりも小さく設定されている請求項1乃至3のいずれかに記載のDC−DCコンバータ用の積層インダクタ。 The multilayer inductor for a DC-DC converter according to any one of claims 1 to 3, wherein a thickness of the electrically insulating magnetic gap layer is set to be smaller than an interval between conductor patterns overlapping each other. 前記電気絶縁性の非磁性パターンが、間隔をおいて重なり合う全ての導体パターンの間に配置されている請求項1乃至4のいずれかに記載のDC−DCコンバータ用の積層インダクタ。 The multilayer inductor for a DC-DC converter according to any one of claims 1 to 4, wherein the electrically insulating nonmagnetic pattern is disposed between all conductor patterns that overlap with each other at intervals.
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