JP5295286B2 - 記憶装置およびそれを搭載した計算機 - Google Patents

記憶装置およびそれを搭載した計算機 Download PDF

Info

Publication number
JP5295286B2
JP5295286B2 JP2011036717A JP2011036717A JP5295286B2 JP 5295286 B2 JP5295286 B2 JP 5295286B2 JP 2011036717 A JP2011036717 A JP 2011036717A JP 2011036717 A JP2011036717 A JP 2011036717A JP 5295286 B2 JP5295286 B2 JP 5295286B2
Authority
JP
Japan
Prior art keywords
conversion table
cache
logical
block
physical address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2011036717A
Other languages
English (en)
Japanese (ja)
Other versions
JP2012174086A (ja
JP2012174086A5 (enExample
Inventor
遼一 稲田
良 藤田
卓真 西村
光司 松田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2011036717A priority Critical patent/JP5295286B2/ja
Priority to US13/372,800 priority patent/US20120215965A1/en
Publication of JP2012174086A publication Critical patent/JP2012174086A/ja
Publication of JP2012174086A5 publication Critical patent/JP2012174086A5/ja
Application granted granted Critical
Publication of JP5295286B2 publication Critical patent/JP5295286B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7201—Logical to physical mapping or translation of blocks or pages

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP2011036717A 2011-02-23 2011-02-23 記憶装置およびそれを搭載した計算機 Expired - Fee Related JP5295286B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2011036717A JP5295286B2 (ja) 2011-02-23 2011-02-23 記憶装置およびそれを搭載した計算機
US13/372,800 US20120215965A1 (en) 2011-02-23 2012-02-14 Storage Device and Computer Using the Same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011036717A JP5295286B2 (ja) 2011-02-23 2011-02-23 記憶装置およびそれを搭載した計算機

Publications (3)

Publication Number Publication Date
JP2012174086A JP2012174086A (ja) 2012-09-10
JP2012174086A5 JP2012174086A5 (enExample) 2013-03-14
JP5295286B2 true JP5295286B2 (ja) 2013-09-18

Family

ID=46653709

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011036717A Expired - Fee Related JP5295286B2 (ja) 2011-02-23 2011-02-23 記憶装置およびそれを搭載した計算機

Country Status (2)

Country Link
US (1) US20120215965A1 (enExample)
JP (1) JP5295286B2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10156996B2 (en) 2016-09-06 2018-12-18 Toshiba Memory Corporation Memory device and read processing method using read counts, first, second, and third addresses

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10380022B2 (en) 2011-07-28 2019-08-13 Netlist, Inc. Hybrid memory module and system and method of operating the same
US10838646B2 (en) 2011-07-28 2020-11-17 Netlist, Inc. Method and apparatus for presearching stored data
US10198350B2 (en) 2011-07-28 2019-02-05 Netlist, Inc. Memory module having volatile and non-volatile memory subsystems and method of operation
JP2013097416A (ja) 2011-10-28 2013-05-20 Hitachi Ltd 記憶装置および計算機
US10209768B1 (en) 2012-01-06 2019-02-19 Seagate Technology Llc File-aware priority driver
US9542324B1 (en) * 2012-04-05 2017-01-10 Seagate Technology Llc File associated pinning
US9268692B1 (en) 2012-04-05 2016-02-23 Seagate Technology Llc User selectable caching
JP2013222236A (ja) 2012-04-13 2013-10-28 Hitachi Ltd メモリの管理方法、記憶装置およびそれを搭載した計算機
US10282286B2 (en) * 2012-09-14 2019-05-07 Micron Technology, Inc. Address mapping using a data unit type that is variable
KR20140056657A (ko) * 2012-10-30 2014-05-12 삼성전자주식회사 메인 메모리를 구비한 컴퓨터 시스템 및 그것의 제어 방법
US9645942B2 (en) 2013-03-15 2017-05-09 Intel Corporation Method for pinning data in large cache in multi-level memory system
WO2014147768A1 (ja) * 2013-03-19 2014-09-25 富士通株式会社 制御装置、制御プログラム、および制御方法
US9606803B2 (en) 2013-07-15 2017-03-28 Texas Instruments Incorporated Highly integrated scalable, flexible DSP megamodule architecture
US20160170873A1 (en) * 2013-07-18 2016-06-16 Hitachi, Ltd. Information processing device
CN111176585B (zh) 2013-11-07 2024-05-03 奈特力斯股份有限公司 混合内存模块以及操作混合内存模块的系统和方法
US11182284B2 (en) 2013-11-07 2021-11-23 Netlist, Inc. Memory module having volatile and non-volatile memory subsystems and method of operation
US10248328B2 (en) 2013-11-07 2019-04-02 Netlist, Inc. Direct data move between DRAM and storage on a memory module
US9891825B2 (en) 2015-01-23 2018-02-13 Toshiba Memory Corporation Memory system of increasing and decreasing first user capacity that is smaller than a second physical capacity
US9715342B2 (en) * 2015-07-03 2017-07-25 Xitore, Inc. Apparatus, system, and method of logical address translation for non-volatile storage memory
US10452556B2 (en) 2015-09-11 2019-10-22 Toshiba Memory Corporation Memory device and information processing device
TWI584122B (zh) * 2015-11-17 2017-05-21 群聯電子股份有限公司 緩衝記憶體管理方法、記憶體控制電路單元及記憶體儲存裝置
CN106776376B (zh) * 2015-11-24 2019-08-06 群联电子股份有限公司 缓冲存储器管理方法、存储器控制电路单元及存储装置
US10289544B2 (en) * 2016-07-19 2019-05-14 Western Digital Technologies, Inc. Mapping tables for storage devices
US10126964B2 (en) * 2017-03-24 2018-11-13 Seagate Technology Llc Hardware based map acceleration using forward and reverse cache tables
JP2019057074A (ja) * 2017-09-20 2019-04-11 東芝メモリ株式会社 メモリシステム
CN112988038B (zh) * 2019-12-17 2024-08-06 国民技术股份有限公司 非易失性存储器的数据写入方法、终端和可读存储介质
CN115605851B (zh) 2020-04-22 2025-04-08 美光科技公司 用于读取操作的映射描述符
US11581048B2 (en) * 2020-11-30 2023-02-14 Cigent Technology, Inc. Method and system for validating erasure status of data blocks
CN112955956B (zh) * 2021-02-08 2022-09-30 长江存储科技有限责任公司 用于缓存逻辑到物理(l2p)表的管芯上静态随机存取存储器(sram)
US20220374360A1 (en) * 2021-05-18 2022-11-24 Macronix International Co., Ltd. Memory device and method for accessing memory device
JP7735173B2 (ja) * 2021-12-15 2025-09-08 キオクシア株式会社 メモリシステムおよび方法
US12259812B2 (en) * 2022-07-18 2025-03-25 Micron Technology, Inc. Center allocation data structure

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3197815B2 (ja) * 1996-04-15 2001-08-13 インターナショナル・ビジネス・マシーンズ・コーポレ−ション 半導体メモリ装置及びその制御方法
US6377500B1 (en) * 1999-11-11 2002-04-23 Kabushiki Kaisha Toshiba Memory system with a non-volatile memory, having address translating function
JP2001142774A (ja) * 1999-11-11 2001-05-25 Toshiba Corp メモリカード及び同カードに適用されるアドレス変換方法
US8112574B2 (en) * 2004-02-26 2012-02-07 Super Talent Electronics, Inc. Swappable sets of partial-mapping tables in a flash-memory system with a command queue for combining flash writes
WO2006126445A1 (ja) * 2005-05-23 2006-11-30 Matsushita Electric Industrial Co., Ltd. メモリコントローラ、不揮発性記憶装置、不揮発性記憶システム及びメモリ制御方法
US7711923B2 (en) * 2006-06-23 2010-05-04 Microsoft Corporation Persistent flash memory mapping table
TW200828014A (en) * 2006-12-28 2008-07-01 Genesys Logic Inc Flash memory management method with low RAM utilization
KR100817087B1 (ko) * 2007-02-13 2008-03-27 삼성전자주식회사 플래시 메모리를 구비하는 스토리지 장치에서의 버퍼 캐시운용 방법
US8656083B2 (en) * 2007-12-21 2014-02-18 Spansion Llc Frequency distributed flash memory allocation based on free page tables
JP2009282836A (ja) * 2008-05-23 2009-12-03 Panasonic Corp メモリカード及びメモリカードドライブ
JP5221332B2 (ja) * 2008-12-27 2013-06-26 株式会社東芝 メモリシステム
US8250333B2 (en) * 2009-01-05 2012-08-21 Sandisk Technologies Inc. Mapping address table maintenance in a memory device
US8447922B2 (en) * 2009-07-16 2013-05-21 Panasonic Corporation Memory controller, nonvolatile storage device, accessing device, and nonvolatile storage system
US8688894B2 (en) * 2009-09-03 2014-04-01 Pioneer Chip Technology Ltd. Page based management of flash storage

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10156996B2 (en) 2016-09-06 2018-12-18 Toshiba Memory Corporation Memory device and read processing method using read counts, first, second, and third addresses

Also Published As

Publication number Publication date
US20120215965A1 (en) 2012-08-23
JP2012174086A (ja) 2012-09-10

Similar Documents

Publication Publication Date Title
JP5295286B2 (ja) 記憶装置およびそれを搭載した計算機
US12265706B2 (en) Memory system with nonvolatile semiconductor memory
KR101270281B1 (ko) 메모리 관리 장치, 정보 처리 장치 및 메모리 관리 방법
US9026734B2 (en) Memory system and data deleting method
US9003099B2 (en) Disc device provided with primary and secondary caches
JP5480913B2 (ja) 記憶装置、およびメモリコントローラ
US8909870B2 (en) Cache evictions from data cache based on content of address translation table cache and address translation table
US20190095100A1 (en) Block Clearing Method
US11150819B2 (en) Controller for allocating memory blocks, operation method of the controller, and memory system including the controller
US20140129758A1 (en) Wear leveling in flash memory devices with trim commands
JP2012203443A (ja) メモリシステムおよびメモリシステムの制御方法
JP2011128998A (ja) 半導体記憶装置
US9122586B2 (en) Physical-to-logical address map to speed up a recycle operation in a solid state drive
CN101477492A (zh) 一种用于固态硬盘的循环重写闪存均衡方法
KR101403922B1 (ko) 접근 빈도에 따라 데이터를 할당하는 저장장치 및 저장방법
KR101839664B1 (ko) 데이터 기억 시스템 및 그 제어 방법
US11687447B1 (en) Method and apparatus for performing access control of memory device with aid of additional physical address information
US20100318726A1 (en) Memory system and memory system managing method
JP2015191294A (ja) メモリコントローラ、メモリシステム及びメモリ制御方法
TW202336587A (zh) 在以快閃記憶體為基礎的儲存裝置中快取位址映射資訊的方法與裝置
JP2021068129A (ja) メモリコントローラ及びフラッシュメモリシステム
JP6430039B2 (ja) 記憶装置および記憶装置の制御方法
TWI824761B (zh) 在以快閃記憶體為基礎的儲存裝置中快取位址映射資訊的方法與裝置
JP2016126737A (ja) キャッシュメモリ装置及びプログラム
CN118193517A (zh) 应用于存储器的映射信息处理方法和存储器控制器

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130125

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20130125

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20130319

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130510

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20130604

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20130611

R150 Certificate of patent or registration of utility model

Ref document number: 5295286

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

LAPS Cancellation because of no payment of annual fees