JP5294950B2 - Power conversion apparatus and abnormality detection method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To protect a power converter constituted of a plurality of IGBT elements by detecting abnormality of a gate driving circuit and abnormality of the IGBT elements certainly. <P>SOLUTION: The power converter is comprised of a control circuit 100, a pulse generating circuit 200 to generate a command pulse to each IGBT, a plurality of gate driving circuits 400a to 400n to conduct ON-OFF operation control of the IGBT according to the input command pulse, the IGBTs 500a to 500n to be connected to each gate driving circuit, and an abnormality detecting circuit 300. The abnormality detecting circuit judges a conflict between the command pulses RPa to RPn and gate feedback signals FBPa to FBPn output from the gate driving circuits. In case that a conflict state has continued for a given time, the circuit judges it abnormal and outputs a signal SUP to switch off all command pulses to the pulse generating circuit. <P>COPYRIGHT: (C)2009,JPO&amp;INPIT

Description

  The present invention relates to a power conversion apparatus that performs power conversion by using a plurality of voltage-driven semiconductor elements, which can control a conduction state by a voltage applied to an element control input, and in particular, means for detecting an abnormality in a voltage-driven semiconductor element The present invention relates to a power conversion device including the above and an abnormality detection method thereof.

  A typical voltage-driven semiconductor element is an insulated gate bipolar transistor (IGBT), which is widely used in power conversion devices. Hereinafter, in this specification, description will be made using IGBT as a term indicating all voltage-driven semiconductor elements.

  As a protection for the power conversion device, a method of detecting an overcurrent caused by a load short circuit of the power conversion device and blocking and protecting the overcurrent with the IGBT itself is widely used. For example, there is one that detects an increase in saturation voltage at the time of an excessive current from the collector voltage of the IGBT, reduces the gate voltage, cuts off the overcurrent by the IGBT itself, and protects it. Also, there is a type in which a dedicated current detection emitter electrode is provided in the IGBT to detect overcurrent, and the gate voltage is lowered to cut off and protect the overcurrent by the IGBT itself.

  However, in the method of detecting an increase in saturation voltage, the collector voltage does not increase unless an excessive current flows, so that detection is inevitably delayed. In addition, since a high-voltage collector voltage is connected to the gate drive circuit, the circuit configuration becomes complicated, and a malfunction may occur due to the use of a collector voltage that varies abruptly due to the on / off operation of the IGBT. On the other hand, the method of providing a current detection emitter electrode requires an electrode to be provided on the IGBT circuit itself, and cannot be used in a power conversion device using a general-purpose IGBT.

  In Patent Document 1, a gate current of an insulated gate semiconductor element is detected, a time corresponding to ON is obtained from a rising signal of the gate current, and the time is compared with a gate command signal to detect a mismatch between the two. There is a disclosure about an example of a failure detection method for an insulated gate semiconductor device that quickly detects a failure in the semiconductor device.

JP 2002-281736 A

  By the way, in all the conventional systems, there is a problem that protection is not possible when the current interrupting function is lost due to a failure of the IGBT itself or the like because the IGBT itself interrupts the overcurrent. Furthermore, there has been a problem that protection cannot be performed even when the IGBT is erroneously turned on / off due to malfunction or failure of the gate drive circuit.

  On the other hand, in a power conversion device composed of a plurality of IGBTs, there has been a problem that a current interruption failure of one IGBT element causes an overcurrent of another IGBT element and spills over to damage of the plurality of IGBT elements.

  The present invention has been made in view of the above circumstances, and in a power conversion device composed of a plurality of IGBT elements, it is possible to reliably detect and protect an abnormality of a gate drive circuit and an abnormality of an IGBT element by An object of the present invention is to provide a power conversion device having a protection function that prevents a failure of one IGBT element from spreading to a failure of another IGBT element.

  The present invention relates to a control circuit that performs control processing of a power converter and instructs a pulse generation means to generate a pulse, and a pulse that generates a command pulse that specifies an on / off state for each IGBT based on a command from the control circuit. Generating means, a plurality of gate driving means for turning on or off the IGBT by changing the magnitude of the gate voltage applied to the gate of the IGBT according to the state of the input command pulse, and each gate driving means And an abnormality detecting means for detecting abnormality of the gate driving means and the IGBT.

  A gate drive circuit as a gate drive means detects a gate voltage that changes the magnitude of the gate voltage applied to the gate of the IGBT according to the state of the command pulse, compares the magnitude with a threshold value, A gate voltage discriminating unit that outputs a signal indicating higher (H) or lower (L) than the threshold value, and detecting the gate current, comparing the magnitude with the threshold value, and determining whether the magnitude is larger (H) or smaller (L) than the threshold value. A gate current discriminating unit that outputs a signal indicating the output, a gate feedback generating unit that outputs the gate feedback signal indicating the on / off state of the IGBT by inputting the output of the gate voltage discriminating unit and the output of the gate current discriminating unit, and a power source unit Consists of.

  Also, the abnormality detection circuit, which is an abnormality detection means, receives the command pulse output from the pulse generation means to each gate drive means and the gate feedback signal output from the plurality of gate drive means connected to the pulse generation circuit. Then, it is determined whether the command pulse matches each gate feedback signal. As a result of the determination, if an abnormality is detected, a command for generating a signal (suppress signal) for turning off all command pulses is output to the pulse generating means. Thereby, each IGBT which comprises a power converter device will be in an OFF state, and a power converter device will stop.

  As described above, in the present invention, all the IGBTs constituting the power conversion device are turned off when an abnormality is detected. Therefore, even if one IGBT cannot cut off the current, the other IGBTs in the current path are turned off. Since the current is cut off, other IGBTs can be protected.

  According to the present invention, in a power conversion device composed of a plurality of IGBTs, an abnormality of an IGBT is detected, and a failure of one IGBT element is detected by performing an off operation on all the IGBTs constituting the power conversion device. It is possible to prevent the IGBT element from being damaged. In addition, when an abnormality is detected, the pulse generation means performs an off operation, so that even if there is an abnormality in the gate driving means or the IGBT itself, all IGBTs can be reliably turned off and other IGBTs can be protected. Can do.

  Here, the gate driving means performs an operation of applying a positive constant voltage to the gate of the IGBT when the command pulse is at the H level and applying a negative constant voltage when the command pulse is at the L level. Therefore, if the gate voltage of the IGBT does not correspond to the level of the command pulse, it is considered that the gate drive means is abnormal or the IGBT is abnormal. In general, in a voltage-driven semiconductor element such as an IGBT, a gate current for charging / discharging the gate capacitance flows in a short time immediately after changing a gate voltage to be applied, but does not flow in other steady state. Therefore, it can be determined that the IGBT is in an abnormal state when the gate current flows for a certain period of time even though the applied gate voltage is not changed.

  In the present invention, in order to detect an abnormality using the characteristics of the IGBT as described above, a gate voltage determination unit and a gate current determination unit are provided in the gate drive means, and the IGBT gate voltage and the command pulse do not match. In addition, since a mismatch between the gate current and the command pulse can also be detected, it is possible to reliably detect and protect the abnormality of the gate driving means or the abnormality of the IGBT element.

It is a block diagram which shows the example of whole structure by one embodiment of this invention. It is explanatory drawing which shows the example of an operation characteristic of the gate voltage discrimination | determination part by one embodiment of this invention. It is explanatory drawing which shows the example of an operation characteristic of the gate current discrimination | determination part by one embodiment of this invention. It is explanatory drawing which shows the structural example of the gate feedback preparation part by one embodiment of this invention. It is a block diagram which shows the structural example of the abnormality detection circuit by one embodiment of this invention. It is explanatory drawing which shows the operation example at the time of normal by one embodiment of this invention. It is explanatory drawing which shows the operation example (1) at the time of abnormality by one embodiment of this invention. It is explanatory drawing which shows the operation example (2) at the time of abnormality by one embodiment of this invention.

  Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings.

  FIG. 1 is a block diagram illustrating a configuration example of a power conversion device according to an embodiment of the present invention. An overall configuration according to an embodiment of the present example will be described with reference to FIG.

  This example includes a control circuit 100 that controls the operation of the power converter, a pulse generation circuit 200 that is a pulse generation unit that generates command pulses for commanding on / off of the IGBT in accordance with instructions from the control circuit 100, A gate drive circuit 400a, which is a gate drive means for turning on or off the IGBT by inputting a command pulse from the circuit 200 and changing the magnitude of the gate voltage applied to the gate of the IGBT according to the state of the command pulse. And an abnormality detection circuit 300 which is an abnormality detection means for detecting an abnormality of the IGBT element 500a and a gate drive circuit or an IGBT and outputting a signal SUP for stopping the pulse generation of the pulse generation circuit 200 when the abnormality occurs. . Note that the power conversion device is composed of a plurality of IGBTs (500a to 500n) and a plurality of gate drive circuits (400a to 400n), but since their configuration and operation are all the same, in FIG. Only the gate drive circuit 400a is shown and the others are omitted.

  The gate drive circuit 400a receives a command pulse RPa generated by the pulse generation circuit 200, applies a voltage corresponding to the command pulse RPa as a gate voltage, and controls the on / off operation of the IGBT 500a; A power supply unit 402a that supplies power necessary for each unit of the driving circuit 400a, a gate voltage determination unit 403a that inputs a gate voltage Vga and determines a gate voltage, and a gate current Iga and inputs a gate current. The gate current generation unit 404a receives the gate voltage feedback pulse VFBa output from the gate voltage determination unit 403a and the gate current feedback pulse IFBa output from the gate current determination unit 404a, and outputs the gate feedback pulse FBPa. Part 405 If, constructed from gate resistance 406a.

  Next, the operation of each part of the gate drive circuit 400a will be described.

  The gate drive unit 401a receives the command pulse RPa generated by the pulse generation circuit 200. When the command pulse RPa is at the H level, the gate drive unit 401a applies a positive constant voltage to the gate of the IGBT 500a to turn on the command pulse Rpa. In the case of the L level, a negative negative voltage is applied to control to turn off.

  The gate voltage determination unit 403a receives the gate voltage Vga of the IGBT 500a and generates a gate voltage feedback pulse VFBa. FIG. 2 shows the operating characteristics of the gate voltage determination unit 403a. In this example, a fixed determination level Vth is set to determine the gate voltage, and when the input gate voltage Vga is smaller than Vth (Vga <Vth), the L level and when Vga is equal to or higher than Vth (Vga ≧ Vth) is determined to be at H level, and a gate voltage feedback pulse VFBa corresponding to the determination result is generated and output.

  The gate current determination unit 404a receives the gate current Iga of the IGBT 500a as the voltage of the gate resistor 406a, and generates a gate current feedback pulse IFBa. FIG. 3 shows the operating characteristics of the gate current discriminating unit 404a. In this example, a fixed determination level Ith is set to determine the gate current, and when the absolute value of the input gate current Iga is smaller than Ith (−Ith <Iga <+ Ith), the L level and the gate current Iga Is equal to or higher than Ith (Iga ≦ −Ith, Iga ≧ + Ith), the gate current feedback pulse IFBa corresponding to the determination result is generated and output.

  Next, the operation of the gate feedback creation unit 405a will be described. FIG. 4 shows a configuration example of the gate feedback creation unit 405a of this example. The gate feedback generator 405a receives the gate voltage feedback pulse VFBa output from the gate voltage determiner 403a and the gate current feedback pulse IFBa output from the gate current determiner 404a, and performs exclusive OR of the input pulses. The result is output as a gate feedback pulse FBPa which is an H level or L level signal. The gate feedback pulse FBPa is a signal for notifying the abnormality detection circuit 300 of the on / off state of the IGBT 500a. Details of the operation of the gate feedback creation unit 405a will be described with reference to FIGS.

  FIG. 5 shows a configuration example of the abnormality detection circuit 300 in this example. The configuration and operation of the abnormality detection circuit 300 will be described with reference to FIG.

  Abnormality detection circuit 300 receives command pulses RPa to RPn output from pulse generation circuit 200 and gate feedback pulses FBPa to FBPn, and exclusive OR operation circuits 304a to 304n for detecting a mismatch between them. The OR circuit 303 includes an oscillation circuit 301 that generates a clock signal having a constant frequency and a counter 302 that counts the clock signal as means for detecting that the mismatch continues for a certain time when a mismatch occurs. To do. The exclusive OR operation circuits 304a to 304n include command pulses RPa to RPn output from the pulse generation circuit 200 to the gate drive circuits 400a to 400n, and gate feedback generation units 405a to 405n of the gate drive circuits. The output gate feedback pulses FBPa to FBPn are input, respectively, and exclusive OR of the command pulses RPa to RPn and the gate feedback pulses FBPa to FBPn is obtained. The logical sum operation circuit 303 receives the results of the exclusive logical sum operation circuits 304a to 304n and takes the logical sum of them.

  The counter 302 includes a clock input CLK input from the oscillation circuit 301, a count operation permission input EN, a counter clear input CLR, and a counter overflow output OVF. The counter 302 performs a count operation each time the clock input CLK changes when the count operation enable input EN is at the H level and the counter clear input CLR is at the H level. When an L level signal is input to the counter clear input CLR, the counter is cleared to zero. An upper limit value for detecting overflow is set in the counter, and when the count value reaches the upper limit value, the counter overflow output OVF is output as an H level signal. The counter overflow output is a signal SUP for stopping the pulse generation of the pulse generation circuit 200.

  Here, the counter clear input CLR and the count operation permission input EN receive the output signal of the logical sum operation circuit 303. The logical sum operation circuit 303 inputs the results of the exclusive logical sum operation circuits 304a to 304n, and when any of the results of the exclusive logical sum operation circuits 304a to 304n is at the H level, the logical sum operation circuit The output signal 303 becomes H level. Therefore, when the output signal of the OR circuit 303 is at the H level, it can be determined that there is a mismatch between the command pulses RPa to RPn and the gate feedback pulses FBPa to FBPn.

  As a state where the command pulse and the gate feedback pulse do not match, the command pulse and the on / off state of the IGBT may not match. In general, in the IGBT, a gate current for charging / discharging the gate capacitance flows in a short time immediately after the applied gate voltage is changed, but does not flow in other steady state. For this reason, a mismatch between the command pulse and the gate feedback pulse may occur during the generation of the gate current accompanying the change in the gate voltage. However, if these disagreement states do not recover and continue for a certain period of time, it can be determined that some abnormality has occurred. Therefore, in this example, an upper limit value of the counter is provided as a threshold for determining occurrence of abnormality. The counter 302 is configured to continue counting while the output of the logical sum operation circuit 303 is H level, and when the H level state continues for a certain time, the count value reaches the upper limit value and the counter overflow output OVF becomes H level. did. The counter overflow output OVF is output as an output signal SUP to the pulse generation circuit 200, and the pulse generation circuit 200 receiving the H-level output signal SUP stops all command pulses, thereby constituting a power conversion device. All the IGBTs are turned off, and the power converter is stopped.

  As described above, in this example, the abnormality detection circuit 300 reliably detects an abnormality, and the pulse generation circuit 200 stops all command pulses and turns off all the IGBTs, thereby protecting a healthy IGBT. Can do.

  In this example, an oscillation circuit and a counter are provided as means for detecting that the inconsistency state between the command pulse and the gate feedback pulse has continued for a certain period of time. However, the output of the OR operation circuit 303 remains in the H level. Other means may be used as long as it can determine the time to perform and notify that the threshold has been exceeded.

  Next, the operation of this example will be described with reference to FIGS. FIG. 6 shows the operation at the normal time, and FIGS. 7 and 8 show the operation at the abnormal time.

  First, the normal operation will be described with reference to FIG. In FIG. 6, the command pulse RPa output from the pulse generation circuit 200 from above, the gate voltage Vga of the IGBT 500a, the gate current Iga, the gate voltage feedback pulse VFBa output from the gate voltage determination unit 403a, and the output from the gate current determination unit 404a Gate current feedback pulse IFBa, gate feedback pulse FBPa output from the gate feedback generator 405a, output signal of the exclusive OR operation circuit 304a, output signal of the OR operation circuit 303, count value of the counter 302, abnormality detection The output signal SUP of the circuit 300 is represented.

  When the command pulse RPa changes from the L level to the H level at t1, the gate voltage Vga changes from −V to + V. At this time, a positive gate current Iga flows to charge the gate capacitance of the IGBT 500a. Since the gate voltage Vga has changed from −V to + V, the gate voltage feedback pulse VFBa, which is an output signal of the gate voltage determination unit 403a, changes from the L level to the H level when the gate voltage Vga becomes equal to or higher than the determination level Vth.

  On the other hand, the gate current feedback pulse IFBa, which is the output signal of the gate current discriminating unit 404a, goes to the H level while the gate current Iga flows over a certain value + Ith, and when charging ends and the gate current Iga becomes smaller than the certain value + Ith. The gate current feedback pulse IFBa becomes L level.

  Since the gate feedback generation unit 405a performs an exclusive OR of the gate voltage feedback pulse VFBa and the gate current feedback pulse IFBa, the gate feedback pulse FBPa as the output signal is as illustrated.

  Since the exclusive OR operation circuit 304a of the abnormality detection circuit 300 receives the command pulse RPa and the gate feedback pulse FBPa and takes the exclusive OR, the output signal is as shown in the figure. Further, the output of the logical sum operation circuit 303 which receives the output signal of the exclusive logical sum operation circuit 304a as shown in FIG. Here, as an example, the case where there is one exclusive OR operation circuit is shown, so that the output is the same as the output signal of the exclusive OR operation circuit 304a.

  The counter 302 increases the count value while the output signal of the logical sum operation circuit 303 is at the H level, but returns to the L level before reaching the upper limit value for detecting the overflow, so that the count value is cleared. As a result, the output signal SUP of the abnormality detection circuit 300 does not become H level.

  When the command pulse RPa changes from H level to L level at t2, the gate voltage Vga changes from + V to -V. At this time, a negative gate current Iga flows to discharge the gate capacitance of the IGBT 500a. Since the gate voltage Vga has changed from + V to −V, when the gate voltage Vga becomes lower than the determination level Vth, the gate voltage feedback pulse VFBa that is the output signal of the gate voltage determination unit 403a changes from the H level to the L level.

  On the other hand, while the gate current Iga is equal to or less than the constant value −Ith, the gate current feedback pulse IFBa, which is the output signal of the gate current determination unit 404a, is at the H level. When it becomes larger, the gate current feedback pulse IFBa becomes L level.

  Thereafter, the same operation is performed, and the output signal SUP of the abnormality detection circuit 300 does not become H level.

  Next, the operation when an abnormality occurs will be described with reference to FIG. The signals shown in FIG. 7 are the same as those shown in FIG.

  In FIG. 7, the operation when the command pulse RPa changes from the H level to the L level at the time t3 is the same as the normal operation shown in FIG.

  Here, it is assumed that a failure has occurred in the IGBT 500a at time t4. When a failure occurs in the IGBT 500a, a gate current Iga flows out. This current flows through the feedback capacitance between the collector and gate of the IGBT, or when the collector and the gate become conductive and the collector current flows out to the gate, or the gate and emitter become conductive and the gate current flows. This is caused by an abnormality in the IGBT.

  As a result, when the gate current Iga falls below a certain value −Ith, the gate current feedback pulse IFBa that is the output signal of the gate current discriminating unit 404a becomes H level, and the gate feedback pulse FBPa that is the output signal of the gate feedback creating unit 405a Becomes H level. Then, the exclusive OR operation circuit 304a of the abnormality detection circuit 300 that inputs the command pulse RPa and the gate feedback pulse FBPa and takes the exclusive OR is also at the H level, and the output of the OR operation circuit 303 is the same.

  The counter 302 increases the count value while the output signal of the logical sum operation circuit 303 is at the H level. When the output of the logical sum operation circuit 303 continues to be at the H level for a predetermined time or more, the counter 302 counts at the time t5. The value reaches the upper limit. As a result, the output signal SUP of the abnormality detection circuit 300 becomes H level, and it is determined that an abnormality has occurred at this point.

  The pulse generation circuit 200 that has received the output signal SUP of the abnormality detection circuit 300 stops pulse generation, and all of the command pulses RPa to RPn become L level. Therefore, all of IGBT500a-IGBT500n will be in an OFF state, and a power converter device will stop operation. Thereby, since all IGBTs including the IGBT in which an abnormality has occurred are stopped, the overcurrent can be cut off and the normal IGBT can be protected.

  Next, with reference to FIG. 8, the operation when another abnormality occurs will be described. The signals shown in FIG. 8 are the same as those shown in FIG.

  Here, it is assumed that the gate drive unit 401a malfunctions at time t6 and a gate voltage Vga not corresponding to the command pulse RPa is generated. As a result, the gate voltage feedback pulse VFBa that is the output of the gate voltage determination unit 403a becomes H level, and the gate feedback pulse FBPa that is the output signal of the gate feedback creation unit 405a also becomes H level. As a result, the operation is the same as that described with reference to FIG. 7, the output of the logical sum operation circuit 303 of the abnormality detection circuit 300 also becomes H level, and the count value of the counter 302 reaches the upper limit value at time t7. Then, the output signal SUP of the abnormality detection circuit 300 becomes H level, and the pulse generation circuit 200 stops generating pulses, whereby all of the IGBTs 500a to 500n are turned off, and the power converter stops operating.

  In addition to the above abnormality examples, when an abnormality occurs in the power supply unit 402a, one of the circuit units becomes abnormal. As a result, since the gate feedback pulse FBPa has a waveform different from that in the normal state, an abnormality is detected by the abnormality detection circuit 300, and the power converter stops operating. Further, even when an abnormality occurs in the gate voltage determination unit 403a, the gate current determination unit 404a, and the gate feedback generation unit 405a, the detection is performed by the gate feedback pulse FBPa having a waveform different from that in the normal state.

  As described above, in this example, even when an abnormality occurs in either the IGBT element or the gate drive circuit that drives the IGBT element, the abnormality can be reliably detected. When the abnormality is detected, the pulse of the pulse generation circuit is detected. By stopping, the power conversion device and the IGBT element can be reliably protected.

  DESCRIPTION OF SYMBOLS 100 ... Control circuit, 200 ... Pulse generation circuit, 300 ... Abnormality detection circuit, 301 ... Oscillation circuit, 302 ... Counter, 303 ... Logical sum operation circuit, 304 ... Exclusive OR operation circuit, 400 ... Gate drive circuit, 401 ... Gate drive unit 402 ... Power supply unit 403 ... Gate voltage discrimination unit 404 ... Gate current discrimination unit 405 ... Gate feedback creation unit 406 ... Gate resistance 500 ... IGBT

Claims (2)

In a power converter configured using a plurality of voltage-controlled semiconductor elements,
Command signal generating means for generating a command signal for controlling on / off of each of the plurality of voltage controlled semiconductor elements based on a command from the control circuit; and on / off of each of the plurality of voltage controlled semiconductor elements.・ A plurality of gate drive circuits for controlling OFF,
Each of the plurality of gate driving circuits includes:
Gate driving means for applying a gate voltage corresponding to the command signal to the voltage-controlled semiconductor element;
A gate resistor provided between the gate driving means and the voltage-controlled semiconductor element;
A gate voltage determining means for detecting the gate voltage from between the gate driving means and the gate resistance and outputting a gate voltage determining signal;
Gate current discrimination means for detecting a gate current flowing through the gate resistor and outputting a gate current discrimination signal;
Abnormality detection for each voltage control type semiconductor element based on the gate voltage determination signal and the gate current determination signal obtained by the respective gate drive circuit and the command signal of each voltage control type semiconductor element An anomaly detection means for generating a signal ;
An abnormality detection signal for each voltage control type semiconductor element generated by the abnormality detection means is collectively monitored, and includes a measurement means for measuring an elapsed time when an abnormality is detected by any abnormality detection signal,
The power conversion device , wherein the plurality of voltage-controlled semiconductor elements are stopped when an elapsed time in which an abnormality is detected by the measuring unit becomes a certain time or more . The command signals of the plurality of voltage control type semiconductor elements generated from the command signal generation means are input to the gate drive means of the plurality of gate drive circuits provided for the respective voltage control type semiconductor elements, and according to the command signal In the abnormality detection method of the power conversion device that drives the plurality of voltage controlled semiconductor elements by outputting a gate voltage and applying the gate voltage to each voltage controlled semiconductor element via a gate resistor,
Each of the plurality of gate driving circuits detects the gate voltage from between the gate driving means and the gate resistance, generates a gate voltage determination signal, and generates a gate current determination signal from the gate current flowing through the gate resistance. Generating an abnormality detection signal based on the gate voltage determination signal, the gate current determination signal, and the command signal;
The abnormality detection signal for each voltage control type semiconductor element is collectively monitored, the elapsed time when the abnormality is detected by any of the abnormality detection signals is measured, and the time when the abnormality is detected becomes a certain time or more. Then, the abnormality detection method for the power conversion device , wherein the plurality of voltage-controlled semiconductor elements are stopped .

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