JP5248993B2 - Bootstrap circuit - Google Patents

Description

  The present invention relates to a bootstrap circuit that generates a boosted voltage, and more particularly to a circuit that simplifies the circuit and improves operational reliability.

Conventionally, as this type of general bootstrap circuit, the one shown in FIG. 5 is well known.
The conventional circuit shown in FIG.
In this conventional circuit, the P-channel first MOS transistor 1A and the N-channel second and third MOS transistors 2A and 3A are controlled ON / OFF by a control circuit (indicated as “CONT” in FIG. 5) 4A. As a result, charging of the bootstrap capacitor 5A is controlled, and a necessary bootstrap voltage is obtained.

  That is, when the first MOS transistor 1A is turned on by the control circuit 4A, the second MOS transistor 2A is turned on, and the third MOS transistor 3A is turned off, the bootstrap capacitor 5 When charged by VDD, the voltage VBS-OUT, that is, the voltage at the bootstrap voltage terminal (indicated as “BS” in FIG. 5) 33A based on the output terminal (indicated as “OUT” in FIG. 5) 32A , VBS-OUT≈VDD.

On the other hand, when the first MOS transistor 1A is turned off by the control circuit 4A, the second MOS transistor 2A is turned off, and the third MOS transistor 3A is turned on, VOUT = VIN and VBS≈VIN + VBS. -OUT ≒ VIN + VDD.
Here, VIN is a voltage at the input voltage terminal 35A based on the potential of the ground terminal (indicated as “GND” in FIG. 5) 34A, and VBS is a bootstrap voltage based on the potential of the ground terminal 34A. This is the voltage at the terminal 33A.

In the circuit shown in FIG. 5, the circuits denoted by “LS1” and “LS2” are both level shifter circuits, and the basic configuration is the same, but the level shifter circuit LS1 is the power supply voltage VDD. Is a circuit that shifts the voltage from V to VBS, and shifts the ON / OFF control signal for the first MOS transistor 1A output from the control circuit 4A.
The level shifter circuit LS2 is also a circuit that shifts the voltage from the power supply voltage VDD to the voltage VBS, and shifts the ON / OFF control signal for the third MOS transistor 3A output from the control circuit 4A. Yes.

FIG. 6 shows another configuration example of the conventional circuit. Hereinafter, the conventional circuit will be generally described with reference to FIG. In addition, about the same component as the structural example shown by FIG. 5, the same code | symbol is attached | subjected, the detailed description is abbreviate | omitted, and below, it demonstrates centering on a different point.
This conventional circuit is different from the conventional circuit shown in FIG. 5 in that the diode 10 is used in place of the first MOS transistor 1A in FIG. The operation of is the same as that of the conventional circuit shown in FIG.

Comparing the conventional circuits shown in FIGS. 5 and 6 described above, in the conventional circuit shown in FIG. 6, a voltage drop in the forward direction of the diode 10 occurs, and accordingly, the charging voltage of the bootstrap capacitor 5A is correspondingly reduced. In contrast, in the conventional circuit shown in FIG. 5, there is almost no voltage drop in the first MOS transistor 1A, so that the gate bias voltage of the third MOS transistor 3A becomes small. This has the advantage that it can be avoided.
Note that this type of conventional circuit is disclosed in Patent Document 1, Patent Document 2, and the like.
JP 2007-195361 A (page 4-6, FIGS. 1 and 2) US Patent Application Publication No. 2007/0159150

  However, in the conventional circuit shown in FIG. 5, as described above, there is almost no unnecessary decrease in the gate bias voltage of the first MOS transistor 1A compared to the conventional circuit shown in FIG. Although advantageous in that point, since LS1 is required to control the first MOS transistor 1A, there is a disadvantage that the layout area becomes large.

  For example, FIG. 7 shows the simplest configuration example of the level shifter circuit LS1, but the MOS transistor 6 provided between the bootstrap voltage terminal 33A and the ground terminal 34A is connected to the ground terminal 34A for operation. Unlike the transistor provided between the power supply terminal 31A and the transistor provided between the bootstrap voltage terminal 33A and the output terminal 32A, a high voltage VBS is applied between the drain and the source. Yes. Therefore, the MOS transistor 6 requires a special transistor with a high breakdown voltage specification, which causes an increase in layout area.

  On the other hand, the ON / OFF control signal of the first MOS transistor 1A is normally synchronized with the control signal HG2 output from the level shift circuit LS2 in the conventional circuit shown in FIG. It is not related to the level of VOUT. For this reason, the problem of the malfunction cannot be solved.

Further, when the first and second MOS transistors 1A and 2A are ON and the third MOS transistor 3A is OFF, originally, VOUT = VGND and VBS-OUT≈VDD should be satisfied. Even when VOUT becomes VGND + α due to the influence of the environment, since the first MOS transistor 1A is turned on, the charge charged in the bootstrap capacitor 5A is discharged by the α voltage, and VBS−OUT≈VDD−α. It becomes.
When VBS-OUT≈VDD-α, when α is large, the voltage necessary for the operation of the circuit between the bootstrap voltage terminal 33A and the output terminal 32A becomes less than the original operation voltage. Therefore, malfunction will be caused.

  The present invention has been made in view of the above circumstances, and provides a bootstrap circuit capable of ensuring a highly reliable circuit operation while reducing the layout area.

In order to achieve the above object of the present invention, a bootstrap circuit according to the present invention includes:
A first switch element and a bootstrap capacitor are connected in series between the first power source and the output terminal, while a second switch element is connected between the output terminal and the first terminal between the output terminal and the ground terminal. A third switch element is connected in series with the two power supplies, and the boot switch capacitor is booted to the first switch element side terminal by controlling the operation of the first to third switch elements. In a bootstrap circuit configured to obtain a strap voltage,
A current monitoring circuit that monitors the current flowing through the first switch element and controls ON / OFF of the first switch element according to the monitoring result is provided . 1 to 4 MOS transistors and a comparator, and the first and second MOS transistors for the monitoring circuit are connected to each other and the drain of the second MOS transistor for the monitoring circuit. On the other hand, the sources of the first and second MOS transistors for the monitoring circuit are both connected to the source of the first MOS transistor as the first switch element and one end of the bootstrap capacitor, In the third and fourth MOS transistors, the gate and the drain of the fourth MOS transistor for monitoring circuit are connected to each other. The source of the third MOS transistor for the monitoring circuit is the drain of the first MOS transistor for the monitoring circuit, and the source of the fourth MOS transistor for the monitoring circuit is the second transistor for the monitoring circuit And the source of the third MOS transistor for the monitoring circuit is connected to the inverting input terminal of the comparator together with the drain of the first MOS transistor for the monitoring circuit. The drain of the third MOS transistor is connected to the first power supply, a constant current source is connected between the drain of the fourth MOS transistor for monitoring circuit and the output terminal, and the non-inversion of the comparator The input terminal is connected to the negative side of the reference voltage source, and the positive side of the reference voltage source is a first MOS transistor as the first switch element. And the output terminal of the comparator is connected to the gate of a first MOS transistor as the first switch element, and the bootstrap voltage is the power supply voltage of the first power supply. When the voltage exceeds the voltage at the non-inverting input terminal of the comparator exceeding the voltage at the inverting input terminal of the comparator, a signal corresponding to the logical value High is output by the comparator. When the first MOS transistor as the switch element is turned off while the bootstrap voltage is lower than the power supply voltage of the first power supply, the voltage at the inverting input terminal of the comparator is A signal corresponding to the logical value Low is output by the comparator beyond the voltage at the non-inverting input terminal, and the first MOS transistor as the first switch element Is configured to be in an ON state .
In order to achieve the object of the present invention, a bootstrap circuit according to the present invention includes a first switch element and a bootstrap capacitor connected in series between a first power supply and an output terminal, while the output A second switch element is connected between the terminal and the ground terminal, a third switch element is connected in series between the output terminal and the second power source, and the first to third switch elements are connected in series. In the bootstrap circuit configured to obtain a bootstrap voltage at a terminal on the first switch element side of the bootstrap capacitor by the operation control of
A voltage monitoring circuit that monitors the voltage between the terminals of the first switch element and controls ON / OFF of the first switch element according to the monitoring result is provided, and the voltage monitoring circuit includes a Zener diode The Zener diode has an anode connected to the inverting input terminal of the comparator and a drain connected to the drain of the first MOS transistor as the first switch element. Meanwhile, the cathode of the Zener diode is connected to the source of the first MOS transistor as the first switch element connected to the bootstrap capacitor, and the non-reverse input terminal of the comparator is connected to a reference voltage Connected to the negative side of the source, the positive side of the reference voltage source is the source of the first MOS transistor as the first switch element. And the output terminal of the comparator is connected to the gate of the first MOS transistor as the first switch element, and the source / drain of the first MOS transistor as the first switch element When the voltage between them becomes equal to or higher than the reference voltage of the reference voltage source, the comparator outputs a voltage corresponding to the logical value High, and the first MOS transistor as the first switch element is in the OFF state. On the other hand, when the voltage between the source and the drain of the first MOS transistor as the first switch element falls below the reference voltage of the reference voltage source, the comparator corresponds to the logical value Low. A configuration in which a voltage is output and the first MOS transistor as the first switch element is turned on is also preferable.

  According to the present invention, a switch element connected in series with a bootstrap capacitor is provided with a circuit that can self-control ON / OFF according to changes in its operating current or operating voltage. By making the circuit configurable, unlike conventional circuits, it is possible to ensure highly reliable circuit operation and reduce the layout area without using LSI circuits that require transistors with special voltage specifications. It has the effect of becoming.

Hereinafter, embodiments of the present invention will be described with reference to FIGS. 1 to 4.
The members and arrangements described below do not limit the present invention and can be variously modified within the scope of the gist of the present invention.
First, a first basic configuration example of the bootstrap circuit in the embodiment of the present invention will be described with reference to FIG.
The bootstrap circuit according to the embodiment of the present invention includes a switch element provided in series between the operation power supply terminal 31 to which the power supply voltage VDD is applied and the output terminal 32 in series from the operation power supply terminal 31 side. The first MOS transistor 1 and the bootstrap capacitor 5, the current monitoring circuit (indicated as “I-WATCH” in FIG. 1) 7 for controlling ON / OFF of the first MOS transistor 1, A first MOS transistor 1 and second and third MOS transistors 2 and 3 for controlling the charging of the bootstrap capacitor 5, and a control circuit 4 for controlling the operations of the second and third MOS transistors 2 and 3. It is configured as the main component.

Hereinafter, the circuit connection will be specifically described.
First, the power supply voltage VDD is applied to the drain of the P-channel first MOS transistor 1, while the source is connected to one end of the bootstrap capacitor 5. A connection point between the source of the first MOS transistor 1 and one end of the bootstrap capacitor 5 is connected to a bootstrap voltage terminal (indicated as “BS” in FIG. 1) 33.
The other end of the bootstrap capacitor 5 is connected to an output terminal (indicated as “OUT” in FIG. 1) 32.

The current monitoring circuit 7 is configured to monitor a current flowing through the first MOS transistor 1 and output a control signal to the gate of the first MOS transistor 1 in accordance with the flowing current (for details, see FIG. Later).
On the other hand, the N-channel second and third MOS transistors 2 and 3 as the second and third switching elements are connected to the drain of the second MOS transistor 2 and the source of the third MOS transistor 3. The source of the second MOS transistor 2 is connected to the ground terminal (indicated as “GND” in FIG. 1) 34. The drain of the third MOS transistor 3 is connected to the input voltage terminal 35.

A low-side gate signal LG1 output from a control circuit (indicated as “CONT” in FIG. 1) 4 is applied to the gate of the second MOS transistor 2.
Further, a high side gate signal HG2 output from a level shifter circuit (indicated as “LS” in FIG. 1) 6 is applied to the gate of the third MOS transistor 3.
The level shifter circuit 6 is configured to shift the voltage from the power supply voltage VDD to the voltage VBS of the bootstrap voltage terminal 33 and output the high side signal HG2 in synchronization with the control signal HG1 from the control circuit 4. .

The control circuit 4 is configured to output a control signal LG1 as a gate signal of the second MOS transistor 2 and a control signal HG1 of the level shifter circuit 6 based on a PWM (Pulse Width Modulation) signal input from the outside. It will be.
The control circuit 4 operates upon receiving the power supply voltage VDD.

FIG. 2 shows a specific circuit configuration example of the current monitoring circuit 7. Hereinafter, this specific circuit example will be described with reference to FIG.
The current monitoring circuit 7 according to the embodiment of the present invention is configured by the monitoring circuit first to fourth MOS transistors 21 to 24 and the comparator 9 as main components.
P-channel MOS transistors are used for the first to fourth MOS transistors 21 to 24 for the monitoring circuit, and a current mirror circuit is formed by the first and second MOS transistors 21 and 22 for the monitoring circuit. The monitoring circuit third and fourth MOS transistors 23 and 24 constitute an input limiting circuit, respectively, and are connected in cascade.

  That is, the first and second MOS transistors 21 and 22 for the monitoring circuit have their gates connected to the drain of the second MOS transistor 22 for the monitoring circuit, while the first and second MOS transistors 22 and 22 for the monitoring circuit are connected to each other. The sources of the two MOS transistors 21 and 22 are connected together.

  On the other hand, the third and fourth MOS transistors 23 and 24 for the monitoring circuit are connected to each other and the drain of the fourth MOS transistor 24 for the monitoring circuit, while the third MOS for the monitoring circuit. The source of the transistor 23 is connected to the drain of the first MOS transistor 21 for the monitoring circuit, and the source of the fourth MOS transistor 24 for the monitoring circuit is connected to the drain of the second MOS transistor 22 for the monitoring circuit. It has become.

The source of the third MOS transistor 23 for the monitoring circuit is connected to the inverting input terminal of the comparator 9 together with the drain of the first MOS transistor 21, while the drain of the fourth MOS transistor 24 for the monitoring circuit A constant current source 25 is connected between the output terminal 32.
In this configuration, the first and third MOS transistors 21 and 23 for monitoring function as a current source 11 connected in parallel to the first MOS transistor 1 (details will be described later).

The reference voltage VREF is applied to the non-inverting input terminal of the comparator 9 with a reverse polarity. That is, the reference voltage source 8 is provided such that its negative electrode side is connected to the non-inverting input terminal of the comparator 9 and its positive electrode side is connected to the bootstrap voltage terminal 33.
The output terminal of the comparator 9 is connected to the gate of the first MOS transistor 1.

Next, the operation in this configuration will be described.
First, as a precondition, the reference voltage VREF of the reference voltage source 8 is set to satisfy VBS> VN1 ≧ VN2 when VBS ≧ VDD (hereinafter, this state is referred to as “state 1” for convenience). It shall be.
Here, VBS is the terminal voltage at the bootstrap voltage terminal 33 with reference to the terminal voltage at the ground terminal 34, and VN1 is the voltage at the non-inverting input terminal of the comparator 9 and is expressed as VN1 = VBS−VREF. It is something that can be done. VN2 is a voltage at the inverting input terminal of the comparator 9.

First, the basic operation as a bootstrap circuit is the same as that of this type of conventional circuit except that the first MOS transistor 1 is ON / OFF controlled by a current monitoring circuit 7 as will be described later. Therefore, a detailed description thereof will be omitted, and only a general description will be given.
That is, in the bootstrap operation, first, the first MOS transistor 1 is turned on by the current monitoring circuit 7, the second MOS transistor 2 is turned on by the control circuit 4, and the third MOS transistor 3 is turned off. Since VOUT = VGND, the bootstrap capacitor 5 is charged and VBS-OUT≈VDD.
Here, VOUT is a terminal voltage at the output terminal 32 based on the terminal voltage at the ground terminal 34, VGND is a voltage at the ground terminal 34, and VBS-OUT is a boot based on the terminal voltage at the output terminal 32. This is the terminal voltage at the strap voltage terminal 33.

When VBS-OUT≈VDD, the first MOS transistor 1OFF, the second MOS transistor 2 are turned off, and the third MOS transistor 3 is turned on so that VOUT = VIN, so that VBS≈VIN + VDD. It becomes.
Here, VIN is a voltage at the input voltage terminal 35 with respect to the terminal voltage of the ground terminal 34, and this voltage VIN is supplied from the outside by a second power supply (not shown). ing.

Next, the operation centering on the current monitoring circuit 7 will be described under the above preconditions.
First, when the operation state of the circuit is state 1, that is, when VBS ≧ VDD, a current flows from the bootstrap voltage terminal 33 to the operation power supply terminal 31 via the first MOS transistor 1. It is necessary to prevent this.
In this state, since VN1 ≧ VN2, a signal corresponding to the logical value High is output from the comparator 9 and applied to the gate of the first MOS transistor 1, so that the first MOS transistor 1 It is turned off.
This reliably prevents current from flowing from the bootstrap voltage terminal 33 to the operation power supply terminal 31.

Next, when VDD> VBS (hereinafter, for convenience, this state is referred to as “state 2”), the voltage VN2 at the inverting input terminal of the comparator 9 is VN2> VN1. , A signal corresponding to the logical value Low is output and applied to the gate of the first MOS transistor 1, and the first MOS transistor 1 is turned on. As a result, the operating power supply terminal 31 and the bootstrap voltage terminal 33 become conductive, a current flows from the operating power supply terminal 31 to the bootstrap voltage terminal 33, and the bootstrap capacitor 5 is charged.
In this way, the current flowing through the first MOS transistor 1 is monitored by the current monitoring circuit 7, and ON / OFF is self-controlled according to the monitoring result.

Next, a second configuration example will be described with reference to FIGS.
The same constituent elements as those shown in FIG. 1 or FIG. 2 are denoted by the same reference numerals, detailed description thereof is omitted, and different points will be mainly described below.
This second configuration example is provided with a voltage monitoring circuit (indicated as “V-WATCH” in FIG. 3) 7A instead of the current monitoring circuit 7 in the first configuration example (see FIG. 3). As in the current monitoring circuit 7, ON / OFF control of the first MOS transistor 1 can be performed.
FIG. 4 shows a specific circuit configuration example of the voltage monitoring circuit 7A. Hereinafter, the voltage monitoring circuit 7A will be described with reference to FIG.

The voltage monitoring circuit 7A is configured to monitor the voltage between the source and the drain of the first MOS transistor 1 and perform ON / OFF control of the first MOS transistor 1 according to the monitoring result. is there.
The voltage monitoring circuit 7A according to the embodiment of the present invention is configured with the Zener diode 13 and the comparator 9 as main components.
The Zener diode 13 has its anode connected to the inverting input terminal of the comparator 9 and also connected to the drain of the first transistor MOS1 via the resistor 12, and is supplied with the circuit operating power supply voltage VDD. It is like that.

On the other hand, the cathode of the Zener diode 13 is connected to the source of the first MOS transistor 1. In this configuration example, the first MOS transistor 1 has a substrate connected to the source.
Since the connection between the comparator 9 and the reference voltage source 8 is the same as that in the configuration example previously shown in FIG. 2, detailed description thereof will be omitted here.

Next, the operation of the voltage monitoring circuit 7A in such a configuration will be described.
In the voltage monitoring circuit 7A, the voltage between the source and drain of the first MOS transistor 1 is monitored by the comparator 9. That is, when the voltage between the source and drain of the first MOS transistor 1 becomes equal to or higher than the reference voltage VREF of the reference voltage source 8, a signal corresponding to the logical value High is output from the comparator 9, and the first MOS transistor 1 is turned off.
Here, the voltage between the source and the drain of the first MOS transistor 1 becomes equal to or higher than the reference voltage VREF of the reference voltage source 8, and the first MOS transistor 1 is turned off by the comparator 9 because the bootstrap capacitor 5 Charging progresses and VBS-OUT≈VDD.

On the other hand, contrary to the above, when the voltage between the source and drain of the first MOS transistor 1 falls below the reference voltage VREF of the reference voltage source 8, a signal corresponding to the logical value Low is output from the comparator 9. The first MOS transistor 1 is turned on.
In this way, the first MOS transistor 1 is self-controlled by the voltage monitoring circuit 7A according to the change in the source-drain voltage caused by the change in the voltage of the bootstrap capacitor 5. It has become.

It is a block diagram which shows the 1st basic structural example of the bootstrap circuit in embodiment of this invention. FIG. 2 is a circuit diagram showing a specific circuit configuration example of a current monitoring circuit in the bootstrap circuit shown in FIG. 1. It is a block diagram which shows the 2nd basic structural example of the bootstrap circuit in embodiment of this invention. FIG. 4 is a circuit diagram showing a specific circuit configuration example of a voltage monitoring circuit in the bootstrap circuit shown in FIG. 3. It is a block diagram which shows the 1st structural example of a conventional circuit. It is a block diagram which shows the 2nd structural example of a conventional circuit. It is a circuit diagram which shows the example of a specific circuit structure of the level shift circuit in a conventional circuit.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... 1st MOS transistor 2 ... 2nd MOS transistor 3 ... 3rd MOS transistor 4 ... Control circuit 5 ... Bootstrap capacitor 6 ... Level shifter circuit 7 ... Current monitoring circuit 7A ... Voltage monitoring circuit

Claims (2)

A first switch element and a bootstrap capacitor are connected in series between the first power source and the output terminal, while a second switch element is connected between the output terminal and the first terminal between the output terminal and the ground terminal. A third switch element is connected in series with the two power supplies, and the boot switch capacitor is booted to the first switch element side terminal by controlling the operation of the first to third switch elements. In a bootstrap circuit configured to obtain a strap voltage,
A current monitoring circuit that monitors the current flowing through the first switch element and controls ON / OFF of the first switch element according to the monitoring result is provided . 1 to 4 MOS transistors and a comparator, and the first and second MOS transistors for the monitoring circuit are connected to each other and the drain of the second MOS transistor for the monitoring circuit. On the other hand, the sources of the first and second MOS transistors for the monitoring circuit are both connected to the source of the first MOS transistor as the first switch element and one end of the bootstrap capacitor, In the third and fourth MOS transistors, the gate and the drain of the fourth MOS transistor for monitoring circuit are connected to each other. The source of the third MOS transistor for the monitoring circuit is the drain of the first MOS transistor for the monitoring circuit, and the source of the fourth MOS transistor for the monitoring circuit is the second transistor for the monitoring circuit And the source of the third MOS transistor for the monitoring circuit is connected to the inverting input terminal of the comparator together with the drain of the first MOS transistor for the monitoring circuit. The drain of the third MOS transistor is connected to the first power supply, a constant current source is connected between the drain of the fourth MOS transistor for monitoring circuit and the output terminal, and the non-inversion of the comparator The input terminal is connected to the negative side of the reference voltage source, and the positive side of the reference voltage source is a first MOS transistor as the first switch element. And the output terminal of the comparator is connected to the gate of a first MOS transistor as the first switch element, and the bootstrap voltage is the power supply voltage of the first power supply. When the voltage exceeds the voltage at the non-inverting input terminal of the comparator exceeding the voltage at the inverting input terminal of the comparator, a signal corresponding to the logical value High is output by the comparator. When the first MOS transistor as the switch element is turned off while the bootstrap voltage is lower than the power supply voltage of the first power supply, the voltage at the inverting input terminal of the comparator is A signal corresponding to the logical value Low is output by the comparator beyond the voltage at the non-inverting input terminal, and the first MOS transistor as the first switch element A bootstrap circuit configured to be turned on . A first switch element and a bootstrap capacitor are connected in series between the first power source and the output terminal, while a second switch element is connected between the output terminal and the first terminal between the output terminal and the ground terminal. A third switch element is connected in series with the two power supplies, and the boot switch capacitor is booted to the first switch element side terminal by controlling the operation of the first to third switch elements. In a bootstrap circuit configured to obtain a strap voltage,
A voltage monitoring circuit that monitors the voltage between the terminals of the first switch element and controls ON / OFF of the first switch element according to the monitoring result is provided, and the voltage monitoring circuit includes a Zener diode The Zener diode has an anode connected to the inverting input terminal of the comparator and a drain connected to the drain of the first MOS transistor as the first switch element. Meanwhile, the cathode of the Zener diode is connected to the source of the first MOS transistor as the first switch element connected to the bootstrap capacitor, and the non-reverse input terminal of the comparator is connected to a reference voltage Connected to the negative side of the source, the positive side of the reference voltage source is the source of the first MOS transistor as the first switch element. And the output terminal of the comparator is connected to the gate of the first MOS transistor as the first switch element, and the source / drain of the first MOS transistor as the first switch element When the voltage between them becomes equal to or higher than the reference voltage of the reference voltage source, the comparator outputs a voltage corresponding to the logical value High, and the first MOS transistor as the first switch element is in the OFF state. On the other hand, when the voltage between the source and the drain of the first MOS transistor as the first switch element falls below the reference voltage of the reference voltage source, the comparator corresponds to the logical value Low. voltage is output, the blanking of the first MOS transistor as a first switch element is characterized by comprising is configured to be turned ON Bootstrap circuit.

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