JP5239543B2 - Method for fabricating a semiconductor optical device - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor optical device.

  Conventionally, as shown in Patent Document 1, for example, a semiconductor laser having a shape in which an active layer and its peripheral layer are etched in a narrow mesa stripe shape with a width of about 1 to 2 μm and both side surfaces thereof are embedded with a current blocking layer made of a semiconductor layer. It has been known.

FIG. 6 shows an example of a conventional method for manufacturing a semiconductor laser. As shown in FIG. 6A, first, a semiconductor stack 105 including an active layer 102, a cladding layer 103, a contact layer 104, and the like is formed on a semiconductor substrate 101. Further, a mask pattern 106 made of, for example, SiN is formed on the semiconductor stacked layer 105. Next, as shown in FIG. 6B, dry etching is performed using the mask pattern 106 to form a semiconductor mesa 107. Next, although not shown, additional etching is performed with a gas containing chlorine in order to remove the damage of the dry etching. Then, after embedding the current blocking layer, electrodes are formed to complete the semiconductor laser.
JP-A-10-335756

  The conventional semiconductor laser fabrication method as described above has the following problems. That is, there is a problem that the width of the active layer included in the semiconductor mesa changes after dry etching performed to form the semiconductor mesa. This is because the dry etching is basically performed perpendicularly to the semiconductor lamination surface, but the dry etching actually proceeds in the lateral direction, and as a result, the active layer constituting the semiconductor mesa This is because a part of the surface is cut away. Further, although additional etching for removing damage is performed, there is a problem that it is difficult to determine whether or not the damage has actually been removed. This is due to the fact that the thickness of the damaged layer cannot be monitored in-situ.

  Therefore, the present invention has been made in view of the above, and an object thereof is to provide a method for manufacturing a semiconductor optical device capable of suppressing damage to the active layer during the manufacturing process of the semiconductor optical device.

  In order to solve the above-described problems, a method of the present invention is a method for manufacturing a semiconductor optical device, and includes a first step of forming a silicon oxide film having a predetermined film stress and a predetermined thickness on a substrate. After the first step, a stripe-shaped groove is formed in the silicon oxide film by etching the silicon oxide film using a resist formed on the silicon oxide film until the surface of the substrate is exposed. And a third step of growing a semiconductor stack including a first III-V compound semiconductor layer for an active layer in the trench after the second step.

  According to such a method of the present invention, it is possible to prevent the active layer from being damaged during the manufacturing process of the semiconductor optical device by providing all the procedures of the first to third steps in order. This is because the dry etching process (second process) that causes damage to the active layer is performed before the third process in which the active layer grows. Further, since the first step of forming the silicon oxide film is performed before the third step of growing the active layer, the silicon oxide film is formed by forming the silicon oxide film after growing the active layer. It is possible to prevent the active layer from being damaged during the film process. As described above, a highly reliable semiconductor optical device can be manufactured.

  Further, in the method of the present invention, in the first step, the silicon oxide film is formed so that a film stress in a temperature range of 500 degrees Celsius or more and 700 degrees Celsius or less is −100 MPa or more and +100 MPa or less, In the third step, the semiconductor stack is preferably grown in the temperature range.

  In the method of the present invention, in the first step, the silicon oxide film may be formed so that a film stress is -100 MPa or more and 0 MPa or less in a temperature range of 500 degrees Celsius or more and 700 degrees Celsius or less. Further preferred.

  As described above, the silicon oxide film is formed so that the film stress in the temperature range of 500 degrees Celsius or more and 700 degrees Celsius or less is −100 MPa or more and +100 MPa or less, more preferably −100 MPa or more and 0 MPa or less. When formed, the silicon oxide film becomes low stress when the semiconductor stack including the first III-V compound semiconductor layer for the active layer is grown in the temperature range. For this reason, it can be suppressed that, for example, the substrate or the like is cracked due to the high stress of the silicon oxide film when the semiconductor stack is grown. Further, since the semiconductor stack is grown in the groove formed in the low-stress silicon oxide film as described above, the semiconductor stack can be grown in the shape of the groove without causing deformation due to temperature. Can do. Furthermore, cracks and peeling in the silicon oxide film are reduced.

  In the method of the present invention, in the first step, the predetermined thickness is preferably equal to or greater than the thickness of the semiconductor stack.

  In this manner, by forming the silicon oxide film with a thickness equal to or greater than the thickness of the semiconductor stack, the semiconductor stack can be easily grown using a deep groove corresponding to the thick thickness in the third step. In addition, when the manufactured semiconductor optical device has a thick silicon oxide film, the capacity of the semiconductor optical device is reduced, and as a result, a semiconductor optical device suitable for high-speed operation can be manufactured. Furthermore, in the case of a semiconductor optical device in which a thick silicon oxide film is used as a protective film, the leakage current flowing along the active layer side can be suppressed due to the presence of the thick silicon oxide film.

  In the method of the present invention, it is preferable that the silicon oxide film is etched substantially perpendicular to the surface of the substrate in the second step.

  Thus, since the silicon oxide film is etched almost vertically, the wall surface of the groove formed by the etching is formed almost vertically. As a result, the semiconductor stack grown in the trench can be grown almost vertically.

  In the method of the present invention, the silicon oxide film is formed using an inductively coupled plasma CVD apparatus, and the film stress of the silicon oxide film controls the bias power of the inductively coupled plasma CVD apparatus. It is preferable to adjust by.

  According to this method, the film stress of the silicon oxide film can be appropriately adjusted depending on the situation by controlling the bias power of the inductively coupled plasma CVD apparatus.

  In the method of the present invention, it is preferable that the silicon oxide film has a positive temperature coefficient between room temperature and a temperature within the temperature range.

  In this case, when the semiconductor stack is grown, the film stress of the silicon oxide film decreases as the temperature increases.

  In the method of the present invention, in the third step, as the semiconductor stack, a second III-V compound semiconductor layer for a first conductivity type cladding layer and the first III-V compound for the active layer are used. A semiconductor layer, a third III-V compound semiconductor layer for a second conductivity type cladding layer, and a fourth III-V compound semiconductor layer for a contact layer are grown in order, and the method includes the step of the third step. It is preferable to further include a fourth step of forming an electrode on the fourth III-V compound semiconductor layer later.

  The method of the present invention is suitable for producing a semiconductor optical device having a mesa structure. In addition, since the window opening process which is difficult in the method of the present invention is unnecessary, there is an advantage that the cost for manufacturing the semiconductor optical device can be reduced.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the semiconductor optical element which can suppress giving a damage to an active layer during the manufacturing process of a semiconductor optical element can be provided.

  The knowledge of the present invention can be easily understood by considering the following detailed description with reference to the accompanying drawings shown as examples. Subsequently, an embodiment relating to a method for producing a semiconductor optical device of the present invention will be described with reference to the accompanying drawings. Where possible, the same parts are denoted by the same reference numerals.

  In this embodiment, a semiconductor light emitting device such as a semiconductor laser is manufactured as an example of a semiconductor optical device. Hereinafter, a method for manufacturing the semiconductor laser 1 (first step to fourth step) will be described in detail with reference to FIGS.

(First step)
FIG. 1 is a drawing showing a manufacturing process of the semiconductor laser 1. First, the substrate 11 is prepared. The substrate 11 is a semiconductor substrate exhibiting conductivity, for example, a first conductivity type III-V compound semiconductor substrate. In this embodiment, for example, an n-type InP semiconductor substrate is used as the substrate 11. The substrate 11 is placed in the vapor phase growth apparatus 50a.

  Next, as shown in FIG. 1, the source gas G <b> 1 is supplied to the vapor phase growth apparatus 50 a to grow a silicon oxide film 13 having a thickness of about 2.0 to 4.0 μm on the substrate 11. The thickness of the silicon oxide film 13 is preferably equal to or greater than the thickness from the upper surface 11a of the substrate 11 of the semiconductor stack 19 (described later). Further, the thickness of the silicon oxide film 13 is preferably 4.0 μm or less, for example, in order to smoothly control the film stress in an inductively coupled plasma CVD apparatus described later.

  As a vapor phase growth apparatus for growing the silicon oxide film 13, an inductively coupled plasma (ICP) CVD apparatus 50a capable of forming the low stress silicon oxide film 13 at a relatively low temperature and at a higher speed is used. it can. In the preferred embodiment, tetraethoxysilane and oxygen are used. In the inductively coupled plasma CVD apparatus 50a, the source gas G1 is brought into a plasma state and reacted by IPC discharge. For this reason, when the substrate material is InP, for example, the film can be formed at 400 ° C. or lower. By applying a bias during film formation, the film quality can be controlled. Since the film quality is dense and the deposit is low stress, a film having a thickness of about 10 μm can be grown at a high film formation rate of, for example, 300 nm / min or more. Even if a thick film is deposited at a high speed, the film does not easily crack. In the inductively coupled plasma CVD apparatus, a film is formed using a raw material gas containing an organosilane compound, so that even if a silicon oxide thick film is produced, problems caused by film stress are unlikely to occur.

The source gas G1 contains a silicon organic compound and oxygen. For example, an organosilane compound can be used as the silicon organic compound. Specifically, for example, tetraethoxysilane (TEOS: Si (OC ₂ H ₅ ) ₄ ), TEFS: Si (OC ₂ H ₅ ) ₃ F, HSi (OCH ₃ ) _3, or the like can be used.

An example of conditions for forming the silicon oxide film 13 is as follows, for example.
Deposition gas G1: Tetraethoxysilane and oxygen TEOS flow rate: 10 sccm
O ₂ flow rate: 100 sccm
Flow ratio: TEOS / O ₂ = 1/10
Dopant: None (However, in the case of quartz waveguide, there is a dopant)
High frequency power supply P _IPC for plasma generation: 1000 W
Bias power P _BIAS : 0 to 300W
Deposition pressure: 5 Pa or less Substrate temperature: 400 degrees C or less Deposition rate: 300 nm / min or more Thickness: 3 μm

FIG. 2 is a drawing showing the relationship between the film stress (vertical axis) and temperature (horizontal axis) of a silicon oxide film grown using an inductively coupled plasma CVD apparatus. Positive film stress is “tensile film stress” and negative film stress is “compressed film stress”. A characteristic line B ₅₀ shows the temperature characteristic of the film stress of the silicon oxide film grown by applying the bias power P _BIAS of 50 watts. Characteristic line B ₁₅₀ shows the temperature characteristic of the film stress of the silicon oxide film grown by applying the bias power P _BIAS of 150 watts. The silicon oxide film indicated by the characteristic line B ₅₀ and the characteristic line B ₁₅₀ contains a compressive film stress at room temperature. The silicon oxide film indicated by the characteristic line B ₅₀ and the characteristic line B ₁₅₀ has a positive temperature coefficient, and the absolute value of the film stress decreases as the temperature increases. The range of the temperature coefficient is, for example, +0.1 or more and +0.3 or less. Then, at a certain temperature, the compression film stress changes to the tensile film stress. A silicon oxide film deposited with a small bias power includes a compressive film stress having a small absolute value, and a silicon oxide film deposited with a large bias power includes a compressive film stress having a large absolute value. The film stress of the silicon oxide film can be measured by forming the silicon oxide film on the semiconductor substrate and then measuring the warpage of the semiconductor substrate.

  A characteristic line C indicates a temperature characteristic of film stress of a silicon nitride film (film thickness: about 500 nm) grown by a plasma CVD apparatus different from the inductively coupled plasma CVD apparatus 50a. The silicon oxide film indicated by the characteristic line C contains tensile film stress at room temperature and has a small negative temperature coefficient. Thus, in a silicon nitride film grown by a plasma CVD apparatus or the like different from the inductively coupled plasma CVD apparatus, a tensile film stress is applied to the film from the time of film formation at a high temperature to the temperature decrease to room temperature, and a small negative Since it has a temperature coefficient, it has the property that this tensile film stress gradually increases until the temperature drops to room temperature. When such a silicon oxide film is used, there is a problem that cracks are generated inside the film and break. In particular, in the present embodiment, since the silicon oxide film needs to be formed with a thickness of about 3 μm, the influence of tensile stress included in the silicon oxide film is remarkable. This is because the film stress increases as the film thickness increases. Furthermore, after the formation of the silicon oxide film, problems such as cracking of the substrate occur due to the high stress of the silicon oxide film when the semiconductor stack is grown.

In the present embodiment, when the silicon oxide film 13 is grown on the substrate 11 using the inductively coupled plasma CVD apparatus 50a, the film stress and the film stress can be controlled by controlling the bias power P _BIAS of the inductively coupled plasma CVD apparatus 50a. The temperature coefficient can be adjusted (see FIG. 1).

In one embodiment, as shown by the characteristic line B ₅₀ in FIG. 2, the film stress is preferably a low stress of −100 MPa or more and +100 MPa or less in a temperature range of 500 ° C. or more and 700 ° C. or less. . The film stress in this range can be obtained, for example, when the InP substrate is used as the substrate 11 and the bias power P _BIAS when forming the silicon oxide film 13 is set to 50 W, for example.

More preferably, the film stress of the silicon oxide film 13 is a low compressive film stress of -100 MPa or more and 0 MPa or less in a temperature range of 500 degrees Celsius or more and 700 degrees Celsius or less. The film stress in this range can be obtained by setting the bias power P _BIAS at the time of forming the silicon oxide film 13 to 150 W, for example, when an InP substrate is used as the substrate 11. The silicon oxide film 13 of the present embodiment can keep the film distortion small during film formation in a high temperature state and includes compressive stress even when the temperature is lowered to room temperature. By using a silicon oxide film having such characteristics, cracks and peeling are further reduced. Furthermore, even when a high temperature process such as a growth process after film formation is performed, it is possible to prevent cracks and peeling.

(Second step)
Next, as shown in FIG. 3A, a resist 15 is patterned on the silicon oxide film 13 by, for example, photolithography. In the resist 15, the width A1 is, for example, 1 to 2 μm.

Next, as shown in FIG. 3B, dry etching such as reactive ion etching is performed using the resist 15 to etch the silicon oxide film 13. Dry etching is performed substantially perpendicularly to the surface 11a until the surface 11a of the substrate 11 is exposed. An example of dry etching conditions at this time is as follows, for example.
Gas: CF ₄
High frequency power supply P _IPC for plasma generation: 300W
Deposition pressure: 10Pa

  As a result of such dry etching, as shown in FIG. 3B, the dry-etched silicon oxide film 13a forms a stripe-like groove 17 having a wall surface 17a extending substantially vertically from the surface 11a of the substrate 11. To do. The width A2 of the groove 17 is substantially the same as the width A1 of the resist 15 and is, for example, 1 to 2 μm.

Next, as shown in FIG. 3C, the resist 15 is removed. The resist removal can be performed by, for example, O ₂ ashing or using an organic solvent.

(Third step)
Next, as shown in FIG. 4A, a semiconductor stack 19 is selectively grown in the groove 17 formed in the third step. The semiconductor stack 19 includes a plurality of III-V compound semiconductor layers, and these III-V compound semiconductor layers are grown in order. The semiconductor stack 19 includes a first conductivity type cladding layer 21 (second III-V compound semiconductor layer), an active layer 23 (first III-V compound semiconductor layer), and a second conductivity type cladding layer 25 (third III-V compound). Semiconductor layer) and contact layer 27 (fourth III-V compound semiconductor layer). These semiconductor layers 21, 23, 25, 27 constituting the semiconductor stack 19 can be grown by using, for example, a metal organic chemical vapor deposition method.

In the present embodiment, as shown in FIG. 4A, the semiconductor stack 19 is grown in a temperature range of, for example, 500 degrees Celsius or more and 700 degrees Celsius or less using the metal organic vapor phase growth furnace 50b. . Further, for example, TMI, TMG, PH ₃ , AsH ₃ or the like is used as the material gas, and SiH ₄ , DEZn or the like is used as the dopant. Further, since the etching is performed until the surface 11a of the substrate 11 is exposed at the time of the dry etching in the second step, the dry etching is performed on a part 11b of the surface 11a of the substrate 11 shown in FIG. May have been damaged by Therefore, in the initial stage of growing the first conductivity type cladding layer 21, it is preferable to perform the buried growth at a low rate of about 0.25 μm / hr, for example. Otherwise, for example, the buried growth may be performed at a high rate of about 2 μm / hr. However, when the active layer 23 is grown, it is preferable to perform the burying growth at an appropriate growth rate such that controllability can be obtained. Further, although not shown, a planarization process may be performed before and after each semiconductor layer is grown as necessary. The thickness of the semiconductor stack 19 grown as described above is, for example, 3.7 μm or less.

An example of the semiconductor stack 19 for the semiconductor laser 1 is as follows, for example.
First conductivity type cladding layer 21: n-type InP semiconductor, 1.0 μm
Active layer 23: GaInAsP multiple quantum well structure, 0.2 μm
Second conductivity type cladding layer 19: p-type InP semiconductor, 2.0 μm
Second conductivity type contact layer 21: p-type GaInAs semiconductor, 0.5 μm

  The active layer 23 is produced for light emission in the 1.55 μm band, for example. The active layer 23 can have various structures such as a bulk, a single quantum well structure, or a multiple quantum well structure. Although not shown, the semiconductor laser 1 can have an SCH structure in which guide layers are arranged above and below a well layer of a quantum well structure. If necessary, the surface layer region of the n-type InP substrate can be used as the n-type cladding layer instead of the n-type cladding layer.

(4th process)
Next, as shown in FIG. 4B, a p-type upper electrode 29 and an n-type back electrode 31 are formed. Here, the step of opening a current injection window, which is conventionally performed before forming the p-type upper electrode 29, is unnecessary in this embodiment. This is because the trench 17 has already been formed by dry etching the silicon oxide film 13. Thus, the semiconductor laser 1 is completed.

  Next, the effects brought about by the method for manufacturing a semiconductor optical device according to this embodiment will be described. According to this embodiment, it is possible to prevent the active layer 23 from being damaged during the manufacturing process of the semiconductor optical device by sequentially providing all the procedures of the first step to the fourth step. This is because the etching process (second process) that causes damage to the active layer 23 is performed before the third process in which the active layer 23 grows. In addition, since the first step of forming the silicon oxide film 13 is performed before the third step of growing the active layer 23, the silicon oxide film is formed by growing the active layer and then forming the silicon oxide film. It is possible to prevent the active layer from being damaged during the film formation process. As described above, a highly reliable semiconductor optical device can be manufactured.

  Further, the silicon oxide film 13 is formed so that the film stress in the temperature range of 500 degrees Celsius or more and 700 degrees Celsius or less is −100 MPa or more and +100 MPa or less, more preferably −100 MPa or more and 0 MPa or less. In this case, when the semiconductor multilayer 19 including the active layer 23 is grown in the temperature range, the silicon oxide film 13 becomes low stress. For this reason, when the semiconductor lamination 19 is grown, for example, the substrate 11 can be prevented from being cracked due to the high stress of the silicon oxide film 13. Further, since the semiconductor multilayer 19 is grown in the groove 17 formed in the low-stress silicon oxide film 13 as described above, the semiconductor multilayer 19 has the shape of the groove 17 without causing deformation due to temperature. It can grow as it is. Furthermore, since the silicon oxide film 21 contains compressive stress at room temperature, cracks and peeling to the silicon oxide film are reduced. Furthermore, even when a high temperature process such as a growth process after film formation is performed, it is possible to effectively prevent cracks and peeling. In addition, since the magnitude of the compressive strain of the silicon oxide film included at room temperature can be adjusted as appropriate in consideration of the influence on the semiconductor layer 19 including the active layer 23, the reliability of the element is not affected. It is clear that there is no.

  In addition, by forming the silicon oxide film 13 with a thickness equal to or greater than the thickness of the semiconductor stack 19, the semiconductor stack 19 can be easily grown using the deep grooves 17 corresponding to the thick thickness in the third step. Further, the manufactured semiconductor optical device having the thick silicon oxide film 13 leads to a reduction in the capacity of the semiconductor optical device, and as a result, a semiconductor optical device suitable for high-speed operation can be manufactured. Furthermore, in the case of a semiconductor optical device in which the thick silicon oxide film 13 is used as a protective film, the leakage current flowing beside the active layer 23 can be suppressed due to the presence of the thick silicon oxide film 13.

  Further, since the silicon oxide film 13 is etched almost vertically, the wall surface of the groove 17 formed by etching is formed almost vertically. As a result, the semiconductor stack 19 grown in the trench 17 can be grown substantially vertically.

  The silicon oxide film 13 is preferably formed using an inductively coupled plasma CVD apparatus. In this case, the film stress of the silicon oxide film 13 is controlled by controlling the bias power of the inductively coupled plasma CVD apparatus. Can be adjusted appropriately according to the situation.

  The silicon oxide film 13 preferably has a positive temperature coefficient between room temperature and a temperature within the growth temperature range of the semiconductor stack 19. In this case, when the semiconductor stack 19 is grown, The film stress of the silicon oxide film 13 decreases with the increase.

  In addition, the method for manufacturing a semiconductor optical device according to the present embodiment has an advantage that the cost for manufacturing the semiconductor optical device can be reduced because a difficult window opening step is unnecessary.

  As mentioned above, although preferred embodiment of this invention was described, it cannot be overemphasized that this invention is not limited to the said embodiment. For example, when the semiconductor laser 1 is a semiconductor laser having, for example, a distributed feedback structure (DFB) or a distributed reflection structure (DBR), a step of forming a diffraction grating 60 in advance on the substrate 11 as shown in FIG. May be further provided.

  While the principles of the invention have been illustrated and described in the preferred embodiments, it will be appreciated by those skilled in the art that the invention can be modified in arrangement and detail without departing from such principles. The present invention is not limited to the specific configuration disclosed in the present embodiment. Further, although the present embodiment has been exemplarily described for a semiconductor laser, it can also be applied to a semiconductor optical modulator, an integrated element of the semiconductor optical modulator and the semiconductor laser, and the like. We therefore claim all modifications and changes that come within the scope and spirit of the following claims.

It is drawing which shows the silicon oxide film formation process of the 1st process. It is drawing which shows the relationship between the stress of a silicon oxide film grown using the inductively coupled plasma CVD apparatus, and temperature. It is drawing which shows the etching process of a 2nd process. FIG. 4A is a drawing showing an epitaxial growth step of the third step. FIG. 4B is a drawing showing an electrode forming step of the fourth step. It is a figure which shows an example which formed the semiconductor laser which has a distributed feedback structure and a distributed reflection structure by the method of this embodiment. It is a figure which shows an example of the manufacturing method of the conventional semiconductor optical element.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Semiconductor laser, 11 ... Board | substrate, 13 ... Silicon oxide film, 15 ... Resist, 17 ... Groove, 19 ... Semiconductor laminated layer, 21 ... Clad layer of 1st conductivity type, 23 ... Active layer, 25 ... 2nd conductivity type Cladding layer, 27 ... contact layer, 29, 31 ... electrode, 50a ... inductively coupled plasma (ICP) CVD apparatus, 50b ... metal organic chemical vapor deposition furnace, 60 ... diffraction grating.

Claims (5)

A method for producing a semiconductor optical device, comprising:
A first step of forming a silicon oxide film having a predetermined film stress and a predetermined thickness on the substrate;
After the first step, a stripe-shaped groove is formed in the silicon oxide film by etching the silicon oxide film using a resist formed on the silicon oxide film until the surface of the substrate is exposed. A second step;
A third step of growing a semiconductor stack including a first III-V compound semiconductor layer for an active layer in the trench after the second step;
With
In the first step, the silicon oxide film is formed so that a film stress in a temperature range of 500 degrees Celsius or more and 700 degrees Celsius or less is −100 MPa or more and +100 MPa or less,
In the third step, the semiconductor stack is grown in the temperature range,
The silicon oxide film is formed using an inductively coupled plasma CVD apparatus,
The film stress of the silicon oxide film is adjusted by controlling the bias power of the inductively coupled plasma CVD apparatus,
The side surface of the active layer grown in the third step is in contact with the side surface of the groove of the silicon oxide film ,
The silicon oxide film has a positive temperature coefficient between room temperature and a temperature within the temperature range,
The method according to claim 1, wherein the film stress of the silicon oxide film formed in the first step has a compressive stress at room temperature .   2. The silicon oxide film according to claim 1, wherein in the first step, the silicon oxide film is formed so that a film stress in a temperature range of 500 degrees Celsius or more and 700 degrees Celsius or less is −100 MPa or more and 0 MPa or less. the method of.   3. The method according to claim 1, wherein in the first step, the predetermined thickness is equal to or greater than a thickness of the semiconductor stack.   The method according to claim 1, wherein, in the second step, the silicon oxide film is etched substantially perpendicularly to the surface of the substrate. In the third step, as the semiconductor stack, the second III-V compound semiconductor layer for the first conductivity type cladding layer, the first III-V compound semiconductor layer for the active layer, and the second conductivity type A third III-V compound semiconductor layer for the cladding layer and a fourth III-V compound semiconductor layer for the contact layer are sequentially grown;
The method is
Wherein after the third step, the method according to any one of claim 1 to 4, characterized by further comprising a fourth step of forming an electrode on the first group III-V compound semiconductor layer.

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