JP5228609B2 - Power supply - Google Patents

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JP5228609B2
JP5228609B2 JP2008121958A JP2008121958A JP5228609B2 JP 5228609 B2 JP5228609 B2 JP 5228609B2 JP 2008121958 A JP2008121958 A JP 2008121958A JP 2008121958 A JP2008121958 A JP 2008121958A JP 5228609 B2 JP5228609 B2 JP 5228609B2
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power supply
predetermined time
short
voltage
pulse signal
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JP2009273241A (en
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章弘 京極
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Panasonic Corp
Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Description

本発明は交流電源からの交流電圧を直流電圧に変換して負荷に供給する電源装置に関
する。
The present invention relates to a power supply apparatus that converts an AC voltage from an AC power source into a DC voltage and supplies the DC voltage to a load.

従来、交流電源からの交流電圧を直流電圧に変換して負荷へ供給する電源装置として、交流電源のゼロクロス点を検出し、リアクタを介して交流電源を電源半周期に1回もしくは複数回短絡することにより、力率を改善しつつ、高い直流出力電圧が得られるものが提案されている(例えば、特許文献1および特許文献2参照)。   Conventionally, as a power supply device that converts an AC voltage from an AC power supply into a DC voltage and supplies it to a load, a zero cross point of the AC power supply is detected, and the AC power supply is short-circuited once or a plurality of times in a half cycle of the power supply via a reactor. Thus, it has been proposed to obtain a high DC output voltage while improving the power factor (see, for example, Patent Document 1 and Patent Document 2).

図8は、特許文献1に記載された従来の電源装置の構成を示すものである。   FIG. 8 shows a configuration of a conventional power supply device described in Patent Document 1. In FIG.

図8に示すように、特許文献1に記載された電源装置は、交流電源1と、交流電源1からの交流電圧を整流する第1のダイオードブリッジ31と、平滑用コンデンサ32,33,34とで構成される倍電圧整流回路を備えており、さらに、交流電源1の両端には、リアクタ6を介して第2のダイオードブリッジ35およびスイッチング素子36が接続されている。   As shown in FIG. 8, the power supply device described in Patent Document 1 includes an AC power supply 1, a first diode bridge 31 that rectifies an AC voltage from the AC power supply 1, smoothing capacitors 32, 33, and 34. The second diode bridge 35 and the switching element 36 are connected to both ends of the AC power supply 1 via the reactor 6.

また力率改善部37とゼロクロス検出部38とインバータ制御部23とが、制御手段39内に設けられる。ゼロクロス検出部38は交流電源1の両端に接続され、交流電源1のゼロクロス点を検出する。力率改善部37は、交流電源1の半周期毎に、検出されたゼロクロス点から所定の時間だけスイッチング素子36を短絡し、その後開放する。   Further, a power factor improving unit 37, a zero cross detecting unit 38, and an inverter control unit 23 are provided in the control means 39. The zero cross detection unit 38 is connected to both ends of the AC power source 1 and detects a zero cross point of the AC power source 1. The power factor improving unit 37 short-circuits the switching element 36 for a predetermined time from the detected zero cross point every half cycle of the AC power supply 1 and then opens it.

これによって、交流電源1からの入力電流の導通幅を拡大し、力率を改善するとともに、リアクタ6に蓄えられたエネルギーを平滑コンデンサ32,33,34へ供給することで、通常の倍電圧整流回路よりも高い直流出力電圧を得ることができる。   As a result, the conduction width of the input current from the AC power supply 1 is expanded, the power factor is improved, and the energy stored in the reactor 6 is supplied to the smoothing capacitors 32, 33, 34, so that normal voltage doubler rectification is achieved. A DC output voltage higher than that of the circuit can be obtained.

さらに、特許文献1に記載の従来の電源装置は、負荷として、インバータ回路21およびインバータ回路21により駆動される電動機22を備えており、インバータ回路21を制御するインバータ制御部23におけるパルス幅変調制御信号のデューティ比に基づいてスイッチング素子36の短絡開始時刻および短絡期間を決定することで、負荷状態に応じて力率を改善することができる。   Further, the conventional power supply device described in Patent Document 1 includes an inverter circuit 21 and an electric motor 22 driven by the inverter circuit 21 as loads, and pulse width modulation control in an inverter control unit 23 that controls the inverter circuit 21. By determining the short circuit start time and the short circuit period of the switching element 36 based on the duty ratio of the signal, the power factor can be improved according to the load state.

図9は、特許文献2に記載された従来の電源装置の構成を示すものである。   FIG. 9 shows a configuration of a conventional power supply device described in Patent Document 2. In FIG.

図9に示すように、本電源装置は、交流電源1の半周期毎に、スイッチング手段40を複数回短絡させることで、力率を改善するとともに高調波を抑制することができる。
特開平10−201248号公報 特許第3485047号公報
As shown in FIG. 9, this power supply device can improve a power factor and can suppress a harmonic by short-circuiting the switching means 40 several times for every half cycle of AC power supply 1. FIG.
Japanese Patent Laid-Open No. 10-201248 Japanese Patent No. 3485047

しかしながら、従来の電源装置は、交流電源のゼロクロス点からの経過時間(ディレイ時間)によって決定される交流電源の短絡開始タイミングを、例えばインバータ回路のPWM信号のデューティ比や負荷モータのトルクなどの負荷状態に応じて予め設定された関数によって算出するが、その際、交流電源の周波数変動について考慮がなされていない。   However, in the conventional power supply device, the AC power supply short circuit start timing determined by the elapsed time (delay time) from the zero crossing point of the AC power supply is set to a load such as the duty ratio of the PWM signal of the inverter circuit or the torque of the load motor. Although the calculation is performed by a function set in advance according to the state, the frequency fluctuation of the AC power supply is not taken into consideration at that time.

したがって、系統接続されている商用電源に比べて電源周波数の変動が起こりやすい自家用発電機などの交流電源に接続された場合、従来の電源装置は、電源周波数の変動時に、交流電源を短絡する電源位相がずれることにより、入力電流の歪みが大きくなりやすい。   Therefore, when connected to an AC power source, such as a private generator, where power supply frequency fluctuations are likely to occur compared to a commercial power supply connected to the grid, a conventional power supply device is a power supply that short-circuits the AC power supply when the power supply frequency changes. Due to the phase shift, distortion of the input current tends to increase.

特に、交流電源の半周期に複数回、リアクタを介して交流電源を短絡・開放する電源装置では、短絡タイミングずれによって、交流電源の波高値が高い電圧位相においてスイッチング素子を短絡・開放することで、高い電流ピークが生じやすく、その結果、力率の低下や電流歪みへの影響も顕著になりやすい。   In particular, in a power supply device that short-circuits / opens an AC power supply through a reactor multiple times in a half cycle of the AC power supply, the switching element is short-circuited / opened at a voltage phase where the peak value of the AC power supply is high due to a short-circuit timing shift. A high current peak is likely to occur, and as a result, the power factor is lowered and the influence on the current distortion is likely to be remarkable.

本発明は、前記従来の課題を解決するもので、電源周波数が変動しても、安定して高力率動作を実現する電源装置を提供することを第1の目的とし、さらに、交流電源の状態が不安定な状態においては、停電回避のため、電源装置の昇圧性能を制限することで交流電源への負担を軽減することを第2の目的とする。   The present invention solves the above-described conventional problems, and a first object of the present invention is to provide a power supply device that stably realizes a high power factor operation even when the power supply frequency fluctuates. In a state where the state is unstable, the second object is to reduce the burden on the AC power supply by limiting the boosting performance of the power supply device in order to avoid a power failure.

前記従来の課題を解決するために、本発明の電源装置は、交流電源からの交流電圧を整流する整流回路と、交流電源に直列に接続されたリアクタと、リアクタを介して交流電源を短絡・開放するスイッチング手段と、交流電源に同期したパルス信号を発生する電圧位相検出手段と、電圧位相検出手段の出力信号に基づいてスイッチング手段を駆動する制御手段とを備え、交流電源の電圧位相に同期して交流電源の半周期間に1回もしくは複数回、リアクタを介してスイッチング手段により交流電源を短絡・開放する電源装置であって、電圧位相検出手段より得られるパルス信号の周期が、予め定められた第1の所定時間から第2の所定時間までの範囲内にある場合にのみ、複数回の短絡・開放動作を行うものである。   In order to solve the above-described conventional problems, the power supply device of the present invention includes a rectifier circuit that rectifies an AC voltage from an AC power supply, a reactor connected in series to the AC power supply, and a short circuit between the AC power supply via the reactor. The switching means to be opened, the voltage phase detection means for generating a pulse signal synchronized with the AC power supply, and the control means for driving the switching means based on the output signal of the voltage phase detection means, are synchronized with the voltage phase of the AC power supply. A power supply device that short-circuits / opens the AC power supply by the switching means via the reactor once or a plurality of times during a half cycle of the AC power supply, and the cycle of the pulse signal obtained from the voltage phase detection means is predetermined. Only when it is within the range from the first predetermined time to the second predetermined time, the short-circuiting / opening operation is performed a plurality of times.

本発明の電源装置によれば、交流電源の電源周波数が所定の範囲内にある場合には、電源半周期間に複数回の短絡動作を行うことで、高い力率改善効果と昇圧能力を実現するとともに、電源周波数が所定の範囲外にある場合には、電源半周期間に1回の短絡動作、もしくは短絡動作の停止によって、短絡タイミングずれによる入力電流歪みの影響を低減もしくは排除することができる。   According to the power supply device of the present invention, when the power supply frequency of the AC power supply is within a predetermined range, a high power factor improvement effect and a boosting capability are realized by performing a short-circuit operation a plurality of times during a power supply half cycle. At the same time, when the power supply frequency is outside the predetermined range, the influence of the input current distortion due to the short-circuit timing deviation can be reduced or eliminated by short-circuiting once or stopping the short-circuiting operation during the half-cycle of the power supply.

第1の発明は、交流電源からの交流電圧を整流する整流回路と、交流電源に直列に接続されたリアクタと、リアクタを介して交流電源を短絡・開放するスイッチング手段と、交流電源に同期したパルス信号を発生する電圧位相検出手段と、電圧位相検出手段の出力信号に基づいてスイッチング手段を駆動する制御手段とを備え、交流電源の電圧位相に同期して交流電源の半周期間に1回もしくは複数回、リアクタを介してスイッチング手段により交流電源を短絡・開放する電源装置であって、制御手段は、電圧位相検出手段より得られるパルス信号の周期が、予め定められた第1の所定時間から第2の所定時間までの範囲内(第1の所定時間<第2の所定時間)にある場合にのみ、複数回の短絡・開放動作を行うものである。   The first invention is a rectifier circuit for rectifying an AC voltage from an AC power supply, a reactor connected in series to the AC power supply, a switching means for short-circuiting / opening the AC power supply through the reactor, and a synchronization with the AC power supply. A voltage phase detecting means for generating a pulse signal, and a control means for driving the switching means based on the output signal of the voltage phase detecting means, or once in a half cycle of the AC power supply in synchronization with the voltage phase of the AC power supply or A power supply device that short-circuits / opens an AC power supply by a switching means via a reactor a plurality of times, wherein the control means has a pulse signal cycle obtained from the voltage phase detection means from a predetermined first predetermined time. Only when it is within the range up to the second predetermined time (first predetermined time <second predetermined time), the short-circuiting / opening operation is performed a plurality of times.

これにより、電源周波数が所定の範囲外にある場合には、電源半周期間の短絡回数を1回以下に制限することによって、短絡タイミングずれによる入力電流歪みの影響を低減することができる。   Thereby, when the power supply frequency is outside the predetermined range, the influence of the input current distortion due to the short-circuit timing shift can be reduced by limiting the number of short circuits between the power supply half cycles to 1 or less.

第2の発明は、第1の発明において、電圧位相検出手段より得られるパルス信号の周期が、前記第1の所定時間以下の値に設定された第3の所定時間よりも短い場合に、スイッ
チング手段を開放状態に制御することで、交流電源の電源周波数が高くなりすぎた場合に、昇圧機能を停止し、最小限の動作(整流動作)のみを継続することができる。
According to a second aspect, in the first aspect, the switching is performed when the period of the pulse signal obtained from the voltage phase detection means is shorter than the third predetermined time set to a value equal to or less than the first predetermined time. By controlling the means to the open state, when the power supply frequency of the AC power supply becomes too high, the boosting function can be stopped and only the minimum operation (rectification operation) can be continued.

第3の発明は、第2の発明において、電圧位相検出手段より得られるパルス信号の周期が、前記第2の所定時間以上の値に設定された第4の所定時間よりも長い場合に、スイッチング手段を開放状態に制御することで、交流電源の電源周波数が低くなりすぎた場合に、第2の発明同様、昇圧機能を停止し、最小限の動作(整流動作)のみを継続することができる。   According to a third aspect, in the second aspect, switching is performed when the period of the pulse signal obtained from the voltage phase detection means is longer than a fourth predetermined time set to a value equal to or greater than the second predetermined time. By controlling the means to the open state, when the power supply frequency of the AC power supply becomes too low, the boosting function can be stopped and only the minimum operation (rectification operation) can be continued as in the second invention. .

以下、本発明の実施の形態について、図面を参照しながら説明する。なお、この実施の形態によって本発明が限定されるものではない。   Hereinafter, embodiments of the present invention will be described with reference to the drawings. Note that the present invention is not limited to the embodiments.

(実施の形態1)
図1は本発明の実施の形態1による電源装置の構成を示すブロック構成図である。
(Embodiment 1)
FIG. 1 is a block configuration diagram showing a configuration of a power supply device according to Embodiment 1 of the present invention.

図1に示すように、本発明の電源装置は、交流電源1の交流電圧を整流する整流回路2を備え、整流回路2の交流入力端の一方と整流回路2の一方の直流入力端との間に接続される第1のコンデンサ3と、整流回路2の同じ交流入力端と整流回路2の他方の直流入力端との間に接続される第2のコンデンサ4とにより、負荷5へ直流電圧を供給する倍電圧整流回路を構成する。   As shown in FIG. 1, the power supply device of the present invention includes a rectifier circuit 2 that rectifies an AC voltage of an AC power supply 1, and includes one of the AC input ends of the rectifier circuit 2 and one DC input end of the rectifier circuit 2. The first capacitor 3 connected in between and the second capacitor 4 connected between the same AC input terminal of the rectifier circuit 2 and the other DC input terminal of the rectifier circuit 2 are connected to the load 5 with a DC voltage. The voltage doubler rectifier circuit for supplying

さらに、交流電源1と整流回路2の交流入力端との間にリアクタ6が接続され、ダイオードブリッジやMOSFET・IGBTなどの半導体素子で構成される双方向性のスイッチング手段7がリアクタ6を介して交流電源1を短絡する位置に接続される。   Furthermore, a reactor 6 is connected between the AC power source 1 and the AC input terminal of the rectifier circuit 2, and a bidirectional switching means 7 composed of a semiconductor element such as a diode bridge or MOSFET / IGBT is provided via the reactor 6. The AC power supply 1 is connected to a position where it is short-circuited.

また、電圧位相検出手段8が、交流電源1の両端に接続され、交流電源1の電圧位相に同期したパルス信号を出力する。   The voltage phase detection means 8 is connected to both ends of the AC power supply 1 and outputs a pulse signal synchronized with the voltage phase of the AC power supply 1.

制御手段9は、マイクロコンピュータ等で構成され、周期検出部9aによって測定された電圧位相検出手段8からの出力パルス信号の周期Tと、記憶部9bに予め記憶されている複数の時間(T1〜T4)とを短絡回数決定部9cにて比較し、電源半周期間にスイッチング手段7を短絡する回数を決定する。   The control means 9 is constituted by a microcomputer or the like, and the period T of the output pulse signal from the voltage phase detection means 8 measured by the period detection unit 9a and a plurality of times (T1 to T1) stored in advance in the storage unit 9b. T4) is compared with the short-circuit number determination unit 9c, and the number of times the switching means 7 is short-circuited during the power supply half cycle is determined.

さらに、制御手段9は、駆動信号生成部9dにおいて、電圧位相検出手段8から出力されるパルス信号をタイミングの基準とし、スイッチング手段7を駆動する駆動信号を生成することによって、電源半周期毎に短絡回数決定部9cにて決定した短絡回数だけ、スイッチング手段7の短絡・開放を繰り返す。   Further, the control means 9 generates a drive signal for driving the switching means 7 by using the pulse signal output from the voltage phase detection means 8 as a timing reference in the drive signal generation section 9d, so that every half cycle of the power supply The switching means 7 is repeatedly short-circuited / opened by the number of short-circuits determined by the short-circuit number determination unit 9c.

図2は、短絡回数決定部9cのフローチャートの一例である。   FIG. 2 is an example of a flowchart of the short circuit number determination unit 9c.

図2に示すように、制御手段9は、電圧位相検出手段8から出力されるパルス信号の周期Tが予め制御手段9内の記憶部9bに記憶されている第1の所定時間T1以上かつ、第2の所定時間T2以下の範囲にある場合には、電源半周期間の短絡回数を5回とすることで、電源装置は、高力率かつ高い昇圧能力が得られる入力電流波形にて動作する。   As shown in FIG. 2, the control means 9 has a period T of the pulse signal output from the voltage phase detection means 8 that is equal to or longer than a first predetermined time T1 stored in the storage unit 9b in the control means 9 in advance. When it is in the range of the second predetermined time T2 or less, the power supply device operates with an input current waveform that provides a high power factor and high boosting capability by setting the number of short circuits between the power supply half cycles to five. .

また、電圧位相検出手段8から出力されるパルス信号の周期Tが、第1の所定時間T1以下の値に設定された第3の所定時間T3よりも短いか、第2の所定時間T2以上の値に設定された第4の所定時間よりも長い場合には、交流電源1の状態が不安定であるとみなして短絡回数を0とし、スイッチング手段7を開放状態に制御する。   Further, the period T of the pulse signal output from the voltage phase detection means 8 is shorter than the third predetermined time T3 set to a value equal to or shorter than the first predetermined time T1, or equal to or longer than the second predetermined time T2. If it is longer than the fourth predetermined time set to the value, the state of the AC power supply 1 is regarded as unstable, the number of short circuits is set to 0, and the switching means 7 is controlled to be in the open state.

周期Tが上記以外の場合には、電源半周期間の短絡回数を1回に限定することで、スイッチングタイミングずれによる入力電流波形の歪みを回避しつつ、必要最小限の昇圧性能を確保する。   When the period T is other than the above, the minimum number of boosting performances can be ensured while avoiding distortion of the input current waveform due to the switching timing deviation by limiting the number of short circuits between the power supply half periods to one.

図3は、本発明における電圧位相検出手段8の具体的な回路の一例を示すものである。   FIG. 3 shows an example of a specific circuit of the voltage phase detection means 8 in the present invention.

図3に示すように、電圧位相検出手段8は、交流入力のフォトカプラ10と抵抗11、12、13とによって構成される。   As shown in FIG. 3, the voltage phase detector 8 includes an AC input photocoupler 10 and resistors 11, 12, and 13.

フォトカプラ10がオンする交流電源1の電圧位相は、フォトカプラ10の1次側に接続される抵抗11と抵抗12とによって調整される。   The voltage phase of the AC power supply 1 at which the photocoupler 10 is turned on is adjusted by a resistor 11 and a resistor 12 connected to the primary side of the photocoupler 10.

またフォトカプラ10の2次側は、出力トランジスタのコレクタが抵抗13によってプルアップされて、マイクロコンピュータである制御手段9の入力ポートに接続される。   On the secondary side of the photocoupler 10, the collector of the output transistor is pulled up by the resistor 13 and connected to the input port of the control means 9 which is a microcomputer.

図4は、電源半周期間の短絡回数が1回の場合における、電圧位相検出手段8の出力パルス信号とスイッチング手段7の駆動信号との関係を表すタイミングチャートである。   FIG. 4 is a timing chart showing the relationship between the output pulse signal of the voltage phase detection means 8 and the drive signal of the switching means 7 when the number of short circuits during the power supply half cycle is one.

制御手段9は、電圧位相検出手段8からのパルス信号の終了に相当するエッジ(図4では立ち上がりエッジ)を検出したタイミングから、予め負荷5の状態に応じて定められた時間Tdに基づいて、時間Td経過後にスイッチング手段7の短絡動作を開始し、その後時間Tw後に開放するよう、スイッチング手段7を制御する。   The control means 9 is based on the time Td determined in advance according to the state of the load 5 from the timing at which the edge corresponding to the end of the pulse signal from the voltage phase detection means 8 (rising edge in FIG. 4) is detected. The switching means 7 is controlled so that the short-circuit operation of the switching means 7 is started after the time Td has elapsed, and then opened after the time Tw.

時間Twは、電流やモータ回転数など、負荷5の状態に応じて予め設定された値を用いてもよいし、電源装置の直流出力電圧が所定の目標電圧に等しくなるようにフィードバック制御により調整してもよい。   The time Tw may be a value set in advance according to the state of the load 5, such as current and motor rotation speed, or adjusted by feedback control so that the DC output voltage of the power supply device becomes equal to a predetermined target voltage. May be.

図5は、電源半周期間の短絡回数が5回の場合における、電圧位相検出手段8の出力パルス信号とスイッチング手段7の駆動信号との関係を表すタイミングチャートである。   FIG. 5 is a timing chart showing the relationship between the output pulse signal of the voltage phase detection means 8 and the drive signal of the switching means 7 when the number of short circuits during the power supply half cycle is five.

制御手段9は、電圧位相検出手段8からのパルス信号の終了に相当するエッジ(図5では立ち上がりエッジ)を検出したタイミングから、予め負荷5の状態に応じて定められた時間Tdn(n=1〜5)に基づいて、それぞれ時間Tdn(n=1〜5)経過後にスイッチング手段7の短絡動作を開始し、その後それぞれ時間Twn(n=1〜5)(図5には記号を図示せず)後に開放するよう、スイッチング手段7を制御する。   The control means 9 detects a time Tdn (n = 1) determined in advance according to the state of the load 5 from the timing at which an edge (rising edge in FIG. 5) corresponding to the end of the pulse signal from the voltage phase detection means 8 is detected. -5), the short-circuiting operation of the switching means 7 is started after the time Tdn (n = 1 to 5) has elapsed, and then the time Twn (n = 1 to 5) (not shown in FIG. 5). ) The switching means 7 is controlled to be opened later.

なお、時間Twn(n=1〜5)は、短絡回数が1回の場合と同様、負荷5の状態に応じて予め設定された値としてもよいし、電源装置の直流出力電圧が所定の目標電圧に等しくなるようにフィードバック制御により調整してもよい。   The time Twn (n = 1 to 5) may be a value set in advance according to the state of the load 5 as in the case where the number of short circuits is one, or the DC output voltage of the power supply device may be a predetermined target. You may adjust by feedback control so that it may become equal to a voltage.

図6(a)〜(d)に、本発明の電源装置における入力電流波形の一例を示す。   6A to 6D show examples of input current waveforms in the power supply device of the present invention.

図6(a)、(b)に示すように、電源周波数が50Hz、55Hzの場合には、電源半周期に5回スイッチング動作することで高力率な電流波形(力率約99%)を得ている。   As shown in FIGS. 6A and 6B, when the power supply frequency is 50 Hz and 55 Hz, a high power factor current waveform (power factor of about 99%) is obtained by performing switching operation five times in the power supply half cycle. It has gained.

図6(c)は、電源周波数がさらに高くなって、電圧位相検出手段8のパルス信号の周期TがT1を下回り、電源半周期に1回スイッチング動作をしているときの入力電流波形である。   FIG. 6C shows an input current waveform when the power supply frequency is further increased, the period T of the pulse signal of the voltage phase detection means 8 is less than T1, and the switching operation is performed once in a half period of the power supply. .

また図6(d)は、電源周波数が低くなって、電圧位相検出手段8のパルス信号の周期TがT2を超えたため、電源半周期に1回のスイッチング動作となっているときの入力電流波形である。   FIG. 6 (d) shows the input current waveform when the power supply frequency is lowered and the period T of the pulse signal of the voltage phase detection means 8 exceeds T2, so that the switching operation is performed once in a half cycle of the power supply. It is.

図6(c)、(d)いずれの場合も、短絡回数を1回に抑えることで、短絡タイミングずれによって電源電圧の波高値が高い電圧位相でのスイッチングが生じるのを回避することで、入力電流を比較的高力率な状態に保っていることがわかる。   In both cases of FIGS. 6C and 6D, by suppressing the number of short circuits to one, it is possible to avoid switching at a voltage phase where the peak value of the power supply voltage is high due to a short circuit timing shift. It can be seen that the current is maintained at a relatively high power factor.

なお、図示はしていないが、本発明の電源装置は、電圧位相検出手段8のパルス信号の周期Tが8.333ms(60Hz時の半周期相当)以下、もしくは12.5ms(40Hz時の半周期相当)以上となった場合には、スイッチング手段7は、開放状態に制御される。   Although not shown, in the power supply device of the present invention, the cycle T of the pulse signal of the voltage phase detection means 8 is 8.333 ms (corresponding to a half cycle at 60 Hz) or less, or 12.5 ms (half at 40 Hz). When it becomes equal to or more than the period, the switching means 7 is controlled to be in an open state.

このとき、入力電流は、よく知られたコンデンサインプット時の波形となり、電源装置の昇圧性能を完全に停止することで、交流電源1への負担を軽減する。   At this time, the input current has a well-known waveform at the time of capacitor input, and the load on the AC power supply 1 is reduced by completely stopping the boosting performance of the power supply device.

なお、本実施例において、電圧位相検出手段8は、図3に示すように、交流電源1の半周期毎に1回、パルス信号が出力されることから、パルス信号の周期Tは、交流電源1の半周期にほぼ等しい値となるが、電圧位相検出手段8として、交流電源1の一周期に1回、パルス信号が出力される回路を採用し、パルス信号の周期Tが電源周期に等しくなる場合についても同様の効果が得られることは言うまでもない。   In this embodiment, the voltage phase detection means 8 outputs a pulse signal once every half cycle of the AC power supply 1 as shown in FIG. The voltage phase detection means 8 employs a circuit that outputs a pulse signal once in one cycle of the AC power supply 1, and the cycle T of the pulse signal is equal to the power cycle. Needless to say, the same effect can be obtained in this case.

以上のように、本実施の形態1は、電圧位相検出手段8の出力パルス信号の周期Tに応じて、電源半周期間の短絡回数を切り替えることにより、交流電源1が比較的安定している場合には、高力率かつ高い昇圧能力を有するとともに、電源周波数が標準周波数から大幅に乖離し、交流電源1が不安定と考えられる場合には、スイッチング手段7の短絡動作を一時的に停止することで、電源への負担を最小限とすることができる。   As described above, in the first embodiment, the AC power source 1 is relatively stable by switching the number of short circuits between the power source half cycles according to the cycle T of the output pulse signal of the voltage phase detector 8. Has a high power factor and high boosting capability, and when the power supply frequency deviates significantly from the standard frequency and the AC power supply 1 is considered unstable, the short-circuit operation of the switching means 7 is temporarily stopped. Thus, the burden on the power supply can be minimized.

なお、本実施の形態1における電源装置の構成においては、図1に示すように倍電圧整流回路として説明を行ったが、図7に示すような全波整流回路であっても同様の効果が得られることは言うまでもない。   In the configuration of the power supply device according to the first embodiment, the voltage doubler rectifier circuit has been described as shown in FIG. 1, but the same effect can be obtained even with a full-wave rectifier circuit as shown in FIG. It goes without saying that it is obtained.

以上のように、本発明にかかる電源装置は、交流電源の電源周波数が変動しても、安定して高力率動作を実現することができるため、国内外の空気調和機やヒートポンプ給湯機、冷蔵庫、洗濯機などの電化製品への用途に適用できる。   As described above, the power supply device according to the present invention can stably realize a high power factor operation even when the power supply frequency of the AC power supply fluctuates, so domestic and foreign air conditioners and heat pump water heaters, Applicable to electric appliances such as refrigerators and washing machines.

本発明の実施の形態1における電源装置のブロック構成図1 is a block configuration diagram of a power supply device according to Embodiment 1 of the present invention. 同短絡回数決定部のフローチャートFlow chart of the short-circuit number determination unit 同電圧位相検出手段の具体的な回路の一例を示す回路図Circuit diagram showing an example of a specific circuit of the voltage phase detection means 同電圧位相検出手段の出力パルス信号とスイッチング手段の駆動信号との関係を表すタイミングチャート(短絡回数が1回の場合)Timing chart showing the relationship between the output pulse signal of the same voltage phase detection means and the drive signal of the switching means (when the number of short circuits is one) 同電圧位相検出手段の出力パルス信号とスイッチング手段の駆動信号との関係を表すタイミングチャート(短絡回数が5回の場合)Timing chart showing the relationship between the output pulse signal of the same voltage phase detection means and the drive signal of the switching means (when the number of short circuits is 5) (a)本発明の実施の形態1における電源装置の50Hzの場合の入力電流波形図(b)同55Hzの場合の入力電流波形図(c)同58.5Hzの場合の入力電流波形図(d)同5Hzの場合の入力電流波形図(A) Input current waveform diagram in the case of 50 Hz of the power supply device in Embodiment 1 of the present invention (b) Input current waveform diagram in the case of 55 Hz (c) Input current waveform diagram in the case of 58.5 Hz ) Input current waveform at 5Hz 同実施の形態1における電源装置の別のブロック構成図Another block configuration diagram of the power supply device according to the first embodiment 従来の電源装置のブロック構成図Block diagram of a conventional power supply 別の従来の電源装置のブロック構成図Block diagram of another conventional power supply device

符号の説明Explanation of symbols

1 交流電源
2 整流回路
5 負荷
6 リアクタ
7 スイッチング手段
8 電圧位相検出手段
9 制御手段
T1 第1の所定時間
T2 第2の所定時間
T3 第3の所定時間
T4 第4の所定時間
DESCRIPTION OF SYMBOLS 1 AC power supply 2 Rectifier circuit 5 Load 6 Reactor 7 Switching means 8 Voltage phase detection means 9 Control means T1 1st predetermined time T2 2nd predetermined time T3 3rd predetermined time T4 4th predetermined time

Claims (1)

交流電源からの交流電圧を整流する整流回路と、交流電源に直列に接続されたリアクタと、リアクタを介して交流電源を短絡・開放するスイッチング手段と、交流電源に同期したパルス信号を発生する電圧位相検出手段と、電圧位相検出手段の出力信号に基づいてスイッチング手段を駆動する制御手段とを備え、交流電源の電圧位相に同期して交流電源の半周期間に1回もしくは複数回、リアクタを介してスイッチング手段により交流電源を短絡・開放する電源装置であって、前記制御手段は、電圧位相検出手段より得られるパルス信号の周期が、予め定められた第1の所定時間から第2の所定時間までの範囲内(第1の所定時間<第2の所定時間)にある場合にのみ、複数回の短絡・開放動作を行い、前記パルス信号の周期が、前記第1の所定時間から第2の所定時間までの範囲内から外れた場合には短絡・開放動作の回数を1回に制限するとともに、前記パルス信号の周期が、前記第1の所定時間以下の値に設定された第3の所定時間よりも短い場合および、前記第2の所定時間以上の値に設定された第4の所定時間よりも長い場合に、スイッチング手段を開放状態に制御することを特徴とする電源装置。
A rectifier circuit that rectifies the AC voltage from the AC power supply, a reactor connected in series to the AC power supply, a switching means that short-circuits and opens the AC power supply via the reactor, and a voltage that generates a pulse signal synchronized with the AC power supply A phase detecting means and a control means for driving the switching means based on the output signal of the voltage phase detecting means, and being synchronized with the voltage phase of the AC power supply one or more times during a half cycle of the AC power supply via the reactor. The switching means short-circuits / opens the AC power supply, wherein the control means has a period of the pulse signal obtained from the voltage phase detection means from a predetermined first predetermined time to a second predetermined time. within the range of (first predetermined time <second predetermined time) only when it is in, had row shorting and opening operations of a plurality of times, the period of the pulse signal, the first When it is out of the range from the fixed time to the second predetermined time, the number of short-circuit / opening operations is limited to one, and the cycle of the pulse signal is set to a value equal to or less than the first predetermined time. The switching means is controlled to be in an open state when it is shorter than the third predetermined time and when it is longer than the fourth predetermined time set to a value equal to or greater than the second predetermined time. Power supply.
JP2008121958A 2008-05-08 2008-05-08 Power supply Expired - Fee Related JP5228609B2 (en)

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JP2012151993A (en) * 2011-01-19 2012-08-09 Hitachi Industrial Equipment Systems Co Ltd Electric power conversion system and rotary machine drive system using the same
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