JP5227491B2 - Display device - Google Patents

Description

  The present invention relates to a display device that receives a video signal and displays an image. In particular, the present invention relates to a display device having a light emitting element. Further, the present invention relates to an electronic device using the display device.

  A display device that displays an image by arranging light emitting elements for each pixel and controlling light emission of these light emitting elements will be described below. The display device includes a display and a peripheral circuit that inputs a signal to the display. FIG. 16 shows a configuration of a pixel portion of the display.

  In the pixel portion 1603, source signal lines S1 to Sx, gate signal lines G1 to Gy, and power supply lines V1 to Vx are arranged, and pixels in x (x is a natural number) columns y (y is a natural number) are arranged. . Each pixel 1700 includes a switching transistor 1701, a driving transistor 1702, a storage capacitor 1703, and a light emitting element 1704.

  FIG. 17 shows an enlarged view of one pixel of the pixel portion 1603 shown in FIG.

  The pixel includes one S of source signal lines S1 to Sx, one G of gate signal lines G1 to Gy, one V of power supply lines V1 to Vx, a switching transistor 1701, A driving transistor 1702, a storage capacitor 1703, and a light emitting element 1704 are included.

  The gate electrode of the switching transistor 1701 is connected to the gate signal line G, one of the source electrode or drain electrode of the switching transistor 1701 is connected to the source signal line S, and the other is the gate electrode of the driving transistor 1702. Are connected to one electrode of the storage capacitor 1703. One of a source electrode and a drain electrode of the driving transistor 1702 is connected to the power supply line V, and the other is connected to an anode or a cathode of the light emitting element 1704. Of the two electrodes of the storage capacitor 1703, the side not connected to the driving transistor 1702 and the switching transistor 1701 is connected to the power supply line V.

  An operation when the light emitting element 1704 emits light in the pixel having the above structure will be described below.

  A signal is input to the gate signal line G, and the switching transistor 1701 is turned on. A signal is input from the source signal line S to the gate electrode of the driving transistor 1702 via the source electrode and the drain electrode of the switching transistor 1701 that is turned on. Further, the potential of the source signal line S is held in the storage capacitor 1703. In accordance with a signal input to the gate electrode of the driving transistor 1702, the driving transistor 1702 is turned on. At this time, the value of the current flowing between the source electrode and the drain electrode of the driving transistor 1702 is determined by the difference between the potential of the gate electrode of the driving transistor 1702 and the potential of the power supply line V. When a current flowing between the source electrode and the drain electrode of the driving transistor 1702 flows to the light emitting element 1704 through the pixel electrode of the light emitting element 1704, the light emitting element 1704 emits light.

  At this time, the value of the current flowing through the light emitting element 1704 needs to be always constant without being affected by the deterioration of the light emitting element 1704. Since the value of current flowing through the light-emitting element 1704 is constant regardless of the potential difference between the source electrode and the drain electrode of the driving transistor 1702, it is desirable to design the driving transistor 1702 to operate in a saturation region.

  Thus, the forward light emitting element driving voltage is always applied to the light emitting element of the conventional display.

  However, it has been found that application of a light emitting element driving voltage in the reverse direction to a light emitting element at regular intervals improves the deterioration of current-voltage characteristics of the light emitting element (see Non-Patent Document 1).

"Tetsuo Tetsui, 3 others, Japanese Journal of Applied Physics, vol. 37, L1406-L1408 (1998), Part 2, No. 11B"

  In addition, there is an initial failure in which the pixel electrode and the counter electrode are short-circuited, and a region that does not emit light is formed in the pixel. A short circuit occurs when foreign matter (dust) adheres before the light emitting element is formed, or when a pinhole is generated in the electroluminescent layer because a fine protrusion is formed on the anode when forming the anode. In addition, since the electroluminescent layer is thin, the electroluminescent layer may not be uniformly formed and pinholes may occur. In a pixel in which such an initial failure has occurred, lighting and non-lighting according to the signal are not performed, and almost all of the current flows through the short-circuited part, causing a phenomenon that the entire element is extinguished, or a specific pixel is turned on or off. A phenomenon that does not light up occurs, and the image is not displayed well.

  In addition to the initial failure described above, a progressive failure due to a newly generated short circuit between the anode and the cathode may occur over time. The short circuit between the anode and the cathode newly generated with the passage of time is caused by fine protrusions generated when the anode is formed. That is, a potential short-circuited portion exists in the laminate in which the electroluminescent layer is sandwiched between the pair of electrodes, and the short-circuited portion is exposed as time passes. In addition to the short circuit between the anode and the cathode, the progressive defect may also be caused by causing a minute gap between the electroluminescent layer and the cathode to spread over time, thereby causing poor contact between the electroluminescent layer and the cathode. It is said.

  The initial failure can be insulated by applying a light emitting element driving voltage in the reverse direction to the light emitting element and carbonizing or oxidizing the short-circuited portion, and can further prevent further progress. In addition, the progressive failure may be caused by applying a light emitting element driving voltage in the opposite direction to the light emitting element to insulate it by carbonizing or oxidizing the short-circuited portion, or suppressing the spread of the gap between the electroluminescent layer and the cathode. By doing so, it is possible to suppress the occurrence and progress.

  However, in order to insulate the short-circuited part, it is necessary to pass a large current sufficient to insulate the short-circuited part. Usually, the current value sufficient to insulate the short-circuited portion is much larger than the current value flowing in the forward direction in order to cause the light emitting element to emit light. In the pixel configuration of FIGS. 16 and 17, the value of the current flowing through the light emitting element 1704 is controlled by the driving transistor 1702 even in the forward direction and the reverse direction. When the current value flowing between the source electrode and the drain electrode when the driving transistor 1702 is operated in the saturation region is designed as a current value flowing in the forward direction in the light emitting element 1704, the light emitting element driving voltage in the reverse direction is applied to the light emitting element 1704. Is applied, the driving transistor 1702 cannot pass a current sufficient to insulate the short-circuited portion.

  Therefore, the present invention provides a display device capable of applying a light-emitting element driving voltage in the reverse direction to a light-emitting element every predetermined period in order to extend the life of the light-emitting element and insulate a short-circuit portion. And

In the display device of the present invention, in addition to a path for supplying a forward current to the light emitting element, a path for supplying a reverse current to the light emitting element is separately provided. A driving transistor is provided in the former path, and a separate transistor (AC transistor) is provided in the latter path. Switching between the former and latter paths is controlled by these two transistors. As the AC transistor, a transistor having a smaller ratio L / W of the channel length L to the channel width W than the driving transistor is used. With the above structure, when a light-emitting element driving voltage in the reverse direction is applied to the light-emitting element, a current flowing through the light-emitting element can be passed through the added AC transistor.

  Specifically, in the present invention, the ratio L / W of the channel length L to the channel width W of the driving transistor is made larger than the L / W of the AC transistor, the driving transistor is in the saturation region, and the AC transistor is linear. Operate in the area. Specifically, in the driving transistor, L is made larger than W, more desirably 5/1 or more. In the AC transistor, L is set equal to or shorter than W. Accordingly, when a forward light emitting element driving voltage is applied to the light emitting element in the pixel, a reverse value is applied to the light emitting element when a reverse light emitting element driving voltage is applied to the light emitting element. The value of the current flowing through can be increased.

  The display device of the present invention includes a light emitting element, a first path for supplying a forward current to the light emitting element, and a second path for supplying a reverse current to the light emitting element, A drive transistor is provided in the first path, an AC transistor is provided in the second path, and the switching between the first path and the second path is controlled using the drive transistor and the AC transistor. It is characterized by.

  The display device of the present invention controls a light emitting element, a driving transistor for controlling a forward current value flowing in the light emitting element, a switching transistor for controlling input of a video signal, and a current flowing in the reverse direction to the light emitting element. The pixel is characterized by having an alternating current transistor to be used in the pixel.

  The display device of the present invention controls a light emitting element, a driving transistor for controlling a forward current value flowing in the light emitting element, a switching transistor for controlling input of a video signal, and a current flowing in the reverse direction to the light emitting element. The pixel has a pixel electrode and a counter electrode, the gate electrode of the switching transistor is connected to the gate signal line, and one of the source electrode and drain electrode of the switching transistor is an image. A source signal line through which a signal flows is connected, the other is connected to the gate electrode of the driving transistor, one of the source electrode or drain electrode of the driving transistor is connected to the power supply line, and the other is connected to the pixel electrode of the light emitting element. Connected, the gate electrode of the AC transistor is connected to the power line, and the source of the AC transistor One of the electrodes or the drain electrode is connected to the pixel electrode, and the other is connected to the current drawing line. The polarity of the driving transistor and the AC transistor is the same, and the driving transistor operates in the saturation region. Is characterized by operating in the linear region.

  The display device of the present invention controls a light emitting element, a driving transistor for controlling a forward current value flowing in the light emitting element, a switching transistor for controlling input of a video signal, and a current flowing in the reverse direction to the light emitting element. The pixel has a pixel electrode and a counter electrode, the gate electrode of the switching transistor is connected to the gate signal line, and one of the source electrode and drain electrode of the switching transistor is an image. Connected to the source signal line through which the signal flows, the other connected to the gate electrode of the driving transistor, one of the source or drain electrodes of the driving transistor connected to the power supply line, and the other connected to the pixel electrode of the light emitting element The gate electrode of the AC transistor is connected to the power line, and the source power of the AC transistor is Alternatively, one of the drain electrodes is connected to the pixel electrode, the other is connected to the power supply line, the polarity of the driving transistor and the AC transistor is the same, the driving transistor operates in the saturation region, and the AC transistor is linear It is characterized by operating in the area.

  In the driving method of the display device of the present invention, one frame period is divided into a plurality of subframe periods, a writing period and a display period are provided in each of the plurality of subframe periods, and the switching transistor and the driving transistor are provided during the writing period. The light emitting element is turned on or off using a transistor, and a current is applied to the light emitting element in the reverse direction. The settings made for the light emitting element during the writing period and the writing period are executed, and the light emitting element emits light. It is characterized in that gradation display is performed by controlling the sum of periods.

  In the driving method of the display device of the present invention, one frame period is divided into a plurality of subframe periods and a plurality of reverse bias periods, and a writing period and a display period are provided in each of the plurality of subframe periods. The light emitting element is turned on or off using the switching transistor and the driving transistor, and the setting made for the light emitting element during the writing period is executed during the display period, and the light emitting element is reversed during the reverse bias period. It is characterized in that gradation display is performed by passing a current in the direction and controlling the sum of periods in which the light emitting elements emit light.

  According to the display device driving method of the present invention, one frame period is divided into a plurality of subframe periods and a single reverse bias period, and a writing period and a display period are provided in each of the plurality of subframe periods. The light emitting element is turned on or off using the switching transistor and the driving transistor, and the setting made for the light emitting element during the writing period is executed during the display period, and the light emitting element is reversed during the reverse bias period. It is characterized in that gradation display is performed by passing a current in the direction and controlling the sum of periods in which the light emitting elements emit light.

  According to the driving method of the display device of the present invention, one frame period is divided into a forward bias period and a reverse bias period, and a switching transistor and a driving transistor are used in the forward bias period, and the forward direction is applied to the light emitting element. And a light emitting element is caused to emit light with a luminance corresponding to a current value flowing through the light emitting element, and a current is passed through the light emitting element in the reverse direction during the reverse bias period.

  With the above configuration, when a forward light emitting element driving voltage is applied to the light emitting element, a constant current can flow through the light emitting element, and when a reverse light emitting element driving voltage is applied to the light emitting element. In this case, a current sufficient to insulate the short-circuited portion can be supplied to the short-circuited portion, and the life of the light emitting element can be extended.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, it should be understood by those skilled in the art that the present invention can be implemented in many different modes, and that various changes in form and details can be made without departing from the spirit and scope of the present invention. Understood.

(Embodiment 1)
One embodiment of the present invention is shown in FIG.

  FIG. 1 shows an embodiment of a pixel included in a light emitting device of the present invention. A pixel shown in FIG. 1 includes a light-emitting element 104, a transistor (switching transistor) 101 used as a switching element for controlling input of a video signal to the pixel, and a driving transistor that controls a current value flowing through the light-emitting element 104. 102 and an alternating current transistor 103 that allows a current flowing through the light emitting element 104 to flow when a light emitting element driving voltage in the reverse direction is applied to the light emitting element 104. Further, as in this embodiment, a capacitor 105 for holding the potential of the video signal may be provided in the pixel.

  Here, in this specification, a light-emitting element is described as an element (OLED element) having a structure in which an electroluminescent layer that emits light when an electric field is generated is sandwiched between an anode and a cathode, but is not limited thereto.

  In this specification, a light-emitting element means light emission (fluorescence) at the time of transition from a singlet exciton to a ground state and light emission (phosphorescence at the time of transition from a triplet exciton to a ground state). ) Will be described as indicating both.

  Examples of the electroluminescent layer include a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer. The light emitting element is basically shown in a structure in which anode / light emitting layer / cathode is stacked in this order, but in addition to this, a structure in which anode / hole injection layer / light emitting layer / electron injection layer / cathode is stacked in order, There are structures in which an anode / hole injection layer / hole transport layer / light emitting layer / electron transport layer / electron injection layer / cathode are stacked in this order.

  Note that the electroluminescent layer is not limited to a layer in which a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, an electron injection layer, and the like are clearly distinguished. In other words, the electroluminescent layer may have a structure in which materials constituting the hole injection layer, the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the like are mixed.

  Moreover, the inorganic substance may be mixed.

  Further, the electroluminescent layer of the OLED element may be any material of a low molecular material, a high molecular material, and a medium molecular material.

  Note that in this specification, the term “middle molecular material” means that the number of molecules is 20 or less or the length of a chained molecule is 10 μm or less and has no sublimation property.

  The driving transistor 102 and the AC transistor 103 have the same polarity.

  The gate electrode of the switching transistor 101 is connected to the gate signal line G. One of the source and drain electrodes of the switching transistor 101 is connected to the source signal line S, and the other is connected to the gate electrode of the driving transistor 102. The driving transistor 102 is connected to the power supply line V and the light emitting element 104 so that the current supplied from the power supply line V is supplied to the light emitting element 104 as the drain current of the driving transistor 102. In this embodiment mode, the gate electrode of the AC transistor 103 is connected to the power supply line V, one of the source electrode and the drain electrode is connected to the current drawing line W, and the other is connected to the pixel electrode of the light emitting element 104. The

  In this specification, when the source electrode or the drain electrode of the driving transistor 102 is connected to the anode of the light-emitting element 104, the anode of the light-emitting element 104 is referred to as a pixel electrode and the cathode is referred to as a counter electrode. On the other hand, when the source electrode or the drain electrode of the driving transistor 102 is connected to the cathode of the light emitting element 104, the cathode of the light emitting element 104 is referred to as a pixel electrode and the anode is referred to as a counter electrode.

  As shown in FIG. 1, when the anode is connected to the driving transistor 102, the anode serves as a pixel electrode and the cathode serves as a counter electrode.

  One of the two electrodes of the capacitor 105 is connected to the power supply line V, and the other is connected to the gate electrode of the driving transistor 102. The capacitor 105 is provided to hold a potential difference between the electrodes of the capacitor 105 when the switching transistor 101 is in a non-selected state (off state). Note that FIG. 1 illustrates a structure in which the capacitor 105 is provided; however, the present invention is not limited to this structure, and the capacitor 105 may be omitted.

In FIG. 1, the driving transistor 102 and the AC transistor 103 are p-channel transistors, and the drain electrode of the driving transistor 102 and the anode of the light emitting element 104 are connected. Conversely, if the driving transistor 102 and the AC transistor 103 are n-channel transistors, the drain electrode of the driving transistor 102 and the cathode of the light emitting element 104 are connected. In this case, the cathode of the light emitting element 104 is a pixel electrode, and the anode is a counter electrode.

  Further, in this embodiment, the L / W of the driving transistor 102 is set larger than the L / W of the AC transistor 103, and the driving transistor 102 is operated in the saturation region and the AC transistor 103 is operated in the linear region. Specifically, in the driving transistor 102, L is set larger than W, and more desirably 5/1 or more. In the AC transistor 103, L is set equal to or shorter than W.

  Next, a method of driving by the digital time gray scale method using the pixel shown in FIG. 1 will be described with reference to a timing chart of FIG.

  In FIG. 2, one frame is composed of a plurality of subframes, and one subframe is composed of a writing period and a display period. FIG. 2 shows an example in which gradation is expressed using a 4-bit digital video signal.

  First, in the writing period, when the gate signal line G is selected, the switching transistor 101 whose gate electrode is connected to the gate signal line G is turned on. Then, the digital video signal input to the source signal line S is input to the gate electrode of the driving transistor 102 via the switching transistor 101, and the potential is held by the capacitor 105.

  Note that in this specification, a transistor in an on state indicates that a source voltage and a drain electrode are in a conductive state due to the gate voltage. In addition, the transistor is in an off state indicates that the gate voltage causes the non-conduction state between the source electrode and the drain electrode.

  A light emitting element driving voltage in the reverse direction is applied to the light emitting element 104 of each pixel. That is, only the potential of the counter electrode of the light emitting element 104 is changed while the potential of the power supply line V remains constant. Therefore, the light emitting element 104 does not emit light, and the reverse bias current flowing in the light emitting element 104 flows to the current drawing line W through between the source electrode and the drain electrode of the AC transistor 103 which is in the ON state. At this time, the potential of the current lead-in line W is set such that a reverse bias current flowing through the light emitting element 104 does not flow into the driving transistor 102.

  Note that in this specification, to apply a forward light-emitting element driving voltage to a light-emitting element means that the anode potential of the light-emitting element is higher than the cathode potential. A forward bias current flows and emits light. In addition, applying a light emitting element driving voltage in the reverse direction to the light emitting element means that the cathode potential of the light emitting element is higher than the anode potential, and a reverse bias current flows through the light emitting element. Does not emit light.

  In the display period, the switching transistor 101 is turned off by controlling the potential of the gate signal line G, and the potential of the digital video signal written in the writing period is held by the capacitor 105. By changing the potential of the counter electrode of the light emitting element 104 included in all pixels, a forward light emitting element driving voltage is applied to the light emitting elements 104 of all pixels. Accordingly, in the writing period, when the driving transistor 102 is turned on by the potential held in the capacitor 105, a current flows to the light-emitting element 104, and the light-emitting element 104 emits light. On the other hand, when the driving transistor 102 is turned off, no current is supplied to the light-emitting element 104.

  The above operation is repeated for all the subframe periods SF1 to SF4, and one frame period F1 ends. Here, the lengths of the display periods Ts1 to Ts4 of the subframe periods SF1 to SF4 are set as appropriate, and the gray scale is determined by the total display period of the subframe periods SF1 to SF4 in which the light emitting element 104 emits light per frame period F1. Express. That is, the gradation is expressed by the total lighting time in one frame period F1.

  Further, as shown in FIG. 3, a period (reverse bias period) BF for applying a light emitting element driving voltage in the reverse direction may be provided in one frame period, and the light emitting element driving voltage may be set to 0 V in the writing period. Note that FIG. 3 shows an example in which gradation is expressed using a 4-bit digital video signal.

  Note that one subframe period may be composed of a plurality of subframe periods, and may be arranged without being continuous in one frame.

  When the pixel of FIG. 1 is driven in an analog manner, as shown in FIG. 4, a period in which a light emitting element driving voltage having a forward polarity is applied to the light emitting element in one frame period, that is, a forward bias period FF, A period for applying the light emitting element driving voltage in the reverse direction, that is, a reverse bias period BF may be provided. Note that an analog video signal may be written to each pixel in the forward bias period FF so that the light-emitting element 104 emits light.

  The transistor used in the light-emitting device of the present invention may be a transistor formed using single crystal silicon, a transistor using SOI, polycrystalline silicon, amorphous silicon, or a microcrystalline semiconductor. A thin film transistor using (including a semi-amorphous semiconductor) may be used. Further, a transistor using an organic semiconductor or a transistor using carbon nanotubes may be used. In addition, the transistor provided in the pixel of the light-emitting device of the present invention may have a single gate structure, a double gate structure, or a multi-gate structure having more gate electrodes.

Note that a semi-amorphous semiconductor is a semiconductor having an intermediate structure between an amorphous structure and a crystalline structure (including a single crystal and a polycrystal) and having a third state that is stable in terms of free energy. It includes a crystalline region with distance order and lattice distortion. At least a partial region in the film includes crystal grains of 0.5 to 20 nm. The Raman spectrum is shifted to the lower wavenumber side than 520 cm ⁻¹ . In X-ray diffraction, diffraction peaks of (111) and (220) that are derived from the Si crystal lattice are observed. At least 1 atomic% or more of hydrogen or halogen is contained as a neutralizing agent for dangling bonds.

The semi-amorphous semiconductor film is formed by glow discharge decomposition (plasma CVD) of a silicide gas. As the silicide gas, SiH ₄ , Si ₂ H ₆ , SiH ₂ Cl ₂ , SiHCl ₃ , SiCl ₄ , SiF _{4, and the} like can be used. Further, GeF ₄ may be mixed. This silicide gas may be diluted with H ₂ , or H ₂ and one or more kinds of rare gas elements selected from He, Ar, Kr, and Ne. The dilution ratio is in the range of 2 to 1000 times, the pressure is in the range of approximately 0.1 Pa to 133 Pa, the power supply frequency is 1 MHz to 120 MHz, preferably 13 MHz to 60 MHz, and the substrate heating temperature may be 300 ° C. or less, preferably 100 to 250 ° C. As an impurity element in the film, impurities of atmospheric components such as oxygen, nitrogen, and carbon are desirably 1 × 10 ²⁰ cm ⁻¹ or less, and in particular, the oxygen concentration is 5 × 10 ¹⁹ / cm ³ or less, preferably 1 × 10 ¹⁹ / cm ³ or less. When a transistor is used, μ = 1 to 10 cm ² / Vsec.

  With the above configuration, when a forward light emitting element driving voltage is applied to the light emitting element, a constant current can flow through the light emitting element, and when a reverse light emitting element driving voltage is applied to the light emitting element. In this case, a current sufficient to insulate the short-circuited portion can be supplied to the short-circuited portion, and the life of the light emitting element can be extended.

(Embodiment 2)
In this embodiment mode, a mode different from that in FIGS. 1A and 1B of a pixel included in the light-emitting device of the present invention will be described.

  The pixel illustrated in FIG. 5 includes a light-emitting element 504, a switching transistor 501, a driving transistor 502, and an AC transistor 503. In addition to the above elements, a capacitor 505 may be provided in the pixel.

  The driving transistor 502 and the AC transistor 503 have the same polarity.

  Further, in this embodiment, the L / W of the driving transistor 502 is made larger than the L / W of the AC transistor 503, and the driving transistor 502 is operated in the saturation region and the AC transistor 503 is operated in the linear region. Specifically, in the driving transistor 502, L is made larger than W, more preferably 5/1 or more. In the AC transistor 503, L is set equal to or shorter than W.

  In FIG. 5, the switching transistor 501 is an n-channel transistor, and the driving transistor 502 and the AC transistor 503 are p-channel transistors. However, the switching transistor 501, the driving transistor 502, and the AC transistor 503 are p-channel transistors. A n-channel transistor or an n-channel transistor may be used.

  The gate electrode of the switching transistor 501 is connected to the gate signal line G. One of the source electrode and the drain electrode of the switching transistor 501 is connected to the source signal line S, and the other is connected to the gate electrode of the driving transistor 502. The driving transistor 502 is connected to the power supply line V and the light emitting element 504 so that the current supplied from the power supply line V is supplied to the light emitting element 504 as the drain current of the driving transistor 502. In this embodiment, the gate electrode of the AC transistor 503 is connected to the power supply line V, one of the source electrode and the drain electrode is connected to the power supply line V, and the other is connected to the pixel electrode of the light emitting element 504. .

  The light emitting element 504 includes an anode, a cathode, and an electroluminescent layer provided between the anode and the cathode. As shown in FIG. 5, when the anode is connected to the driving transistor 502, the anode serves as a pixel electrode and the cathode serves as a counter electrode.

  One of the two electrodes of the capacitor 505 is connected to the power supply line V, and the other is connected to the gate electrode of the driving transistor 502. The capacitor 505 is provided to hold a potential difference between the electrodes of the capacitor 505 when the switching transistor 501 is in an off state. Note that FIG. 5 illustrates a structure in which the capacitor 505 is provided; however, the present invention is not limited to this structure, and the capacitor 505 may be omitted.

In FIG. 5, the driving transistor 502 and the AC transistor 503 are p-channel transistors, and the drain electrode of the driving transistor 502 and the anode of the light emitting element 504 are connected. Conversely, if the driving transistor 502 and the AC transistor 503 are n-channel transistors, the drain electrode of the driving transistor 502 and the cathode of the light emitting element 504 are connected. In this case, the cathode of the light emitting element 504 is a pixel electrode, and the anode is a counter electrode.

  When driving by the digital time gray scale method using the pixel shown in FIG. 5, the operation may be performed as in the timing chart of FIG. 2 or FIG.

  Further, when the pixel of FIG. 5 is driven in an analog manner, as in the first embodiment, as shown in FIG. 4, a period in which a light emitting element driving voltage having a forward polarity is applied to the light emitting elements in one frame, that is, in order. A direction bias period FF and a period in which a light emitting element driving voltage in the reverse direction is applied, that is, a reverse bias period BF may be provided. Note that an analog video signal may be written to each pixel in the forward bias period FF so that the light-emitting element 504 emits light.

  With the above configuration, when a forward light emitting element driving voltage is applied to the light emitting element, a constant current can flow through the light emitting element, and when a reverse light emitting element driving voltage is applied to the light emitting element. In this case, a current sufficient to insulate the short-circuited portion can be supplied to the short-circuited portion, and the life of the light emitting element can be extended.

  Examples of the present invention will be described below.

  A circuit for inputting a signal for driving the display in the digital time gray scale method to the source signal line driver circuit and the gate signal line driver circuit of the display will be described with reference to FIG.

  In this embodiment, a display device that displays an image by inputting a 4-bit digital video signal to the display device will be described as an example. However, the present invention is not limited to 4 bits.

  The digital video signal is read into the signal control circuit 601 and the digital video signal VD is output to the display 600.

  In the present embodiment, the digital video signal edited by the signal control circuit 601 and converted into a signal input to the display is called a digital video signal VD.

  Signals and driving voltages for driving the source signal line driver circuit 607 and the gate signal line driver circuit 608 of the display 600 are input by the display controller 602.

  The configurations of the signal control circuit 601 and the display controller 602 will be described.

  Note that the source signal line driver circuit 607 of the display 600 includes a shift register 610, a LAT (A) 611, and a LAT (B) 612. In addition, although not shown, a level shifter, a buffer, or the like may be provided. The present invention is not limited to such a configuration. Reference numeral 609 denotes a pixel portion.

  The signal control circuit 601 includes a CPU 604, a memory A 605, a memory B 606, and a memory controller 603.

  The digital video signal input to the signal control circuit 601 is controlled by the memory controller 603 and input to the memory A 605 via a switch. Here, the memory A 605 has a capacity capable of storing digital video signals for all the pixels of the display 600. When a signal for one frame period is stored in the memory A 605, the signal of each bit is sequentially read out by the memory controller 603 and input to the source signal line driver circuit 607 as the digital video signal VD.

  When reading of the signal stored in the memory A 605 starts, a digital video signal corresponding to the next frame period is input to the memory B 606 via the memory controller 603 and stored. Similarly to the memory A605, the memory B606 has a capacity capable of storing digital video signals for all the pixels of the display device.

  As described above, the signal control circuit 601 includes the memory A 605 and the memory B 606 capable of storing digital video signals for one frame period, and uses the memory A 605 and the memory B 606 alternately to generate digital video signals. The signal VD is sampled.

  Here, the signal control circuit 601 that stores signals by alternately using the two memories A605 and B606 is shown, but in general, the display device has a plurality of memories that can store information for a plurality of frames. These memories can be used alternately.

  A block diagram of the display device having the above configuration is shown in FIG.

  The display device includes a signal control circuit 601, a display controller 602, and a display 600.

  The display controller 602 supplies the display 600 with a start pulse SP, a clock pulse CLK, a driving voltage, and the like.

  The signal control circuit 601 includes a CPU 604, a memory A 605, a memory B 606, and a memory controller 603.

  The memory A 605 includes memories 605_1 to 605_4 that store information on the first bit to the fourth bit of the digital video signal, respectively. Similarly, the memory B 606 is also composed of memories 606_1 to 606_4 that store information of the first bit to the fourth bit of the digital video signal, respectively. Each of the memories corresponding to these bits has a number of storage elements that can store a signal for one bit by the number of pixels constituting one screen.

  In general, in a display device capable of expressing gradation using an n-bit digital video signal, the memory A 605 includes memories 605_1 to 605_n that store information on first to nth bits, respectively. The Similarly, the memory B 606 includes the memories 606_1 to 606_n that store information of the first bit to the n-th bit, respectively. A memory corresponding to each of these bits has a capacity capable of storing a signal for one bit for each pixel constituting one screen.

  The configuration of the display controller 602 will be described below.

  FIG. 8 is a diagram showing the configuration of the display controller of the present invention.

  The display controller 602 includes a reference clock generation circuit 801, a horizontal clock generation circuit 803, a vertical clock generation circuit 804, a light emitting element power supply control circuit 805, and a drive circuit power supply control circuit 806.

  The clock signal 31 input from the CPU 604 is input to the reference clock generation circuit 801 and generates a reference clock. This reference clock is input to the horizontal clock generation circuit 803 and the vertical clock generation circuit 804.

  The horizontal clock generation circuit 803 receives a horizontal cycle signal 32 that determines a horizontal cycle from the CPU 604, and outputs a clock pulse S_CLK and a start pulse S_SP for the source signal line driver circuit. Similarly, a vertical cycle signal 33 for determining a vertical cycle is input from the CPU 604 to the vertical clock generation circuit 804, and a clock pulse G_CLK and a start pulse G_SP for the gate signal line driver circuit are output.

  The light emitting element power control circuit 805 is controlled by the light emitting element power control signal 34. When the timing chart of FIG. 2 is used, the light-emitting element power supply control circuit 805 applies a light-emitting element driving voltage in the reverse direction to the light-emitting element during the writing period Ta. In the display period Ts, the light emitting element driving voltage in the forward direction is controlled to be applied to the light emitting element. When the timing chart of FIG. 3 is used, the counter potential is set such that a light-emitting element driving voltage of 0 V is applied to the light-emitting element in the writing period Ta, and a forward light-emitting element driving voltage is applied to the light-emitting element in the display period Ts. In the reverse bias period BF, the light emitting element drive voltage in the reverse direction is controlled to be applied.

  The drive circuit power supply control circuit 806 controls the power supply voltage input to each drive circuit.

  Note that a driver circuit power supply control circuit 806 having a known configuration may be used.

  The signal control circuit 601, the memory controller 603, the CPU 604, the memory A 605, the memory B 606, and the display controller 602 described above may be formed on the same substrate as the pixels in order to be integrated with the display 600, or formed with an LSI chip. It may be attached to the substrate of the display 600 with COG, may be attached to the substrate using TAB, or may be formed on a substrate different from the display 600 and connected by electric wiring. .

  In this embodiment, a configuration example of a source signal line driver circuit for a digital time gray scale method used in the display device of the present invention will be described. A configuration example of the source signal line driver circuit is shown in FIG.

  The source signal line driver circuit includes a shift register 901, a scanning direction switching circuit, LAT (A) 902, and LAT (B) 903. In FIG. 9, only a part of the LAT (A) 902 and a part of the LAT (B) 903 corresponding to one of the outputs from the shift register 901 are illustrated, but all the outputs from the shift register 901 are illustrated. In contrast, LAT (A) 902 and LAT (B) 903 having the same configuration correspond to each other.

  The shift register 901 includes a clocked inverter, an inverter, and a NAND. The source register driver circuit start pulse S_SP is input to the shift register 901, and the source signal driver circuit clock pulse S_CLK and the inverted signal pulse S_CLKB for the source signal driver circuit are inverted signals. When the inverter is switched between a conductive state and a non-conductive state, sampling pulses are output to the LAT (A) 902 in order from the NAND.

  The scanning direction switching circuit is constituted by a switch and functions to switch the operation direction of the shift register 901 left and right as viewed in the drawing. In FIG. 9, when the left / right switching signal L / R corresponds to a Lo signal, the shift register 901 outputs sampling pulses sequentially from left to right as viewed in the drawing. On the other hand, when the left / right switching signal L / R corresponds to a Hi signal, sampling pulses are output sequentially from right to left in the drawing.

  Here, the LAT (A) 902 of each stage indicates the LAT (A) 904 that captures a video signal input to one source signal line.

  The LAT (A) 904 includes a clocked inverter and an inverter.

  Here, the digital video signal VD output from the signal control circuit described in the first embodiment is input after being divided into p (p is a natural number). That is, signals corresponding to outputs to the p source signal lines are input in parallel. When the sampling pulse is simultaneously input to the p LAT (A) 902 clocked inverters through the buffer, the p-divided input signals are respectively sampled simultaneously in the p LAT (A) 904. .

  Here, a source signal line driver circuit that outputs a signal voltage to x source signal lines is described as an example, so x / p sampling pulses are sequentially output from the shift register per horizontal period. In response to each sampling pulse, the p LAT (A) 904 simultaneously samples the digital video signal corresponding to the output to the p source signal lines.

  In this embodiment, the method of dividing the digital video signal input to the source signal line driving circuit into p-phase parallel signals and simultaneously taking in the p digital video signals by one sampling pulse is p-division driving. I will call it. FIG. 9 shows four-division driving.

  By the divided driving, a margin can be given to sampling of the shift register of the source signal line driver circuit. Thus, the reliability of the display device can be improved.

  When all signals in one horizontal period are input to each LAT (A) 904, the latch pulse S_LAT and the inverted latch pulse S_LATB whose polarity is inverted are input, and the signal input to each LAT (A) 904 is Output to LAT (B) 903 of each stage simultaneously.

  Here, the LAT (B) 903 of each stage indicates the LAT (B) circuit 905 to which the signal from the LAT (A) 902 of each stage is input.

  Each LAT (B) 905 includes a clocked inverter and an inverter. A signal output from each LAT (A) 904 is held in LAT (B) 905 and simultaneously output to each source signal line S1 to Sx.

Although not shown here, a level shifter, a buffer, or the like may be provided as appropriate.

  The start pulse S_SP, the clock pulse S_CLK, and the like input to the shift register 901, LAT (A) 902, and LAT (B) 903 are input from the display controller shown in the first embodiment of the present invention.

  In this embodiment, the operation of inputting the digital video signal to the LAT (A) of the source signal line driver circuit is controlled by the signal control circuit, and at the same time, the clock pulse S_CLK and the start pulse S_SP are applied to the shift register of the source signal line driver circuit. The display controller controls an input operation and an operation for inputting a driving voltage for operating the source signal line driving circuit.

  Note that the display device of the present invention is not limited to the configuration of the source signal line driver circuit of this embodiment, and a source signal line driver circuit having a known configuration can be freely used.

  Further, depending on the configuration of the source signal line driving circuit, the number of signal lines input from the display controller to the source signal line driving circuit and the number of power supply lines for driving voltage are different.

  This embodiment can be freely combined with the above embodiment modes and embodiments.

  In this embodiment, a structural example of a gate signal line driver circuit used in the display device of the present invention will be described with reference to FIG.

  The gate signal line driving circuit includes a shift register, a scanning direction switching circuit, and the like. Although not shown here, a level shifter, a buffer, or the like may be provided as appropriate.

  A start pulse G_SP, a clock pulse G_CLK, a driving voltage, and the like are input to the shift register, and a gate signal line selection signal is output.

  The shift register 3601 includes clocked inverters 3602 and 3603, an inverter 3604, and a NAND circuit 3607. The shift register 3601 receives the start pulse G_SP, and the clocked inverters 3602 and 3603 change between a conductive state and a non-conductive state by an inverted clock pulse G_CLKB which is a signal whose polarity is inverted with respect to the clock pulse G_CLK. Sampling pulses are output in order from the NAND circuit 3607.

  The scanning direction switching circuit includes a switch 3605 and a switch 3606, and switches the operation direction of the shift register 3601 to the left and right as viewed in the drawing. In FIG. 10, when the scanning direction switching signal U / D corresponds to a Lo signal, the shift register 3601 outputs sampling pulses in order from the left to the right in the drawing. On the other hand, when the scanning direction switching signal U / D corresponds to a Hi signal, sampling pulses are output sequentially from right to left in the drawing.

  The sampling pulse output from the shift register 3601 is input to the NOR circuit 3608 and calculated as the enable signal ENB. This calculation is performed in order to prevent a situation in which adjacent gate signal lines are simultaneously selected due to the rounding of sampling pulses. The signal output from the NOR circuit 3608 is output to the gate signal lines G1 to Gy via the buffers 3609 and 3610.

Although not shown here, a level shifter, a buffer, or the like may be provided as appropriate.

  A start pulse G_SP, a clock pulse G_CLK, a driving voltage, and the like input to the shifter register 3601 are input from the display controller described in Embodiment 1 of this specification.

  Note that the display device of the present invention is not limited to the configuration of the gate signal line driving circuit of this embodiment, and a gate signal line driving circuit having a known configuration can be freely used.

  Further, depending on the configuration of the gate signal line driving circuit, the number of signal lines input to the gate signal line driving circuit from the display controller and the number of power supply lines for driving voltage are different.

  This embodiment can be freely combined with the above embodiment modes and embodiments.

  A display including a pixel portion and a driver circuit, which is one embodiment of the display device of the present invention, will be described with reference to FIGS.

  In FIG. 11, over a substrate 405, a pixel portion 404 including a plurality of pixels each including a light emitting element, a source signal line driver circuit 403, first and second gate signal line driver circuits 401 and 402, a connection terminal 415, and a connection film 407 is provided. The connection terminal 415 is connected to the connection film 407 through anisotropic conductive particles or the like. The connection film 407 is connected to the IC chip.

  FIG. 11B is a cross-sectional view taken along the line AA ′ of the panel in FIG. 11A, and includes a driving transistor 410 provided in the pixel portion 404 and a CMOS circuit provided in the source signal line driver circuit 403. 414 is shown. In addition, a conductive layer 411, an electroluminescent layer 412, and a conductive layer 413 provided in the pixel portion 404 are shown. The conductive layer 411 is connected to the source electrode or the drain electrode of the driving transistor 410. In addition, the conductive layer 411 functions as a pixel electrode, and the conductive layer 413 functions as a counter electrode. A stacked body of the conductive layer 411, the electroluminescent layer 412, and the conductive layer 413 corresponds to a light-emitting element.

  A sealant 408 is provided around the pixel portion 404 and the drive circuits 401 to 403, and the light-emitting element is sealed with the sealant 408 and the counter substrate 406. This sealing process is a process for protecting the light emitting element from moisture. Here, a method of sealing with a cover material (glass, ceramics, plastic, metal, etc.) is used, but thermosetting resin or ultraviolet light curing is used. A method of sealing with a functional resin or a method of sealing with a thin film having a high barrier ability such as a metal oxide or a nitride may be used.

  The element formed over the substrate 405 is preferably formed using a crystalline semiconductor (polysilicon) having favorable characteristics such as mobility as compared to an amorphous semiconductor. Realized. Since the number of external ICs to be connected is reduced, the panel having the above configuration can be made small, light, and thin.

  In FIG. 11B, the conductive layer 411 is formed using a transparent conductive film, and the conductive layer 413 is formed using a reflective film. Therefore, light emitted from the electroluminescent layer 412 passes through the conductive layer 411 and is emitted to the substrate 405 side as indicated by an arrow. Such a configuration is generally called a bottom emission method.

  In contrast, when the conductive layer 411 is formed using a reflective film and the conductive layer 413 is formed using a transparent conductive film, light emitted from the electroluminescent layer 412 can be emitted from the counter substrate 406 side as illustrated in FIG. It is also possible to have a configuration in which the light is emitted. Such a configuration is generally called a top emission method.

  In addition, the source electrode or the drain electrode of the driving transistor 410 and the conductive layer 411 are stacked in the same layer without an insulating layer, and are directly connected by overlapping of films. Therefore, since the formation region of the conductive layer 411 is a region excluding the region where the driving transistor 410 and the like are disposed, a reduction in aperture ratio is unavoidable with high definition of pixels and the like. Therefore, as illustrated in FIG. 12B, an interlayer film 416 is added, a pixel electrode is provided in an independent layer, and a top emission method is employed, so that a region where a transistor or the like is formed can be effectively used as a light emitting region. Can be used. At this time, depending on the film thickness of the electroluminescent layer 412, the conductive layer 411 and the conductive layer 413 may be short-circuited in the contact region between the conductive layer 411 and the source electrode or the drain electrode of the driving transistor 410. A configuration in which a bank 417 or the like is provided to prevent a short circuit is desirable.

  Further, as shown in FIG. 13, by forming both the conductive layer 411 and the conductive layer 413 with a transparent conductive film, light emitted from the electroluminescent layer 412 is extracted to both the substrate 405 side and the counter substrate 406 side. Configuration is also possible. Such a configuration is called a double-sided emission method.

  In the case of FIG. 13, the light emission areas on the top emission side and the bottom emission side are substantially equal, but as described above, the aperture ratio on the top emission side can be increased by adding an interlayer film to increase the area of the pixel electrode. Needless to say.

  However, the present invention is not limited to the above embodiments. For example, the pixel portion 404 may be formed of a transistor using an amorphous semiconductor (amorphous silicon) formed over an insulating surface as a channel portion, and the driving circuits 401 to 403 may be formed of an IC chip. The IC chip may be bonded onto the substrate by a COG method, or may be bonded to a connection film connected to the substrate. An amorphous semiconductor can be formed over a large substrate by using a CVD method, and a crystallization step is unnecessary, so that an inexpensive panel can be provided. At this time, if a conductive layer is formed by a droplet discharge method typified by an ink jet method, a cheaper panel can be provided. This embodiment can be freely combined with the above embodiment modes and embodiments.

  FIG. 14 shows a layout diagram of the circuit configuration of FIG. 1 which is one embodiment of the present invention.

  14 includes a source signal line 10001, a power supply line 10002, a gate signal line 10003, a switching transistor 10004, a driving transistor 10005, a pixel electrode 10006, an AC transistor 10007, and a current drawing line 10008, and has the same name as FIG. Things correspond to each.

  Note that the display device of the present invention is not limited to the layout configuration of this embodiment.

  This embodiment can be freely combined with the above embodiment modes and embodiments.

  Since a light-emitting device using a light-emitting element is a self-luminous type, it is superior in visibility in a bright place and has a wide viewing angle as compared with a liquid crystal display device. Therefore, various electric appliances can be completed using the light-emitting device of the present invention.

  As an electric appliance manufactured using the light emitting device manufactured according to the present invention, a video camera, a digital camera, a goggle type display (head mounted display), a navigation system, a sound reproducing device (car audio, audio component, etc.), a notebook type personal computer Computers, game machines, portable information terminals (mobile computers, mobile phones, portable game machines, electronic books, etc.), image playback devices equipped with recording media (specifically, playback of recording media such as digital video discs (DVDs)) And a device provided with a display device capable of displaying the image). In particular, a portable information terminal that often has an opportunity to see a screen from an oblique direction emphasizes a wide viewing angle, and thus a light emitting device having a light emitting element is preferably used. Specific examples of these electric appliances are shown in FIG.

  FIG. 15A illustrates a display device, which includes a housing 2001, a support base 2002, a display portion 2003, a speaker portion 2004, a video input terminal 2005, and the like. It is manufactured by using the light emitting device manufactured according to the present invention for the display portion 2003. Since a light-emitting device having a light-emitting element is a self-luminous type, a backlight is not necessary and a display portion thinner than a liquid crystal display device can be obtained. The display devices include all information display devices for personal computers, for receiving TV broadcasts, for displaying advertisements, and the like.

  FIG. 15B illustrates a digital still camera, which includes a main body 2101, a display portion 2102, an image receiving portion 2103, operation keys 2104, an external connection port 2105, a shutter 2106, and the like. It is manufactured by using the light emitting device manufactured according to the present invention for the display portion 2102.

  FIG. 15C illustrates a laptop personal computer, which includes a main body 2201, a housing 2202, a display portion 2203, a keyboard 2204, an external connection port 2205, a pointing mouse 2206, and the like. It is manufactured by using the light emitting device manufactured according to the present invention for the display portion 2203.

  FIG. 15D illustrates a mobile computer, which includes a main body 2301, a display portion 2302, a switch 2303, operation keys 2304, an infrared port 2305, and the like. It is manufactured by using the light emitting device manufactured according to the present invention for the display portion 2302.

  FIG. 15E illustrates a portable image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 2401, a housing 2402, a display portion A2403, a display portion B2404, and a recording medium (DVD or the like). A reading unit 2405, operation keys 2406, a speaker unit 2407, and the like are included. The display portion A 2403 mainly displays image information and the display portion B 2404 mainly displays character information. The light-emitting device manufactured according to the present invention is used for the display portions A, B 2403 and 2404. Note that an image reproducing device provided with a recording medium includes a home game machine and the like.

  FIG. 15F illustrates a goggle type display (head mounted display), which includes a main body 2501, a display portion 2502, and an arm portion 2503. It is manufactured by using the light emitting device manufactured according to the present invention for the display portion 2502.

  FIG. 15G illustrates a video camera, which includes a main body 2601, a display portion 2602, a housing 2603, an external connection port 2604, a remote control reception portion 2605, an image receiving portion 2606, a battery 2607, an audio input portion 2608, operation keys 2609, and an eyepiece. Part 2610 and the like. It is manufactured by using the light emitting device manufactured according to the present invention for the display portion 2602.

  FIG. 15H illustrates a mobile phone, which includes a main body 2701, a housing 2702, a display portion 2703, an audio input portion 2704, an audio output portion 2705, operation keys 2706, an external connection port 2707, an antenna 2708, and the like. It is manufactured by using the light emitting device manufactured according to the present invention for the display portion 2703. Note that the display portion 2703 can reduce power consumption of the mobile phone by displaying white characters on a black background.

  If the emission luminance of the organic material is increased in the future, the light including the output image information can be enlarged and projected by a lens or the like and used for a front type or rear type projector.

  In addition, the electric appliances often display information distributed through electronic communication lines such as the Internet or CATV (cable television), and in particular, opportunities to display moving image information are increasing. Since the response speed of the organic material is very high, the light-emitting device is preferable for displaying moving images.

  In addition, since the light emitting portion of the light emitting device consumes power, it is preferable to display information so that the light emitting portion is minimized. Therefore, when a light emitting device is used for a display unit mainly including character information, such as a portable information terminal, particularly a mobile phone or a sound reproduction device, it is driven so that character information is formed by the light emitting part with the non-light emitting part as the background. It is preferable to do.

  This embodiment can be implemented by freely combining with Embodiments 1 to 4.

FIG. 10 is a circuit diagram of a pixel used in a display device of the present invention. FIG. 11 is a diagram showing a timing chart when a digital time gray scale method is performed in the display device of the present invention. FIG. 11 is a diagram showing a timing chart when a digital time gray scale method is performed in the display device of the present invention. FIG. 5 is a timing chart when gradation display is performed in an analog manner in the display device of the present invention. FIG. 10 is a circuit diagram of a pixel used in a display device of the present invention. FIG. 1 is a circuit diagram illustrating a configuration of a display device of the present invention (Example 1). 1 is a block diagram illustrating a configuration of a display device of the present invention (Example 1). The figure which shows the structure of the display controller used with the display apparatus of this invention (Example 1). FIG. 11 illustrates a configuration of a source signal line driver circuit used in a display device of the present invention (Example 2). FIG. 11 illustrates a configuration of a gate signal line driver circuit used in a display device of the present invention (Example 3). The perspective view and figure which shows the cross section of the display apparatus of this invention (Example 4). The figure which shows the cross section of the display apparatus of this invention (Example 4). The figure which shows the cross section of the display apparatus of this invention (Example 4). FIG. 7 is a layout diagram of a pixel according to the present invention (Example 5). FIG. 11 is a diagram showing an electronic apparatus using a display device of the present invention (Example 6). The figure which shows the structure of the pixel part of the conventional display. The circuit diagram of the pixel of the conventional display.

Claims (3)

A light emitting device having an anode, a cathode, and a light emitting layer provided between the anode and the cathode;
A first transistor for controlling a forward current value flowing through the light emitting element based on a video signal;
A pixel having a second transistor for controlling a current flowing in the reverse direction to the light emitting element based on a power supply potential;
A power line and a current lead line;
The power line is connected to the light emitting element through the first transistor,
The power line is connected to a gate of the second transistor;
The current draw line is connected to the light emitting element through the second transistor,
A display device, wherein a ratio L / W between a channel length L and a channel width W of the first transistor is larger than a ratio L / W between a channel length L and a channel width W of the second transistor. A light emitting device having an anode, a cathode, and a light emitting layer provided between the anode and the cathode;
A first transistor for controlling a forward current value flowing through the light emitting element based on a video signal;
A second transistor for controlling a current flowing in the reverse direction to the light emitting element based on a power supply potential;
A pixel having a third transistor that controls input of the video signal;
A power supply line, a current lead-in line, and a source signal line;
The power line is connected to the light emitting element through the first transistor,
The power line is connected to a gate of the second transistor;
The current draw line is connected to the light emitting element through the second transistor,
The source signal line is connected to the gate of the first transistor via the third transistor;
A display device, wherein a ratio L / W between a channel length L and a channel width W of the first transistor is larger than a ratio L / W between a channel length L and a channel width W of the second transistor. Oite to claim 1 or claim 2,
The anode is a pixel electrode, the cathode is a counter electrode,
A display device, wherein a potential of the counter electrode is changed in accordance with a direction of a current flowing through the light emitting element.

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