JP5204046B2 - Nitride semiconductor wafer, nitride semiconductor light emitting device, and method of manufacturing nitride semiconductor light emitting device - Google Patents

Description

  The present invention relates to a nitride semiconductor wafer, a nitride semiconductor light emitting device, and a method for manufacturing a nitride semiconductor light emitting device.

  Nitride semiconductors typified by GaN, AlN, InN, and mixed crystals thereof have characteristics that they have a large band gap Eg and are direct transition type semiconductor materials compared to AlGaInAs semiconductors and AlGaInP semiconductors. Yes. For this reason, these nitride semiconductors constitute semiconductor light emitting devices such as a semiconductor laser device capable of emitting light in a wavelength range from ultraviolet to green and a light emitting diode device capable of covering a wide light emission wavelength range from ultraviolet to red. It has attracted much attention as a material. In addition, nitride semiconductor light-emitting devices using nitride semiconductors are widely studied in projectors, full-color displays, and in the environment and medical fields. .

  In recent years, a high-quality GaN substrate (gallium nitride substrate) has been obtained. By using this GaN substrate, a nitride semiconductor light emitting device having excellent characteristics has been obtained.

  However, a nitride semiconductor light emitting device such as a nitride semiconductor laser device has a disadvantage that the yield at the time of manufacture is very low, and thus the manufacturing cost is very high. This is one factor that hinders the spread of nitride semiconductor light emitting devices. One of the causes of this decrease in yield is the occurrence of cracks. That is, when a nitride semiconductor layer is grown on a substrate, distortion occurs in the nitride semiconductor layer due to lattice mismatch between the substrate and the nitride semiconductor layer, and the distortion causes cracks in the nitride semiconductor layer. Occurs. As a result, the number of non-defective products obtained from one wafer is reduced, so that the yield is lowered. In addition, due to the occurrence of cracks, device characteristics such as the light emission lifetime are also deteriorated.

  Thus, conventionally, a nitride semiconductor laser element capable of suppressing the occurrence of cracks is known (see, for example, Patent Document 1).

  Patent Document 1 describes a nitride semiconductor laser element formed using a GaN substrate having a dug region dug into a concave shape. In the GaN substrate, the digging region is formed on the crystal growth surface, and a region that is not digging is a non-digging region. A nitride semiconductor laser element is formed by growing the nitride semiconductor layer on the crystal growth surface of the GaN substrate. In this nitride semiconductor laser device, as described above, by forming the digging region in the GaN substrate in advance, the distortion of the nitride semiconductor layer formed on the non-digging region is caused on the digging region. It is relaxed at the formed part. Thereby, generation | occurrence | production of a crack is suppressed. In Patent Document 1, the crystal growth surface of the GaN substrate is a c-plane ((0001) plane; polar plane).

JP 2004-356454 A

  As described above, the method of forming the digging region in the substrate is very effective as a method of suppressing the occurrence of cracks in the nitride semiconductor layer formed on the substrate.

  However, when the present inventors form a nitride semiconductor light emitting device using a substrate having a nonpolar (nonpolar) surface and a semipolar (semipolar) surface as a crystal growth surface, the substrate is formed for the purpose of suppressing cracks. When a nitride semiconductor light emitting device was fabricated by forming a dug region in advance, it was found that composition variation in the thickness direction might occur in the nitride semiconductor layer. When such a composition variation occurs, the device characteristics deviate from the design, and the device characteristics of the nitride semiconductor light emitting device deteriorate. In addition, since variations in characteristics occur, the number of elements having characteristics within the standard range is reduced. As a result, the yield decreases.

  Note that the composition fluctuation of the nitride semiconductor layer tends to appear very strongly when a substrate having a nonpolar plane and a semipolar plane as a crystal growth plane is used, but the substrate having a polar plane as a crystal growth plane is used. Even in such a case, the same phenomenon as described above can occur.

  As described above, as a result of intensive studies by the inventors of the present application, even when the conventional technique described in Patent Document 1 is used, there is still room for improvement in terms of element characteristics and yield. I found it. In particular, the composition variation of the nitride semiconductor layer is a problem that must be suppressed in designing the device.

  The present invention has been made to solve the above-described problems, and one object of the present invention is to provide a nitride semiconductor wafer, a nitride semiconductor light emitting device, and a nitride semiconductor wafer capable of improving device characteristics and yield. It is to provide a method of manufacturing a nitride semiconductor light emitting device.

  In order to achieve the above object, a nitride semiconductor wafer according to the first aspect of the present invention has a crystal growth surface, and a digging region dug in the thickness direction from the crystal growth surface, and a digging region. A nitride semiconductor substrate including a non-excavated region that is a non-excavated region, a growth suppression film that is formed in the excavated region and suppresses crystal growth of the nitride semiconductor, and is grown on a crystal growth surface of the nitride semiconductor substrate And a nitride semiconductor layer. The digging region includes a recess, and the growth suppression film is formed at a position lower than the crystal growth surface in the recess. The “nitride semiconductor substrate” of the present invention includes a substrate in which the digging region and the non-digging region are made of a nitride semiconductor.

  In the nitride semiconductor wafer according to the first aspect, as described above, the growth suppressing film is formed in the digging region (in the recess), so that the nitride semiconductor layer formed on the crystal growth surface has a thickness direction. It is possible to suppress the occurrence of composition variation. The reason why such a composition variation suppressing effect is obtained is considered as follows. That is, when the nitride semiconductor layer is grown on the crystal growth surface, the growth rate of the nitride semiconductor layer in the recess is very high in the initial stage of crystal growth when the growth suppressing film is not formed in the recess. However, when the inside of the recess is filled with the nitride semiconductor layer as the crystal growth proceeds, the growth rate of the nitride semiconductor layer in the recess becomes slow. Thus, when the growth suppression film is not formed in the recess, the growth rate of the nitride semiconductor layer in the recess changes. The change in the growth rate affects the nitride semiconductor layer formed on the non-dig region, and as a result, composition variation in the thickness direction occurs in the nitride semiconductor layer on the non-dig region. In addition, when the inside of the recess is filled with the nitride semiconductor layer, the change in the growth rate in the recess becomes large, so that the composition variation is likely to occur in the nitride semiconductor layer. On the other hand, when a growth suppressing film is formed in the recess, crystal growth of the nitride semiconductor layer in the recess is suppressed, so that a change in the growth rate of the nitride semiconductor layer is suppressed in the recess. Is done. Thereby, it is suppressed that the composition fluctuation of the thickness direction arises in the nitride semiconductor layer formed on a non-digging area. In addition, when a growth suppressing film is formed in the recess, it is possible to suppress the recess from being filled with the nitride semiconductor layer, so that the nitride easily formed on the non-digged region It is possible to suppress the composition variation in the thickness direction from occurring in the semiconductor layer.

  In the first aspect, as described above, the growth suppression film is formed at a position lower than the crystal growth surface in the recess, thereby generating an edge growth portion of the nitride semiconductor layer (periphery of the periphery of the growth suppression film). The portion where the thickness of the nitride semiconductor layer is increased) can be generated in the recess. That is, it is possible to suppress the edge growth portion from being formed in the nitride semiconductor layer on the non-digged region. Thereby, the fluctuation | variation of the layer thickness of the nitride semiconductor layer formed on a non-digging area | region can be suppressed.

  Furthermore, in the first aspect, as described above, by forming the growth suppression film in the recess, it is possible to suppress the recess from being filled with the nitride semiconductor layer. For this reason, since a recess can be formed on the surface of the nitride semiconductor layer on the digging region (on the recess), it is caused by a lattice mismatch between the nitride semiconductor substrate and the nitride semiconductor layer. Even when the nitride semiconductor layer is distorted, the strain of the nitride semiconductor layer (nitride semiconductor layer formed on the non-dig region) is applied to the surface of the nitride semiconductor layer on the dig region (on the recess). It can relieve in the formed said hollow part. Thereby, it is possible to easily suppress the occurrence of cracks in the nitride semiconductor layer. In addition, the deterioration of the surface morphology can be suppressed by suppressing the recess from being filled with the nitride semiconductor layer.

  Here, as a result of various studies by the inventors of the present application, when a nitride semiconductor substrate having a nonpolar plane and a semipolar plane as a crystal growth plane was used, a nitride semiconductor substrate having a polar plane as a crystal growth plane was used. As compared with the case, it has been found that there is an inconvenience that the concave portion is easily filled with the nitride semiconductor layer. However, even in such a case, it is possible to suppress the recess from being filled with the nitride semiconductor layer by forming the growth suppressing film in the recess. For this reason, even when a nitride semiconductor substrate having a crystal growth surface with a nonpolar plane and a semipolar plane that is easily embedded in the nitride semiconductor layer in the recess is used, it is effective to generate cracks in the nitride semiconductor layer. In addition, the compositional variation in the thickness direction can be easily suppressed in the nitride semiconductor layer formed on the non-dig region.

  Thus, in the nitride semiconductor wafer according to the first aspect, the device characteristics can be prevented from deviating from the design by suppressing the composition variation in the thickness direction of the nitride semiconductor layer. Therefore, by forming a nitride semiconductor light emitting device using such a nitride semiconductor wafer, the device characteristics of the nitride semiconductor light emitting device can be improved. In addition, since variation in element characteristics can be suppressed, it is possible to suppress a decrease in the number of elements having characteristics within the standard range. Thereby, a yield can be improved. Further, in the first aspect, by causing the edge growth portion to be generated in the recess, it is possible to suppress the variation in the thickness of the nitride semiconductor layer formed on the non-digged region. For this reason, it is possible to suppress a decrease in element characteristics due to a variation in layer thickness. In addition, since variation in layer thickness can be suppressed from element to element, the yield can be further improved. Further, in the configuration of the first aspect, since the generation of cracks can be easily suppressed, element characteristics and yield can be further improved. In the first aspect, since the surface morphology can be prevented from deteriorating by configuring as described above, the device characteristics can be improved also by this.

  In the nitride semiconductor wafer according to the first aspect, it is preferable that the concave portion has a side surface portion and a bottom surface portion, and the growth suppressing film is formed on at least one of the side surface portion and the bottom surface portion. If comprised in this way, it can suppress that the composition fluctuation of a thickness direction arises in a nitride semiconductor layer, suppressing generation | occurrence | production of a crack easily. In addition, since it is possible to easily prevent the edge growth portion from being formed in the nitride semiconductor layer on the non-dig region, the layer thickness of the nitride semiconductor layer formed on the non-dig region can be easily determined. Can be suppressed.

  In the nitride semiconductor wafer according to the first aspect, the concave portion may have a side surface portion and a bottom surface portion, and the growth suppression film may be formed on a part of the bottom surface portion of the concave portion. With this configuration, a growth suppressing film having a predetermined shape can be easily formed in the recess, so that a nitride semiconductor wafer capable of improving element characteristics and yield can be easily obtained. .

  In the nitride semiconductor wafer according to the first aspect, the recess has a side surface and a bottom surface, and the growth suppressing film may be formed on both the side surface and the bottom surface of the recess.

  In this case, the growth suppression film is preferably configured such that the thickness of the portion formed on the side surface portion is smaller than the thickness of the portion formed on the bottom surface portion. If comprised in this way, defects, such as peeling of a growth suppression film | membrane, can be suppressed effectively.

  In the nitride semiconductor wafer according to the first aspect, the recess is preferably formed to extend in a predetermined direction. If comprised in this way, an element characteristic and a yield can be improved easily.

  In the nitride semiconductor wafer according to the first aspect, preferably, a plurality of recesses are formed in stripes. If comprised in this way, an element characteristic and a yield can be improved more easily.

  In the nitride semiconductor wafer according to the first aspect, an optical waveguide is preferably formed in the nitride semiconductor layer. If comprised in this way, the nitride semiconductor laser element excellent in the element characteristic can be formed with a sufficient yield.

  In the nitride semiconductor wafer according to the first aspect, the optical waveguide is preferably formed along the recess.

  The nitride semiconductor light emitting device according to the second aspect of the present invention is formed using the nitride semiconductor wafer according to the first aspect. If comprised in this way, the nitride semiconductor light-emitting element excellent in the element characteristic can be formed with a sufficient yield. In the nitride semiconductor light emitting element according to the second aspect, the nitride semiconductor substrate may or may not include a recess (digging region). Further, the nitride semiconductor substrate may include a part of the recess (digging region). Even when the nitride semiconductor substrate does not include a recess (digging region), a nitride semiconductor light emitting device having excellent device characteristics can be obtained with high yield.

  A nitride semiconductor light emitting device according to a third aspect of the present invention has a crystal growth surface, a digging region dug in the thickness direction from the crystal growth surface, and a non-digging region that is a non-digging region A nitride semiconductor substrate including: a growth suppression film that is formed in the digging region and suppresses crystal growth of the nitride semiconductor; and a nitride semiconductor layer formed on the crystal growth surface of the nitride semiconductor substrate. ing. The digging region includes a recess, and the growth suppression film is formed at a position lower than the crystal growth surface in the recess.

  In the nitride semiconductor light-emitting device according to the third aspect, as described above, the growth suppression film is formed in the digging region (in the recess), whereby the nitride semiconductor layer formed on the crystal growth surface has a thickness. It can suppress that the composition fluctuation of a direction arises. For this reason, since it can suppress that an element characteristic deviates from a design, the element characteristic of a nitride semiconductor light-emitting element can be improved. In addition, since variation in element characteristics can be suppressed, it is possible to suppress a decrease in the number of elements having characteristics within the standard range. Thereby, a yield can be improved.

  In the third aspect, as described above, the edge growth portion of the nitride semiconductor layer can be generated in the recess by forming the growth suppression film at a position lower than the crystal growth surface in the recess. . That is, it is possible to suppress the edge growth portion from being formed in the nitride semiconductor layer on the non-digged region. Thereby, the fluctuation | variation of the layer thickness of the nitride semiconductor layer formed on a non-digging area | region can be suppressed. Therefore, by configuring as described above, it is possible to suppress a decrease in element characteristics due to a variation in layer thickness. In addition, since variation in layer thickness can be suppressed from element to element, the yield can be further improved.

  Furthermore, in the third aspect, as described above, by forming the growth suppression film in the recess, it is possible to suppress the recess from being filled with the nitride semiconductor layer. For this reason, since a recess can be formed on the surface of the nitride semiconductor layer on the digging region (on the recess), it is caused by a lattice mismatch between the nitride semiconductor substrate and the nitride semiconductor layer. Even when the nitride semiconductor layer is distorted, the strain of the nitride semiconductor layer (nitride semiconductor layer formed on the non-dig region) is applied to the surface of the nitride semiconductor layer on the dig region (on the recess). It can relieve in the formed said hollow part. Thereby, it is possible to easily suppress the occurrence of cracks in the nitride semiconductor layer. As a result, device characteristics and yield can be further improved. In addition, the deterioration of the surface morphology can be suppressed by suppressing the recess from being filled with the nitride semiconductor layer. Therefore, the device characteristics can be improved also by this.

  In the nitride semiconductor light emitting device according to the third aspect, it is preferable that the recess has a side surface portion and a bottom surface portion, and the growth suppression film is formed on at least one of the side surface portion and the bottom surface portion. . If comprised in this way, it can suppress that the composition fluctuation of a thickness direction arises in a nitride semiconductor layer, suppressing generation | occurrence | production of a crack easily. In addition, since it is possible to easily prevent the edge growth portion from being formed in the nitride semiconductor layer on the non-dig region, the layer thickness of the nitride semiconductor layer formed on the non-dig region can be easily determined. Can be suppressed.

  In the nitride semiconductor light emitting device according to the third aspect, the recess has a side surface and a bottom surface, and the growth suppressing film may be formed on a part of the bottom surface of the recess. With this configuration, a growth suppressing film having a predetermined shape can be easily formed in the recess, and therefore a nitride semiconductor light emitting device capable of improving device characteristics and yield can be easily obtained. it can.

  In the nitride semiconductor light emitting device according to the third aspect, the recess has a side surface and a bottom surface, and the growth suppressing film may be formed on both the side surface and the bottom surface of the recess.

  In this case, the growth suppression film is preferably configured such that the thickness of the portion formed on the side surface portion is smaller than the thickness of the portion formed on the bottom surface portion. If comprised in this way, defects, such as peeling of a growth suppression film | membrane, can be suppressed effectively.

  In the nitride semiconductor light emitting device according to the third aspect, preferably, the side surface of the recess is formed of an inclined surface, and the recess is formed so that the opening width gradually increases upward. If comprised in this way, when forming a growth inhibitory film in a side part, a growth inhibitory film can be efficiently formed in a side part. Thereby, it is possible to suppress the occurrence of inconvenience that the growth suppressing film on the side surface portion becomes extremely thin and is not formed in a film shape, or the growth suppressing film is not formed on the side surface portion at all. In addition, even if it is a case where a growth suppression film | membrane is not formed in a side part, the side part of a recessed part can be formed in an inclined surface.

  In the nitride semiconductor light emitting device according to the third aspect, preferably, the growth suppressing film has a thickness that does not fill the recess. With this configuration, a recess can be easily formed on the surface of the nitride semiconductor layer on the digging region (on the concave portion), so that the nitride semiconductor layer can be more easily cracked. It can be easily suppressed.

  In the nitride semiconductor light emitting device according to the third aspect, the thickness of the growth suppressing film is preferably less than or equal to half the depth of the recess.

  In the nitride semiconductor light emitting device according to the third aspect, preferably, the crystal growth surface of the nitride semiconductor substrate is a semipolar surface or a nonpolar surface. With such a configuration, it is possible to reduce the influence of spontaneous polarization and piezo polarization on the active layer made of a nitride semiconductor, so that the light emission efficiency of the nitride semiconductor light emitting device can be improved. In the case where the crystal growth surface is a nonpolar surface or a semipolar surface, there is a disadvantage that the recess is easily filled with the nitride semiconductor layer as compared with the case where the crystal growth surface is a polar surface. However, by forming the growth suppressing film in the recess, it is possible to easily suppress the recess from being filled with the nitride semiconductor layer, so that the crystal growth surface of the nitride semiconductor substrate is a semipolar plane or Even when the nonpolar surface is used, it is possible to effectively suppress the occurrence of cracks in the nitride semiconductor layer. Further, it is possible to easily suppress the composition variation in the thickness direction from occurring in the nitride semiconductor layer formed on the non-dig region.

  In the nitride semiconductor light emitting device according to the third aspect, the crystal growth surface of the nitride semiconductor substrate is preferably an m-plane ({1-100} plane). With this configuration, it is possible to easily obtain a nitride semiconductor light emitting device capable of improving device characteristics and yield and improving light emission efficiency. Since the m plane is a stable nonpolar plane, crystal growth can be performed extremely stably. For this reason, since crystallinity can be improved, a high-performance nitride semiconductor light emitting device having excellent device characteristics can be obtained.

  In the nitride semiconductor light emitting device according to the third aspect, the growth suppression film can be composed of an oxynitride film or a nitride film.

  In the nitride semiconductor light emitting device according to the third aspect, the growth suppression film may be composed of an oxide film.

  In the nitride semiconductor light emitting device according to the third aspect, the growth suppression film may be composed of a silicon oxide film.

  In the nitride semiconductor light emitting device according to the third aspect, the nitride semiconductor layer preferably includes an AlGaN layer.

  In the nitride semiconductor light emitting device according to the third aspect, preferably, the recess is formed to extend in a predetermined direction. If comprised in this way, an element characteristic and a yield can be improved easily.

  In the nitride semiconductor light emitting device according to the third aspect, the opening width of the recess is preferably larger than the depth of the recess. If comprised in this way, it can suppress that the thickness of the growth suppression film | membrane formed in the bottom face part of a recessed part becomes too small. That is, when the opening width of the recess is made smaller than the depth of the recess, there may be a disadvantage that the thickness of the growth suppressing film formed on the bottom surface of the recess becomes too small. By making it larger than the depth of the recess, it is possible to suppress the occurrence of the inconvenience.

  In the nitride semiconductor light emitting device according to the third aspect, an optical waveguide is preferably formed in the nitride semiconductor layer. With this configuration, a nitride semiconductor laser element capable of improving element characteristics and yield can be easily obtained.

  A method for manufacturing a nitride semiconductor light emitting device according to a fourth aspect of the present invention includes a step of preparing a nitride semiconductor substrate having a crystal growth surface, and forming a recessed region dug into the nitride semiconductor substrate. A step of forming a growth suppressing film for suppressing crystal growth of the nitride semiconductor in the digging region, and a step of forming a nitride semiconductor layer on the crystal growth surface of the nitride semiconductor substrate. . The step of forming the digging region includes the step of forming a recess in the nitride semiconductor substrate by etching the crystal growth surface in the thickness direction, and the step of forming the growth suppression film is performed in the recess. A step of disposing a growth inhibiting film at a position lower than the crystal growth surface.

  In the method for manufacturing a nitride semiconductor light emitting device according to the fourth aspect, as described above, by forming a growth suppression film in the recess formed by etching, a nitride semiconductor layer formed on the crystal growth surface is formed. It is possible to suppress the composition variation in the thickness direction. For this reason, since it can suppress that an element characteristic deviates from a design, the element characteristic of a nitride semiconductor light-emitting element can be improved. In addition, since variation in element characteristics can be suppressed, it is possible to suppress a decrease in the number of elements having characteristics within the standard range. Thereby, a yield can be improved.

  Further, in the fourth aspect, as described above, the edge growth portion of the nitride semiconductor layer can be generated in the recess by disposing the growth suppression film at a position lower than the crystal growth surface in the recess. it can. That is, it is possible to suppress the edge growth portion from being formed in the nitride semiconductor layer on the non-digged region. Thereby, the fluctuation | variation of the layer thickness of the nitride semiconductor layer formed on a non-digging area | region can be suppressed. Therefore, by configuring as described above, it is possible to suppress a decrease in element characteristics due to a variation in layer thickness. In addition, since variation in layer thickness can be suppressed from element to element, the yield can be further improved.

  Furthermore, in the fourth aspect, as described above, by disposing the growth suppressing film in the recess, it is possible to suppress the recess from being filled with the nitride semiconductor layer. For this reason, since a recess can be formed on the surface of the nitride semiconductor layer on the digging region (on the recess), it is caused by a lattice mismatch between the nitride semiconductor substrate and the nitride semiconductor layer. Even when strain is generated in the nitride semiconductor layer, strain in the nitride semiconductor layer (nitride semiconductor layer formed on the non-dig region) is formed in the nitride semiconductor layer on the dig region (on the recess). It can relieve in the said hollow part made. Thereby, it is possible to easily suppress the occurrence of cracks in the nitride semiconductor layer. As a result, device characteristics and yield can be further improved. In addition, the deterioration of the surface morphology can be suppressed by suppressing the recess from being filled with the nitride semiconductor layer. Therefore, the device characteristics can be improved also by this.

  In the method for manufacturing a nitride semiconductor light emitting device according to the fourth aspect, preferably, the step of forming the concave portion includes a step of forming the concave portion so as to have a side surface portion and a bottom surface portion, and a growth suppressing film. The step of forming has a step of forming a growth suppressing film on at least one of the side surface portion and the bottom surface portion. If comprised in this way, it can suppress that the composition fluctuation of a thickness direction arises in a nitride semiconductor layer, suppressing generation | occurrence | production of a crack easily. In addition, since it is possible to easily prevent the edge growth portion from being formed in the nitride semiconductor layer on the non-dig region, the layer thickness of the nitride semiconductor layer formed on the non-dig region can be easily determined. Can be suppressed.

  In the method for manufacturing a nitride semiconductor light emitting device according to the fourth aspect, preferably, the step of forming the concave portion includes a step of forming the concave portion so as to have a side surface portion and a bottom surface portion, and a growth suppressing film. The step of forming has a step of forming a growth suppressing film on a part of the bottom surface portion of the recess. With this configuration, a growth suppressing film having a predetermined shape can be easily disposed in the recess, so that a nitride semiconductor light emitting device capable of improving device characteristics and yield can be easily obtained. Can do.

  In the method for manufacturing a nitride semiconductor light emitting device according to the fourth aspect, the step of forming the concave portion includes the step of forming the concave portion so as to have a side surface portion and a bottom surface portion, and forms a growth suppressing film. The step may include a step of forming a growth suppression film on both the side surface portion and the bottom surface portion in the recess.

  In the method for manufacturing a nitride semiconductor light emitting device according to the fourth aspect, preferably, the step of forming the growth suppression film includes the step of forming the growth suppression film in a thickness that does not fill the inside of the recess. With this configuration, a recess can be easily formed on the surface of the nitride semiconductor layer on the digging region (on the concave portion), so that the nitride semiconductor layer can be more easily cracked. It can be easily suppressed.

  In the method for manufacturing a nitride semiconductor light emitting device according to the fourth aspect, preferably, the step of forming the recess has a step of forming the opening width of the recess larger than the depth of the recess. If comprised in this way, it can suppress that the thickness of the growth suppression film | membrane arrange | positioned at the bottom face part of a recessed part becomes small too much. That is, when the opening width of the recess is made smaller than the depth of the recess, there may be a disadvantage that the thickness of the growth suppressing film formed on the bottom surface of the recess becomes too small. By making it larger than the depth of the recess, it is possible to suppress the occurrence of the inconvenience.

  As described above, according to the present invention, it is possible to easily obtain a nitride semiconductor wafer, a nitride semiconductor light emitting device, and a method for manufacturing a nitride semiconductor light emitting device capable of improving device characteristics and yield.

1 is a cross-sectional view schematically showing a nitride semiconductor wafer according to a first embodiment of the present invention. It is a top view of the board | substrate used for the nitride semiconductor wafer by 1st Embodiment of this invention. It is a section perspective view of the substrate used for the nitride semiconductor wafer by a 1st embodiment of the present invention. It is sectional drawing of the board | substrate used for the nitride semiconductor wafer by 1st Embodiment of this invention. It is sectional drawing which expanded and showed a part of board | substrate used for the nitride semiconductor wafer by 1st Embodiment of this invention. It is sectional drawing for demonstrating the structure of the semiconductor element layer of the nitride semiconductor wafer by 1st Embodiment of this invention. 1 is a plan view schematically showing a part of a nitride semiconductor wafer according to a first embodiment of the present invention. It is sectional drawing for demonstrating the structure of the nitride semiconductor wafer by 1st Embodiment of this invention. 1 is a plan view of a nitride semiconductor laser device according to a first embodiment of the present invention. FIG. 10 is a cross-sectional view schematically showing the nitride semiconductor laser device according to the first embodiment of the present invention (a view corresponding to a cross section taken along the line aa in FIG. 9). 1 is a cross-sectional view showing a part of a nitride semiconductor laser device according to a first embodiment of the present invention. FIG. 3 is a cross-sectional view for explaining the structure of the active layer of the nitride semiconductor laser device according to the first embodiment of the present invention. 1 is a perspective view of a nitride semiconductor laser device on which a nitride semiconductor laser element according to a first embodiment of the present invention is mounted. It is sectional drawing for demonstrating the crystal growth form of the nitride semiconductor in case the growth suppression film | membrane is not formed in the recessed part. It is sectional drawing for demonstrating the crystal growth form of the nitride semiconductor in case the growth suppression film | membrane is not formed in the recessed part. It is sectional drawing for demonstrating the crystal growth form of the nitride semiconductor in case the growth suppression film | membrane is not formed in the recessed part. It is sectional drawing for demonstrating the crystal growth form of the nitride semiconductor in case the growth suppression film | membrane is not formed in the recessed part. It is sectional drawing for demonstrating the effect | action of 1st Embodiment. It is sectional drawing for demonstrating the effect | action of 1st Embodiment. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is a figure which shows the X-ray-diffraction profile of the sample by the comparative example 1. It is a figure which shows the X-ray-diffraction profile of the sample by an Example. 6 is a schematic cross-sectional view of a sample according to Comparative Example 1. FIG. 6 is a schematic cross-sectional view of a sample according to Comparative Example 2. FIG. It is a cross-sectional schematic diagram of the sample by an Example. It is a cross-sectional SEM photograph of the sample by an Example. It is sectional drawing which showed typically the nitride semiconductor wafer by 2nd Embodiment of this invention. It is sectional drawing which expanded and showed a part of board | substrate used for the nitride semiconductor wafer by 2nd Embodiment of this invention. It is sectional drawing for demonstrating the structure of the nitride semiconductor wafer by 2nd Embodiment of this invention. 6 is a cross-sectional view schematically showing a nitride semiconductor laser device according to a second embodiment of the present invention. FIG. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 2nd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 2nd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 2nd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 2nd Embodiment of this invention. It is sectional drawing for demonstrating the nitride semiconductor wafer and nitride semiconductor laser element by 3rd Embodiment of this invention. It is sectional drawing for demonstrating the nitride semiconductor wafer and nitride semiconductor laser element by 4th Embodiment of this invention. It is sectional drawing for demonstrating the example of the other shape of a recessed part (digging area | region). It is sectional drawing for demonstrating the example of the other shape of a recessed part (digging area | region). It is a top view which shows an example at the time of forming a recessed part in a grid | lattice form. It is a top view which shows another example at the time of forming a recessed part in a grid | lattice form. It is a top view which shows another example at the time of forming a recessed part in a grid | lattice form.

DESCRIPTION OF EMBODIMENTS Embodiments embodying the present invention will be described in detail with reference to the drawings. In the following embodiments, a case where the present invention is applied to a nitride semiconductor laser element which is an example of a nitride semiconductor light emitting element will be described. In the following embodiments, “nitride semiconductor” refers to a semiconductor composed of Al _x Ga _y In _z N (0 ≦ x ≦ 1; 0 ≦ y ≦ 1; 0 ≦ z ≦ 1; x + y + z = 1). means.

(First embodiment)
FIG. 1 is a cross-sectional view schematically showing a nitride semiconductor wafer according to a first embodiment of the present invention. FIG. 2 is a plan view of a substrate used in the nitride semiconductor wafer according to the first embodiment of the present invention. FIG. 3 is a cross-sectional perspective view of a substrate used in the nitride semiconductor wafer according to the first embodiment of the present invention. 4 to 8 are views for explaining the structure of the nitride semiconductor wafer according to the first embodiment of the present invention. FIG. 2 shows a state in which the growth suppressing film is omitted. First, a nitride semiconductor wafer 100 according to a first embodiment of the present invention including a nitride semiconductor laser element will be described with reference to FIGS.

  As shown in FIG. 1, the nitride semiconductor wafer 100 according to the first embodiment includes an n-type GaN substrate 1 having an m-plane ({1-100} plane) which is a nonpolar plane as a crystal growth plane 1a. . The n-type GaN substrate 1 is an example of the “nitride semiconductor substrate” in the present invention. The n-type GaN substrate 1 has a plurality of recesses 2 formed by being dug in the thickness direction from the crystal growth surface 1a. As shown in FIGS. 2 and 3, these recesses 2 are formed so as to extend in the [0001] direction (c-axis direction), respectively, and in the [11-20] direction orthogonal to the [0001] direction. They are arranged at regular intervals in a period T (see FIG. 2) of about 150 μm to about 600 μm (for example, about 400 μm) in the (a-axis direction). That is, the plurality of recesses 2 are formed in stripes on the n-type GaN substrate 1. Further, as shown in FIGS. 1 and 4, in the n-type GaN substrate 1, a region where the concave portion 2 is formed (a dug region) is a dug region 3. On the other hand, a region where the recess 2 is not formed in the crystal growth surface 1a (a region not dug) is a non-digging region 4.

  Moreover, as shown in FIG. 5, each of the plurality of concave portions 2 includes a bottom surface portion 2a and a pair of side surface portions 2b. The pair of side surface portions 2b is set so that the inclination angle γ is larger than 90 degrees. Specifically, the inclination angle γ of the pair of side surface portions 2b is set to about 100 degrees, for example. For this reason, the side part 2b of the recessed part 2 is an inclined surface. Thereby, the recessed part 2 is formed so that opening width may become large gradually toward upper direction (from the bottom face part 2a toward an opening end).

  The recess 2 has an opening width g1 (width of the opening end) of about 10 μm in the [11-20] direction and a depth f of about 5 μm in the thickness direction of the n-type GaN substrate 1. doing. That is, each of the plurality of recesses 2 is configured such that the opening width g1 is larger than the depth f.

  Here, in the nitride semiconductor wafer 100 according to the first embodiment, as shown in FIGS. 1, 3, and 5, the crystal growth of the nitride semiconductor is suppressed in the digging region 3 (the region inside the recess 2). A growth suppressing film 5 is formed. The growth suppression film 5 is made of an AlN film that is a nitride film, and is formed to a thickness that does not fill the recess 2. Specifically, the growth suppression film 5 is formed so that the thickness t (see FIG. 5) is about 100 nm. The thickness t of the growth suppression film 5 is preferably less than or equal to half the depth f of the recess 2. If comprised in this way, it will become possible to suppress that the inside of the recessed part 2 is embedded with the growth suppression film | membrane 5, and it will become possible to acquire the suppression effect of a crack easily. It is also possible to easily suppress the composition variation in the n-type cladding layer described later.

  In the first embodiment, the growth suppression film 5 is formed in a region (position) lower than the crystal growth surface 1 a inside the recess 2. Specifically, as shown in FIGS. 3 and 5, in the first embodiment, the growth suppression film 5 extends in the [0001] direction (c-axis direction) on a part of the bottom surface portion 2 a of the recess 2. It is formed as follows. Note that the width w1 (see FIG. 5) of the growth suppression film 5 in the [11-20] direction is smaller than the width g2 (see FIG. 5) of the bottom surface 2a of the recess 2, for example, about 4 μm.

The nitride semiconductor wafer 100 according to the first embodiment has a structure in which a semiconductor element layer 10 made of a nitride semiconductor is formed on the crystal growth surface 1a of the n-type GaN substrate 1 as shown in FIG. Have. As shown in FIG. 6, the semiconductor element layer 10 is composed of a plurality of semiconductor layers including an active layer 13, and is formed on the n-type GaN substrate 1 by an epitaxial growth method such as a MOCVD (Metal Organic Chemical Vapor Deposition) method. They are sequentially formed on the crystal growth surface 1a. Specifically, an n-type cladding layer 11 (layer thickness: about 2.2 μm) made of n-type Al _0.05 Ga _0.95 N and an n-type guide made of n-type GaN are formed on the crystal growth surface 1 a of the n-type GaN substrate 1. Layer 12 (layer thickness: about 0.1 μm), active layer 13, evaporation prevention layer 14 (layer thickness: about 20 nm) made of p-type Al _0.15 Ga _0.85 N, p-type guide layer 15 (layer thickness) made of p-type GaN : P-type Al _0.05 Ga _0.95 N, p-type cladding layer 16 (layer thickness: about 0.5 μm) and p-type GaN p-type contact layer 17 (layer thickness: about 0.1 μm) Are sequentially formed. The n-type semiconductor layer constituting the semiconductor element layer 10 is doped with, for example, Si as an n-type impurity, and the p-type semiconductor layer is doped with, for example, Mg as a p-type impurity. ing. The n-type cladding layer 11 is an example of the “nitride semiconductor layer” in the present invention.

  Here, in the layer containing Al, Ga, and N contained in the semiconductor element layer 10, if a large amount of Al is contained, lattice mismatch with the n-type GaN substrate 1 is increased, so that cracks are generated. It tends to occur. In particular, the n-type cladding layer 11 has a high lattice mismatch with the n-type GaN substrate 1 because the Al composition ratio is set high in order to achieve good optical confinement. Since the thickness is as large as about 2.2 μm, the n-type cladding layer 11 is likely to crack.

  On the other hand, in the nitride semiconductor wafer 100 according to the first embodiment, as shown in FIG. 1, the growth suppressing film 5 is formed in the recess 2 (digging region 3), so that the recess 2 has the semiconductor element layer. 10 is suppressed from being embedded. For this reason, the depression 25 is formed in the surface of the semiconductor element layer 10 (the surface of each layer constituting the semiconductor element layer 10) on the recess 2 (digging region 3). The recesses 25 alleviate distortion of the n-type cladding layer 11 (see FIG. 6) caused by lattice mismatch with the n-type GaN substrate 1. Thereby, in the n-type clad layer 11 (see FIG. 6) formed on the non-digged region 4, occurrence of cracks is suppressed. In the first embodiment, occurrence of cracks is also suppressed in other semiconductor layers other than the n-type cladding layer 11.

  In the first embodiment, since the growth suppressing film 5 is formed in the recess 2, composition variation in the thickness direction is suppressed in the semiconductor element layer 10 formed on the non-digged region 4. . In particular, even in the n-type cladding layer 11 (see FIG. 6) in which composition variation is likely to occur, composition variation in the thickness direction is suppressed.

  Furthermore, in the first embodiment, the growth suppression film 5 is formed in a region (position) lower than the crystal growth surface 1a inside the recess 2, so that the semiconductor element layer 10 (semiconductor element) is formed as shown in FIG. The edge growth portion 26 of each layer constituting the layer 10 can be generated in the recess 2.

  Further, as shown in FIG. 1, a convex ridge portion 18 serving as a current passage portion is formed in a predetermined region of the semiconductor element layer 10 (a predetermined region on the non-digging region 4). As shown in FIG. 7, the ridge portion 18 is formed along the recess 2 (in parallel with the extending direction of the recess 2). Specifically, the ridge portion 18 extends in the [0001] direction (c-axis direction) and has a distance W1 of about 150 μm to about 600 μm (for example, about 400 μm) in the [11-20] direction (see FIG. 1). Are formed in a stripe shape by being spaced apart from each other. By forming the ridge portion 18, a stripe-shaped optical waveguide 19 is formed in the semiconductor element layer 10. As shown in FIG. 1, the ridge portion 18 is formed in a region on the non-dig region 4 that is separated from the recess 2 by a predetermined distance or more (for example, 5 μm or more). In addition, an insulating layer 20 for current confinement is formed on the upper surface of the semiconductor element layer 10 and on both sides of the ridge portion 18.

  A p-side electrode 21 for supplying current to the optical waveguide 19 (see FIG. 7) is formed on the semiconductor element layer 10. On the other hand, an n-side electrode 22 is formed on the back surface of the n-type GaN substrate 1.

  Further, as shown in FIG. 7, the nitride semiconductor wafer 100 is set with planned dividing lines P1 and P2 for separating into nitride semiconductor laser elements. The planned division line P1 is set to extend in the [11-20] direction, and the planned division line P2 is set to extend in the [0001] direction. Further, the planned dividing line P2 is set so that one nitride 2 is included in the nitride semiconductor laser element after the division.

  The nitride semiconductor wafer 100 according to the first embodiment configured as described above is divided into individual nitride semiconductor laser elements by being divided along the predetermined dividing lines P1 and P2.

  FIG. 9 is a plan view of the nitride semiconductor laser device according to the first embodiment of the present invention. FIG. 10 is a cross-sectional view schematically showing the nitride semiconductor laser device according to the first embodiment of the present invention. . FIG. 11 is a sectional view showing a part of the nitride semiconductor laser device according to the first embodiment of the present invention. FIG. 12 shows the structure of the active layer of the nitride semiconductor laser device according to the first embodiment of the present invention. It is sectional drawing for demonstrating. FIG. 13 is a perspective view of a nitride semiconductor laser device on which the nitride semiconductor laser element according to the first embodiment of the present invention is mounted. FIG. 10 shows a view corresponding to a cross section taken along the line aa in FIG. Next, a nitride semiconductor laser device 150 according to the first embodiment of the present invention will be described with reference to FIGS. Since the nitride semiconductor laser device 150 according to the first embodiment can be obtained from the nitride semiconductor wafer 100 according to the first embodiment described above, in the following description, the nitride obtained from the nitride semiconductor wafer 100 will be described. The semiconductor laser element 150 will be described as an example.

  As shown in FIG. 9, the nitride semiconductor laser device 150 according to the first embodiment includes a pair of resonators including a light emitting surface 30a from which laser light is emitted and a light reflecting surface 30b facing the light emitting surface 30a. It has a surface 30. The nitride semiconductor laser element 150 has a length L (chip length L (resonator length) of about 300 μm to about 1800 μm (for example, about 600 μm) in a direction ([0001] direction) orthogonal to the resonator surface 30. )) And a width W (chip width W) of about 150 μm to about 600 μm (for example, about 400 μm) in the direction along the resonator plane 30 ([11-20] direction). Yes.

Further, the nitride semiconductor laser device 150 according to the first embodiment includes an n-type GaN substrate 1 having an m-plane ({1-100} plane) as a crystal growth plane 1a as shown in FIGS. A semiconductor element layer 10 made of a nitride semiconductor is stacked on the crystal growth surface 1a (m-plane) of the n-type GaN substrate 1. Specifically, as shown in FIG. 11, the nitride semiconductor laser element 150 includes an n-type cladding layer 11 made of n-type Al _0.05 Ga _0.95 N having a thickness of about 2.2 μm on an n-type GaN substrate 1. Is formed. On the n-type cladding layer 11, an n-type guide layer 12 made of n-type GaN having a thickness of about 0.1 μm is formed. An active layer 13 is formed on the n-type guide layer 12.

As shown in FIG. 12, the active layer 13 includes two well layers 13a made of In _x1 Ga _1-x1 N and three barrier layers 13b made of In _x2 Ga _1-x2 N (where x1> x2). Have a quantum well (DQW; Double Quantum Well) structure. Specifically, in the active layer 13, the first barrier layer 131b, the first well layer 131a, the second barrier layer 132b, the second well layer 132a, and the third barrier layer 133b are sequentially stacked from the n-type guide layer 12 side. It is formed by being. The two well layers 13a (the first well layer 131a and the second well layer 132a) are each formed to a thickness of about 3 nm to about 4 nm. The first barrier layer 131b is formed with a thickness of about 30 nm, the second barrier layer 132b is formed with a thickness of about 16 nm, and the third barrier layer 133b is formed with a thickness of about 60 nm. ing. That is, the three barrier layers 13b are formed to have different thicknesses. The In composition ratio x1 of the well layer 13a is configured to be not less than 0.15 and not more than 0.45 (for example, 0.2 to 0.25). On the other hand, the barrier layer 13b is made of InGaN in order to efficiently confine light, and the In composition ratio x2 is, for example, 0.04 to 0.05.

Further, as shown in FIG. 11, an evaporation prevention layer 14 made of p-type Al _0.15 Ga _0.85 N having a thickness of about 20 nm is formed on the active layer 13. A p-type guide layer 15 made of p-type GaN having a convex portion and a flat portion other than the convex portion is formed on the evaporation prevention layer 14. A p-type cladding layer 16 made of p-type Al _0.05 Ga _0.95 N having a thickness of about 0.5 μm is formed on the convex portion of the p-type guide layer 15. A p-type contact layer 17 made of p-type GaN having a thickness of about 0.1 μm is formed on the p-type cladding layer 16. A striped (elongated) ridge portion having a width of about 1 μm to about 3 μm (for example, about 1.5 μm) is formed by the convex portion of the p-type guide layer 15, the p-type cladding layer 16, and the p-type contact layer 17. 18 is configured. The ridge portion 18 is formed so as to extend in the [0001] direction, and the stripe-shaped (elongated) active layer 13 located below the ridge portion 18 is an optical waveguide 19. The semiconductor element layer 10 is constituted by the n-type cladding layer 11, the n-type guide layer 12, the active layer 13, the evaporation prevention layer 14, the p-type guide layer 15, the p-type cladding layer 16 and the p-type contact layer 17. ing.

  Here, in the nitride semiconductor laser device 150 according to the first embodiment, the recess 2 described above is formed in a predetermined region of the n-type GaN substrate 1 as shown in FIG. The recess 2 is formed to extend in parallel ([0001] direction) with the ridge portion 18 (optical waveguide 19 (see FIG. 11)). The recess 2 is disposed on one side surface of the nitride semiconductor laser element 150. The ridge portion 18 is formed in a region on the non-digging region 4 that is separated from the recess 2 by a predetermined distance or more (for example, 5 μm or more).

  In the first embodiment, the growth suppression film 5 that suppresses the crystal growth of the nitride semiconductor is formed in a region (position) lower than the crystal growth surface 1 a inside the recess 2. As described above, the growth suppression film 5 is made of an AlN film that is a nitride film, and is formed to a thickness of about 100 nm that does not fill the recess 2. The growth suppression film 5 is formed on a part of the bottom surface 2a of the recess 2 so as to extend in the [0001] direction (c-axis direction). The growth suppressing film 5 suppresses the crystal growth of the nitride semiconductor in the region inside the recess 2, thereby forming a recess 25 on the surface of each layer constituting the semiconductor element layer 10. For this reason, the depression 25 is formed on the surface of the semiconductor element layer 10 on the recess 2 (digging region 3). As described above, the recess 25 suppresses the occurrence of cracks in the semiconductor element layer 10 including the n-type cladding layer 11.

  In the first embodiment, the composition variation in the thickness direction is suppressed in the semiconductor element layer 10 formed on the non-dig region 4.

  Furthermore, in the first embodiment, the growth suppressing film 5 is formed in a region (position) lower than the crystal growth surface 1a inside the recess 2, so that the semiconductor element layer 10 (each layer constituting the semiconductor element layer 10) is formed. ) Is generated in the recess 2.

In addition, as shown in FIG. 11, insulating layers 20 for current confinement are formed on both sides of the ridge portion 18. Specifically, a thickness of about 0.1 μm to about 0.3 μm (for example, about 0.15 μm) is formed on the p-type guide layer 15, the side surface of the p-type cladding layer 16, and the side surface of the p-type contact layer 17. An insulating layer 20 made of SiO ₂ is formed.

  A p-side electrode 21 is formed on the upper surfaces of the insulating layer 20 and the p-type contact layer 17 so as to cover a part of the p-type contact layer 17. The p-side electrode 21 is in direct contact with the p-type contact layer 17 in a portion covering the p-type contact layer 17. The p-side electrode 21 includes a Pd layer (not shown) having a thickness of about 15 nm, a Pt layer (not shown) having a thickness of about 15 nm, and about 200 nm from the insulating layer 20 (p-type contact layer 17) side. A multilayer structure in which Au layers (not shown) having a thickness of 1 are sequentially stacked.

  Further, on the back surface of the n-type GaN substrate 1, an Hf layer (not shown) having a thickness of about 5 nm and an Al layer (not shown) having a thickness of about 150 nm are sequentially formed from the back side of the n-type GaN substrate 1. ), A Mo layer (not shown) having a thickness of about 36 nm, a Pt layer (not shown) having a thickness of about 18 nm, and an Au layer (not shown) having a thickness of about 200 nm are sequentially stacked. An n-side electrode 22 made of is formed.

Further, on the light emitting surface 30a (see FIG. 9) of the nitride semiconductor laser element 150, for example, an emitting side coating film (not shown) having a reflectance of 5% to 80% is formed. On the other hand, on the light reflecting surface 30b (see FIG. 9), for example, a reflection side coating film (not shown) having a reflectance of 95% is formed. The reflectance of the exit side coating film is adjusted to a desired value by the oscillation output. In addition, the emission side coating film is, for example, aluminum oxynitride film or nitride film AlO _x N _1-x (0 ≦ x ≦ 1): film thickness 30 nm / Al ₂ O in order from the emission end face of the semiconductor. ₃ (film thickness: 215 nm), and the reflection-side coating film is formed of a multilayer film such as SiO ₂ or TiO ₂ . For example, a dielectric film such as SiN, ZrO ₂ , Ta ₂ O ₅ , or MgF ₂ may be used as a material other than the above.

As the film configuration on the light emitting surface side, AlO _x N _1-x (0 ≦ x ≦ 1): film thickness 12 nm / SiN which is a silicon nitride film (film thickness: 100 nm) may be used. As described above, an aluminum oxynitride film or nitride is formed on the cleaved end face (c face in the first embodiment) of the m-plane nitride semiconductor substrate, or on the etched end face etched by vapor phase etching or liquid phase etching. By forming AlO _x N _1-x (0 ≦ x ≦ 1), which is a film, the ratio of non-radiative recombination at the interface between the semiconductor and the emission side coating film can be greatly reduced, and COD (catalytic optical damage) The level can be improved significantly. Further, AlO _x N _1-x (0 ≦ x ≦ 1) which is an aluminum oxynitride film or nitride film is more preferably the same hexagonal crystal as the nitride semiconductor. Furthermore, it is more preferable to crystallize with the nitride semiconductor aligned with the crystal axis because the ratio of non-radiative recombination is further reduced and the COD level is further improved. In order to increase the reflectance on the light exit surface side, a silicon oxide film, an aluminum oxide film, a titanium oxide film, a tantalum oxide film, and a zirconium oxide film are formed on the coating film. Alternatively, a laminated film in which a silicon nitride film or the like is laminated may be formed.

  The nitride semiconductor laser device 150 according to the first embodiment configured as described above is mounted on a stem 162 via a submount 161 and is electrically connected to a lead pin by a wire 163 as shown in FIG. The Then, the cap 164 is welded onto the stem 162, whereby the can package type semiconductor laser device 160 is assembled.

  Next, the operation of the first embodiment will be described. In describing the operation of the first embodiment, first, the crystal growth mode of the nitride semiconductor when the growth suppressing film is not formed in the recess will be described.

  14 to 17 are cross-sectional views for explaining the crystal growth mode of the nitride semiconductor when the growth suppressing film is not formed in the recess. With reference to FIGS. 14 to 17, the knowledge obtained by examining the crystal growth mode of the nitride semiconductor when the growth suppressing film is not formed when the inventors of the present application arrive at the present invention will be described.

  First, as shown in FIG. 14, for the purpose of suppressing cracks, the inventors of the present application have grown a nonpolar plane and a semipolar plane in which a digging region 3 (recess 2) similar to that of the first embodiment is formed. When an AlGaN layer 1001 similar to the n-type cladding layer of the first embodiment is grown on the nitride semiconductor substrate 1000 as a surface, the Al composition ratio of the AlGaN layer 1001 formed on the non-dig region 4 Was found to have a distribution in the thickness direction. That is, it was found that composition variation in the thickness direction occurs in the AlGaN layer 1001. Further, when the AlGaN layer 1001 is grown on the nitride semiconductor substrate 1000 under the condition that the Al composition ratio of the AlGaN layer 1001 is 0.05, a region having a high Al composition with a maximum Al composition ratio of about 0.15 is obtained. I found out that Note that such a composition variation in the thickness direction is more strongly observed when a substrate having a nonpolar or semipolar surface as a crystal growth surface is used than when a substrate having a polar surface as a crystal growth surface is used. It was confirmed that In addition, the inventors of the present application, when using a substrate having a nonpolar plane or a semipolar plane as a crystal growth surface, compared to using the substrate having a polar plane as a crystal growth plane in the recess 2 (digging). It has also been found that there is a disadvantage that the buried region 3) is easily filled with the AlGaN layer 1001 (semiconductor layer).

  Therefore, the inventors of the present application investigated in detail the cause of the composition variation of the Al composition as described above. As a result, it was clarified that the composition fluctuation was caused by the following causes. Hereinafter, the cause of the composition variation in the thickness direction will be described.

Using a MOCVD apparatus, for example, a semiconductor layer 1001 made of n-type Al _0.05 Ga _0.95 N is formed to a predetermined thickness (eg, about 2.2 μm) on the crystal growth surface of the nitride semiconductor substrate 1000 at a substrate temperature of about 1100 ° C. 15, as shown in FIG. 15, in the initial stage of growth, the growth rate of the semiconductor layer 1001 a formed in the recess 2 is the same as that of the semiconductor layer 1001 b formed on the non-digging region 4. Very fast compared to speed. Further, since the Al diffusion constant is smaller than the Ga diffusion constant, Ga flows preferentially into the recess 2 having a high growth rate. Therefore, the semiconductor layer 1001b on the non-digging region 4 is an AlGaN layer, but the semiconductor layer 1001a in the recess 2 (digging region 3) where the supply of Al is small may be a GaN layer or non-digging. The AlGaN layer has an Al composition ratio smaller than that of the semiconductor layer 1001b on the region 4. In the growth so far, Ga is preferentially supplied into the recess 2, so that the Al composition ratio of the semiconductor layer 1001 b on the non-dig region 4 becomes higher than the design value.

  When the recess 2 is filled with the semiconductor layer as the crystal growth proceeds, the growth rate of the semiconductor layer 1001 formed in the recess 2 becomes slow. As a result, Al that diffuses more slowly than Ga is also supplied into the recess 2. Therefore, as shown in FIG. 16, a region 1001 c having a small Al composition ratio is formed in the semiconductor layer on the non-dig region 4. In particular, immediately before the recess 2 is completely buried, the growth rate of the semiconductor layer 1001 formed in the recess 2 is slowed, so that a region with a small Al composition ratio is formed in the semiconductor layer on the non-dig region 4. It becomes easy.

  When the recess 2 is completely filled, only Ga does not preferentially flow into the recess 2, and therefore, as shown in FIG. 17, the semiconductor layer 1001 d ( The Al composition ratio of 1001) is a low value.

  Thus, when the semiconductor layer made of a nitride semiconductor is crystal-grown on the nitride semiconductor substrate in which the recess (digging region) is formed, the growth rate of the semiconductor layer in the recess changes. The change in the growth rate affects the composition of the semiconductor layer formed on the non-dig region, and as a result, composition variation in the thickness direction occurs in the semiconductor layer on the non-dig region.

  18 and 19 are cross-sectional views for explaining the operation of the first embodiment. Next, the operation of the first embodiment will be described with reference to FIGS. 18 and 19.

  In the first embodiment, as shown in FIG. 18, when the n-type cladding layer 11 is grown on the crystal growth surface 1 a of the n-type GaN substrate 1, the growth formed in the recess 2 of the n-type GaN substrate 1. The suppression film 5 suppresses crystal growth of the n-type cladding layer 11 in the recess 2. For this reason, the growth rate of the n-type cladding layer 11 formed in the recess 2 is suppressed from being higher than the growth rate of the n-type cladding layer 11 formed on the non-digging region 4. Thereby, it is suppressed that Ga flows into the recessed part 2 preferentially. Further, as shown in FIG. 19, even when crystal growth of the n-type cladding layer 11 proceeds, crystal growth of the n-type cladding layer 11 in the recess 2 is suppressed, so that the n-type cladding layer 11 in the recess 2. The growth rate is kept constant. That is, a change in the growth rate of the n-type cladding layer 11 in the recess 2 is suppressed. For this reason, it is suppressed that the composition fluctuation of the thickness direction arises in the n-type cladding layer 11 formed on the non-digging region 4.

  Moreover, even when the n-type GaN substrate 1 having the m-plane as the crystal growth surface 1a is used because the growth suppressing film 5 is formed in the recess 2, the recess 2 is n-type. Filling with the cladding layer 11 is suppressed. For this reason, it can be set as the state by which the hollow 25 was formed in the surface of the n-type clad layer 11. FIG. Then, the formation of cracks in the n-type cladding layer 11 is suppressed by the depressions 25 formed on the surface of the n-type cladding layer 11.

  Furthermore, since the growth suppression film 5 is formed in a region (position) lower than the crystal growth surface 1 a inside the recess 2, the edge growth portion 26 of the n-type cladding layer 11 can be generated in the recess 2. It becomes. For this reason, it becomes possible to keep the surface of the n-type cladding layer 11 (the surface of the n-type cladding layer 11 on the non-dig region 4) flat. In addition, variations in layer thickness are also suppressed.

  In the first embodiment, as described above, the growth suppressing film 5 is formed in the digging region 3 (in the recess 2), so that the n-type cladding layer 11 formed on the crystal growth surface 1a has a thickness direction. It is possible to suppress the composition variation. For this reason, since the composition of the n-type cladding layer 11 can be made uniform, the light confinement of the nitride semiconductor laser device deviates from the design, and the occurrence of the disadvantage that the expected light confinement is not performed can be suppressed. it can. Thereby, the element characteristics of the nitride semiconductor laser element can be improved. In addition, since variation in element characteristics can be suppressed, it is possible to suppress a decrease in the number of elements having characteristics within the standard range. Thereby, a nitride semiconductor laser device can be obtained with a high yield.

  In the first embodiment, the edge growth portion 26 of the n-type cladding layer 11 is generated in the recess 2 by forming the growth suppressing film 5 at a position lower than the crystal growth surface 1 a in the recess 2. it can. That is, it is possible to suppress the edge growth portion 26 from being formed in the n-type cladding layer 11 on the non-dig region 4. Thereby, the fluctuation | variation of the layer thickness of the n-type clad layer 11 formed on the non-digging area | region 4 can be suppressed. Therefore, by configuring as described above, it is possible to suppress a decrease in element characteristics due to a variation in layer thickness. In addition, since variation in layer thickness can be suppressed from element to element, the yield can be further improved.

  Further, in the first embodiment, by forming the growth suppression film 5 in the recess 2, it is possible to suppress the recess 2 from being filled with the n-type cladding layer 11. For this reason, since the depression 25 can be formed on the surface of the n-type cladding layer 11 (on the surface of the semiconductor element layer 10) on the digging region 3 (on the recess 2), the n-type GaN substrate 1 and the n-type Even if the n-type cladding layer 11 is distorted due to lattice mismatch with the cladding layer 11, the strain of the n-type cladding layer 11 (the n-type cladding layer 11 formed on the non-digging region 4) Can be mitigated by the above-described depression formed on the surface of the n-type cladding layer 11 on the digging region 3 (on the recess 2). Thereby, it is possible to easily suppress the occurrence of cracks in the n-type cladding layer 11. As a result, device characteristics and yield can be further improved. Even if there is an abnormal portion in a part of the wafer (substrate) and the layer thickness fluctuates due to this, the growth in the [11-20] direction is caused by the depression 25 on the surface of the semiconductor element layer on the recess 2. Therefore, the diffusion of the layer thickness fluctuation caused by the abnormal part is suppressed. Moreover, the deterioration of the surface morphology can also be suppressed by suppressing the recess 2 from being buried with the n-type cladding layer 11. Therefore, the device characteristics can be improved also by this.

  In the first embodiment, the growth suppression film 5 is formed to a thickness that does not embed the inside of the concave portion 2, so that the surface of the n-type cladding layer 11 on the digging region 3 (on the concave portion 2) can be easily depressed. Therefore, it is possible to more easily suppress the occurrence of cracks in the n-type cladding layer 11.

  In the first embodiment, the growth suppression film 5 is made of an AlN film that is an aluminum nitride film, thereby suppressing cracks, improving the surface morphology, and changing the Al composition of the n-type cladding layer 11. A high effect can be obtained in all of the suppression effects. In addition, since AlN can have a crystal structure similar to that of a nitride semiconductor, the crystal structure can be made continuous between the growth suppression film 5 and where the growth suppression film 5 is not provided. For this reason, it can be said that AlN is suitable as a material for the growth suppression film.

  In the first embodiment, by using the n-type GaN substrate 1 in which the crystal growth surface 1a is a non-polar m-plane ({1-100} plane), spontaneous polarization or piezo-polarization exerted on the active layer 13 is used. Therefore, the light emission efficiency of the nitride semiconductor laser device can be improved. Since the m-plane is a stable nonpolar plane, crystal growth can be performed extremely stably, and crystallinity can be improved as compared with the case where the c-plane is used as the crystal growth plane. Therefore, a high-performance nitride semiconductor laser element having excellent element characteristics can be obtained.

  Further, in the first embodiment, by configuring the opening width g1 of the recess 2 to be larger than the depth f of the recess 2, the thickness of the growth suppressing film 5 formed on the bottom surface portion 2a of the recess 2 becomes too small. Can be suppressed. That is, when the opening width g1 of the concave portion 2 is set to a size equal to or smaller than the depth f of the concave portion 2, there is a case where the thickness of the growth suppressing film 5 formed on the bottom surface portion 2a of the concave portion 2 becomes too small. On the other hand, by making the opening width g <b> 1 of the recess 2 larger than the depth f of the recess 2, it is possible to suppress the above inconvenience.

  20 to 35 are views for explaining a method of manufacturing the nitride semiconductor laser element according to the first embodiment of the present invention. A method for manufacturing the nitride semiconductor laser device 150 according to the first embodiment of the present invention will now be described with reference to FIGS. 1, 7, 10 to 12 and 20 to 35.

  First, an n-type GaN substrate 1 having the m-plane ({1-100} plane) as the crystal growth plane 1a is prepared. The n-type GaN substrate 1 can be produced by cutting out from a GaN single crystal having a c-plane ((0001) plane) as a main surface, for example. The m-plane of the cut out substrate is adjusted to a predetermined surface roughness by, for example, chemical mechanical polishing.

Next, as shown in FIG. 20, a SiO ₂ layer 40 having a thickness of about 1 μm is formed on the entire upper surface (crystal growth surface 1a) of the n-type GaN substrate 1 by using a sputtering method or the like. Next, as illustrated in FIG. 21, a resist layer 41 having an opening 41 a as a resist pattern is formed on the SiO ₂ layer 40 by using a photolithography technique. Then, as shown in FIG. 22, by using a dry etching technique such as RIE (Reactive Ion Etching), the SiO ₂ layer 40 is etched using the resist layer 41 as a mask, so that a predetermined region of the SiO ₂ layer 40 is selectively selected. To remove. Thereafter, the resist layer 41 is removed using a resist stripping solution or an organic solvent (for example, acetone, ethanol, etc.). Note that the next step may be performed as it is without removing the resist layer 41.

Subsequently, as shown in FIG. 23, by using the ICP (Inductively Coupled Plasma) method or the RIE method, the n-type GaN substrate 1 is etched using the SiO ₂ layer 40 as a mask. The predetermined region of the n-type GaN substrate 1 is selectively removed. At this time, the etching conditions are adjusted so that the etching depth f of the n-type GaN substrate 1 is about 5 μm. As a result, the recess 2 described above is formed in the n-type GaN substrate 1. The side surface portion 2b of the recess 2 is formed so that the inclination angle γ is greater than 90 degrees by adjusting the etching conditions and the like. Specifically, the concave portion 2 is formed so that the inclination angle γ of the side surface portion 2b is about 100 degrees.

Thereafter, as shown in FIG. 24, the SiO ₂ layer 40 (see FIG. 23) is removed using an etchant such as HF (hydrogen fluoride).

  Next, as shown in FIG. 25, a resist layer 42 having openings 42a as a resist pattern is formed using a photolithography technique. At this time, the opening 42 a of the resist layer 42 is formed so as to expose a part of the bottom surface 2 a of the recess 2. The opening width j1 of the opening 42a is smaller than the width g2 of the bottom surface 2a of the recess 2, for example, about 4 μm.

  Next, as shown in FIG. 26, an AlN film 5a as a growth suppression film is formed on the entire surface with a thickness of about 100 nm by sputtering using an ECR (Electron Cyclotron Resonance) sputtering apparatus. Then, as shown in FIG. 27, the resist layer 42 (see FIG. 26) is removed using a resist stripping solution or an organic solvent (for example, acetone, ethanol, etc.). Thus, the growth suppression film 5 made of an AlN film is formed on a part of the bottom surface 2a of the recess 2 by lift-off.

Next, as shown in FIG. 28, the semiconductor element layer 10 is formed on the crystal growth surface 1a of the n-type GaN substrate 1 (processed substrate) processed as described above by using an epitaxial growth method such as MOCVD. To do. Specifically, on the crystal growth surface 1a of the n-type GaN substrate 1, an n-type cladding layer 11 made of n-type Al _0.05 Ga _0.95 N having a thickness of about 2.2 μm and an n-type having a thickness of about 0.1 μm. An n-type guide layer 12 made of type GaN and an active layer 13 are sequentially grown. When the active layer 13 is grown, as shown in FIG. 12, two well layers 13a made of In _x1 Ga _{1 -x1} N and three barrier layers 13b made of In _x2 Ga _{1 -x2} N are used. (Where x1> x2) are grown alternately. Specifically, on the n-type guide layer 12, from the lower layer to the upper layer, the first barrier layer 131b having a thickness of about 30 nm, the first well layer 131a having a thickness of about 3 nm to about 4 nm, A second barrier layer 132b having a thickness, a second well layer 132a having a thickness of about 3 nm to about 4 nm, and a third barrier layer 133b having a thickness of about 60 nm are sequentially grown. As a result, an active layer 13 having a DQW structure composed of two well layers 13 a and three barrier layers 13 b is formed on the n-type guide layer 12. At this time, the well layer 13a is configured such that its In composition ratio x1 is not less than 0.15 and not more than 0.45 (for example, 0.2 to 0.25). On the other hand, the barrier layer 13b is configured such that its In composition ratio x2 is, for example, 0.04 to 0.05.

Next, as shown in FIG. 28, on the active layer 13, an evaporation preventing layer 14 made of p-type Al _0.15 Ga _0.85 N having a thickness of about 20 nm, and a p-type made of p-type GaN having a thickness of about 0.05 μm. The p-type cladding layer 16 made of p-type Al _0.05 Ga _0.95 N having a thickness of about 0.5 μm and the p-type contact layer 17 made of p-type GaN having a thickness of about 0.1 μm are successively grown. .

As the growth material for these nitride semiconductor, for example, trimethyl gallium as a raw material of Ga: a _{((CH 3) 3 Ga TMGa} ), trimethyl aluminum as a raw material for Al: a _{((CH 3) 3 Al TMAl} ) Trimethylindium ((CH ₃ ) ₃ In: TMIn) can be used as the In source and NH ₃ can be used as the N source. As the carrier gas, for example, H ₂ can be used. As for the dopant, for example, monosilane (SiH ₄ ) can be used as the n-type dopant (n-type impurity), and as the p-type dopant (p-type impurity), for example, cyclopentadienyl magnesium (CP ₂ Mg). ) Can be used.

  Here, in the first embodiment, as shown in FIG. 29, by forming the growth suppressing film 5 in the recess 2, the recess 2 is suppressed from being filled with the semiconductor element layer 10. Therefore, the recess 25 is formed on the surface of the semiconductor element layer 10 on the recess 2 (the surface of each layer constituting the semiconductor element layer 10). The recess 25 alleviates distortion of the n-type cladding layer 11 (see FIG. 28) caused by lattice mismatch with the n-type GaN substrate 1 and the like. Further, by forming the growth suppressing film 5 in the recess 2, the composition variation in the thickness direction is suppressed in the semiconductor element layer 10 formed on the non-dig region 4 (see FIG. 1). In particular, even in the n-type cladding layer 11 (see FIG. 28) in which composition variation is likely to occur, composition variation in the thickness direction is suppressed. Further, by forming the growth suppressing film 5 in a region (position) lower than the crystal growth surface 1a inside the recess 2, the edge growth portion 26 of the semiconductor element layer 10 (each layer constituting the semiconductor element layer 10) is recessed. 2 is formed.

Subsequently, as shown in FIG. 30, the p-type contact layer 17 has a width of about 1 μm to about 3 μm (for example, about 1.5 μm) and is parallel to the [0001] direction by using a photolithography technique. An extending stripe (elongated) resist 43 is formed. Then, as shown in FIG. 31, using the RIE method or the ICP dry etching method using chlorine-based gas such as SiCl ₄ and Cl ₂ , Ar gas, or the like, the resist 43 is used as a mask and the middle of the p-type guide layer 15 is used. Etching to depth. As a result, the convex portion of the p-type guide layer 15, the p-type cladding layer 16, and the p-type contact layer 17 are formed, and stripe-shaped (elongated) ridge portions 18 (parallel to each other in the [0001] direction) ( 7 and 10) is formed.

Next, as shown in FIG. 32, SiO ₂ having a thickness of about 0.1 μm to about 0.3 μm (for example, about 0.15 μm) by sputtering or the like with the resist 43 left on the ridge portion 18. An insulating layer 20 made of is formed, and the ridge portion 18 is embedded. Then, the resist 43 is removed by lift-off to expose the p-type contact layer 17 on the upper portion of the ridge portion 18. As a result, insulating layers 20 as shown in FIG. 33 are formed on both sides of the ridge portion 18.

  Next, as shown in FIG. 34, a Pd layer (not shown) having a thickness of about 15 μm and an Au layer having a thickness of about 200 nm are formed from the substrate side (insulating layer 20 side) using a vacuum deposition method or the like. By sequentially forming (not shown), the p-side electrode 21 having a multilayer structure is formed on the insulating layer 20 (p-type contact layer 17).

  Next, in order to make it easy to divide the substrate, the back surface of the n-type GaN substrate 1 is ground or polished to reduce the thickness of the n-type GaN substrate 1 to about 100 μm. As shown in FIGS. 1, 10, and 11, Hf having a thickness of about 5 nm from the back surface side of the n-type GaN substrate 1 is formed on the back surface of the n-type GaN substrate 1 using a vacuum deposition method or the like. A layer (not shown), an Al layer (not shown) having a thickness of about 150 nm, a Mo layer (not shown) having a thickness of about 36 nm, a Pt layer (not shown) having a thickness of about 18 nm, and about By sequentially forming an Au layer (not shown) having a thickness of 200 nm, the n-side electrode 22 having a multilayer structure is formed.

  Thus, the nitride semiconductor wafer according to the first embodiment described above is formed.

Thereafter, as shown in FIG. 35, the substrate is divided into bars by using a scribing / breaking method, laser scribing, or dry etching. Thereby, a bar-shaped element having the end face as the resonator face 30 is obtained. Next, a coating is applied to the end face (resonator face 30) of the bar-like element using a technique such as vapor deposition or sputtering. Specifically, an emission side coating film (not shown) made of, for example, an oxynitride film of aluminum is formed on one end face serving as a light emission surface. In addition, a reflection-side coating film (not shown) made of a multilayer film such as SiO ₂ or TiO ₂ is formed on the opposite end face serving as the light reflection surface.

  Finally, the bar-shaped element is divided along the planned dividing line P2 along the c-axis [0001] direction, so that individual nitride semiconductor laser elements are separated. Thus, the nitride semiconductor laser device 150 according to the embodiment of the present invention is manufactured.

  In the method for manufacturing the nitride semiconductor laser device 150 according to the first embodiment, as described above, the growth suppression film 5 is formed in the recess 2 formed by etching, thereby forming the n-type formed on the crystal growth surface 1a. It is possible to suppress the composition variation in the thickness direction from occurring in the cladding layer 11. For this reason, it is possible to suppress the inconvenience that the light confinement of the nitride semiconductor laser element deviates from the design and the expected light confinement is not performed. Thereby, the element characteristics of the nitride semiconductor laser element can be improved. In addition, since variation in element characteristics can be suppressed, it is possible to suppress a decrease in the number of elements having characteristics within the standard range. Thereby, a nitride semiconductor laser device can be manufactured with a high yield.

  In the first embodiment, the edge growth portion 26 of the n-type cladding layer 11 is formed in the recess 2 by disposing the growth suppression film 5 made of an AlN film at a position lower than the crystal growth surface 1 a in the recess 2. Can be generated. That is, it is possible to suppress the edge growth portion 26 from being formed in the n-type cladding layer 11 on the non-dig region 4. Thereby, the fluctuation | variation of the layer thickness of the n-type clad layer 11 formed on the non-digging area | region 4 can be suppressed. Therefore, by configuring as described above, it is possible to suppress a decrease in element characteristics due to a variation in layer thickness. In addition, since variation in layer thickness can be suppressed from element to element, the yield can be further improved.

  Furthermore, in the first embodiment, by disposing the growth suppressing film 5 in the recess 2, it is possible to suppress the recess 2 from being filled with the n-type cladding layer 11 (semiconductor element layer 10). . For this reason, since the depression 25 can be formed on the surface of the n-type cladding layer 11 on the recess 2, the n-type GaN substrate 1 and the n-type cladding layer 11 cause n mismatch. Even when strain is generated in the mold cladding layer 11, the strain in the n-type cladding layer 11 (the n-type cladding layer 11 formed on the non-digging region 4) is reduced to n on the recess 2 (on the digging region 3). It can be relieved at the above-mentioned depression formed in the mold cladding layer 11. Thereby, it is possible to easily suppress the occurrence of cracks in the n-type cladding layer 11. As a result, device characteristics and yield can be further improved. In addition, the deterioration of the surface morphology can also be suppressed by suppressing the recess 2 from being buried with the n-type cladding layer 11. Therefore, the device characteristics can be improved also by this.

  In the first embodiment, the thickness t of the growth suppression film 5 is set to be equal to or less than half the depth f of the recess 2 to easily suppress the recess 2 from being completely filled with the growth suppression film 5. be able to.

  In the first embodiment, the growth suppression film 5 having a predetermined shape can be easily formed in the recess 2 by forming the growth suppression film 5 on a part of the bottom surface portion 2 a of the recess 2. . Therefore, it is possible to easily obtain a nitride semiconductor laser element capable of improving element characteristics and yield. Note that the edge growth portion 26 is formed in the n-type cladding layer 11 (semiconductor element layer 10) on the non-digging region 4 by forming the growth suppressing film 5 on a part of the bottom surface portion 2 a in the recess 2. Can be easily suppressed. For this reason, it can suppress easily that the layer thickness of the n-type clad layer 11 (semiconductor element layer 10) formed on the non-digging region 4 fluctuates.

  Next, an experiment conducted for confirming the effect of the first embodiment will be described.

  In this experiment, first, in order to confirm the effect of suppressing the composition fluctuation by the growth suppressing film, thin film evaluation by X-ray and cross-sectional observation by SEM (Scanning Electron Microscope) were performed. A sample in which a semiconductor element layer similar to that of the first embodiment is formed using a substrate similar to the n-type GaN substrate shown in the first embodiment is used as an example, and a growth suppression film is formed in the recess. A sample in which a semiconductor element layer similar to that of the first embodiment was formed using a non-substrate was used as Comparative Example 1. The sample according to Comparative Example 1 had the same configuration as the sample according to the example except that the growth suppressing film was not formed in the recess.

  In the thin film evaluation by X-ray, the sample according to the example and the sample according to comparative example 1 were set in an X-ray diffractometer, and a profile was obtained by performing 2θ / ω scanning. The obtained profile is shown in FIGS. FIG. 36 is a diagram showing an X-ray diffraction profile of a sample according to Comparative Example 1, and FIG. 37 is a diagram showing an X-ray diffraction profile of a sample according to the example. 36 and 37, the horizontal axis indicates 2θ / ω [°], and the vertical axis indicates intensity (Intensity) [cps].

  In the X-ray diffraction profiles shown in FIGS. 36 and 37, the peak of A (peak A) is a signal from the GaN substrate, and the peak of B (peak B) is a signal from the n-type cladding layer.

  In the sample according to Comparative Example 1, the peak B of the X-ray diffraction profile is separated into three as shown in FIG. The position of the peak B in the horizontal axis direction reflects the Al composition, and since the peak B is separated into three peaks, in Comparative Example 1, in the n-type cladding layer, the Al composition ratio is It can be seen that it fluctuates greatly. On the other hand, in the sample according to the example, as shown in FIG. 37, the peak B of the X-ray diffraction profile shows a single peak. From this, it can be seen that in the example, the Al composition ratio does not change in the n-type cladding layer. Further, when a cross-sectional SEM observation was performed using the sample according to the example and the sample according to comparative example 1, in the sample according to comparative example 1, in the n-type cladding layer, a dark region (dark region) and a bright region (color) Are thin layers). Here, a region with a large Al composition ratio looks dark, and a region with a small Al composition ratio looks bright. For this reason, in Comparative Example 1, an image showing Al composition variation was observed as a difference in contrast (difference in brightness). From this, it was confirmed that in Comparative Example 1 in which the growth suppressing film was not formed in the recess, composition variation in the thickness direction occurred in the n-type cladding layer. On the other hand, in the sample according to the example, no contrast difference was observed in the n-type cladding layer. Thus, as a result of thin film evaluation by X-rays and cross-sectional SEM observation, it was found that in the examples, compositional variation in the thickness direction in the n-type cladding layer was greatly suppressed. From this, it was confirmed that the composition fluctuation in the thickness direction in the n-type cladding layer (semiconductor element layer) can be suppressed by forming the growth suppressing film in the recess. In addition, by suppressing the composition variation of the n-type cladding layer, the variation of FFP (far field image) was greatly improved when the nitride semiconductor laser element was formed, and the effect of improving the yield was recognized.

  Next, cross-sectional SEM observation was performed in order to confirm the effect of improving the surface morphology by the growth suppressing film. When performing cross-sectional SEM observation, a sample according to Comparative Example 2 in which a semiconductor element layer similar to that in the first embodiment was formed using a substrate in which a growth suppression film was formed on the entire surface in the recess (bottom surface and side surface). It was prepared additionally. The sample according to Comparative Example 2 has the same configuration as the sample according to the example except that the growth suppression film is formed to the same height as the crystal growth surface. And in addition to the sample by an Example and the sample by the comparative example 1, the sample by the comparative example 2 was also used for cross-sectional SEM observation.

  FIG. 38 is a schematic cross-sectional view of a sample according to Comparative Example 1, and FIG. 39 is a schematic cross-sectional view of a sample according to Comparative Example 2. FIG. 40 is a schematic cross-sectional view of a sample according to the example, and FIG. 41 is a cross-sectional SEM photograph of the sample according to the example.

  As a result of cross-sectional SEM observation, in the sample according to Comparative Example 1 in which the growth suppressing film is not formed in the recess 2, the recess 2 (digging region) is completely filled with the semiconductor element layer 10 as shown in FIG. Thus, no depression is seen on the surface of the semiconductor element layer 10 on the recess 2 (on the dug area). Moreover, a wavy unevenness appears strongly in parallel with the [11-20] direction, and the surface morphology is deteriorated. This deterioration of the surface morphology is caused by fluctuations in the thickness of the semiconductor element layer 10. From this, it was observed that the sample according to Comparative Example 1 had a layer thickness distribution in the wafer plane. Further, the in-plane distribution of the layer thickness tends to appear remarkably after the concave portion 2 (digging region) is completely filled and the surface of the semiconductor element layer on the concave portion 2 (digging region) disappears. It was recognized that there was.

  Further, in the sample according to Comparative Example 2, as shown in FIG. 39, the growth suppressing film 1005 is formed on the side surface and the bottom surface of the recess 2 so that the semiconductor element layer 10 on the recess 2 (on the digging region) is formed. A depression is formed on the surface. Moreover, it was observed that the wavy unevenness appearing in parallel with the [11-20] direction seen in Comparative Example 1 was significantly suppressed, and the in-plane distribution of the layer thickness was also improved. However, in the sample according to Comparative Example 2, it was observed that the edge growth portion 26 was formed around the growth suppression film 1005 on the non-digging region. It was recognized that the edge growth portion 26 caused a variation in the thickness of the semiconductor element layer 10 on the non-dig region.

On the other hand, in the sample according to the example, it was observed that the edge growth portion 26 was generated in the recess 2 as shown in FIGS. Thereby, it was recognized that the layer thickness fluctuation | variation of the semiconductor element layer 10 was suppressed on the non-digging area | region. Further, in the sample according to the example, as in the comparative example 2, a recess is formed on the surface of the semiconductor element layer 10 on the recess 2 (on the digging region). Moreover, it was observed that the wavy unevenness appearing in parallel with the [11-20] direction seen in Comparative Example 1 was significantly suppressed, and the in-plane distribution of the layer thickness was also improved. In the sample according to Comparative Example 1, generation of cracks of about 60 to 120 pieces / cm ² was observed after film formation, but in the sample according to the example, generation of cracks after film formation was not observed (cracking). Is 0).

  From the above, it was confirmed that the generation of cracks was suppressed by forming a growth suppression film in the recess. It was also confirmed that the effect of improving the surface morphology can be obtained by forming a growth suppressing film in the recess. Furthermore, by forming a growth suppression film at a position lower than the crystal growth surface in the recess, an edge growth portion is generated in the recess, and it is possible to suppress fluctuations in the thickness of the semiconductor element layer on the non-digging region. It was confirmed that there was. Therefore, it was confirmed that the nitride semiconductor laser device having excellent device characteristics can be manufactured with a high yield by the configuration of the first embodiment described above.

(Second Embodiment)
FIG. 42 is a cross-sectional view schematically showing a nitride semiconductor wafer according to the second embodiment of the present invention. 43 and 44 are cross-sectional views illustrating the structure of a nitride semiconductor wafer according to the second embodiment of the present invention. Next, a nitride semiconductor wafer 200 according to the second embodiment of the present invention including a nitride semiconductor laser element will be described with reference to FIGS. Note that the configuration other than the growth suppression film 205 is the same as that of the first embodiment described above, and a description thereof will be omitted.

In the nitride semiconductor wafer 200 according to the second embodiment, as shown in FIGS. 42 and 43, the growth suppression film 205 made of an SiO ₂ film (silicon oxide film) which is an oxide film is formed in the recess 2 (digging region). 3). As shown in FIG. 43, the growth suppressing film 205 is formed in a region (position) lower than the crystal growth surface 1 a inside the recess 2. Specifically, the growth suppression film 205 is formed in a substantially U-shaped cross section (substantially concave) on a part of the side surface 2b and the bottom surface 2a of the recess 2.

  The growth suppression film 205 is formed to a thickness that does not fill the recess 2. In the second embodiment, the growth suppressing film 205 is formed such that the thickness t2 of the portion formed on the side surface portion 2b is smaller than the thickness t1 of the portion formed on the bottom surface portion 2a. Specifically, the growth suppression film 205 is formed so that the thickness t1 of the portion formed on the bottom surface portion 2a of the recess 2 is about 100 nm, and the portion formed on the side surface portion 2b of the recess 2 The thickness t2 is about 80 nm. With such a configuration, defects such as peeling of the growth suppression film 205 can be effectively suppressed.

  Note that the thickness t1 of the growth suppression film 205 is preferably less than or equal to half the depth f of the recess 2. Further, the thickness t2 of the growth suppression film 205 is preferably less than or equal to half of the opening width g1 of the recess 2. If configured in this way, it is possible to suppress the recess 2 from being filled with the growth suppressing film 205, and it is possible to easily obtain a crack suppressing effect. In addition, it is possible to easily suppress the composition variation in the n-type cladding layer.

  The growth suppression film 205 has a width w2 (width in the [11-20] direction) of about 7 μm, and extends in the [0001] direction (c-axis direction) as in the first embodiment. Is formed.

  In the second embodiment, the distance t3 from the crystal growth surface 1a (the surface of the non-dig region 4) to the growth suppression film 205 is set to about 1.5 μm. If the distance t3 is too small, it is difficult to form the growth suppressing film 205. Therefore, the distance t3 is preferably set to 0.5 μm or more.

  Furthermore, in the second embodiment, since the growth suppression film 205 is formed in a region (position) lower than the crystal growth surface 1a inside the recess 2, as shown in FIG. An edge growth portion 26 of each layer constituting the element layer 10 is generated in the recess 2.

  FIG. 45 is a cross-sectional view schematically showing a nitride semiconductor laser device according to the second embodiment of the present invention. Next, with reference to FIGS. 42 and 45, the structure of the nitride semiconductor laser device 250 according to the second embodiment of the invention will be described.

The nitride semiconductor laser device 250 according to the second embodiment is obtained by dividing the nitride semiconductor wafer 200 (see FIG. 42) according to the second embodiment. Therefore, in the nitride semiconductor laser element 250 according to the second embodiment, the growth suppression film 205 made of a SiO ₂ film (silicon oxide film) is formed in the recess 2.

  The remaining configuration of the nitride semiconductor laser element 250 according to the second embodiment is similar to that of the aforementioned first embodiment. The operation and effect of the second embodiment are the same as those of the first embodiment.

  46 to 49 are cross-sectional views for explaining the method for manufacturing the nitride semiconductor laser device according to the second embodiment of the invention. A method for manufacturing the nitride semiconductor laser element 250 according to the second embodiment of the present invention is now described with reference to FIGS. In addition, since processes other than the formation process of the growth suppression film | membrane 205 in 2nd Embodiment are the same as that of the said 1st Embodiment, hereafter, only the formation process of the growth suppression film | membrane 205 is demonstrated.

  First, as shown in FIG. 46, an n-type GaN substrate 1 similar to that of the first embodiment in which the recess 2 (digging region 3) is formed is prepared. As described above, the concave portion 2 of the n-type GaN substrate 1 is set such that the inclination angle γ of the side surface portion 2b is larger than 90 degrees (for example, about 100 degrees). For this reason, the recessed part 2 is comprised so that opening width may become large gradually toward upper direction.

  Next, as shown in FIG. 47, a resist layer 242 having an opening 242a as a resist pattern is formed on the crystal growth surface 1a of the n-type GaN substrate 1 by using a photolithography technique. At this time, the opening 242a of the resist layer 242 is formed so as to expose a part of the side surface 2b of the recess 2 and the bottom surface 2a of the recess 2. The resist layer 242 is formed so that the opening width j2 of the opening 242a is about 7 μm.

Subsequently, as shown in FIG. 48, a SiO ₂ film 205a as a growth suppressing film is formed on the entire surface with a thickness of about 100 nm by a sputtering method using an ECR sputtering apparatus. At this time, by adjusting the sputtering conditions, a SiO ₂ film 205a so that the thickness of the SiO ₂ film 205a formed on the side surface portion 2b of the recess 2 is about 80 nm.

Then, as shown in FIG. 48, the resist layer 242 (see FIG. 47) is removed using a resist stripping solution or an organic solvent (for example, acetone, ethanol, etc.). Thus, the growth suppressing film 205 made of the SiO ₂ film is formed on a part of the side surface portion 2b and the bottom surface portion 2a of the recess 2 by lift-off.

  In the method of manufacturing the nitride semiconductor laser device 250 according to the second embodiment, as described above, the side surface portion 2b of the recess 2 is inclined and the opening width of the recess 2 is gradually increased upward. Thus, the resist layer 242 can be easily formed on the side surface 2b of the recess 2. For this reason, the growth suppressing film 205 can be easily formed on the side surface 2 b of the recess 2. Further, with the configuration as described above, when the growth suppression film 205 is formed on the side surface 2b of the recess 2, the growth suppression film 205 can be efficiently formed on the side surface 2b. As a result, the thickness of the growth suppressing film 205 on the side surface portion 2b becomes extremely thin so that it cannot be formed in a film shape, or the growth suppressing film 205 is not formed at all on the side surface portion 2b. Can do.

  Other effects of the manufacturing method of the second embodiment are the same as those of the first embodiment.

(Third embodiment)
FIG. 50 is a cross-sectional view for explaining a nitride semiconductor wafer and a nitride semiconductor laser device according to a third embodiment of the invention. Next, a nitride semiconductor wafer and a nitride semiconductor laser device according to a third embodiment of the present invention will be described with reference to FIG.

In the nitride semiconductor wafer and the nitride semiconductor laser device according to the third embodiment, as shown in FIG. 50, a part of the bottom surface 2a of the recess 2 and a part of the side surface 2b of the recess 2 are substantially L-shaped. A growth suppression film 305 is formed on the substrate. The growth suppression film 305 is composed of an SiO ₂ film that is an oxide film or an AlN film that is a nitride film, and is formed in a region (position) lower than the crystal growth surface 1 a inside the recess 2.

  The growth suppression film 305 is formed to a thickness that does not fill the recess 2 as in the first and second embodiments. The remaining configuration of the growth suppression film 305 is the same as that of the second embodiment.

  The configuration other than the growth suppression film 305 of the third embodiment is the same as that of the first and second embodiments.

  Even when the growth suppression film 305 is formed as described above, an edge growth portion can be generated in the recess 2. For this reason, it can suppress that the layer thickness of the semiconductor element layer (n-type cladding layer) formed on a non-digging region changes.

  The operation and effect of the third embodiment are the same as those of the first and second embodiments.

  The growth suppression film 305 of the third embodiment can be formed by changing the opening pattern of the resist layer when forming the growth suppression film by lift-off.

(Fourth embodiment)
FIG. 51 is a cross-sectional view for explaining a nitride semiconductor wafer and a nitride semiconductor laser device according to the fourth embodiment of the present invention. Next, a nitride semiconductor wafer and a nitride semiconductor laser device according to a fourth embodiment of the present invention will be described with reference to FIG.

In the nitride semiconductor wafer and nitride semiconductor laser device according to the fourth embodiment, as shown in FIG. 51, a growth suppressing film 405 is formed on a part of the side surface portion 2b of the recess 2. The growth suppression film 405 is composed of an SiO ₂ film that is an oxide film or an AlN film that is a nitride film, and is formed in a region (position) lower than the crystal growth surface 1 a inside the recess 2.

  The growth suppression film 405 is formed to a thickness that does not fill the recess 2 as in the first to third embodiments. The remaining configuration of the growth suppression film 405 is the same as that of the second and third embodiments.

  The configuration other than the growth suppression film 405 of the fourth embodiment is the same as that of the first to third embodiments.

  Even when the growth suppression film 405 is formed as described above, an edge growth portion can be generated in the recess 2. For this reason, it can suppress that the layer thickness of the semiconductor element layer (n-type cladding layer) formed on a non-digging region changes.

  In addition, the effect | action and effect of 4th Embodiment are the same as that of the said 1st-3rd Embodiment.

  The growth suppressing film 405 of the fourth embodiment can be formed by changing the opening pattern of the resist layer when forming the growth suppressing film by lift-off.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims for patent, and further includes all modifications within the meaning and scope equivalent to the scope of claims for patent.

  For example, in the first to fourth embodiments, the example in which the present invention is applied to the nitride semiconductor laser element which is an example of the nitride semiconductor light emitting element is shown. However, the present invention is not limited to this, and the light emitting diode element is used. The present invention may be applied.

  In the first to fourth embodiments, the example using the nitride semiconductor substrate having the m-plane ({1-100} plane) as the crystal growth plane is shown. However, the present invention is not limited to this, and m A substrate having a non-polar or semipolar plane other than the plane as a crystal growth plane may be used. As specific plane orientations of the crystal growth surface, for example, a-plane {1-101}, r-plane {1-102}, m-plane {1-100}, {1-101} plane, and {11-22} A surface etc. can be mentioned. Further, the crystal growth surface of the substrate may be a surface having an off angle within 15 degrees from these crystal plane orientations. If the substrate has such a crystal growth surface, the effect of the present invention is very high. Note that the effect of the present invention can be obtained even when a substrate having the crystal plane as the c-plane ({0001} plane) which is a polar plane is used.

  In the first to fourth embodiments, the example using the GaN substrate as the nitride semiconductor substrate has been described. However, the present invention is not limited to this, and a nitride semiconductor substrate other than the GaN substrate may be used. . As the nitride semiconductor substrate, a nitride semiconductor such as GaN, AlN, InN, BN, TlN, or a substrate made of a mixed crystal thereof can be used. Alternatively, a substrate in which a nitride semiconductor layer having a digging region and a non-digging region on a nitride semiconductor substrate or a substrate other than the nitride semiconductor can be used. For example, a substrate obtained by forming a nitride semiconductor base layer on a base substrate such as a GaN substrate, sapphire substrate, or SiC substrate and forming a recess in the base layer can be used. The “nitride semiconductor substrate” of the present invention is a concept including such a substrate.

In the first to fourth embodiments, the example in which the growth suppressing film made of AlN or SiO ₂ is formed in the recess is shown. However, the present invention is not limited to this, and the crystal growth of the nitride semiconductor is suppressed. As long as the material can be used, a growth suppressing film made of a material other than AlN and SiO ₂ may be formed in the recess. The growth suppressing film is preferably an aluminum (Al) nitride film, an aluminum (Al) oxynitride film, or an aluminum (Al) and gallium (Ga) nitride film. Such a material can obtain a high effect in all of the crack suppressing effect, the surface morphology improving effect, and the nitride semiconductor layer composition fluctuation suppressing effect. In addition, since such a material can have a crystal structure similar to that of a nitride semiconductor, the crystal structure is continuous between the growth suppressing film and the place without the growth suppressing film. For this reason, it is suitable as a material for the growth suppression film. The next preferred materials for the growth suppression film are silicon (Si) oxide, nitride and oxynitride, aluminum (Al) oxide, titanium (Ti) oxide, zirconia (Zr) oxide. Oxides of yttria (Y), oxides of niobium (Nb), oxides of hafnium (Hf), oxides of tantalum (Ta), and oxynitrides or nitrides of the above materials. The next preferred material is a refractory metal such as molybdenum (Mo), tungsten (W), or tantalum (Ta). As an effect of suppressing the growth of the nitride semiconductor, the oxide film is strongest and becomes weaker in the order of the oxynitride film and the nitride film. For this reason, it is more preferable to form a growth suppression film made of an oxide film in the recess.

  Moreover, in the said 1st-4th embodiment, the opening width of a recessed part and the depth of a recessed part can be changed suitably. In addition, it is preferable that the opening width of a recessed part is 1 micrometer or more and 50 micrometers or less. When the opening width of the recess is smaller than 1 μm, it becomes difficult to obtain a crack suppressing effect and the like. On the other hand, when the opening width of the recess is larger than 50 μm, the ratio of the recess (digging area) in the wafer surface becomes too large. Since it is not preferable to form the ridge portion on the concave portion (digging region), in this case, the number of elements that can be taken from one wafer is reduced. Moreover, it is preferable that the depth of a recessed part is 0.1 micrometer or more and 15 micrometers or less. When the depth of the recess is less than 0.1 μm, the depth of the recess is smaller than the thickness of the edge growth portion. For this reason, an edge growth part protrudes from the inside of a recessed part, and it becomes difficult to acquire the improvement effect of a surface morphology, the suppression effect of a crack, etc. On the other hand, when the depth of the recess is larger than 15 μm, it takes a long time to form the recess.

  Moreover, in the said 1st-4th embodiment, the cross-sectional shape of a recessed part can be changed suitably. For example, as shown in FIG. 52, the recess may be formed so that the cross-sectional shape is rectangular. In this case, the opening width g may be formed to be larger than the depth f as in the concave portion 502, or the opening width g and the depth f may be approximately equal to each other as in the concave portion 512. May be. Further, like the recess 522 and the recess 532, the depth f may be larger than the opening width g. In addition, as shown in FIG. 53, the concave portion may be formed so that the side surface portion becomes an inclined surface. In this case, like the recessed part 542, you may form so that a cross-sectional shape may become V shape (inverted triangle shape). Further, like the concave portion 552 and the concave portion 562, the cross-sectional shape may be a trapezoidal shape. In this case, the opening width g and the depth f may be formed to be substantially equal as in the concave portion 552, or the opening width g is formed to be larger than the depth f as in the concave portion 562. May be. That is, the concave portion (digging region) formed on the substrate may be anything that causes uneven steps. In addition, about the relationship between the opening width of a recessed part and the depth of a recessed part, it is preferable that the opening width is formed larger than the depth. When the opening width is formed to a size equal to or smaller than the depth, the thickness of the film formed on the bottom surface of the recess may be reduced when the growth suppression film is formed. On the other hand, by forming the opening width larger than the depth, the growth suppressing film can be formed with a stable film thickness.

  Moreover, in the said 1st-4th embodiment, although the example which formed the recessed part (digging area | region) in stripe shape was shown, this invention is not limited to this, A recessed part (digging area | region) is shapes other than stripe shape. You may form in. For example, you may form a recessed part (digging area | region) in the grid | lattice form as shown in FIGS. Of course, it is also possible to form a recess (digging region) in a shape other than the shape shown in FIGS. In FIG. 55, the intersection angle α of the recesses (digging regions) that intersect each other can be set to, for example, about 60 degrees. In FIG. 56, the crossing angles α and β of the concave portions (digging regions) that cross each other can be set to about 60 degrees, respectively.

  In the first to fourth embodiments, the example in which the concave portion (digging region) is formed along the ridge portion (optical waveguide) is shown. However, the present invention is not limited to this, and the ridge portion (optical waveguide) is used. A recess (digging area) may be formed so as to extend in a direction that intersects with ().

  Moreover, in the said 1st-4th embodiment, although the example which formed the several recessed part at equal intervals was shown, this invention is not restricted to this, A plurality of so that the space | interval of an adjacent recessed part may become a different space | interval. A recess may be formed. Moreover, you may make it form the recessed part from which cross-sectional shape differs in one board | substrate.

  In the first to fourth embodiments, the example in which the period of the recesses is set to about 400 μm is shown. However, the period of the recesses can be determined by the chip width (element width) of the nitride semiconductor laser element. For example, when the chip width (element width) is about 200 μm, the period of the recesses can be about 200 μm. The period (interval) of the recesses (digging area) is preferably 1 mm or less, and more preferably 400 μm or less. With this configuration, even if there is an abnormal portion on a part of the wafer (substrate) and the layer thickness fluctuates due to this, the lateral growth is divided by the depression on the surface of the semiconductor element layer on the recess. Thus, the diffusion of the layer thickness fluctuation caused by the abnormal part is suppressed. Further, when the period (interval) of the recesses (digging regions) is 5 μm or less, it becomes difficult to form the ridge portion. Therefore, the period (interval) of the recesses (digging regions) is preferably larger than 5 μm.

  The growth suppressing film formed in the recess may be formed in a shape other than the shape shown in the first to fourth embodiments as long as it is formed at a position lower than the crystal growth surface in the recess. Good.

  Moreover, in the said 1st-4th embodiment, although the example which formed the growth suppression film | membrane by the sputtering method using an ECR sputtering apparatus was shown, this invention is not limited to this, A growth suppression film | membrane is formed by methods other than the above. It can also be formed. For example, the growth suppression film can be formed by using a sputtering method using a magnetron sputtering apparatus, an EB (Electron Beam) vapor deposition method, a plasma CVD method, or the like.

  Moreover, in the said 1st-4th embodiment, although the example which made the inclination-angle of the side part of a recessed part about 100 degree was shown, this invention is not limited to this, The inclination-angle of the side part of a recessed part is about 100 degree | times. Larger angles can also be used. When comprised in this way, a growth suppression film | membrane can be efficiently formed in the side part of a recessed part. In the first embodiment, since the growth suppressing film is not formed on the side surface of the recess, in this case, the inclination angle of the side surface of the recess can be 90 degrees.

  In the first to fourth embodiments, the thickness, composition, and the like of the nitride semiconductor layers grown on the substrate may be appropriately combined with or changed to those suitable for desired characteristics. Is possible. For example, the semiconductor layers may be added or deleted, or the order of the semiconductor layers may be partially changed. Further, for example, a layer such as a buffer layer made of GaN may be formed between the GaN substrate and the n-type cladding layer. Furthermore, the conductivity type may be changed for some semiconductor layers. That is, it can be freely changed as long as the basic characteristics as a nitride semiconductor laser element are obtained.

  In the first to fourth embodiments, the recess (digging region) is formed after a nitride semiconductor layer such as GaN, InGaN, AlGaN, InAlGaN, or InAlN is once grown on the substrate. Also good. That is, the contents of the present specification can be applied even when the growth is performed once and then the concave portion (digging region) is formed.

  In the first to fourth embodiments, the etching method used in the manufacturing process of the nitride semiconductor laser element may be vapor phase etching or liquid phase etching.

  In the first to fourth embodiments, the nitride semiconductor wafer is divided so that the nitride semiconductor laser element includes one recess (digging region). However, the present invention is not limited to this. Alternatively, the nitride semiconductor wafer may be divided so that the nitride semiconductor laser element does not include a recess (digging region). Further, the nitride semiconductor wafer may be divided so that the nitride semiconductor laser element includes a plurality of recesses (digging regions), or the nitride semiconductor laser element includes a part of the recesses (digging regions). Thus, the nitride semiconductor wafer may be divided. Even in such a configuration, a nitride semiconductor laser device having excellent device characteristics can be obtained with a high yield.

  In the first to fourth embodiments, the example in which the quantum well structure of the active layer is configured as the DQW structure has been described. However, the present invention is not limited thereto, and the active layer is provided in the quantum well structure other than the DQW structure. It may be configured. For example, the quantum well structure of the active layer may be configured as an SQW (Single Quantum Well) structure or an MQW (Multiple Quantum Well) structure. The composition, thickness, etc. of the active layer (well layer, barrier layer) can be changed as appropriate.

  Moreover, in the said 1st-4th embodiment, although the example which used Si as an n-type impurity of an n-type semiconductor layer was shown, this invention is not restricted to this, In addition to Si, for example, O, Cl, S, C, Ge, Zn, Cd, Mg, or Be may be used. As the n-type impurity, Si, O and Cl are particularly preferable.

  In addition to the MOCVD method, for example, an HVPE (Hydride Vapor Phase Epitaxy) method, an MBE (Molecular Beam Epitaxy) method, or the like can be used as the epitaxial growth method.

1 n-type GaN substrate (nitride semiconductor substrate)
DESCRIPTION OF SYMBOLS 1a Crystal growth surface 2 Recessed part 2a Bottom surface part 2b Side surface part 3 Excavation area | region 4 Non-digging area | region 5,205,305,405 Growth suppression film | membrane 10 Semiconductor element layer 11 N-type clad layer (nitride semiconductor layer)
12 n-type guide layer 13 active layer 14 evaporation prevention layer 15 p-type guide layer 16 p-type cladding layer 17 p-type contact layer 18 ridge portion 19 optical waveguide 20 insulating layer 21 p-side electrode 22 n-side electrode 25 recess 26 edge growth portion 30 Cavity surface 30a Light exit surface 30b Light reflection surface 100, 200 Nitride semiconductor wafer 150, 250 Nitride semiconductor laser device

Claims (32)

A nitride semiconductor substrate having a crystal growth surface, including a digging region dug in the thickness direction from the crystal growth surface, and a non-digging region that is a non-digging region;
A growth suppression film formed in the digging region and suppressing crystal growth of the nitride semiconductor;
Before a Kiyui nitride grown on the crystal growth surface semiconductor layer,
The crystal growth surface is a nonpolar surface or a semipolar surface,
The digging region includes a recess;
The growth suppression film is formed only at a position lower than the crystal growth surface in the recess ,
The nitride semiconductor layer includes a layer made of a nitride semiconductor containing Al and Ga,
A nitride semiconductor wafer, wherein the nitride semiconductor layer is grown and formed also in the recess, and a recess is formed on a surface of the nitride semiconductor layer on the recess . The concave portion has a side surface portion and a bottom surface portion,
The nitride semiconductor wafer according to claim 1, wherein the growth suppression film is formed on at least one of the side surface portion and the bottom surface portion. The concave portion has a side surface portion and a bottom surface portion,
2. The nitride semiconductor wafer according to claim 1, wherein the growth suppressing film is formed on a part of the bottom surface portion of the concave portion. The concave portion has a side surface portion and a bottom surface portion,
2. The nitride semiconductor wafer according to claim 1, wherein the growth suppressing film is formed on both the side surface portion and the bottom surface portion of the concave portion.   5. The nitride semiconductor wafer according to claim 4, wherein the growth suppression film has a thickness of a portion formed on the side surface portion smaller than a thickness of a portion formed on the bottom surface portion.   The nitride semiconductor wafer according to claim 1, wherein the recess is formed to extend in a predetermined direction.   The nitride semiconductor wafer according to claim 1, wherein a plurality of the recesses are formed in a stripe shape.   The nitride semiconductor wafer according to claim 1, wherein an optical waveguide is formed in the nitride semiconductor layer.   The nitride semiconductor wafer according to claim 8, wherein the optical waveguide is formed along the concave portion.   A nitride semiconductor light-emitting element formed using the nitride semiconductor wafer according to claim 1. A nitride semiconductor substrate having a crystal growth surface, including a digging region dug in the thickness direction from the crystal growth surface, and a non-digging region that is a non-digging region;
A growth suppression film formed in the digging region and suppressing crystal growth of the nitride semiconductor;
Before a Kiyui nitride grown on the crystal growth surface semiconductor layer,
The crystal growth surface is a nonpolar surface or a semipolar surface,
The digging region includes a recess;
The growth suppression film is formed only at a position lower than the crystal growth surface in the recess ,
The nitride semiconductor layer includes a layer made of a nitride semiconductor containing Al and Ga,
The nitride semiconductor light emitting device, wherein the nitride semiconductor layer is grown and formed also in the recess, and a recess is formed on a surface of the nitride semiconductor layer on the recess . The concave portion has a side surface portion and a bottom surface portion,
The nitride semiconductor light emitting element according to claim 11, wherein the growth suppression film is formed on at least one of the side surface portion and the bottom surface portion. The concave portion has a side surface portion and a bottom surface portion,
The nitride semiconductor light emitting device according to claim 11, wherein the growth suppressing film is formed on a part of the bottom surface portion of the recess. The concave portion has a side surface portion and a bottom surface portion,
The nitride semiconductor light emitting device according to claim 11, wherein the growth suppressing film is formed on both the side surface portion and the bottom surface portion of the recess.   The nitride semiconductor light emitting device according to claim 14, wherein the growth suppressing film has a thickness of a portion formed on the side surface portion smaller than a thickness of a portion formed on the bottom surface portion. The side portion of the recess is an inclined surface,
The nitride semiconductor light emitting element according to any one of claims 12 to 15, wherein the recess is formed so that an opening width gradually increases upward.   17. The nitride semiconductor light emitting device according to claim 11, wherein the growth suppression film has a thickness that does not fill the inside of the recess.   18. The nitride semiconductor light emitting device according to claim 11, wherein a thickness of the growth suppressing film is not more than half of a depth of the recess. Wherein said crystal growth surface of the nitride semiconductor substrate is characterized in that it is an m-plane, the nitride semiconductor light-emitting device according to any one of claims 11 to 1 8. The growth inhibiting film is characterized by comprising the oxynitride film or a nitride film, the nitride semiconductor light-emitting device according to any one of claims 11 to 19. The growth inhibiting film is characterized by comprising an oxide film, a nitride semiconductor light-emitting device according to any one of claims 11 to 2 0. The growth inhibiting film is characterized by comprising a silicon oxide film, a nitride semiconductor light emitting device according to claim 2 1. The nitride semiconductor layer is characterized in that it comprises an AlGaN layer, the nitride semiconductor light-emitting device according to any one of claims 11 to 2 2. The recess, characterized in that it is formed so as to extend in a predetermined direction, the nitride semiconductor light-emitting device according to any one of claims 11 to 2 3. The opening width of the recess may be greater than the depth of the recess, the nitride semiconductor light-emitting device according to any one of claims 11 to 2 4. Wherein the optical waveguide in said nitride semiconductor layer is formed, the nitride semiconductor light-emitting device according to any one of claims 11 to 2 5. Preparing a nitride semiconductor substrate having a crystal growth surface which is a nonpolar surface or a semipolar surface ;
Forming a recessed region dug into the nitride semiconductor substrate; and
Forming a growth suppressing film for suppressing crystal growth of a nitride semiconductor in the digging region;
And forming a nitride semiconductor layer including a layer made of nitride semiconductor containing Al and Ga before Kiyui crystal growth plane,
The step of forming the digging region includes a step of forming a recess in the nitride semiconductor substrate by etching the crystal growth surface in the thickness direction,
The step of forming the growth suppression film includes the step of disposing the growth suppression film only at a position lower than the crystal growth surface in the recess,
The step of forming the nitride semiconductor layer includes a step of growing the nitride semiconductor layer and forming it in the recess, and forming a recess in the surface of the nitride semiconductor layer on the recess. A method for manufacturing a nitride semiconductor light emitting device. The step of forming the concave portion includes the step of forming the concave portion so as to have a side surface portion and a bottom surface portion,
The step of forming the growth inhibiting film is at least characterized by having a step of forming the growth inhibiting film on one of the side surface portion and the bottom portion, the nitride semiconductor light emitting device according to claim 2 7 Manufacturing method. The step of forming the concave portion includes the step of forming the concave portion so as to have a side surface portion and a bottom surface portion,
The step of forming the growth inhibiting film is characterized by having a step of forming the growth inhibiting film on a part of the bottom portion of the recess, the manufacture of the nitride semiconductor light emitting device according to claim 2 7 Method. The step of forming the concave portion includes the step of forming the concave portion so as to have a side surface portion and a bottom surface portion,
The step of forming the growth inhibiting film is characterized by having a step of forming the growth inhibiting film on both the side portion and the bottom portion in the recess, the nitride semiconductor light emitting according to claim 2 7 Device manufacturing method. The step of forming the growth inhibiting film is characterized by having a step of forming the growth suppression film thickness not to fill the inside of the recess, according to any one of claims 2 7-3 0 A method for manufacturing a nitride semiconductor light emitting device. The step of forming the recess, the opening width of the recess, and having a step of forming larger than the depth of the recess, the nitride semiconductor according to any one of claims 2 7-3 1 Manufacturing method of light emitting element.