JP4970517B2 - Nitride semiconductor device, nitride semiconductor wafer, and method of manufacturing nitride semiconductor device - Google Patents

Description

  The present invention relates to a nitride semiconductor device, a nitride semiconductor wafer, and a method for manufacturing a nitride semiconductor device, and more particularly, to a nitride semiconductor device including a nitride semiconductor substrate, a nitride semiconductor wafer, and a method for manufacturing a nitride semiconductor device. .

  Nitride semiconductors typified by GaN, AlN, InN, and mixed crystals thereof have characteristics that they have a large band gap Eg and are direct transition type semiconductor materials compared to AlGaInAs semiconductors and AlGaInP semiconductors. Yes. For this reason, these nitride semiconductors constitute semiconductor light emitting devices such as a semiconductor laser device capable of emitting light in a wavelength range from ultraviolet to green and a light emitting diode device capable of covering a wide light emission wavelength range from ultraviolet to red. It is attracting attention as a material, and is widely considered for applications such as projectors, full-color displays, and environmental and medical fields.

  In recent years, research institutions have attempted to realize semiconductor light emitting devices (green semiconductor lasers) that emit light in the green region by increasing the emission wavelength of semiconductor light emitting devices using nitride semiconductors. It is done vigorously.

  In a semiconductor light emitting device using a nitride semiconductor, a hexagonal GaN substrate (nitride semiconductor substrate) is generally used as a substrate, and its c-plane ((0001) plane) is the growth main surface. Has been. A nitride semiconductor light emitting device is formed by laminating a nitride semiconductor layer including an active layer on the c-plane. In addition, when forming a nitride semiconductor light emitting device using a nitride semiconductor substrate, an active layer containing In is generally used, and by increasing the In composition ratio, the emission wavelength is increased. Is planned.

  However, since the c-plane of the GaN substrate is a polar plane having a polarity in the c-axis direction, when a nitride semiconductor layer including an active layer is stacked on the c-plane, there is a disadvantage that spontaneous polarization occurs in the active layer. is there. In addition, when a nitride semiconductor layer including an active layer is stacked on the c-plane, the lattice strain of the active layer increases as the In composition ratio increases, and a strong internal electric field is induced in the active layer due to piezoelectric polarization. There is also an inconvenience. This internal electric field reduces the overlap of wave functions of electrons and holes, reducing the rate of recombination and light emission. For this reason, when the In composition ratio is increased in order to realize light emission in the green region, there has been a problem that the light emission efficiency is remarkably lowered as the light emission wavelength becomes longer.

  Therefore, in recent years, in order to avoid the influence of spontaneous polarization and piezoelectric polarization, a nitride semiconductor layer is laminated on the non-polar m-plane ({1-100} plane) instead of the general c-plane. A nitride semiconductor light emitting device (nitride semiconductor device) has been proposed (see, for example, Patent Document 1).

  Patent Document 1 describes a Fabry-Perot type semiconductor laser diode (nitride semiconductor element) capable of reducing the threshold current. This semiconductor laser diode includes a GaN substrate having a nonpolar plane m-plane as a growth main surface, and each nitride semiconductor layer including an active layer is stacked on the growth main surface (m-plane). Since the m-plane of the GaN substrate is a crystal plane orthogonal to the c-plane, by laminating each nitride semiconductor layer including the active layer on the m-plane, the c-axis serving as the polarization axis becomes the plane of the active layer. Contained within. For this reason, the influence of spontaneous polarization or piezo polarization is avoided, and a decrease in luminous efficiency is suppressed.

JP 2008-226865 A

  As described above, by using a nitride semiconductor substrate having an m-plane as a growth main surface, a nitride semiconductor light-emitting element in which a decrease in light emission efficiency due to spontaneous polarization or piezoelectric polarization is suppressed can be obtained.

  However, even when the conventional element structure described in Patent Document 1 is used, the light emission efficiency is not sufficiently high, and there is still room for improvement of the light emission efficiency.

  On the other hand, in a nitride semiconductor light emitting device (nitride semiconductor device) such as a nitride semiconductor laser device, the nitride semiconductor substrate and the nitride semiconductor layer are grown when the nitride semiconductor layer is grown on the m-plane of the nitride semiconductor substrate. The nitride semiconductor layer may be distorted due to a difference in lattice constant or thermal expansion coefficient between the GaN layer and the nitride semiconductor layer, which may cause a crack in the nitride semiconductor layer. When cracks occur in the nitride semiconductor layer, the number of non-defective products obtained from one wafer is reduced, resulting in a problem that the yield is lowered. In addition, due to the occurrence of cracks, device characteristics such as reliability and light emission lifetime are also deteriorated. For this reason, suppressing the occurrence of cracks is very important in the production of elements.

  In particular, when an attempt is made to produce a semiconductor light emitting device that emits light in the ultraviolet region or a semiconductor light emitting device that emits light in the green region (for example, a green semiconductor laser), the lattice constant with the substrate is used to effectively confine light. A semiconductor layer having a large difference may be formed over the substrate. In this case, since cracks are very likely to occur, it is very difficult to improve device characteristics and yield.

  The present invention has been made to solve the above-described problems, and one object of the present invention is to provide a nitride semiconductor device, a nitride semiconductor wafer, and a nitride semiconductor capable of improving luminous efficiency. It is providing the manufacturing method of an element.

  Another object of the present invention is to provide a nitride semiconductor device, a nitride semiconductor wafer, and a method for manufacturing a nitride semiconductor device capable of improving device characteristics and yield.

  Still another object of the present invention is to provide a nitride semiconductor device having excellent device characteristics and high reliability, and a method for manufacturing the same.

  The inventors of the present application conducted various experiments paying attention to the above problem, and as a result of intensive studies, when a GaN layer or an InGaN layer is used as the barrier layer of the active layer, a dark line is generated in the light emission pattern. I found out that there was a case. And in order to suppress generation | occurrence | production of such a dark line, it discovered that it was very effective to comprise a barrier layer from the nitride semiconductor containing Al and In.

  That is, the nitride semiconductor device according to the first aspect of the present invention includes a nitride semiconductor substrate having an m-plane as a growth main surface, and a nitride semiconductor formed on the growth main surface of the nitride semiconductor substrate and including an active layer With layers. The nitride semiconductor substrate includes a digging region dug in the thickness direction from the growth main surface and a non-digging region that is a non-digging region, and the active layer includes Al and In. A barrier layer made of a nitride semiconductor containing The “nitride semiconductor substrate” of the present invention includes a substrate whose main growth surface is made of a nitride semiconductor.

  In the nitride semiconductor device according to the first aspect, as described above, by forming the barrier layer of the active layer from the nitride semiconductor containing Al and In, the generation of dark lines is almost completely suppressed. Can do. Thereby, the fall of the luminous efficiency resulting from generation | occurrence | production of a dark line can be suppressed. As a result, element characteristics and reliability can be improved. In addition, since the light emission pattern of uniform light emission can be obtained by suppressing the generation of dark lines, the gain can be increased when the nitride semiconductor laser element is formed.

  Further, in the first aspect, a recess can be formed on the surface of the nitride semiconductor layer on the digging region by forming the digging region in the nitride semiconductor substrate. For this reason, even when the lattice constant difference or the thermal expansion coefficient difference between the nitride semiconductor substrate and the nitride semiconductor layer becomes large and the nitride semiconductor layer is distorted, the nitride semiconductor layer (non-excavated region) The strain of the nitride semiconductor layer formed above can be alleviated by the above-described depression formed on the surface of the nitride semiconductor layer on the digging region. Thereby, since the very high crack suppression effect can be acquired, it can suppress effectively that a crack generate | occur | produces in the nitride semiconductor layer. Therefore, by configuring as described above, a nitride semiconductor layer having a composition different from that of the nitride semiconductor substrate can be formed with almost no cracks. Therefore, for example, even when a semiconductor light emitting device that emits light in the ultraviolet region, a semiconductor light emitting device that emits light in the green region (for example, a green semiconductor laser), or the like can be produced, the occurrence of cracks can be suppressed. As a result, a semiconductor light emitting device that emits light in the ultraviolet region or the green region can be manufactured with high yield while improving device characteristics.

  Further, in the first aspect, as described above, by suppressing the generation of dark lines, variation in element characteristics can be reduced, so that the number of elements having characteristics within the standard range is increased. Can do. For this reason, the yield can be improved also by this.

  Furthermore, in the first aspect, the formation of the digging region in the nitride semiconductor substrate can effectively alleviate the distortion of the active layer, so that the generation of dark lines can be more effectively suppressed. . Further, by configuring as described above, the generation of dark lines can be effectively suppressed after the growth of the nitride semiconductor layer and further after the energization test after forming the semiconductor element. Thereby, a nitride semiconductor element with high brightness and reliability can be obtained.

  Thus, in the first aspect, the light emission efficiency can be significantly improved by configuring as described above. In addition, since the device characteristics and reliability can be improved by improving the light emission efficiency, a nitride semiconductor device having excellent device characteristics and high reliability can be obtained. Furthermore, in the first aspect, since the occurrence of cracks can be effectively suppressed, the number of non-defective products obtained from one wafer can be increased. Thereby, a yield can be improved. Further, by suppressing the occurrence of cracks, the reliability of the element can be improved and the element characteristics can be improved.

  In the nitride semiconductor device according to the first aspect, preferably, the barrier layer is made of AlInGaN. If comprised in this way, generation | occurrence | production of a dark line can be suppressed more effectively. In addition, by configuring the barrier layer from AlInGaN, the amount of In taken into the well layer formed on the barrier layer can be increased. For this reason, the range of growth conditions can be widened by forming the barrier layer from AlInGaN. Moreover, AlInGaN obtained by adding In to AlGaN can easily form a film having good crystallinity even when grown at a lower temperature. Therefore, even when the barrier layer, which is often formed at a relatively low growth temperature of about 600 ° C. to 800 ° C., is made of AlInGaN, the crystallinity is maintained even when the barrier layer is formed at a relatively low temperature as described above. A good barrier layer can be obtained. Furthermore, by using AlInGaN as the barrier layer, the strain imparted by the barrier layer to the well layer can be reduced. It is more preferable that the strain applied to the well layer is smaller because the rate at which the light emitting element deteriorates during driving becomes slower.

  A nitride semiconductor device according to a second aspect of the present invention includes a nitride semiconductor substrate whose growth main surface is a surface having an off angle in the a-axis direction with respect to the m-plane, and a growth main surface of the nitride semiconductor substrate. And a nitride semiconductor layer including an active layer. The nitride semiconductor substrate includes a digging region dug in the thickness direction from the growth main surface and a non-digging region that is a non-digging region, and the active layer includes Al and In. A barrier layer made of a nitride semiconductor containing

  In the nitride semiconductor device according to the second aspect, as in the first aspect, the barrier layer of the active layer is made of a nitride semiconductor containing Al and In, so that dark lines are almost completely generated. Can be suppressed. Thereby, luminous efficiency can be improved.

  Here, the inventors of the present application formed a light emitting diode element by laminating a nitride semiconductor layer on a nitride semiconductor substrate having no off-angle and having an m-plane as a growth main surface, and the light emitting diode element It has been found that when EL light is emitted by injecting current into a light emission pattern, a bright spot-like light emission pattern is obtained. As a result of extensive research conducted by the inventors of the present application, as described above, a surface having an off-angle in the a-axis direction with respect to the m-plane is used as the growth main surface of the nitride semiconductor substrate, so that the EL emission pattern is obtained. It has been found that it is possible to suppress the formation of bright spots. Therefore, by using a nitride semiconductor substrate having an off angle in the a-axis direction, generation of dark lines can be suppressed, and in addition, formation of bright spots in the EL light emission pattern can be suppressed. That is, with this configuration, the EL light emission pattern of the nitride semiconductor element can be further improved (bright spot light emission, in-plane wavelength unevenness, etc. can be suppressed). For this reason, the light emission efficiency of the nitride semiconductor device can be improved also by this. In addition, a nitride semiconductor element with high luminance can be obtained by improving luminous efficiency. One of the reasons why the bright spot-like light emission suppression effect as described above can be obtained is that the growth main surface of the nitride semiconductor substrate has an off-angle in the a-axis direction with respect to the m-plane. This is presumably because the migration direction of atoms changes when a nitride semiconductor layer is grown on the main surface.

  Moreover, since the EL light emission pattern can be made uniform by suppressing the brightening of the EL light emission pattern, the drive voltage can also be reduced. In addition, by suppressing the bright spot light emission, an EL light emission pattern with uniform light emission can be obtained, so that the gain can be increased when the nitride semiconductor laser element is formed. Further, by suppressing the formation of bright spots in the EL light emission pattern, the light emission efficiency can be improved, and thereby the device characteristics and reliability can be further improved. That is, by configuring as described above, it is possible to easily obtain a nitride semiconductor element having excellent element specification and high reliability.

  In the second aspect, a recess can be formed on the surface of the nitride semiconductor layer on the digging region by forming the digging region in the nitride semiconductor substrate. For this reason, even when the lattice constant difference or the thermal expansion coefficient difference between the nitride semiconductor substrate and the nitride semiconductor layer becomes large and the nitride semiconductor layer is distorted, the nitride semiconductor layer (non-excavated region) The strain of the nitride semiconductor layer formed above can be alleviated by the above-described depression formed on the surface of the nitride semiconductor layer on the digging region. Thereby, it is possible to effectively suppress the occurrence of cracks in the nitride semiconductor layer. Therefore, by configuring as described above, a nitride semiconductor layer having a composition different from that of the nitride semiconductor substrate can be formed with almost no cracks. Furthermore, since the digging region is formed, distortion of the active layer containing Al can be effectively relieved, so that generation of dark lines can be more effectively suppressed.

  Further, in the second aspect, by using a nitride semiconductor substrate having an off-angle in the a-axis direction with respect to the m-plane, the digging region can be made less likely to be filled with the nitride semiconductor layer. Thereby, it is possible to easily make a state in which a depression is formed on the surface of the nitride semiconductor layer on the digging region. As a result, the occurrence of cracks can be easily suppressed.

  In the second aspect, a nitride semiconductor layer formed on the growth main surface is formed by setting a surface having an off angle in the a-axis direction with respect to the m-plane as the growth main surface of the nitride semiconductor substrate. The crystallinity of can be improved. For this reason, it can be made hard to generate | occur | produce a crack in the nitride semiconductor layer. Moreover, since the surface morphology of the nitride semiconductor layer can be improved by configuring as described above, a nitride semiconductor layer having a uniform thickness can be obtained. For this reason, it is possible to suppress the inconvenience that a locally thick region is formed in the nitride semiconductor layer due to the uneven thickness of the nitride semiconductor layer. Since cracks are likely to occur in such a thick region, cracks can be made more difficult to occur by suppressing the formation of locally thick regions in the nitride semiconductor layer. In addition, by configuring as described above, the surface morphology of the nitride semiconductor layer can be made very good, so that variations in device characteristics can be reduced. For this reason, since the number of elements having characteristics within the standard range can be increased, the yield can also be improved. In addition, device characteristics and reliability can be improved by improving the surface morphology.

  In the second aspect, the flatness of the barrier layer made of a nitride semiconductor containing Al and In is obtained by using a plane having an off-angle in the a-axis direction with respect to the m-plane as the growth principal plane. Can be improved. For this reason, it is possible to suppress the in-plane distribution of the In composition in the well layer from becoming non-uniform by forming the well layer on the highly flat barrier layer. In addition, the crystallinity of the active layer (well layer) can be improved. Thereby, luminous efficiency can be improved more.

  Furthermore, in the second aspect, as described above, by suppressing the occurrence of dark lines, variations in element characteristics can be reduced, and therefore the number of elements having characteristics within the standard range is increased. Can do. For this reason, the yield can be improved also by this.

  Thus, in the second aspect, the light emission efficiency can be significantly improved by configuring as described above. In addition, since the device characteristics and reliability can be improved by improving the light emission efficiency, a nitride semiconductor device having excellent device characteristics and high reliability can be obtained. Furthermore, in the second aspect, since the occurrence of cracks can be effectively suppressed, the number of good products obtained from one wafer can be increased. Thereby, a yield can be improved. Further, by suppressing the occurrence of cracks, the reliability of the element can be improved and the element characteristics can be improved.

  In addition, in the second aspect, since it is possible to obtain a very high crack suppressing effect by configuring as described above, almost all cracks are generated in the nitride semiconductor layer having a composition different from that of the nitride semiconductor substrate. It can form without. For this reason, for example, even when a semiconductor light emitting element that emits light in the ultraviolet region, a semiconductor light emitting element that emits light in the green region (for example, a green semiconductor laser), or the like can be produced, the occurrence of cracks can be suppressed. As a result, a semiconductor light emitting device that emits light in the ultraviolet region or the green region can be manufactured with high yield while improving device characteristics.

  In the nitride semiconductor device according to the second aspect, preferably, the absolute value of the off angle in the a-axis direction in the nitride semiconductor substrate is larger than 0.1 degree. With this configuration, it is possible to easily suppress the brightening of the EL light emission pattern and the in-plane wavelength unevenness while suppressing the generation of dark lines.

  In the nitride semiconductor device according to the second aspect, the growth main surface of the nitride semiconductor substrate may have an off-angle in the c-axis direction in addition to the a-axis direction. In this case, it is preferable that the off angle in the a-axis direction is larger than the off angle in the c-axis direction. If comprised in this way, generation | occurrence | production of the luminescent spot of EL light emission pattern, in-plane wavelength irregularity, and generation | occurrence | production of a dark line can be suppressed effectively.

  In the nitride semiconductor device according to the first and second aspects, preferably, the nitride semiconductor layer is formed on a non-excavated region, and the thickness of the layer decreases gradually as approaching the excavated region. Includes thick slope region. If such a layer thickness gradient region is formed in the nitride semiconductor layer, strain generated in the nitride semiconductor layer can be relaxed even in the layer thickness gradient region, so that a higher crack suppression effect can be obtained. . In addition, the distortion of the active layer can be more effectively alleviated. For this reason, a nitride semiconductor layer having a composition different from that of the nitride semiconductor substrate can be easily formed with almost no cracks. For example, when a GaN substrate is used as the nitride semiconductor substrate, an AlGaN layer having a higher Al composition can be formed thicker than before. This makes it possible to manufacture an element that requires a high Al composition nitride semiconductor film (for example, a semiconductor light emitting element that emits light in the ultraviolet region or the green region), which has been difficult to manufacture. Moreover, if comprised in this way, since distortion of an active layer can be relieve | moderated effectively, it can suppress more effectively that a dark line generate | occur | produces. Further, the above-described layer thickness gradient region can be formed in the vicinity of the digging region (next to the digging region) by controlling the off angle in the a-axis direction of the nitride semiconductor substrate, for example. The reason why the above-described high crack suppression effect is obtained is that the layer thickness gradient region is originally thin, so that the layer thickness gradient region itself has less internal strain, and the layer thickness gradually increases. This is considered to be because a higher strain relaxation effect can be obtained when the strain is relaxed stepwise because it changes (inclined).

  In the nitride semiconductor device according to the first and second aspects, the digging region is preferably formed so as to extend in the c-axis direction when seen in a plan view. If comprised in this way, while it can suppress that a crack generate | occur | produces in a nitride semiconductor layer easily, distortion of an active layer can be relieve | moderated. Further, in the case of using a nitride semiconductor substrate whose main growth surface is a plane having an off-angle in the a-axis direction with respect to the m-plane, a portion near the digging region in the nitride semiconductor layer (next to the digging region ), It is possible to easily form a layer thickness gradient region in which the layer thickness is decreased (gradually) as the digging region is approached. The digging region may be formed so as to extend in a direction intersecting with the c-axis direction at an angle within ± 15 degrees within the plane of the growth main surface. Even in such a configuration, since the layer thickness gradient region can be easily formed, generation of cracks in the nitride semiconductor layer can be easily suppressed. In the above configuration, a digging region extending in a direction perpendicular to the c-axis direction may be further formed in the substrate. With this configuration, it is possible to more effectively alleviate distortion.

  In the nitride semiconductor device according to the first and second aspects, preferably, the nitride semiconductor layer includes an optical waveguide region, and the optical waveguide region is located on the non-digged region. With this configuration, it is possible to easily obtain a nitride semiconductor laser device with high emission efficiency and high gain, in which the generation of cracks is suppressed.

  A nitride semiconductor wafer according to a third aspect of the present invention includes a nitride semiconductor substrate having an m-plane as a growth main surface, and a nitride semiconductor layer formed on the growth main surface of the nitride semiconductor substrate and including an active layer, It has. The nitride semiconductor substrate includes a digging region dug in the thickness direction from the growth main surface and a non-digging region that is a non-digging region, and the active layer includes Al and In. A barrier layer made of a nitride semiconductor containing

  In the nitride semiconductor wafer according to the third aspect, as described above, the barrier layer of the active layer is made of a nitride semiconductor containing Al and In, thereby substantially preventing the generation of dark lines. Can do. Thereby, the luminous efficiency of the nitride semiconductor element obtained by dividing | segmenting a nitride semiconductor wafer can be improved.

  In the third aspect, the formation of the digging region in the nitride semiconductor substrate can effectively suppress the occurrence of cracks in the nitride semiconductor layer. Thereby, the number of good products obtained from one wafer can be increased. As a result, the yield can be improved. Further, by suppressing the occurrence of cracks, the reliability of the element can be improved and the element characteristics can be improved. Further, the formation of the digging region in the nitride semiconductor substrate can effectively alleviate the distortion of the active layer. Thereby, generation | occurrence | production of a dark line can be suppressed more effectively. Moreover, by relaxing the distortion of the active layer, the generation and expansion of dark lines can be effectively suppressed.

  A nitride semiconductor wafer according to a fourth aspect of the present invention includes a nitride semiconductor substrate whose growth main surface is a surface having an off angle in the a-axis direction with respect to the m-plane, and a growth main surface of the nitride semiconductor substrate. And a nitride semiconductor layer including an active layer. The nitride semiconductor substrate includes a digging region dug in the thickness direction from the growth main surface and a non-digging region that is a non-digging region, and the active layer includes Al and In. A barrier layer made of a nitride semiconductor containing

  In the nitride semiconductor wafer according to the fourth aspect, as described above, by using a nitride semiconductor substrate whose growth main surface is a plane having an off angle in the a-axis direction with respect to the m plane, Bright spot formation can be suppressed. Further, by forming the barrier layer of the active layer from a nitride semiconductor containing Al and In, generation of dark lines can be suppressed. Therefore, by using the nitride semiconductor wafer configured as described above, it is possible to obtain a nitride semiconductor element having a significantly improved luminous efficiency.

  In the fourth aspect, the formation of the digging region in the nitride semiconductor substrate can effectively suppress the occurrence of cracks in the nitride semiconductor layer. Thereby, element characteristics, reliability, and yield can be improved.

  In the nitride semiconductor wafer according to the third and fourth aspects, the main growth surface of the nitride semiconductor substrate may have an off-angle in the c-axis direction in addition to the a-axis direction. In this case, it is preferable that the off angle in the a-axis direction is larger than the off angle in the c-axis direction.

  In the nitride semiconductor wafer according to the third and fourth aspects, the nitride semiconductor layer is formed on the non-excavated region, and the layer thickness gradient in which the layer thickness decreases in an inclined manner as approaching the excavated region It is preferable to be configured to include a region.

  In the nitride semiconductor wafer according to the third and fourth aspects, the digging region is preferably formed to extend in the c-axis direction when seen in a plan view. The digging region may be formed so as to extend in a direction intersecting with the c-axis direction at an angle within ± 15 degrees within the plane of the growth main surface. In the above configuration, a digging region extending in a direction perpendicular to the c-axis direction may be further formed in the substrate.

  A nitride semiconductor device according to a fifth aspect of the present invention is a nitride semiconductor device formed using the nitride semiconductor wafer according to the third and fourth aspects. If comprised in this way, the nitride semiconductor element with the high element characteristic and reliability in which luminous efficiency was improved significantly can be obtained with a high yield. In the nitride semiconductor device according to the fifth aspect, it is preferable that at least a part of the digging region is included in the nitride semiconductor substrate.

  According to a sixth aspect of the present invention, there is provided a method for manufacturing a nitride semiconductor device comprising: a step of preparing a nitride semiconductor substrate having an m-plane as a growth main surface; And a step of forming a nitride semiconductor layer on a growth main surface of the nitride semiconductor substrate. The step of forming the nitride semiconductor layer includes a step of forming an active layer having a quantum well structure including a well layer and a barrier layer, and the step of forming the active layer includes Al and In. A step of forming a barrier layer from the nitride semiconductor.

  According to a seventh aspect of the present invention, there is provided a method for manufacturing a nitride semiconductor device comprising: preparing a nitride semiconductor substrate having a growth main surface as a growth main surface with an off-angle in the a-axis direction with respect to the m-plane; A step of forming a recessed region dug in the main growth surface of the nitride semiconductor substrate, and a step of forming a nitride semiconductor layer on the main growth surface of the nitride semiconductor substrate. The step of forming the nitride semiconductor layer includes a step of forming an active layer having a quantum well structure including a well layer and a barrier layer, and the step of forming the active layer includes Al and In. A step of forming a barrier layer from the nitride semiconductor.

  In the nitride semiconductor device manufacturing method according to the sixth and seventh aspects, preferably, the growth main surface of the nitride semiconductor substrate has an off-angle in the c-axis direction in addition to the a-axis direction. Also good. In this case, it is preferable that the off angle in the a-axis direction is larger than the off angle in the c-axis direction.

  In the method for manufacturing a nitride semiconductor device according to the sixth and seventh aspects, preferably, the step of forming the digging region is performed in a region that is not digged in a region different from the digging region on the growth main surface. The step of forming a certain non-dig region includes a step of forming a nitride semiconductor layer, wherein the layer thickness is gradually reduced in the region on the non-dig region as the dig region is approached. Forming an inclined region.

  As described above, according to the present invention, a nitride semiconductor device, a nitride semiconductor wafer, and a method for manufacturing a nitride semiconductor device capable of improving the light emission efficiency can be easily obtained.

  Further, according to the present invention, a nitride semiconductor device, a nitride semiconductor wafer, and a method for manufacturing a nitride semiconductor device that can improve device characteristics and yield can be easily obtained.

  Furthermore, according to the present invention, a highly reliable nitride semiconductor device having excellent device characteristics and a manufacturing method thereof can be easily obtained.

1 is a cross-sectional view schematically showing a part of a nitride semiconductor wafer according to a first embodiment of the present invention. It is a schematic diagram (a figure showing a unit cell) for explaining a crystal structure of a nitride semiconductor. It is a schematic diagram for demonstrating the off angle of a board | substrate. It is a top view of the board | substrate used for the nitride semiconductor wafer by 1st Embodiment of this invention. It is sectional drawing which expanded and showed a part of board | substrate used for the nitride semiconductor wafer by 1st Embodiment of this invention. It is sectional drawing for demonstrating the structure of the semiconductor layer of the nitride semiconductor wafer by 1st Embodiment of this invention. It is sectional drawing for demonstrating the structure of the nitride semiconductor wafer by 1st Embodiment of this invention. It is the microscope picture which observed the cross section of the nitride semiconductor wafer by 1st Embodiment of this invention using the electron microscope. It is a top view for demonstrating the structure of the nitride semiconductor wafer by 1st Embodiment of this invention. 1 is a plan view schematically showing a part of a nitride semiconductor wafer according to a first embodiment of the present invention. 1 is a plan view of a nitride semiconductor laser device according to a first embodiment of the present invention. FIG. 12 is a cross-sectional view schematically showing the nitride semiconductor laser device according to the first embodiment of the present invention (a view corresponding to a cross section taken along the line aa in FIG. 11). 1 is a cross-sectional view showing a part of a nitride semiconductor laser device according to a first embodiment of the present invention. FIG. 3 is a cross-sectional view for explaining the structure of the active layer of the nitride semiconductor laser device according to the first embodiment of the present invention. 1 is a perspective view for explaining a method of manufacturing a nitride semiconductor laser device according to a first embodiment of the present invention (a diagram for explaining a method of manufacturing a substrate). 1 is a perspective view for explaining a method of manufacturing a nitride semiconductor laser device according to a first embodiment of the present invention (a diagram for explaining a method of manufacturing a substrate). 1 is a perspective view for explaining a method of manufacturing a nitride semiconductor laser device according to a first embodiment of the present invention (a diagram for explaining a method of manufacturing a substrate). FIG. 6 is a plan view for explaining the method for producing the nitride semiconductor laser device according to the first embodiment of the present invention (the drawing for explaining the method for producing the substrate). It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention (figure for demonstrating the manufacturing method of a board | substrate). It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the nitride semiconductor laser element by 1st Embodiment of this invention. 1 is a perspective view of a nitride semiconductor laser device on which a nitride semiconductor laser element according to a first embodiment of the present invention is mounted. It is the microscope picture (microscope picture which observed the nitride semiconductor layer surface of the sample 2 for a confirmation) which observed the nitride semiconductor layer surface on the n-type GaN substrate by the manufacturing method of 1st Embodiment. 4 is a photomicrograph of the nitride semiconductor layer surface of Comparative Sample 2 observed. It is a perspective view of the light emitting diode element produced in order to confirm the effect of the nitride semiconductor laser element by 1st Embodiment of this invention. It is the microscope picture (micrograph of the EL light emission pattern observed in the element for confirmation) which observed the EL light emission pattern of the light emitting diode element produced in order to confirm the effect of the nitride semiconductor laser element by 1st Embodiment of this invention. is there. It is a microscope picture (microphotograph of the EL light emission pattern observed in the element for a comparison) which shows a bright spot-like EL light emission pattern. Sectional drawing for demonstrating the nitride semiconductor wafer and nitride semiconductor laser element by 3rd Embodiment of this invention (The cross section of a part of board | substrate used for the nitride semiconductor wafer and nitride semiconductor laser element by 3rd Embodiment FIG. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 3rd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 3rd Embodiment of this invention. It is sectional drawing for demonstrating the nitride semiconductor wafer and nitride semiconductor laser element by the 1st modification of 3rd Embodiment of this invention. It is sectional drawing for demonstrating the nitride semiconductor wafer and nitride semiconductor laser element by the 2nd modification of 3rd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 4th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 4th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the nitride semiconductor laser element by 4th Embodiment of this invention. It is sectional drawing for demonstrating the nitride semiconductor wafer and nitride semiconductor laser element by 5th Embodiment of this invention. It is sectional drawing of the light emitting diode element by 6th Embodiment of this invention. It is sectional drawing which showed typically the light emitting diode element by 7th Embodiment of this invention. It is the microscope picture of the dark line observed in PL light emission pattern (The microscope picture of the dark line observed in the PL light emission pattern of the comparative sample 1 which comprised the barrier layer from InGaN). It is the microscope picture of the dark line observed in EL light emission pattern. It is a microscope picture of PL light emission pattern of the light emitting diode element which comprised the barrier layer from AlInGaN (micrograph of PL light emission pattern of the sample 1 for a confirmation by 1st Embodiment which comprised the barrier layer from AlInGaN). It is sectional drawing for demonstrating the example of the other shape of the recessed part (digging area | region) in 1st-7th embodiment. It is sectional drawing for demonstrating the example of the other shape of the recessed part (digging area | region) in 1st-7th embodiment. It is a top view for demonstrating the example of the other shape of the recessed part (digging area | region) in 1st-7th embodiment. It is sectional drawing (sectional drawing which showed an example of the active layer of a SQW structure) for demonstrating the example of the other structure of the active layer in 1st-7th embodiment.

  Prior to describing specific embodiments of the present invention, knowledge obtained by various studies by the inventors will be described.

When a light emitting element is formed using a nitride semiconductor substrate having an m-plane as a main growth surface, the active layer is usually composed of a multilayer film including a well layer and a barrier layer. In this case, a well layer of In _a Ga _1-a N (0 <a ≦ 1), an In _b Ga ₁ , and the like for the purpose of effectively confining light and alleviating strain generated in the active layer. A barrier layer of _-b N (0 ≦ b <1: a> b) is generally used.

  However, when the PL light emission pattern (in-plane light distribution when light is emitted by photoexcitation) is observed for the nitride semiconductor light emitting device using the active layer structure as described above, with the increase in the In composition ratio of the active layer, The present inventors have found that dark lines as shown in FIG. 50 may occur in the PL light emission pattern of the nitride semiconductor light emitting device. Further, the above dark line is observed not only in the PL light emission pattern but also in the EL light emission pattern (in-plane light distribution when light is emitted by current injection) as shown in FIG.

  Such a dark line is not preferable because it causes a decrease in light emission intensity (light emission efficiency) when the light emitting element is driven and an increase in drive current when the laser element is driven by APC (Auto Power Control). In addition, dark lines generated when the In composition of the active layer is increased are generated in parallel to the c-axis direction (<0001> direction) of the m-plane. Note that when the In concentration or the like becomes high, dark lines may be generated in the a-axis direction (<11-20> direction), and may be a net-like dark line. The dark line is presumed to be generated by defects such as misfit dislocations generated from the difference in lattice constant and thermal expansion coefficient between GaN such as the substrate and the InGaN layer of the active layer. In the c-plane (0001) that has been generally used so far, such dark lines did not occur with the increase of In. For this reason, the occurrence of such dark lines is considered to be a phenomenon peculiar to a nitride semiconductor light emitting device using a nitride semiconductor substrate having a nonpolar plane, particularly an m plane as a main growth surface.

  Further, the inventors of the present application have found that when an InGaN layer is used as the barrier layer, dark lines are significantly generated. In this case, it has also been found that dark lines become more prominent as the In composition ratio b contained in the barrier layer increases. Furthermore, it was found that even when a GaN layer was used as the barrier layer, dark lines were generated when the In composition ratio a of the well layer was large and the In concentration was such that the emission wavelength exceeded about 490 nm.

  Thus, unlike a nitride semiconductor light emitting device using a c-plane, a nitride semiconductor light emitting device using a nitride semiconductor substrate having an m-plane as a growth main surface differs from the luminous efficiency due to spontaneous polarization or piezoelectric polarization. It was found that there is a problem of causing a decrease in luminous efficiency due to the occurrence of dark lines, although the decrease in the light is suppressed. The occurrence of such dark lines is a serious problem because it hinders an increase in the emission wavelength of a nitride semiconductor light emitting device using the m-plane. In particular, in a semiconductor laser element, a decrease in light emission efficiency causes a decrease in gain (gain), which is a serious problem.

  Therefore, as a result of intensive studies by the present inventors based on the above knowledge, a dark line is formed by configuring the barrier layer of the active layer from a nitride semiconductor containing Al (for example, AlGaN, AlInGaN, AlInN, etc.). It has been found for the first time that it is possible to suppress the occurrence of. That is, it has been found that by forming a barrier layer from a nitride semiconductor containing Al, the generation of dark lines can be suppressed almost completely as shown in FIG. As the nitride semiconductor layer constituting the barrier layer, the AlGaN layer and the AlInGaN layer are most preferable, and the next preferable is AlInN. In addition, the effect can be obtained with any nitride semiconductor layer containing Al (for example, an AlGaN layer, an AlInGaN layer, an AlInN layer, etc.). Furthermore, when a nitride semiconductor containing Al (for example, an AlGaN layer, an AlInGaN layer, an AlInN layer, etc.) is used for the barrier layer of the active layer, the well layer of the active layer is preferably made of InGaN. When a nitride semiconductor layer containing Al is used for the barrier layer, the effect of suppressing the occurrence of dark lines can be obtained if it is a nonpolar surface such as an m-plane.

  Further, it was found that when the barrier layer is made of AlInGaN, the amount of In taken into the well layer formed on the barrier layer is increased as compared with the case where the barrier layer is made of AlGaN. For this reason, it is preferable to form the barrier layer from AlInGaN because the range of growth conditions can be widened. Moreover, AlInGaN obtained by adding In to AlGaN can easily form a film having good crystallinity even when grown at a lower temperature. Therefore, even when the barrier layer, which is often formed at a relatively low growth temperature of about 600 ° C. to 800 ° C., is made of AlInGaN, the crystallinity is maintained even when the barrier layer is formed at a relatively low temperature as described above. It is preferable because a good barrier layer can be obtained. In addition, it is preferable to use AlInGaN as the barrier layer because the strain applied by the barrier layer to the well layer can be reduced. It is more preferable that the strain applied to the well layer is smaller because the rate at which the light emitting element deteriorates during driving becomes slower.

Note that FIG. 50 described above is a micrograph of dark lines observed in the PL light emission pattern, and the PL light emission pattern in FIG. 51 uses a GaN substrate (m-plane just substrate) whose m-plane is the growth principal surface. The PL light emission pattern of the light emitting diode element produced in this way is shown. In this light emitting diode element, the well layer is made of In _0.2 Ga _0.8 N, and the barrier layer is made of In _0.02 Ga _0.98 .

Further, FIG. 51 described above is a micrograph of dark lines observed in the EL light emission pattern, and the EL light emission pattern of FIG. 50 uses a GaN substrate (m-plane just substrate) having an m-plane as a growth main surface. The EL light emission pattern of the light emitting diode element produced in this way is shown. In this light emitting diode element, the well layer is made of In _0.2 Ga _0.8 N, and the barrier layer is made of In _0.02 Ga _0.98 .

Further, FIG. 52 described above is a photomicrograph of a PL light emission pattern of a light emitting diode element having a barrier layer made of AlInGaN. In this light emitting diode element, the well layer is made of In _0.25 Ga _0.75 N, and the barrier layer is made of Al _0.01 In _0.03 Ga _0.96 N. Further, an m-plane a-axis off-substrate (off-angle in the a-axis direction: 1.7 degrees, off-angle in the c-axis direction: +0.1 degrees) is used as the nitride semiconductor substrate.

  In addition, as described above, the inventors of the present application have made the EL light emission pattern bright spots by setting a surface having an off angle in the a-axis direction with respect to the m-plane as the growth main surface of the nitride semiconductor substrate. It was found that it is possible to suppress this.

  Here, the nitride semiconductor substrate having an off-angle in the a-axis direction with respect to the m-plane is a nitride semiconductor layer containing Al having good flatness and crystallinity (for example, an AlGaN layer, an AlInGaN layer, an AlInN layer, etc.) The inventors of the present application have clarified that the nonpolar substrate is very suitable for film formation. Then, using the substrate having such characteristics, the barrier layer of the active layer is formed of a nitride semiconductor layer containing Al (for example, AlGaN, AlInGaN, AlInN, etc.), thereby generating the above-described dark line. In addition to the suppression effect, it has also been found that the effect of improving the flatness and crystallinity of the barrier layer can be obtained, and the luminous efficiency can be greatly improved.

  From the above findings, it is possible to further improve the surface morphology by making the layer structure laminated on the substrate not to contain a GaN layer as much as possible. At this time, the surface morphology is remarkably improved by replacing the semiconductor layer in contact with the substrate surface (main growth surface) with a nitride semiconductor layer containing Al (for example, an AlGaN layer) instead of a GaN layer containing no Al. To do. Such a phenomenon is a characteristic phenomenon in the case of using a nitride semiconductor substrate whose main growth surface is a surface having an off-angle in the a-axis direction with respect to the m-plane. When a light emitting element is formed, a GaN layer can be used as the light guide layer in order to perform light confinement. It is also possible to use a GaN layer as the contact layer.

  In addition, even when the GaN layer is included in the layer structure laminated on the substrate, when the total layer thickness of the GaN layer (GaN layer formed between the substrate and the active layer) is relatively small, Deterioration of surface morphology is suppressed. Here, the total layer thickness means the layer thickness of the GaN layer when the GaN layer is one layer, and when the GaN layer is a plurality of layers, the layer thicknesses of the plurality of GaN layers are accumulated ( It means the layer thickness. According to the study by the present inventors, the total thickness of the GaN layer formed between the substrate and the active layer is preferably 0.7 μm or less, and more preferably 0.5 μm or less. More preferably, it is 0.3 μm or less.

  As described above, by forming the nitride semiconductor layer so as to satisfy the above-mentioned condition that the total layer thickness of the GaN layer is 0.7 μm or less, the surface morphology can be improved and the layer surface can be flattened. It becomes. In addition, by forming an active layer (a well layer which is a nitride semiconductor layer containing In) on the surface of the planarized layer, the in-plane distribution of the In composition can be suppressed and the light emission efficiency can be improved. It becomes possible.

  From the viewpoint of improving the light emission efficiency, the total thickness of the GaN layer formed between the substrate and the well layer that is a nitride semiconductor layer containing In is preferably 0.7 μm or less. When a plurality of well layers are formed, the total thickness of the GaN layer formed between the well layer on the most substrate side and the nitride semiconductor substrate can be 0.7 μm or less. The total layer thickness of the GaN layer formed between the other well layers and the nitride semiconductor substrate may be 0.7 μm or less.

DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments embodying the present invention will be described in detail with reference to the drawings. In the following embodiments, “nitride semiconductor” refers to a semiconductor composed of Al _x Ga _y In _z N (0 ≦ x ≦ 1; 0 ≦ y ≦ 1; 0 ≦ z ≦ 1; x + y + z = 1). means.

(First embodiment)
FIG. 1 is a cross-sectional view schematically showing a part of a nitride semiconductor wafer according to a first embodiment of the present invention. FIG. 2 is a schematic diagram for explaining a crystal structure of a nitride semiconductor. FIG. 3 is a schematic diagram for explaining the off-angle of the substrate. 4 to 10 are views for explaining the nitride semiconductor wafer according to the first embodiment of the present invention. First, a nitride semiconductor wafer 50 according to a first embodiment of the present invention including a nitride semiconductor laser element (nitride semiconductor element) will be described with reference to FIGS. In the first embodiment, an example in which the nitride semiconductor device of the present invention is applied to a nitride semiconductor laser device will be described.

  As shown in FIG. 2, the nitride semiconductor constituting the nitride semiconductor wafer 50 according to the first embodiment has a hexagonal crystal structure. In this crystal structure, a plane (upper surface of the hexagonal column) whose normal is the c-axis [0001] of the hexagonal crystal that can be regarded as a hexagonal column is called a c-plane (0001), and each side wall surface of the hexagonal column is an m-plane {1 -100}. In the nitride semiconductor, since there is no symmetry plane in the c-axis direction, the polarization direction is along the c-axis direction. For this reason, the c-plane exhibits different properties on the + c axis side and the −c axis side. That is, the + c plane ((0001) plane) and the −c plane ((000-1) plane) are not equivalent planes, and have different chemical properties. On the other hand, since the m-plane is a crystal plane perpendicular to the c-plane, the normal of the m-plane is orthogonal to the polarization direction. For this reason, the m-plane is a nonpolar plane with no polarity. As described above, since each of the side wall surfaces of the hexagonal column is an m-plane, the m-plane has six types of plane orientations ((1-100), (10-10), (01-10), ( −1100), (−1010), and (0−110)), these plane orientations are plane orientations equivalent to crystal geometry, and hence are collectively referred to as {1-100}. Show.

  Further, the nitride semiconductor wafer 50 according to the first embodiment includes an n-type GaN substrate 10 as a nitride semiconductor substrate, as shown in FIG. The growth main surface 10a of the n-type GaN substrate 10 is a surface having an off angle with respect to the m-plane. Specifically, the n-type GaN substrate 10 of the nitride semiconductor wafer 50 has an off angle in the a-axis direction ([11-20] direction) with respect to the m-plane. The n-type GaN substrate 10 may have an off-angle in the c-axis direction ([0001] direction) in addition to the off-angle in the a-axis direction.

  Here, the off angle of the n-type GaN substrate 10 will be described in more detail with reference to FIG. First, two crystal axis directions of an a-axis [11-20] direction and a c-axis [0001] direction are defined with respect to the m-plane. These a-axis and c-axis are perpendicular to each other, and are also perpendicular to the m-axis. Further, when the crystal axis vector of the n-type GaN substrate 10 matches the normal vector of the substrate surface (growth principal surface 10a) (when the off-angle becomes 0 degrees with respect to all directions), the a-axis direction The directions parallel to the c-axis direction and the m-axis direction are defined as an X direction, a Y direction, and a Z direction, respectively. Next, consider a first surface having a normal in the Y direction and a second surface having a normal in the X direction. The crystal axis vectors that appear when the crystal axis vector is projected onto the first surface and the second surface are defined as a first projection vector and a second projection vector, respectively. At this time, an angle θa formed by the first projection vector and the normal vector is an off angle in the a-axis direction, and an angle θc formed by the second projection vector and the normal vector is an off-angle in the c-axis direction. The off-angle in the a-axis direction has the same characteristics in the + direction and the − direction because the + direction and the − direction have the same surface state in terms of crystal. For this reason, it can describe with an absolute value. On the other hand, the c-axis direction is a + direction and a − direction, and there are cases where the Ga polar surface becomes stronger and the N polarity surface becomes stronger, and the characteristics differ depending on the direction. Separately described.

  Thus, the n-type GaN substrate 10 according to the first embodiment has a main growth surface 10a inclined with respect to the m-plane {1-100}.

  In the n-type GaN substrate 10, the absolute value of the off angle in the a-axis direction with respect to the m-plane is adjusted to an angle larger than 0.1 degrees. However, since the amount of In taken into the active layer (InGaN layer such as a well layer) tends to decrease as the off-angle in the a-axis direction increases, the off-angle in the a-axis direction from the viewpoint of raw material efficiency. The absolute value of is preferably 10 degrees or less. Note that film formation is possible even when the off angle in the a-axis direction is an angle of 10 degrees or more. When the c-axis direction also has an off-angle, the off-angle in the c-axis direction is preferably adjusted to an angle greater than ± 0.1 degrees. The off angle in the c-axis direction is preferably adjusted to be smaller than the off angle in the a-axis direction.

  In the above case, it is preferable that the off angle in the a-axis direction is adjusted to an angle greater than 1 degree and 10 degrees or less. It is more preferable that the off-angle in the a-axis direction is adjusted to be in such a range because the effect of reducing the driving voltage is increased and the effect of improving the surface morphology is obtained.

  In the first embodiment, as shown in FIGS. 1 and 4, the n-type GaN substrate 10 has a plurality of recesses 2 formed by digging in the thickness direction from the growth main surface 10a. Yes. These recesses 2 are formed so as to extend in a direction intersecting with the a-axis [11-20] direction, respectively, in plan view. Specifically, in the first embodiment, each of the plurality of recesses 2 is formed to extend in a direction parallel to the c-axis [0001] direction, and the a-axis is orthogonal to the c-axis [0001] direction. They are arranged at equal intervals in the [11-20] direction with a period R (see FIG. 4) of about 150 μm to about 1200 μm (for example, about 400 μm). That is, the plurality of recesses 2 are formed in stripes on the growth main surface 10 a of the n-type GaN substrate 10. Further, in the n-type GaN substrate 10, a region where the recess 2 is formed (a region where the recess is formed) is a recess region 3. On the other hand, a region where the recess 2 is not formed in the growth main surface 10a (a region not dug) is a non-digging region 4.

  Moreover, as shown in FIG. 5, each of the plurality of concave portions 2 includes a bottom surface portion 2a and a pair of side surface portions 2b. The pair of side surfaces 2b is set so that the inclination angle γ (see FIG. 5) is a predetermined angle larger than 90 degrees. For this reason, the side part 2b of the recessed part 2 is an inclined surface. Thereby, the recessed part 2 is formed so that opening width may become large gradually toward upper direction. Further, the recess 2 has an opening width g (open end width) of about 5 μm in the [11-20] direction and a depth f of about 5 μm in the thickness direction of the n-type GaN substrate 10. is doing.

In addition, as shown in FIG. 1, the nitride semiconductor wafer 50 according to the first embodiment has an n-type nitride semiconductor layer 20a, an active layer 23, and p-type nitridation on the growth main surface 10a of the n-type GaN substrate 10. The nitride semiconductor layer 20 including the nitride semiconductor layer 20b is formed. The n-type nitride semiconductor layer 20a includes an n-type cladding layer and an n-type guide layer, and the p-type nitride semiconductor layer 20b includes a carrier block layer, a p-type cladding layer, and a p-type guide layer. And a p-type contact layer. Then, the n-type nitride semiconductor layer 20a, the active layer 23, and the p-type nitride semiconductor layer 20b are formed on the main growth surface 10a of the n-type GaN substrate 10 by an epitaxial growth method such as a MOCVD (Metal Organic Chemical Deposition) method. The nitride semiconductor layers are sequentially stacked. Specifically, as shown in FIG. 6, an n-type cladding layer 21 (layer thickness: about 2.2 μm) made of n-type Al _0.06 Ga _0.94 N is formed on the main growth surface 10 a of the n-type GaN substrate 10. Type In _0.02 Ga _0.98 N n-type guide layer 22 (layer thickness: about 0.2 μm), active layer 23, p-type Al _0.15 Ga _0.85 N carrier block layer 24 (layer thickness: about 20 nm), p-type From p-type guide layer 25 (layer thickness: about 0.1 μm) made of In _0.02 Ga _0.98 N, p-type cladding layer 26 (layer thickness: about 0.5 μm) made of p-type Al _0.05 Ga _0.95 N and p-type GaN A p-type contact layer 27 (layer thickness: about 0.1 μm) is sequentially formed. The n-type GaN substrate 10 and the n-type nitride semiconductor layer 20a are doped with, for example, Si as an n-type impurity, and the p-type nitride semiconductor layer 20b has, for example, Mg as a p-type impurity. Is doped.

  Here, if the layer containing Al, Ga, and N contained in the nitride semiconductor layer 20 contains a large amount of Al, the lattice constant difference between the n-type GaN substrate 10 and the like is large. Therefore, cracks are likely to occur. In particular, since the n-type cladding layer 21 is set to have a high Al composition ratio in order to achieve good optical confinement, the difference in lattice constant from the n-type GaN substrate 10 is larger. Since the layer thickness is as large as about 2.2 μm, the n-type cladding layer 21 is very likely to crack.

  On the other hand, in the nitride semiconductor wafer 50 according to the first embodiment, since the recess 2 (digging region 3) is formed on the growth main surface 10a of the n-type GaN substrate 10, the recess 2 (digging region 3) is formed. A recess 35 is formed on the surface of the nitride semiconductor layer 20 (the surface of each layer constituting the nitride semiconductor layer 20). The recesses 35 alleviate distortion of the nitride semiconductor layer 20 caused by lattice mismatch with the n-type GaN substrate 10. In the first embodiment, the growth main surface 10a of the n-type GaN substrate 10 is formed of a surface having an off-angle in the a-axis direction with respect to the m-plane, so that the inside of the recess 2 is inside the nitride semiconductor layer 20. It becomes difficult to be embedded with.

  In the first embodiment, the distortion generated in the active layer 23 is also alleviated by the recess 2 (digging region 3).

  Furthermore, in the first embodiment, as shown in FIGS. 1 and 7, the nitride semiconductor layer 20 is formed on the main growth surface 10 a of the n-type GaN substrate 10, so that the non-dig region 4 is formed. In the nitride semiconductor layer 20, a layer thickness gradient region 5 is formed in which the layer thickness decreases in a gradient (gradually) as it approaches the recess 2 (digging region 3). As shown in FIGS. 7 to 10, the layer thickness inclined region 5 is formed in a region in the vicinity of one side (for example, the right side) of the concave portion 2 (digging region 3) in a direction parallel to the concave portion 2 (digging region 3). It is formed in a substantially strip shape that extends. Also, the strain in the nitride semiconductor layer 20 caused by the lattice mismatch with the n-type GaN substrate 10 is alleviated also by the layer thickness gradient region 5.

  Therefore, in the nitride semiconductor wafer 50 according to the first embodiment, the depression 35 formed on the surface of the nitride semiconductor layer 20 and the layer thickness gradient region 5 formed in the nitride semiconductor layer 20 on the non-dig region 4. Due to the two strain relaxation effects, a very high crack suppression effect is achieved. In addition, the crystal of the nitride semiconductor layer 20 formed on the growth main surface 10a is obtained by using the n-type GaN substrate 10 in which the surface having an off angle in the a-axis direction with respect to the m-plane is the growth main surface 10a. The property is good. For this reason, cracks are unlikely to occur in the nitride semiconductor layer 20. Thereby, even in the n-type cladding layer 21 where cracks are very likely to occur, the occurrence of cracks is suppressed. Of course, the occurrence of cracks is also suppressed in each nitride semiconductor layer other than the n-type cladding layer 21.

  Further, the layer thickness inclined region 5 has an n-type GaN substrate 10 in which a surface having an off-angle in the a-axis direction with respect to the m-plane is the growth main surface 10a and the concave portion 2 (digging region 3) is formed. Is used, a region on one side (for example, the right side) of the recess 2 (digging region 3) (a region near the recess 2) is formed. This is because the growth principal surface 10a of the n-type GaN substrate 10 has an off-angle in the a-axis direction with respect to the m-plane, so that the flowing direction of the source atoms changes in the direction along the a-axis. Since the flow of the source atoms is divided by the recess 2 (digging region 3), the supply of source atoms is reduced in the region near one side of the recess 2 (digging region 3) in the non-digging region 4. It is thought that there is. Further, the layer thickness inclined region 5 can be formed on one side (for example, the right side) of the recess 2 (digging region 3) depending on whether the off angle in the a-axis direction is positive (+) or negative (−), or the recess 2 It is determined whether it can be made on the other side (for example, the left side) of (digging area 3). This is considered to be because the flow direction of the source atoms changes depending on whether the off angle in the a-axis direction is positive (+) or negative (−). The off angle in the a-axis direction is the same regardless of whether it is positive (+) or negative (−) in crystallographic terms, and may be discussed in terms of absolute values. When a GaN substrate having the c-plane as the growth main surface is used, even if a recess (digging region) similar to the above is formed, the layer thickness gradient region as described above is not formed. Further, even if a GaN substrate having an m-plane as a growth principal surface does not have an off-angle in the a-axis direction, the above-described recesses (digging regions) may be formed even if the same recesses (digging regions) are formed. Such a layer thickness gradient region is not formed. However, as will be described later, it is possible to form a layer thickness gradient region by forming a growth suppressing film in the recess 2 (digging region 3).

  Further, as shown in FIG. 7, the layer thickness gradient region 5 of the nitride semiconductor layer 20 has the smallest layer thickness at the portion closest to the recess 2 (digging region 3), and the recess 2 (digging region 3). The layer thickness gradually increases (inclined) as the distance from the surface increases. In the portion near the recess 2 (digging region 3) in the layer thickness gradient region 5, regardless of the n-type nitride semiconductor layer 20a (see FIG. 1) and the p-type nitride semiconductor layer 20b (see FIG. 1), The layer thickness is small. The thickness t11 of the smallest layer thickness in the layer thickness gradient region 5 is a region other than the layer thickness gradient region 5 (light emitting portion formation region 6 described later) in the nitride semiconductor layer 20 on the non-dig region 4. It is about 1/2 to 2/3 of the thickness t12. However, depending on the growth conditions of the nitride semiconductor layer 20, the thickness may deviate from the above layer thickness. The above values are only approximate.

  Further, the width w of the layer thickness gradient region 5 (width in the [11-20] direction) and the layer thickness gradient angle θ of the layer thickness gradient region 5 (the growth main surface 10a of the n-type GaN substrate 10 and the layer thickness gradient region 5). The angle formed with the surface is controlled by the off angle in the a-axis direction. Specifically, as the off angle in the a-axis direction increases, the width w of the layer thickness gradient region 5 decreases and the layer thickness gradient angle θ increases. For this reason, in the first embodiment, the width w of the layer thickness gradient region 5 is set to a predetermined length by adjusting the off angle in the a-axis direction, and the layer thickness gradient angle θ is predetermined. It is set to be an angle. If the off angle in the a-axis direction is too small, the width w of the layer thickness gradient region 5 becomes too large. On the other hand, the larger the layer thickness inclination angle θ, the larger the layer thickness variation in the layer thickness inclined region 5. For this reason, in order to relieve the stress of the nitride semiconductor layer 20, it is preferable that the layer thickness inclination angle θ is large. Therefore, in consideration of the formation conditions of the layer thickness gradient region 5, the absolute value of the off angle in the a-axis direction is preferably 0.5 degrees or more. Further, when the period R (see FIG. 4) of the recess 2 is 400 μm, for example, the width w of the layer thickness inclined region 5 is set to 1 μm or more and 150 μm or less by adjusting the off angle in the a-axis direction. It is more preferable. By suppressing the width w of the layer thickness gradient region 5 to 1 μm or more, it is possible to suppress the inconvenience that the crack suppression effect is reduced due to the width w of the layer thickness gradient region 5 being smaller than 1 μm. Is possible.

  Since the above-described layer thickness gradient region 5 is a region where the layer thickness changes, it is difficult to suppress variation in characteristics when a light emitting portion (a ridge portion described later) is formed in this region. For this reason, it can be said that the layer thickness gradient region 5 is not suitable as a region for forming a light emitting portion (ridge portion).

  On the other hand, the nitride semiconductor layer 20 on the non-excavated region 4 has a light emitting portion forming region 6 suitable for forming a light emitting portion (ridge portion) having a very small layer thickness variation compared to the layer thickness inclined region 5. is doing. That is, the nitride semiconductor layer 20 formed on the growth main surface 10a of the n-type GaN substrate 10 has a layer thickness gradient region 5 that is not suitable for forming a light emitting portion (ridge portion) on the non-digging region 4, and The light-emitting part forming region 6 has a very uniform layer thickness and is suitable for forming a light-emitting part (ridge part). In addition, in the layer thickness inclination area | region 5, compared with the light emission part formation area | region 6, the suppression effect of bright spot-like light emission becomes weak.

  In the first embodiment, the light emitting portion forming region 6 in the nitride semiconductor layer 20 has a very good surface morphology. The light emitting portion forming region 6 has a very small layer thickness variation as a whole, but when comparing the layer thickness variation in the c-axis [0001] direction with the layer thickness variation in the a-axis [11-20] direction, The layer thickness variation in the c-axis [0001] direction is smaller than the layer thickness variation in the a-axis [11-20] direction.

  As shown in FIG. 1, a convex ridge portion 28 serving as a current passage portion is formed in a predetermined region of the light emitting portion forming region 6 in the nitride semiconductor layer 20. As shown in FIG. 10, the ridge portion 28 is formed so as to extend in the c-axis [0001] direction with a smaller layer thickness variation in plan view, and in the a-axis [11-20] direction. In a period of about 150 μm to about 1200 μm (for example, about 400 μm). Thereby, the plurality of ridge portions 28 are formed in a stripe shape. As a result of the formation of the ridge portion 28, an optical waveguide region 29 (see FIGS. 1 and 10) serving as a light emitting portion is formed in the nitride semiconductor layer 20 in a stripe shape. As shown in FIG. 1, the ridge portion 28 is formed in the light emitting portion forming region 6 that is separated from the recess 2 by a predetermined distance or more (for example, 5 μm or more). An insulating layer 30 for current confinement is formed on the upper surface of the nitride semiconductor layer 20 and on both sides of the ridge portion 28.

  A p-side electrode 31 for supplying current to the optical waveguide region 29 is formed on the nitride semiconductor layer 20. On the other hand, an n-side electrode 32 is formed on the back surface of the n-type GaN substrate 10.

  Further, as shown in FIG. 10, the nitride semiconductor wafer 50 is provided with planned dividing lines P1 and P2 for separating into nitride semiconductor laser elements. The planned division line P1 is set so as to extend in the a-axis [11-20] direction when viewed in plan, and the planned division line P2 is extended in the c-axis [0001] direction when viewed in plan. Is set to Further, the division line P2 is set so that the nitride semiconductor laser element after the division includes one concave portion 2 and at least a part of the layer thickness inclined region 5.

  The nitride semiconductor wafer 50 according to the first embodiment configured as described above is divided into individual nitride semiconductor laser elements by being divided along the predetermined dividing lines P1 and P2.

  FIG. 11 is a plan view of the nitride semiconductor laser device according to the first embodiment of the present invention, and FIG. 12 is a cross-sectional view schematically showing the nitride semiconductor laser device according to the first embodiment of the present invention. . FIG. 13 is a cross-sectional view showing a part of the nitride semiconductor laser device according to the first embodiment of the present invention, and FIG. 14 shows the structure of the active layer of the nitride semiconductor laser device according to the first embodiment of the present invention. It is sectional drawing for demonstrating. Next, the nitride semiconductor laser element 100 according to the first embodiment of the present invention will be described with reference to FIGS. Since the nitride semiconductor laser device 100 according to the first embodiment can be obtained from the nitride semiconductor wafer 50 according to the first embodiment described above, in the following description, the nitride obtained from the nitride semiconductor wafer 50 will be described. The semiconductor laser device 100 will be described as an example.

  As shown in FIG. 11, the nitride semiconductor laser device 100 according to the first embodiment includes a pair of resonators including a light emitting surface 40a from which laser light is emitted and a light reflecting surface 40b facing the light emitting surface 40a. It has a surface 40. The nitride semiconductor laser device 100 has a length L (chip length L (resonance)) of about 300 μm to about 1800 μm (for example, about 600 μm) in a direction (c-axis [0001] direction) orthogonal to the resonator surface 40. And a width W (chip width W) of about 150 μm to about 1200 μm (for example, about 400 μm) in the direction along the resonator surface 40 (a-axis [11-20] direction). )have.

  Further, as shown in FIG. 12, the nitride semiconductor laser device 100 according to the first embodiment includes an n-type GaN substrate 10 having a growth main surface 10a as a surface having an off angle in the a-axis direction with respect to the m-plane. The n-type GaN substrate 10 is formed by stacking a nitride semiconductor layer 20 including an n-type nitride semiconductor layer 20a, an active layer 23, and a p-type nitride semiconductor layer 20b on the main growth surface 10a of the n-type GaN substrate 10. Has been.

Here, in the first embodiment, the semiconductor layer in contact with the growth main surface 10a of the n-type GaN substrate 10 is made of a nitride semiconductor containing Al. Specifically, as shown in FIG. 13, the nitride semiconductor laser device 100 has a thickness of about 2.2 μm on the growth main surface 10a of the n-type GaN substrate 10 so as to be in contact with the growth main surface 10a. An n-type cladding layer 21 made of n-type Al _0.06 Ga _0.94 N is formed. The semiconductor layer in contact with the growth main surface 10a of the GaN substrate 10 may be, for example, an AlInGaN layer, an AlInN layer, or the like other than the AlGaN layer. In addition to the nitride semiconductor layer containing Al, such as an AlGaN layer or an AlInGaN layer, an InGaN layer and an InN layer may be used.

An n-type guide layer 22 made of n-type In _0.02 Ga _0.98 N having a thickness of about 0.2 μm is formed on the n-type cladding layer 21. An active layer 23 is formed on the n-type guide layer 22. Instead of the n-type guide layer 22, a non-doped guide layer may be formed.

As shown in FIG. 14, the active layer 23 has a quantum well structure in which well layers 23a and barrier layers 23b are alternately stacked. In the first embodiment, the active layer 23 is made of AlInGaN whose barrier layer 23b is a nitride semiconductor containing Al and In. Specifically, the active layer 23 is a quantum well (DQW; in which two well layers 23a made of InGaN (In _x1 Ga _1-x1 N) and three barrier layers 23b made of AlInGaN are alternately stacked. (Double Quantum Well) structure. More specifically, the active layer 23 includes a first barrier layer 231b, a first well layer 231a, a second barrier layer 232b, a second well layer 232a, and a third barrier layer 233b sequentially from the n-type guide layer 22 side. It is formed by being laminated. The two well layers 23a (the first well layer 231a and the second well layer 232a) are each formed to a thickness of about 3 nm to about 4 nm. The first barrier layer 231b is formed with a thickness of about 30 nm, the second barrier layer 232b is formed with a thickness of about 16 nm, and the third barrier layer 233b is formed with a thickness of about 60 nm. ing. That is, the three barrier layers 23b are formed to have different thicknesses.

  The first barrier layer 231b is preferably formed to a thickness of 8 nm to 50 nm, more preferably a thickness of 10 nm to 40 nm. Thus, if the first barrier layer 231b is formed to a thickness of at least 8 nm or more, the flatness of the first barrier layer 231b formed after the growth of the n-type guide layer 22 is easily improved. It becomes possible. Further, if the first barrier layer 231b is formed to a thickness of 50 nm or less, carriers can be efficiently injected. The second barrier layer 232b is preferably formed with a thickness of 8 nm or more and 30 nm or less, and more preferably formed with a thickness of 10 nm or more and 20 nm or less. Thus, if the second barrier layer 232b is formed to a thickness of at least 8 nm or more, the flatness of the second barrier layer 232b formed after the growth of the first well layer 231a having a high In composition ratio can be easily achieved. Furthermore, it becomes possible to make it better. In addition, if the second barrier layer 232b is formed to a thickness of 30 nm or less, carriers can be efficiently injected. Furthermore, the third barrier layer 233b is preferably formed to a thickness of 8 nm to 100 nm, and more preferably a thickness of 10 nm to 80 nm. In this way, if the third barrier layer 233b is formed to a thickness of at least 8 nm or more, it is formed after the growth of the second well layer 232a having a high In composition ratio and before the growth of the carrier block layer 24. The flatness of the third barrier layer 233b can be easily improved. Further, if the third barrier layer 233b is formed with a thickness of 100 nm or less, carriers can be efficiently injected.

  In the first embodiment, the number of well layers is two. However, when the number of well layers is greater than two (for example, three or four layers), the first barrier is provided. The layer can be defined as an initial barrier layer formed on the lower layer side (substrate side) of the well layer closest to the substrate. The second barrier layer can be defined as a barrier layer sandwiched between well layers. Furthermore, the third barrier layer can be defined as a barrier layer formed on a well layer (final well layer) farthest from the substrate. By defining the first barrier layer, the second barrier layer, and the third barrier layer in this way, even when two or more well layers are formed, the preferable layer thickness conditions of the barrier layer described above are applied. Is possible. And if such conditions are satisfied, the above effects are obtained, which is preferable.

In the first embodiment, the In composition ratio x1 of the well layer 23a (active layer 23) is configured to be not less than 0.15 and not more than 0.45 (for example, 0.2 to 0.25). Further, the barrier layer 23b is composed of _{Al s In t Ga u N (} s + t + u = 1). The Al composition ratio s of the barrier layer 23b is, for example, 0 <s ≦ 0.08, and the In composition ratio t is, for example, 0 <t ≦ 0.10. By making the Al composition ratio s of the barrier layer 23b 0.08 or less, light confinement is efficiently performed, which is more preferable. In addition, by forming the barrier layer 23b from AlInGaN, it is possible to effectively suppress the generation of dark lines peculiar to the m-plane. Further, by configuring the barrier layer 23b from AlInGaN, it is possible to improve the light emission efficiency as compared with the case where the barrier layer is configured from GaN or InGaN. In particular, when the In composition ratio x1 of the well layer 23a is not less than 0.15 and not more than 0.45, the improvement tendency of the light emission efficiency is high.

  Here, in general, the well layer is often set to a thickness of about 3 nm in a region where the In composition ratio is large (x1 ≧ 0.15). This is to suppress the occurrence of misfit dislocations and the like resulting from lattice mismatch when the In composition ratio is increased. However, when a barrier layer made of a nitride semiconductor containing Al (eg, AlInGaN) is formed on a GaN substrate having an off angle in the a-axis direction with respect to the m-plane, the thickness of the well layer is 4.0 nm or more. It is also possible to set to. The reason is considered to be that the effect of suppressing the generation of dark lines and the effect of protecting the active layer are obtained. Furthermore, by using the n-type GaN substrate 10, the flatness of the layer surface is improved, and the In composition becomes very uniform in the plane. For this reason, even when the thickness of the well layer is large, it is difficult to form a local region having a high In composition. For this reason, it is considered that the well layer can be made thicker.

  Moreover, when the thickness of the well layer is larger than 8 nm, many misfit dislocations may occur. For this reason, the thickness of the well layer is preferably 8 nm or less. Further, it is preferably set in the range of about 2.5 nm to about 4.0 nm.

  For the same reason, when the thickness of the well layer is set in the range of about 1.5 nm to about 4.0 nm, the well layer can be formed by forming the barrier layer from a nitride semiconductor containing Al (for example, AlInGaN). The number of layers can be increased. For example, when a conventional active layer structure is employed in a nitride semiconductor laser element, the light emission efficiency is significantly deteriorated by forming three or more well layers. On the other hand, by forming the barrier layer from a nitride semiconductor containing Al, even when five well layers are formed, deterioration of light emission efficiency is suppressed. Further, in the light emitting diode element (LED), by forming the barrier layer from a nitride semiconductor containing Al, deterioration of the light emission efficiency is suppressed even when eight well layers are formed. The light-emitting diode element has a thickness smaller than that of the semiconductor laser element, and the thermal damage given to the active layer during the formation of the p-type semiconductor layer is smaller than that of the semiconductor laser element. However, the active layer (well layer) can be easily multi-layered.

  Note that the well layer of the active layer is intended to be a quantum well, and as a result, the layer thickness may fluctuate within a range of several nm or less, or may be locally doted. Including.

  When the barrier layer of the active layer is made of a nitride semiconductor containing Al (for example, an AlInGaN layer, an AlGaN layer, an AlInN layer, etc.), the well layer is preferably made of InGaN as described above.

On the active layer 23, as shown in FIG. 13, a carrier block layer 24 as a p-type semiconductor layer containing Al is formed. The carrier block layer 24 is made of p-type Al _y Ga _1-y N and has a thickness of 40 nm or less (for example, about 12 nm). Further, the carrier block layer 24 is configured such that the Al composition ratio y is 0.08 or more and 0.35 or less (for example, about 0.15). A p-type guide layer 25 made of p-type In _0.02 Ga _0.98 N having a convex portion and a flat portion other than the convex portion is formed on the carrier block layer 24. A p-type cladding layer 26 made of p-type Al _0.05 Ga _0.95 N having a thickness of about 0.5 μm is formed on the convex portion of the p-type guide layer 25. A p-type contact layer 27 made of p-type GaN having a thickness of about 0.1 μm is formed on the p-type cladding layer 26. A striped (elongated) ridge portion having a width of about 1 μm to about 10 μm (for example, about 1.5 μm) is formed by the p-type contact layer 27, the p-type cladding layer 26, and the convex portions of the p-type guide layer 25. 28 is configured. As shown in FIG. 11, the ridge portion 28 is formed so as to extend in the c-axis [0001] direction when seen in a plan view.

  Further, as shown in FIG. 14, the distance h between the carrier block layer 24 and the well layer 23a (the well layer 23a (232a) closest to the carrier block layer 24) is the efficiency of carrier injection into the well layer 23a. In order to improve, it is set to about 60 nm. The distance h between the carrier block layer 24 and the well layer 23a is preferably set to 80 nm or less, and more preferably set to 30 nm or less. In the first embodiment, the distance h is the same as the thickness of the third barrier layer 233b.

  If the distance h between the carrier block layer 24 and the well layer 23a is 200 nm or more, the current spreads when carriers are diffused from the carrier block layer 24 to the active layer 23. Slightly suppressed. On the other hand, if the n-type GaN substrate 10 having the growth main surface 10a provided with an off-angle with respect to the m-plane is used, the distance h between the carrier block layer 24 and the well layer 23a is not set to 200 nm or more. Even in this case, bright spot light emission can be effectively suppressed. For example, even when the distance h between the carrier block layer 24 and the well layer 23a is shorter than 120 nm, bright spot light emission can be effectively suppressed. A shorter distance h between the carrier block layer 24 and the well layer 23a is preferable because the injection efficiency of carriers into the well layer 23a is improved. For this reason, by making the distance h between the carrier block layer 24 and the well layer 23a shorter than 120 nm, the efficiency of carrier injection into the well layer 23a can be improved.

  Here, in the nitride semiconductor laser device 100 according to the first embodiment, as shown in FIG. 12, the above-described recess 2 (digging region 3) is formed in a predetermined region of the n-type GaN substrate 10. The recess 2 is formed so as to extend in a direction parallel to the ridge portion 28 (optical waveguide region 29 (see FIG. 13)) (c-axis [0001] direction) in plan view. The recess 2 is arranged on one side surface of the nitride semiconductor laser element 100. The ridge portion 28 is formed in a region on the non-digging region 4 that is separated from the recess 2 by a predetermined distance or more (for example, 5 μm or more).

  Moreover, in 1st Embodiment, as above-mentioned, since the recessed part 2 (digging area | region 3) is formed in the growth main surface 10a of the n-type GaN substrate 10, it is on the recessed part 2 (digging area | region 3). A recess 35 is formed on the surface of the nitride semiconductor layer 20 (the surface of each layer constituting the nitride semiconductor layer 20). The recesses 35 alleviate distortion of the nitride semiconductor layer 20 caused by lattice mismatch with the n-type GaN substrate 10.

  In the first embodiment, the nitride semiconductor layer 20 is formed on the main growth surface 10 a of the n-type GaN substrate 10, so that the nitride semiconductor layer 20 on the non-dig region 4 has a layer thickness gradient. A region 5 and a light emitting portion forming region 6 are formed. The layer thickness inclined region 5 is formed on one side (A1 side) with respect to the concave portion 2 (digging region 3), and the light emitting portion forming region 6 is formed on the concave portion 2 (digging region 3). Thus, it is formed on the other side (A2 side) opposite to the layer thickness gradient region 5. Also, the strain in the nitride semiconductor layer 20 caused by the lattice mismatch with the n-type GaN substrate 10 is alleviated also by the layer thickness gradient region 5.

  As described above, the nitride semiconductor laser device 100 according to the first embodiment has the depression 35 formed on the surface of the nitride semiconductor layer 20 and the layer thickness formed on the nitride semiconductor layer 20 on the non-dig region 4. Due to the two strain relaxation effects due to the inclined region 5, it has a very high crack suppression effect.

  Furthermore, in the first embodiment, by using the n-type GaN substrate 10 in which the growth main surface 10a is a surface having an off angle in the a-axis direction with respect to the m-plane, the nitride formed on the growth main surface 10a. The crystallinity of the semiconductor layer 20 is good. Further, by using the n-type GaN substrate 10, the surface morphology of the light emitting portion forming region 6 in the nitride semiconductor layer 20 is very good. For this reason, cracks are unlikely to occur in the nitride semiconductor layer 20.

  Therefore, even when an AlGaN layer having a high Al composition and having a large lattice constant difference from the n-type GaN substrate 10 is formed on the growth main surface 10a, generation of cracks is suppressed. For this reason, generation of cracks is suppressed in the nitride semiconductor layer 20 formed on the main growth surface 10 a of the n-type GaN substrate 10.

  The ridge portion 28 is formed in a predetermined region of the light emitting portion forming region 6 having good crystallinity and surface morphology.

Further, as shown in FIGS. 12 and 13, insulating layers 30 for current confinement are formed on both sides of the ridge portion 28. Specifically, a thickness of about 0.1 μm to about 0.3 μm (for example, about 0.15 μm) is formed on the p-type guide layer 25, the side surface of the p-type cladding layer 26, and the side surface of the p-type contact layer 27. An insulating layer 30 made of SiO ₂ is formed.

  A p-side electrode 31 is formed on the upper surfaces of the insulating layer 30 and the p-type contact layer 27 so as to cover a part of the p-type contact layer 27. The p-side electrode 31 is in direct contact with the p-type contact layer 27 in a portion covering the p-type contact layer 27. The p-side electrode 31 includes a Pd layer (not shown) having a thickness of about 15 nm, a Pt layer (not shown) having a thickness of about 15 nm, and about 200 nm from the insulating layer 30 (p-type contact layer 27) side. A multilayer structure in which Au layers (not shown) having a thickness of 1 are sequentially stacked.

  Further, on the back surface of the n-type GaN substrate 10, an Hf layer (not shown) having a thickness of about 5 nm and an Al layer (not shown) having a thickness of about 150 nm are sequentially formed from the back side of the n-type GaN substrate 10. ), A Mo layer (not shown) having a thickness of about 36 nm, a Pt layer (not shown) having a thickness of about 18 nm, and an Au layer (not shown) having a thickness of about 200 nm are sequentially stacked. An n-side electrode 32 made of is formed.

Further, on the light emission surface 40a (see FIG. 11) of the nitride semiconductor laser element 100, for example, an emission side coating film (not shown) having a reflectance of 5% to 80% is formed. On the other hand, on the light reflecting surface 40b (see FIG. 11), for example, a reflection side coating film (not shown) having a reflectance of 95% is formed. The reflectance of the exit side coating film is adjusted to a desired value by the oscillation output. In addition, the emission side coating film is, for example, aluminum oxynitride film or nitride film AlO _x N _1-x (0 ≦ x ≦ 1): film thickness 30 nm / Al ₂ O in order from the emission end face of the semiconductor. ₃ (film thickness: 215 nm), and the reflection-side coating film is formed of a multilayer film such as SiO ₂ or TiO ₂ . For example, a dielectric film such as SiN, ZrO ₂ , Ta ₂ O ₅ , or MgF ₂ may be used as a material other than the above.

As the film configuration on the light emitting surface side, AlO _x N _1-x (0 ≦ x ≦ 1): film thickness 12 nm / SiN which is a silicon nitride film (film thickness: 100 nm) may be used. As described above, an aluminum oxynitride film or nitride is formed on the cleaved end face (c face in the first embodiment) of the m-plane nitride semiconductor substrate, or on the etched end face etched by vapor phase etching or liquid phase etching. By forming AlO _x N _1-x (0 ≦ x ≦ 1), which is a film, the ratio of non-radiative recombination at the interface between the semiconductor and the emission side coating film can be greatly reduced, and COD (catalytic optical damage) The level can be improved significantly. Further, AlO _x N _1-x (0 ≦ x ≦ 1) which is an aluminum oxynitride film or nitride film is more preferably the same hexagonal crystal as the nitride semiconductor. Furthermore, it is more preferable to crystallize with the nitride semiconductor aligned with the crystal axis because the ratio of non-radiative recombination is further reduced and the COD level is further improved. In order to increase the reflectance on the light exit surface side, a silicon oxide film, an aluminum oxide film, a titanium oxide film, a tantalum oxide film, and a zirconium oxide film are formed on the coating film. Alternatively, a laminated film in which a silicon nitride film or the like is laminated may be formed.

  In the first embodiment, as described above, by forming the barrier layer 23b from AlInGaN, which is a nitride semiconductor containing Al and In, generation of dark lines can be suppressed almost completely. Thereby, the fall of the luminous efficiency resulting from generation | occurrence | production of a dark line can be suppressed. Further, by suppressing the occurrence of dark lines, it is possible to suppress the deterioration of the light emission efficiency. Thereby, element characteristics and reliability can be improved. Note that by suppressing the occurrence of dark lines, a uniform light emission pattern can be obtained, so that the gain can be increased.

  Further, by using an AlInGaN layer for the barrier layer 23b, an effect of improving light confinement can be obtained in addition to the effect of suppressing the generation of dark lines. Further, by forming the well layer 23a on the barrier layer 23b made of AlInGaN, the efficiency of In taken into the well layer 23a can be made very good. For this reason, even when the gas flow rate of In is reduced, a high In composition ratio can be maintained. As a result, the In incorporation efficiency can be improved. As a result, it is possible to increase the wavelength more effectively. Moreover, since the consumption of source gas (for example, TMIn) can be reduced, there is a merit in terms of cost.

  Furthermore, in the first embodiment, the barrier layer 23b is made of AlInGaN, so that the steepness of the interface can be improved as compared with the case where the barrier layer 23b is made of GaN or InGaN. The satellite peak due to can be clarified. This is considered to be because the barrier layer 23b contains Al and In, thereby suppressing aggregation and diffusion of In and suppressing thermal damage of the active layer 23.

  In the first embodiment, by forming the recess 2 (digging region 3) in the n-type GaN substrate 10, the nitride semiconductor layer 20 (nitride semiconductor layer 20) on the recess 2 (digging region 3) is formed. A depression 35 can be formed on the surface of each layer. For this reason, even when the lattice constant difference or the thermal expansion coefficient difference between the n-type GaN substrate 10 and the nitride semiconductor layer 20 increases and the nitride semiconductor layer 20 is distorted, the nitride semiconductor layer 20 ( The distortion of the nitride semiconductor layer 20) formed on the non-dig region 4 can be alleviated by the above-described depression formed on the surface of the nitride semiconductor layer 20 on the dig region 3. Thereby, it is possible to effectively suppress the occurrence of cracks in the nitride semiconductor layer 20. Therefore, by configuring as described above, it is possible to obtain nitride semiconductor laser element 100 having high reliability and element characteristics in which generation of cracks is suppressed.

  In the first embodiment, the recess 2 (digging region 3) is formed in the n-type GaN substrate 10 so that the barrier layer 23b of the active layer 23 is made of a nitride semiconductor containing Al (for example, AlInGaN). The distortion of the active layer 23 caused by this can be effectively alleviated. Thereby, generation | occurrence | production of a dark line can be suppressed more effectively. Further, by forming the concave portion 2 (digging region 3) in the n-type GaN substrate 10, the strain generated in the active layer 23 can be alleviated. For this reason, generation | occurrence | production and expansion of a dark line can also be suppressed. Thereby, nitride semiconductor laser device 100 with high brightness and reliability can be obtained.

  Furthermore, in the first embodiment, the surface having an off-angle in the a-axis direction with respect to the m-plane is the growth main surface 10a of the GaN substrate 10, so that the EL emission pattern becomes bright and the in-plane wavelength is increased. Unevenness can be suppressed. That is, with this configuration, the EL light emission pattern can be improved. Thereby, the luminous efficiency of the nitride semiconductor laser element can be further improved. In addition, by improving the light emission efficiency, the nitride semiconductor laser element 100 with high luminance can be obtained. The reason why the bright spot-like light emission suppression effect is obtained is that the growth main surface 10a of the GaN substrate 10 has an off-angle in the a-axis direction with respect to the m-plane, so that the growth main surface 10a is on the growth main surface 10a. It is considered that when the active layer 23 (well layer 23a) is grown, the migration direction of In atoms is changed, and aggregation of In is suppressed even under conditions where the In composition ratio is high (In supply amount is large). . In addition, since the growth mode of the p-type semiconductor layer formed on the active layer 23 also changes, the activation rate of Mg, which is a p-type impurity, is improved, and the resistance of the p-type semiconductor layer is reduced. It is thought that. In addition, since the p-type semiconductor layer has a low resistance, it becomes easy to inject a current uniformly, thereby making the EL light emission pattern uniform.

  In the first embodiment, since the EL light emission pattern can be made uniform by suppressing the brightening of the EL light emission pattern, the driving voltage can also be reduced. Note that by suppressing the formation of bright spots in the EL light emission pattern, the light emission efficiency can be improved, whereby the device characteristics and reliability can be further improved. That is, by configuring as described above, it is possible to easily obtain a nitride semiconductor laser element 100 having excellent element identification and high reliability.

  In the first embodiment, a surface having an off-angle in the a-axis direction with respect to the m-plane is the growth main surface 10a of the n-type GaN substrate 10, so that nitridation formed on the growth main surface 10a. The crystallinity of the physical semiconductor layer 20 can be improved. For this reason, it is possible to make it difficult for the nitride semiconductor layer 20 to crack. Moreover, since the surface morphology of the nitride semiconductor layer 20 can be made favorable by configuring as described above, the nitride semiconductor layer 20 having a uniform thickness can be obtained. For this reason, it is possible to suppress the inconvenience that the nitride semiconductor layer 20 has a locally thick region due to the non-uniform thickness of the nitride semiconductor layer 20. Since cracks are likely to occur in such a thick region, cracks can be made harder to occur by suppressing the formation of locally thick regions in the nitride semiconductor layer 20.

  In the first embodiment, the surface having an off-angle in the a-axis direction with respect to the m-plane is the growth main surface 10a, whereby the barrier layer 23b made of a nitride semiconductor containing Al and In is formed. Flatness can be improved. Therefore, by forming the well layer 23a on the highly flat barrier layer 23b, the in-plane distribution of the In composition in the well layer 23a can be suppressed from becoming non-uniform. In addition, the crystallinity of the active layer 23 (well layer 23a) can be improved. Thereby, luminous efficiency can be further improved.

The barrier layer 23b formed below the well layer 23a (on the n-type GaN substrate 10 side) is made of a nitride semiconductor containing Al (for example, Al _s In _t Ga _u N), and its Al composition By setting the ratio s to 0 <s ≦ 0.08 and the In composition ratio t to 0 <t ≦ 0.10, in addition to the effect of suppressing the generation of dark lines and the effect of protecting the active layer 23, the barrier layer 23b is flat. The effect of improving the property can also be obtained. Thereby, the luminous efficiency of the well layer 23a can be improved more effectively.

  In the first embodiment, the recess 2 (digging region 3) is filled with the nitride semiconductor layer 20 by using the n-type GaN substrate 10 having an off-angle in the a-axis direction with respect to the m-plane. Can be difficult. As a result, a recess can be easily formed on the surface of the nitride semiconductor layer 20 on the recess 2 (digging region 3). As a result, the occurrence of cracks can be easily suppressed.

  As described above, in the first embodiment, since the light emission efficiency can be greatly improved, the element characteristics and the reliability can be improved. Thereby, a highly reliable nitride semiconductor laser device having excellent device characteristics can be obtained. Moreover, since generation | occurrence | production of a crack can be suppressed effectively, the number of the good products obtained from one wafer can be increased. Thereby, a yield can be improved. Further, by suppressing the occurrence of cracks, the reliability of the element can be improved and the element characteristics can be improved. Further, by suppressing the occurrence of dark lines, variation in element characteristics can be reduced, and the number of elements having characteristics within the standard range can be increased. For this reason, the yield can be improved also by this.

  In the first embodiment, the nitride semiconductor layer 20 on the non-dig region 4 has a layer thickness gradient region in which the layer thickness is gradually (gradually) decreased as it approaches the recess 2 (dig region 3). By forming 5, the strain generated in the nitride semiconductor layer 20 can be relaxed also in the layer thickness gradient region 5. For this reason, due to the two strain relaxation effects due to the depression 35 formed on the surface of the nitride semiconductor layer 20 and the layer thickness gradient region 5 formed in the nitride semiconductor layer 20 on the non-dig region 3, A high crack suppression effect can be obtained. Thereby, even when the n-type cladding layer 21 having a high Al composition ratio is formed in order to perform light confinement satisfactorily, it can be easily formed with almost no cracks. Further, since the strain of the active layer 23 can be effectively relieved by the layer thickness gradient region 5, it is possible to more effectively suppress the occurrence of dark lines. The reason why the above-described high crack suppression effect is obtained is that the layer thickness gradient region is originally thin, so that the layer thickness gradient region itself has less internal strain, and the layer thickness gradually increases. This is considered to be because a higher strain relaxation effect can be obtained when the strain is relaxed stepwise because it changes (inclined).

  In the first embodiment, since the surface morphology of the light emitting portion forming region 6 in the nitride semiconductor layer 20 can be made very good by configuring as described above, variation in element characteristics can be reduced. Can do. For this reason, since the number of elements having characteristics within the standard range can be increased, the yield can also be improved. In addition, device characteristics and reliability can be improved by improving the surface morphology.

  Further, in the first embodiment, the layer thickness inclined region 5 can be easily formed by forming the concave portion 2 (digging region 3) so as to extend in a direction parallel to the c-axis [0001] direction as viewed in a plan view. Therefore, it is possible to easily obtain a high strain relaxation effect.

  In the first embodiment, the absolute value of the off angle in the a-axis direction in the n-type GaN substrate 10 is made larger than 0.1 degrees, thereby suppressing the occurrence of dark lines and the bright spot shape of the EL light emission pattern. And in-plane wavelength variation can be easily suppressed.

  When the growth principal surface 10a of the n-type GaN substrate 10 also has an off-angle in the c-axis direction with respect to the m-plane, the off-angle in the a-axis direction is made larger than the off-angle in the c-axis direction, It is possible to effectively suppress the formation of bright spots in the EL light emission pattern. That is, by configuring in this way, it is possible to suppress the inconvenience that the effect of suppressing bright spot light emission is reduced due to an excessively large off angle in the c-axis direction. Thereby, luminous efficiency can be improved easily. Further, in this case, by setting the off angle in the c-axis direction to an angle larger than ± 0.1 degrees, the growth principal surface 10a is caused by the off-angle in the c-axis direction being smaller than ± 0.1 degrees. It is possible to suppress the inconvenience that the thickness of the nitride semiconductor layer 20 grown thereon varies.

  Further, if the absolute value of the off angle in the a-axis direction in the n-type GaN substrate 10 is 0.5 degrees or more, the absolute value of the off angle in the a-axis direction is smaller than 0.5 degrees, It is possible to suppress the inconvenience that the layer thickness gradient region 5 becomes too large, and to effectively suppress the occurrence of the disadvantage that the crack suppression effect (distortion relaxation effect) by the layer thickness gradient region 5 is reduced. be able to.

  In the first embodiment, the drive voltage can be easily reduced by configuring the active layer 23 of the nitride semiconductor laser element 100 in the DQW structure. For this reason, the device characteristics and reliability can be improved also by this. Even when the active layer 23 has a DQW structure, it is possible to suppress the emission of bright spots and dark lines in the EL emission pattern.

In the first embodiment, the Al composition ratio y of the carrier block layer 24 made of p-type Al _y Ga _1-y N is configured to be 0.08 or more and 0.35 or less, so that the carrier (electrons) can be reduced. Since a sufficiently high energy barrier can be formed, it is possible to more effectively prevent carriers injected into the active layer 23 from flowing into the p-type semiconductor layer. Thereby, it is possible to effectively suppress the formation of bright spots in the EL light emission pattern. Further, by setting the Al composition ratio y of the carrier block layer 24 to 0.35 or less, it is possible to suppress the increase in resistance of the carrier block layer 24 due to the Al composition ratio y becoming too large. In the region where the In composition ratio x1 of the well layer 23a is large (x1 ≧ 0.15), when the Al composition ratio y of the carrier block layer 24 formed on the active layer 23 is 0.08 or more, the carrier block layer It becomes very difficult to grow 24 well. This is because as the In concentration of the well layer 23a increases, the surface flatness of the active layer 23 deteriorates, and it becomes difficult to form a layer having a high Al composition ratio y with good crystallinity. However, if the n-type GaN substrate 10 having a growth main surface 10a with an off-angle in the a-axis direction with respect to the m-plane is used, the In composition ratio x1 of the active layer 23 (well layer 23a) is 0.15 or more. Even in the case of 0.45 or less, the carrier block layer 24 having an Al composition ratio y of 0.08 or more and 0.35 or less can be formed on the active layer 23 with good crystallinity. Thereby, it is possible to effectively suppress brightening of the EL light emission pattern and make the EL light emission pattern uniform.

  It is more preferable that the barrier layer 23b (for example, the third barrier layer 233b in the first embodiment) between the carrier block layer 24 and the well layer 23a is made of a nitride semiconductor containing Al and In. Since the carrier block layer 24 is formed with a larger Al composition ratio than the barrier layer 23b, the stress from the carrier block layer 24 is applied to the well layer 23a. For this reason, stress can be relieved by configuring the barrier layer 23b between the carrier block layer 24 and the well layer 23a so as to contain In. Further, the barrier layer 23b between the carrier block layer 24 and the well layer 23a can be configured to include AlInGaN in part. Further, the barrier layer 23b between the carrier block layer 24 and the well layer 23a has a two-layer structure of AlGaN / AlInGaN, AlInGaN / AlGaN, AlInGaN / InGaN, AlInGaN / AlGaN / AlInGaN, AlInGaN / InGaN / AlInGaN, AlGaN / InGaN. A multilayer structure such as / AlGaN may be used. The barrier layer 23b between the carrier block layer 24 and the well layer 23a may be InGaN from the viewpoint of stress relaxation. By forming the barrier layer 23b in this way, the generation of dark lines can be effectively suppressed.

  Here, a dark line generation suppression effect obtained by configuring the barrier layer from a nitride semiconductor containing Al and In, and a surface provided with an off angle in the a-axis direction with respect to the m-plane is a growth main surface. This effect is completely different from the bright spot-like light emission suppressing effect obtained by using the nitride semiconductor substrate. That is, when a nitride semiconductor layer containing Al and In is used for the barrier layer, a nonpolar surface such as an m-plane is effective. On the other hand, even when a barrier layer made of InGaN is used, it is possible to suppress the formation of luminescent spots in the light emission pattern by providing the off angle in the a-axis direction.

  However, when a nitride semiconductor layer containing Al and In is formed on a nitride semiconductor substrate having an off angle in the a-axis direction, the effect of improving crystallinity is obtained. In the case where the nitride semiconductor substrate including the nitride semiconductor substrate including Al and In is used for the barrier layer, the crystallinity of the barrier layer is improved. Thus, it is more preferable to combine both because a synergistic effect is obtained. Of course, if a nitride semiconductor substrate having an off-angle in the a-axis direction is used and a nitride semiconductor layer containing Al and In is used for the barrier layer, the generation of dark lines can be suppressed. It is also possible to suppress the light emission.

  In addition, when a nitride semiconductor layer containing Al and In is used for the barrier layer, the distortion applied to the active layer can be effectively reduced by using a nonpolar substrate such as an m-plane substrate in which a dug region is formed. Can do. Thereby, generation | occurrence | production of a dark line and expansion of a dark line can be suppressed effectively.

  In addition, since a layer thickness gradient region can be formed by forming a dug region in an m-plane substrate having an off angle in the a-axis direction, crack generation can be more effectively generated by this layer thickness gradient region. Can be suppressed. Of course, the bright spot-like light emission suppression effect of the EL light emission pattern can also be obtained.

  Furthermore, when a digging region is formed in an m-plane substrate having an off-angle in the a-axis direction and a light emitting element is formed using this substrate, the barrier layer of the active layer is made of a nitride semiconductor containing Al and In. By configuring, it is possible to obtain the effect of suppressing the generation of dark lines, the effect of suppressing bright spot light emission, and the effect of suppressing the generation of cracks. For this reason, since it can suppress more effectively that a dark line generate | occur | produces or a dark line expands, it is more preferable.

  15 to 32 are views for explaining a method of manufacturing the nitride semiconductor laser element according to the first embodiment of the present invention. A method for manufacturing the nitride semiconductor laser device 100 according to the first embodiment of the present invention will now be described with reference to FIGS. 1, 7 to 10 and FIGS.

First, an n-type GaN substrate 10 having a growth main surface 10a as a surface having an off angle with respect to the m-plane is prepared. The n-type GaN substrate 10 is produced, for example, by growing a GaN crystal on a seed substrate that is a substrate cut from a GaN bulk crystal having a c-plane (0001) as a main surface. Specifically, as shown in FIG. 15, after a protective film (not shown) made of SiO ₂ is partially formed on the base substrate 300, an epitaxial growth method such as MOCVD (Metal Organic Chemical Vapor Deposition) is performed. Then, a GaN bulk crystal is grown on the base substrate 300 from above the protective film. As a result, growth starts from a portion where the protective film is not formed, and lateral growth of the GaN crystal occurs on the protective film. Then, the GaN crystals grown in the lateral direction are joined together on the protective film and continue to grow, and the GaN crystal layer 400 a is formed on the base substrate 300. The GaN crystal layer 400a is formed to be sufficiently thick so that it can be handled independently even after the base substrate 300 is removed. Next, the base substrate 300 is removed from the formed GaN crystal layer 400a by, for example, etching. Thereby, as shown in FIG. 16, a GaN bulk crystal 400 having a c-plane (0001) as a main surface is obtained. As the base substrate 300, for example, a GaAs substrate, sapphire substrate, ZnO substrate, SiC substrate, GaN substrate, or the like can be used. The thickness S of the GaN bulk crystal 400 can be set to about 3 mm, for example.

  Next, by grinding and polishing the (0001) plane and the (000-1) plane, which are both main surfaces of the obtained GaN bulk crystal 400, the average roughness Ra of both main surfaces is set to 5 nm. This average roughness Ra is an arithmetic average roughness Ra specified in JIS B 0601, and can be measured by an AFM (atomic force microscope).

  Next, by slicing the GaN bulk crystal 400 with a plurality of planes perpendicular to the [1-100] direction, a plurality of GaN crystal substrates 410 having the m-plane {1-100} as the main surface are formed with a thickness T (for example, 1 mm) (width S: 3 mm). Then, by grinding and polishing the four surfaces of the cut GaN crystal substrate 410 that have not been ground and polished, the average roughness Ra of these four surfaces is set to 5 nm. Thereafter, as shown in FIGS. 17 and 18, in the plurality of GaN crystal substrates 410, the principal surfaces are made parallel to each other, and the [0001] directions of the GaN crystal substrates 410 are made the same. , Arranged adjacent to each other.

  Subsequently, as shown in FIG. 19, a plurality of GaN crystal substrates 410 arranged adjacent to each other are used as seed substrates, and an epitaxial growth method such as an HVPE method is performed on the m-plane {1-100} of these GaN crystal substrates 410. Use to grow GaN crystals. Thereby, the n-type GaN substrate 1 having the m-plane as the growth main surface is obtained. Next, by polishing the main surface of the obtained n-type GaN substrate 1 by chemical mechanical polishing, the off-angle in the a-axis direction and the off-angle in the c-axis direction are independently controlled, and the The off angle in the a-axis direction and the off angle in the c-axis direction are set as desired off angles. This off angle can be measured by an X-ray diffraction method. Thereby, the n-type GaN substrate 10 having a growth main surface as a surface having an off angle with respect to the m-plane is obtained.

  In the production of the n-type GaN substrate 10, when producing a substrate with a large off-angle, when cutting a plurality of GaN crystal substrates 410 from the GaN bulk crystal 400, the main surface of the GaN crystal substrate 410 is an m-plane. You may cut out with a predetermined cut-off angle with respect to the [1-100] direction so that it may have a desired off angle with respect to the {1-100} plane. In this way, the main surface of the GaN crystal substrate 410 becomes a surface having a desired off angle with respect to the m-plane {1-100} plane, so that the n-type GaN substrate 1 ( The main surface (growth main surface) of 10) is also a surface having a desired off angle with respect to the m-plane {1-100} plane.

  Further, the GaN crystal substrate 410 may be used as the n-type GaN substrate 10 by polishing the main surface of the GaN crystal substrate 410 cut out from the GaN bulk crystal 400 (see FIG. 16) by chemical mechanical polishing treatment. it can. In this case, the width S of the GaN crystal substrate 410 may be 3 mm or more.

  Here, in the first embodiment, the off angle in the a-axis direction of the n-type GaN substrate 10 is adjusted to be an angle larger than 0.1 degrees. In the case where an off angle is also provided in the c-axis direction, it is preferable to adjust the off angle in the c-axis direction to be an angle larger than ± 0.1 degrees. Further, the off angle in the c-axis direction is preferably adjusted to be smaller than the off-angle in the a-axis direction.

Next, as shown in FIG. 20, a SiO ₂ layer 420 having a thickness of about 1 μm is formed on the entire top surface (growth main surface 10a) of the obtained n-type GaN substrate 10 by using a sputtering method or the like. Next, as illustrated in FIG. 21, a resist layer 430 having an opening 430 a as a resist pattern is formed on the SiO ₂ layer 420 by using a photolithography technique. Then, as shown in FIG. 22, by using a dry etching technique such as RIE (Reactive Ion Etching), the SiO ₂ layer 420 is etched by using the resist layer 430 as a mask, so that a predetermined region of the SiO ₂ layer 420 is selectively selected. To remove. Thereafter, the resist layer 430 is removed using a resist stripping solution or an organic solvent (for example, acetone, ethanol, etc.). Note that the next step may be performed as it is without removing the resist layer 430.

Subsequently, as shown in FIG. 23, by using the ICP (Inductively Coupled Plasma) method, the RIE method, or the like, the n-type GaN substrate 10 is etched using the SiO ₂ layer 420 as a mask. The predetermined region of the n-type GaN substrate 10 is selectively removed. At this time, the etching conditions are adjusted so that the etching depth f of the n-type GaN substrate 10 is about 5 μm. Thereby, the above-described recess 2 (digging region 3) is formed in the n-type GaN substrate 10 so as to extend in a direction parallel to the c-axis direction. The side surface 2b of the recess 2 is formed so that the inclination angle γ becomes a predetermined angle larger than 90 degrees by adjusting the etching conditions and the like.

Thereafter, as shown in FIG. 24, the SiO ₂ layer 420 (see FIG. 23) is removed using an etchant such as HF (hydrogen fluoride).

Next, as shown in FIG. 25, each of the nitride semiconductor layers 21 to 21 is formed on the main growth surface 10a of the n-type GaN substrate 10 (processed substrate) processed as described above using an epitaxial growth method such as MOCVD. Grow 27. Specifically, an n-type cladding layer 21 made of n-type Al _0.06 Ga _0.94 N having a thickness of about 2.2 μm and an n-type having a thickness of about 0.2 μm are formed on the main growth surface 10 a of the n-type GaN substrate 10. An n-type guide layer 22 made of type In _0.02 Ga _0.98 N and an active layer 23 are successively grown. When the active layer 23 is grown, as shown in FIG. 14, two well layers 23a made of InGaN (In _x1 Ga _1-x1 N) and AlInGaN (Al _s In _t Ga _u N (s + t + u) = 1)) and the three barrier layers 23b are alternately grown. Specifically, a first barrier layer 231b having a thickness of about 30 nm, a first well layer 231a having a thickness of about 3 nm to about 4 nm, and a thickness of about 16 nm on the n-type guide layer 22 from the lower layer to the upper layer. A second barrier layer 232b having a thickness, a second well layer 232a having a thickness of about 3 nm to about 4 nm, and a third barrier layer 233b having a thickness of about 60 nm are sequentially grown. As a result, an active layer 23 having a DQW structure composed of two well layers 23 a and three barrier layers 23 b is formed on the n-type guide layer 22. At this time, the well layer 23a is configured such that its In composition ratio x1 is not less than 0.15 and not more than 0.45 (for example, 0.2 to 0.25). On the other hand, the barrier layer 23b is configured such that its Al composition ratio s is, for example, 0 <s ≦ 0.08, and its In composition ratio t is, for example, 0 <t ≦ 0.10.

Next, as shown in FIG. 25, on the active layer 23, a carrier block layer 24 made of p-type Al _y Ga _1-y N, and p-type made of p-type In _0.02 Ga _0.98 N having a thickness of about 0.05 μm. A p-type cladding layer 26 made of p-type Al _0.06 Ga _0.94 N having a thickness of about 0.5 μm and a p-type contact layer 27 made of p-type GaN having a thickness of about 0.1 μm are sequentially grown. . At this time, the carrier block layer 24 is preferably formed so as to have a thickness of 40 nm or less (for example, about 12 nm). The carrier block layer 24 is configured such that the Al composition ratio y is 0.08 or more and 0.35 or less (for example, about 0.15). The n-type nitride semiconductor layer 20a (n-type cladding layer 21 and n-type guide layer 22) is doped with, for example, Si as an n-type impurity, and the p-type nitride semiconductor layer 20b (carrier block layer 24, The p-type guide layer 25, the p-type cladding layer 26 and the p-type contact layer 27) are doped with, for example, Mg as a p-type impurity.

  In the first embodiment, the n-type nitride semiconductor layer 20a is formed at a growth temperature of 900 ° C. or higher and lower than 1300 ° C. (for example, 1075 ° C.). The well layer 23a of the active layer 23 is formed at a growth temperature (for example, 700 ° C.) of 600 ° C. or more and 770 ° C. or less. The barrier layer 23b in contact with the well layer 23a may be formed at the same growth temperature (for example, 700 ° C.) as the well layer 23a. The barrier layer 23b, which is a nitride semiconductor layer containing Al, can also be formed at a temperature higher than that of the well layer 23a. The growth temperature of the barrier layer 23b is preferably 600 ° C. or higher and 900 ° C. or lower. Further, the p-type nitride semiconductor layer 20b is formed at a growth temperature of 700 ° C. or higher and lower than 900 ° C. (for example, 880 ° C.). The growth temperature of n-type nitride semiconductor layer 20a is preferably 900 ° C. or higher and lower than 1300, and more preferably 1000 ° C. or higher and lower than 1300. The growth temperature of the well layer 23a of the active layer 23 is preferably 600 ° C. or higher and 830 ° C. or lower. When the In composition ratio x1 of the well layer 23a is 0.15 or higher, 600 ° C. or higher and 770 ° C. or lower is preferable. More preferably, it is 630 ° C. or higher and 740 ° C. or lower. The growth temperature of the barrier layer 23b of the active layer 23 is preferably the same temperature as the well layer 23a or higher than the well layer 23a. Furthermore, the growth temperature of the p-type nitride semiconductor layer 20b is preferably 700 ° C. or higher and lower than 900 ° C., more preferably 700 ° C. or higher and 880 ° C. or lower. Of course, since p-type conduction can be obtained even if the p-type nitride semiconductor layer 20b is formed at a temperature of 900 ° C. or higher, the p-type nitride semiconductor layer 20b may be formed at a temperature of 900 ° C. or higher.

As the growth material for these nitride semiconductor, for example, trimethyl gallium as a raw material of Ga: a _{((CH 3) 3 Ga TMGa} ), trimethyl aluminum as a raw material for Al: a _{((CH 3) 3 Al TMAl} ) Trimethylindium ((CH ₃ ) ₃ In: TMIn) can be used as the In source and NH ₃ can be used as the N source. As the carrier gas, for example, H ₂ can be used. As for the dopant, for example, monosilane (SiH ₄ ) can be used as the n-type dopant (n-type impurity), and as the p-type dopant (p-type impurity), for example, cyclopentadienyl magnesium (CP ₂ Mg). ) Can be used.

  Here, in the first embodiment, as shown in FIG. 1, the growth main surface 10 a of the n-type GaN substrate 10 is composed of a surface having an off angle in the a-axis direction with respect to the m-plane. The recess 2 is less likely to be filled with the nitride semiconductor layer 20. Therefore, when the nitride semiconductor layer 20 is formed on the n-type GaN substrate 10, the surface of the nitride semiconductor layer 20 on the recess 2 (digging region 3) (the surface of each layer constituting the nitride semiconductor layer 20). ), The recess 35 is easily formed. The recesses 35 alleviate distortion of the nitride semiconductor layer 20 caused by lattice mismatch with the n-type GaN substrate 10.

  In the first embodiment, as shown in FIGS. 7 and 8, the nitride semiconductor layer 20 is formed on the main growth surface 10 a of the n-type GaN substrate 10, so that the non-dig region 4 is formed. In this nitride semiconductor layer 20, a layer thickness gradient region 5 is formed in which the layer thickness decreases in a gradient (gradually) as it approaches the recess 2 (digging region 3). As shown in FIG. 9, the layer thickness inclined region 5 is substantially extended in a region in the vicinity of one side (for example, the right side) of the recess 2 (digging region 3) in a direction parallel to the recess 2 (digging region 3). It is formed in a band shape. The layer thickness gradient region 5 also relieves distortion of the nitride semiconductor layer 20 caused by lattice mismatch with the n-type GaN substrate 10.

  As described above, in the method of manufacturing the nitride semiconductor laser device according to the first embodiment, the recess 35 is formed on the surface of the nitride semiconductor layer 20 and the nitride semiconductor layer 20 on the non-dig region 4 is formed. A very high crack suppression effect is obtained by the two strain relaxation effects by the layer thickness gradient region 5.

  Furthermore, in the first embodiment, the growth main surface 10a of the n-type GaN substrate 10 is formed of a surface having an off-angle in the a-axis direction with respect to the m-plane, thereby nitriding formed on the growth main surface 10a. The crystallinity of the physical semiconductor layer 20 is improved. Further, by using the n-type GaN substrate 10, the surface morphology of the light emitting portion forming region 6 in the nitride semiconductor layer 20 becomes very good. For this reason, cracks are less likely to occur in the nitride semiconductor layer 20.

  Therefore, even when an AlGaN layer having a high Al composition and having a large lattice constant difference from the n-type GaN substrate 10 is formed on the growth main surface 10a, generation of cracks is suppressed. For this reason, the nitride semiconductor layer 20 in which the generation of cracks is suppressed is formed on the main growth surface 10 a of the n-type GaN substrate 10.

  Further, in the nitride semiconductor layer 20 on the non-dig region 4, the light emitting portion forming region 6 suitable for forming the light emitting portion (ridge portion 28) having a very small layer thickness variation compared to the layer thickness inclined region 5. Is formed. The light-emitting portion forming region 6 has a very good surface morphology and a very small layer thickness variation.

Subsequently, as shown in FIG. 26, about 1 μm to about 10 μm (for example, about 1.5 μm) is formed on the p-type contact layer 27 in the light emitting portion formation region 6 (see FIGS. 7 and 8) using photolithography technology. ) And a striped (elongated) resist 440 extending in the c-axis [0001] direction is formed. Then, as shown in FIG. 27, etching is performed to a depth in the middle of the p-type guide layer 25 using the resist 440 as a mask by using RIE method using chlorine-based gas such as SiCl ₄ and Cl ₂ or Ar gas. Thus, a striped (elongated) ridge formed by the convex portion of the p-type guide layer 25, the p-type cladding layer 26, and the p-type contact layer 27 and extending in parallel with each other in the c-axis [0001] direction. 28 (see FIGS. 10 and 27) is formed.

Next, as shown in FIG. 28, SiO ₂ having a thickness of about 0.1 μm to about 0.3 μm (for example, about 0.15 μm) by sputtering or the like with the resist 440 left on the ridge portion 28. An insulating layer 30 made of is formed, and the ridge portion 28 is embedded. Then, by removing the resist 440 by lift-off, the p-type contact layer 27 on the ridge portion 28 is exposed. As a result, insulating layers 30 as shown in FIG. 29 are formed on both sides of the ridge portion 28.

  Next, as shown in FIG. 30, using a vacuum deposition method or the like, a Pd layer (not shown) having a thickness of about 15 μm and an Au layer having a thickness of about 200 nm are formed from the substrate side (insulating layer 30 side). By sequentially forming (not shown), a p-side electrode 31 having a multilayer structure is formed on the insulating layer 30 (p-type contact layer 27).

  Next, in order to make it easy to divide the substrate, the back surface of the n-type GaN substrate 10 is ground or polished to reduce the thickness of the n-type GaN substrate 10 to about 100 μm. Thereafter, as shown in FIG. 1, an Hf layer (not shown) having a thickness of about 5 nm from the back surface side of the n-type GaN substrate 10 is formed on the back surface of the n-type GaN substrate 10 using a vacuum deposition method or the like. Al layer (not shown) having a thickness of about 150 nm, Mo layer (not shown) having a thickness of about 36 nm, Pt layer (not shown) having a thickness of about 18 nm, and Au having a thickness of about 200 nm By sequentially forming layers (not shown), the n-side electrode 32 having a multilayer structure is formed. Note that before the n-side electrode 32 is formed, dry etching or wet etching may be performed for the purpose of adjusting the electrical characteristics of the n-side.

  Thus, the nitride semiconductor wafer 50 according to the first embodiment described above is formed.

Thereafter, as shown in FIG. 31, the wafer (substrate) is divided into bars by using a scribing / breaking method, laser scribing, or dry etching. As a result, a bar-shaped element whose end face is the resonator face 40 is obtained. Next, a coating is applied to the end face (resonator face 40) of the bar-like element using a technique such as vapor deposition or sputtering. Specifically, an emission side coating film (not shown) made of, for example, an oxynitride film of aluminum is formed on one end face serving as a light emission surface. In addition, a reflection-side coating film (not shown) made of a multilayer film such as SiO ₂ or TiO ₂ is formed on the opposite end face serving as the light reflection surface.

  Finally, the bar-shaped element is divided along the planned dividing line P2 along the c-axis [0001] direction, so that individual nitride semiconductor laser elements are singulated as shown in FIG. Thus, the nitride semiconductor laser device 100 according to the first embodiment of the present invention is manufactured. As described above, the division possibility P2 may be set on the layer thickness inclined region 5 side with respect to the concave portion 2, or may be set on the side opposite to the layer thickness inclined region 5 with respect to the concave portion 2. Also good.

  The nitride semiconductor laser device 100 according to the first embodiment obtained by the above manufacturing method is mounted on a stem 152 via a submount 151 and electrically connected to a lead pin by a wire 153 as shown in FIG. Is done. The cap 154 is welded onto the stem 152 to assemble the can package type semiconductor laser device (semiconductor device) 150.

  In the method of manufacturing the nitride semiconductor laser device according to the first embodiment, the concave portion 2 (digging region 3) is formed in the n-type GaN substrate 10 in advance as described above, thereby forming the n-type GaN substrate 10 on the n-type GaN substrate 10. The distortion of the formed nitride semiconductor layer 20 can be relaxed. For this reason, since it can suppress effectively that a crack occurs in nitride semiconductor layer 20, the number of good products obtained from one wafer can be increased. Thereby, a yield can be improved.

  In the manufacturing method of the first embodiment, when the nitride semiconductor layer 20 is formed on the n-type GaN substrate 10 in which the recess 2 (digging region 3) is formed, the nitride containing Al and In By forming the barrier layer 23b from AlInGaN which is a semiconductor, the generation of dark lines can be suppressed. Thereby, the nitride semiconductor laser device 100 with high luminance and improved luminous efficiency can be manufactured.

  In the manufacturing method according to the first embodiment, the barrier layer 23b is formed from a nitride semiconductor containing Al and In by forming the recess 2 (digging region 3) in the n-type GaN substrate 10. The distortion of the active layer 23 can be effectively reduced. Thereby, generation | occurrence | production of a dark line can be suppressed more effectively.

  Further, when the nitride semiconductor wafer 50 is divided, the nitride semiconductor wafer 50 is divided so that the entire recess 35 formed on the recess 2 (digging region 3) is included in each element. It is possible to further relax the distortion of the active layer 23 in the recessed portion included in the element. Thereby, generation | occurrence | production and expansion of a dark line can also be suppressed effectively.

  Furthermore, in the manufacturing method according to the first embodiment, by using the n-type GaN substrate 10 having the growth main surface 10a as a surface having an off-angle in the a-axis direction with respect to the m-plane, the effect of suppressing bright spot light emission is achieved. Can also be obtained. In addition, the crystallinity of the barrier layer 23b can be improved, and the surface morphology can be improved. Thereby, luminous efficiency can be improved more.

  In the manufacturing method of the first embodiment, the recess 2 (digging region 3) is formed so as to extend in a direction parallel to the c-axis direction when seen in a plan view, whereby the recess 2 in the nitride semiconductor layer 20 is formed. The layer thickness gradient region 5 in which the layer thickness is gradually (gradually) decreased as it approaches the recess 2 (digging region 3) in the vicinity of the (digging region 3) (next to the digging region 3). Can be formed. Further, since the strain of the nitride semiconductor layer 20 can be relieved also by the layer thickness gradient region 5, a very high crack suppressing effect can be obtained.

  Further, in the manufacturing method of the first embodiment, the n-type nitride semiconductor layer 20a can be planarized by forming the n-type nitride semiconductor layer 20a at a high temperature of 900 ° C. or higher. Therefore, the crystallinity of the active layer 23 and the p-type nitride semiconductor layer 20b is reduced by forming the active layer 23 and the p-type nitride semiconductor layer 20b on the planarized n-type nitride semiconductor layer 20a. Can be suppressed. Therefore, a high quality crystal can be formed also by this. Further, by forming the n-type nitride semiconductor layer 20a at a growth temperature lower than 1300 ° C., the surface of the n-type GaN substrate 10 is heated at a temperature higher than 1300 ° C. It is possible to suppress the occurrence of the disadvantage of re-evaporating and causing surface roughness. Therefore, with this configuration, nitride semiconductor laser device 100 having excellent device characteristics and high reliability can be easily manufactured.

  In the manufacturing method of the first embodiment, the well layer 23a of the active layer 23 is formed at a growth temperature lower than 600 ° C. by forming the well layer 23a at a growth temperature of 600 ° C. or higher. It is possible to suppress the disadvantage that the length is shortened and the crystallinity is deteriorated. Further, by forming the well layer 23a of the active layer 23 at a growth temperature of 770 ° C. or lower, the well layer 23a of the active layer 23 is formed at a growth temperature higher than 770 ° C. (for example, 830 ° C. or higher). As a result, it is possible to suppress the disadvantage that the active layer 23 is blackened due to thermal damage. The growth temperature of the barrier layer 23b in contact with the well layer 23a is preferably the same temperature as the well layer 23a or higher than the well layer 23a.

  Further, in the manufacturing method of the first embodiment, the p-type nitride semiconductor layer 20b is formed at a growth temperature of 700 ° C. or higher, which results in the growth temperature of the p-type nitride semiconductor layer 20b being too low. It is possible to suppress the disadvantage that the p-type nitride semiconductor layer 20b has a high resistance. Moreover, the thermal damage of the active layer 23 can be reduced by forming the p-type nitride semiconductor layer 20b at a growth temperature lower than 1100 ° C.

  When an n-type GaN substrate having a c-plane as a growth main surface is used, if the p-type nitride semiconductor layer 20b is formed at a growth temperature lower than 900 ° C., the p-type nitride semiconductor layer 20b has a very high resistance. Therefore, it becomes difficult to use as a device (nitride semiconductor element). On the other hand, even if the growth temperature is lower than 900 ° C., the p-type is obtained by using the n-type GaN substrate 10 having the growth main surface 10a as a surface provided with an off angle in the a-axis direction with respect to the m-plane. By doping Mg as an impurity, p-type conduction can be obtained. In particular, when the In composition ratio x1 of the well layer 23a of the active layer 23 is not less than 0.15 and not more than 0.45, variations in the In composition are likely to occur in the plane due to segregation of In or the like. For this reason, the growth temperature of the p-type nitride semiconductor layer 20b is preferably low. The difference between the growth temperature of the well layer 23a of the active layer 23 and the growth temperature of the p-type nitride semiconductor layer 20b is preferably less than 450 ° C. in order to avoid thermal damage of the active layer 23, and is 300 ° C. or less. More preferred. However, when the In composition ratio x1 is smaller than 0.15, there are few problems such as segregation of In. Therefore, there is no problem even if the growth temperature of the p-type nitride semiconductor layer 20b is 900 ° C. or higher.

  Further, the barrier layer 23b of the active layer 23 is made of a nitride semiconductor containing Al (for example, AlInGaN), so that the active layer 23 is resistant to thermal damage that occurs when the p-type nitride semiconductor layer 20b is formed. (Well layer 23a) becomes stronger. For this reason, the p-type nitride semiconductor layer 20b can be formed at a high growth temperature of 1000 ° C. or higher. Thereby, by forming the p-type nitride semiconductor layer 20b at a high temperature, defects generated in the p-type nitride semiconductor layer 20b can be suppressed, and the crystallinity of the p-type nitride semiconductor layer 20b can be improved. . In other words, the degree of freedom of the growth temperature of the p-type nitride semiconductor layer 20b can be significantly improved. As a result, the semiconductor layer can be formed at the most appropriate growth temperature in consideration of specifications necessary for the device.

  Next, an experiment conducted for confirming the effect of the embodiment will be described.

  In this experiment, first, a sample in which each nitride semiconductor layer similar to that in the first embodiment is formed on an n-type GaN substrate similar to that in the first embodiment is prepared as a confirmation sample 1 to suppress dark lines. The effect was confirmed. The off-angle of the n-type GaN substrate used for the confirmation sample 1 was 1.7 degrees in the a-axis direction and +0.5 degrees in the c-axis direction.

Moreover, in the sample 1 for confirmation, the barrier layer of the active layer was formed with Al composition of Al _0.01 In _0.03 Ga _0.96 N at 1%. The Al composition of the barrier layer was measured by AES (Auger Electron Spectroscopy). Further, as a sample 1 for comparison, an m-plane GaN substrate was used, and a sample in which each nitride semiconductor layer similar to that of the first embodiment was formed on the substrate was produced. However, in the comparative sample 1, an m-plane just substrate is used as the GaN substrate, and the barrier layer is formed of In _0.02 Ga _0.98 N. That is, the sample 1 for comparison is different from the sample 1 for confirmation in that the barrier layer is made of InGaN instead of AlInGaN and that an m-plane just substrate is used for the n-type GaN substrate.

  Then, a PL (photo-luminescence) light emission pattern was observed using the prepared confirmation sample 1 and comparison sample 1. Specifically, the sample was irradiated with light having a wavelength of 405 nm to selectively excite only the active layer, and the light emission pattern of the active layer was observed.

  FIG. 50 described above is a photomicrograph of dark lines observed in the PL emission pattern of the comparative sample 1 in which the barrier layer is made of InGaN, and FIG. 52 described above is the first embodiment in which the barrier layer is made of AlInGaN. It is a microscope picture of PL light emission pattern of the sample 1 for confirmation by a form.

  As shown in FIG. 50, in the comparative sample 1 in which the barrier layer is made of InGaN, many dark lines were generated in the c-axis direction (<0001> direction). In contrast, in the sample 1 for confirmation in which the barrier layer is made of AlInGaN, it can be seen from FIG. 52 that no dark line is generated. The dark line can be confirmed even in the EL emission pattern by current injection, but can be clearly observed in the PL emission pattern in which the active layer is selectively excited as described above. This is presumably because dark lines are generated in the active layer.

  Next, a sample in which each nitride semiconductor layer similar to that of the first embodiment is formed on the same n-type GaN substrate as that of the first embodiment is prepared as the confirmation sample 2, and the crack suppression effect is confirmed. went. The off-angle of the n-type GaN substrate used for the confirmation sample 2 was +2.2 degrees in the a-axis direction and −0.18 degrees in the c-axis direction. Further, the period of the recess (digging area) was set to 400 μm.

  In addition, as a comparative sample 2, a sample in which each nitride semiconductor layer similar to that of the first embodiment is formed on an n-type GaN substrate (substantially m-plane just substrate) having no off-angle in the a-axis direction is manufactured. Then, it was subjected to observation in the same manner as the confirmation sample 2. The specific off angle of the n-type GaN substrate used for Comparative Sample 2 was 0 degree in the a-axis direction and +0.05 degree in the c-axis direction. The other configuration of the comparative sample 2 was the same as that of the confirmation sample 2. In addition, the nitride semiconductor layers in the confirmation sample 2 and the comparative sample 2 were simultaneously formed using an MOCVD apparatus.

  34 is a micrograph of the nitride semiconductor layer surface of the sample 2 for confirmation, and FIG. 35 is a micrograph of the nitride semiconductor layer surface of the sample 2 for comparison.

  As shown in FIGS. 34 and 35, in the confirmation sample 2 using the n-type GaN substrate having an off-angle in the a-axis direction, the recess 2 (digging region) is formed in the nitride semiconductor layer on the non-digging region 4. It was observed that a layer thickness gradient region 5 was formed in which the layer thickness decreased in a gradient (gradually) as approaching 3). Further, such a layer thickness inclined region 5 is formed in a substantially band shape extending in a direction parallel to the concave portion 2 (digging region 3) in a region near one side (for example, the right side) of the concave portion 2 (digging region 3). It was confirmed that Further, in the sample 2 for confirmation, a very good surface morphology was clearly observed in a region (light emitting portion forming region 6) other than the layer thickness gradient region 5 in the nitride semiconductor layer on the non-digged region 4. From this, it was confirmed that the surface morphology can be improved by using a substrate having an off-angle in the a-axis direction.

In Comparative Sample 2, the generation of cracks of about 10 to 20 pieces / cm ² was observed after the formation of the nitride semiconductor layer. In Confirmation Sample 2, the generation of cracks after the formation was observed. Was not. Incidentally, when the same nitride semiconductor layers were formed using a GaN substrate in which no digging region was formed, generation of cracks of about 70 to 90 pieces / cm ² was observed. That is, by forming a dug region in the nitride semiconductor substrate, an effect of suppressing the occurrence of cracks can be obtained. Further, by forming a dug region in the nitride semiconductor substrate having an off angle in the a-axis direction, It was confirmed that a layer thickness gradient region was formed in the physical semiconductor layer, and thereby a higher crack generation suppressing effect was obtained.

  From the above, a very high crack suppression effect can be obtained by forming a recess (digging region) in an n-type GaN substrate having a growth main surface with an off-angle in the a-axis direction with respect to the m-plane. It was confirmed.

  In addition, when the LED element was produced using the said sample 2 for a confirmation, and the said sample 2 for a comparison, and each LED element was driven with the drive current of 100 mA, in any LED element, after 200-hour drive, EL light emission pattern No dark line was observed. This is considered to be because the distortion of the active layer is effectively relieved by forming the digging region in the substrate.

  Moreover, in the LED element produced using the sample 2 for confirmation, the threshold current value was as low as 55 mA. This is thought to be due to the suppression of bright spot-like light emission, the suppression of dark line generation, and the strain relaxation effect of the active layer due to the formation of the digging region in the substrate.

  In addition, an LED device manufactured using the comparative sample 2 is preferable because it is clearly more effective than a structure using an InGaN layer as a barrier layer. A configuration of the confirmation sample 2 is more preferable.

  Next, in order to confirm the influence of the off-angle in the a-axis direction on the layer thickness gradient region, four types of n-type GaN substrates having different off-angles in the a-axis direction are used and the same as in the first embodiment. After forming each nitride semiconductor layer, the width of the layer thickness gradient region formed in the nitride semiconductor layer was examined. The off-angles in the a-axis direction of the four types of n-type GaN substrates are +0.5 degrees, +1.0 degrees, +2.0 degrees, and +3.0 degrees. The off-angles in the c-axis direction of the four types of n-type GaN substrates are each about −0.2 degrees. In addition, the recessed part (digging area | region) was 5 micrometers in width and 5 micrometers in depth so that it might become the same as the said 1st Embodiment. Further, the period of the recess (digging area) was set to 400 μm. Further, each nitride semiconductor layer formed on the substrate is the same as in the first embodiment.

  As a result, it was recognized that as the off angle in the a-axis direction increased, the width of the layer thickness gradient region tended to narrow. Specifically, when the off angle in the a-axis direction is +0.5 degrees, the width of the layer thickness inclined region is 188.4 μm, and when the off angle in the a-axis direction is +1.0 degrees, The width of the layer thickness gradient region was 92.2 μm. When the off angle in the a-axis direction is +2.0 degrees, the width of the layer thickness gradient region is 46.5 μm, and when the off angle in the a-axis direction is +3.0 degrees, the layer thickness gradient The width of the region was 32.7 μm.

  Further, as the off angle in the a-axis direction becomes larger, the inclination of the layer thickness gradient region (layer thickness gradient angle) tends to become tighter.

  When the off angle in the a-axis direction was +0.5 degrees, the layer thickness gradient region occupied about half of the nitride semiconductor layer formed on the non-dig region. For this reason, when the off angle in the a-axis direction is smaller than 0.5 degrees, the layer thickness gradient region occupies more than half of the nitride semiconductor layer formed on the non-dig region. Here, the region in which the device operates (the light emitting region in the case of a light emitting device) is preferably formed in the light emitting portion forming region having a good surface morphology. For this reason, the off angle in the a-axis direction is preferably 0.5 degrees or more in order to secure a region (light emitting portion forming region) in which a device operating region (light emitting portion (ridge portion)) can be manufactured. .

  Next, a light-emitting diode element 110 as shown in FIG. 36 was manufactured as a confirmation element, and an EL light emission pattern was observed. The reason why the light emitting diode element is used for the observation of the EL light emission pattern is that it is difficult to observe the EL light emission pattern in the nitride semiconductor laser element because the region where current is injected is narrowed by the formation of the ridge portion. Because.

This confirmation element (light emitting diode element 110) was produced by forming the same nitride semiconductor layer (each semiconductor layer) on the same n-type GaN substrate 10 as in the first embodiment. The nitride semiconductor layer was formed using the same method as in the first embodiment. Specifically, as shown in FIG. 36, an n-type GaN substrate 10 having a growth main surface 10a as a surface having an off angle with respect to the m-plane is used, and an n-type cladding layer is formed on the growth main surface 10a. 21, an n-type guide layer 22, an active layer 23, a carrier block layer 24, a p-type guide layer 25, a p-type cladding layer 26, and a p-type contact layer 27 were sequentially formed. Next, the p-side electrode 131 was formed on the p-type contact layer 27. The p-side electrode 131 was a transparent electrode in order to confirm the EL emission pattern. An n-side electrode 32 was formed on the back surface of the n-type GaN substrate 10. The off angle of the n-type GaN substrate 10 in the confirmation element was +2.2 degrees in the a-axis direction and −0.18 degrees in the c-axis direction. In the confirmation element, the In composition ratio of the well layer was 0.29, and the Al composition ratio of the barrier layer was 2%. That is, in this confirmation element, the well layer was composed of In _0.29 Ga _0.71 N, and the barrier layer was composed of Al _0.02 In _0.03 Ga _0.95 N. The confirmation element is formed so that the light emitting portion forming region becomes the light emitting region. By injecting current into the confirmation element (light-emitting diode element 110) thus produced, the confirmation element (light-emitting diode element 110) was caused to emit light, and the in-plane light distribution was observed. FIG. 37 shows a micrograph of an EL light emission pattern observed in the confirmation element.

For comparison, a light-emitting diode element using a GaN substrate having an m-plane as a growth main surface (substantially m-plane just substrate: the off-angle in the a-axis direction is 0 degrees and the off-angle in the c-axis direction is +0.05 degrees) is used. It produced as an element. This comparative element was produced by the same method as the above-mentioned confirmation element. The In gas flow rate was the same as that of the confirmation element, but the In composition ratio of the well layer in the comparison element was 0.2. Other configurations of the comparative element are the same as those of the confirmation element. Therefore, the barrier layer of the comparative element is the same Al _0.02 In _0.03 Ga _0.95 N layer as that of the confirmation element. Then, the in-plane light distribution was observed as in the confirmation element. The comparison element has the same configuration as the confirmation element (light-emitting diode element 110) except that an m-plane just substrate is used for the GaN substrate and the In composition ratio of the well layer is 0.2. .

  FIG. 38 is a photomicrograph of the EL light emission pattern observed in the comparative element. As shown in FIG. 38, in the comparative element, the EL light emission pattern has a bright spot shape, whereas in the confirmation element, as shown in FIG. 37, the brightening of the EL light emission pattern is suppressed, It can be seen that the light emission pattern is a uniform light emission. From this, it was confirmed that the use of the n-type GaN substrate 10 in which the growth main surface 10a is a surface having an off-angle in the a-axis direction with respect to the m-plane suppresses bright spot formation of the EL emission pattern. It was. Further, when the luminous efficiencies of the confirmation element and the comparative element were measured, it was confirmed that the luminous efficiency of the confirmation element was increased 1.5 times with respect to the luminous efficiency of the comparative element. The emission wavelength of the confirmation element was 530 nm, and the emission wavelength of the comparison element was 490 nm. From this, it was confirmed that the confirmation element in which the off angle was controlled was more efficient in terms of In incorporation than the comparison element using the m-plane just substrate. From the above, it was confirmed that by providing an off angle in the a-axis direction with respect to the m-plane, a bright spot-like light emission suppressing effect was obtained and the light emission efficiency increased in the green wavelength region.

  In addition, since both the confirmation element and the comparison element used the nitride semiconductor layer containing Al and In as the barrier layer, no dark line was observed. Further, since the confirmation element uses an m-plane nitride semiconductor substrate having an off-angle in the a-axis direction, bright spot light emission is suppressed and the light emission pattern is uniform. For this reason, in the element for confirmation, it was a more preferable state with suppression of luminescent spot-like light emission, and also suppression of generation | occurrence | production of a dark line. In the confirmation element, the generation of cracks was not recognized because the layer thickness gradient region was formed.

  Subsequently, using a plurality of n-type GaN substrates having different off angles in the a-axis direction and c-axis direction, a plurality of elements similar to the light-emitting diode element 110 shown in FIG. Experiments such as observation were performed.

  As a result, it has been clarified that by providing an off-angle in the a-axis direction with respect to the m-plane, the effect of suppressing the brightening of the EL light emission pattern can be obtained. In addition, when the off angle in the a-axis direction is 0.1 degrees or less, the effect of suppressing the bright spot light emission is small, and when the off angle in the a-axis direction is larger than 0.1 degree, the bright spot shape of the EL light emission pattern. It became clear that the inhibitory effect of crystallization appeared. Thereby, it was confirmed that the surface having an off-angle in the a-axis direction with respect to the m-plane is a growth main surface of the GaN substrate, whereby the bright spot shape of the EL light emission pattern can be suppressed. It was also confirmed that the bright spot shape of the EL light emission pattern was more effectively suppressed by making the off angle in the a-axis direction larger than the off angle in the c-axis direction.

As a nitride semiconductor laser device according to Example 1, an n-type GaN substrate having an off angle in the a-axis direction of +0.5 degrees and an off angle in the c-axis direction of −0.15 degrees with respect to the m-plane {1-100}. Thus, a nitride semiconductor laser element similar to that of the first embodiment was produced. In Example 1, the barrier layer was made of Al _0.02 In _0.03 Ga _0.95 N, and the well layer was made of In _0.25 Ga _0.75 N. In addition, a dug region was formed in the substrate in a direction parallel to the c-axis direction. The other configuration of Example 1 is the same as that of the first embodiment. As Comparative Example 1, a nitride semiconductor laser device having a barrier layer made of In _0.02 Ga _0.98 N was produced. In the nitride semiconductor laser device according to the comparative example 1, the digging region is not formed, and other configurations are the same as those in the first example.

  In Comparative Example 1, a large number of cracks occurred in the nitride semiconductor layer, and the yield was greatly reduced. For this reason, when few elements which did not generate cracks were selected and the EL light emission pattern was observed, a large number of dark lines of about 100 were generated within 1 mm width. On the other hand, in Example 1, almost no crack was observed, and there was almost no decrease in yield. Further, when the EL light emission pattern of Example 1 was observed, no dark line was generated.

  In addition, when the threshold current was measured for Example 1 and Comparative Example 1, the nitride semiconductor laser element according to Comparative Example 1 had a threshold current value of about 130 mA, whereas the nitride semiconductor laser according to Example 1 The threshold current value of the element was 65 mA, and it was confirmed that the threshold current of the nitride semiconductor laser element according to Example 1 was much smaller than that of Comparative Example 1. This is also thought to be because the generation of dark lines was suppressed and the gain was increased by emitting light uniformly within the surface.

  Furthermore, using the same substrate as in Example 1, a similar nitride semiconductor layer was formed, and an LED element was fabricated without forming a current confinement structure. When the fabricated LED element was driven at a driving current of 100 mA, no dark line was observed in the EL light emission pattern even after driving for 200 hours. This is considered to be because the distortion of the active layer is effectively relieved by forming the digging region in the substrate.

In Comparative Example 1, cracks of about 70 to 90 pieces / cm ² were generated. On the other hand, in Example 1, generation | occurrence | production of the crack was not recognized but generation | occurrence | production of the crack was reduced significantly.

As the nitride semiconductor laser element according to Example 2, an n-type GaN substrate having an off angle in the a-axis direction of 4 degrees and an off angle in the c-axis direction of +1 degree with respect to the m plane {1-100} is used. Produced a nitride semiconductor laser device made of Al _s In _t Ga _u N (s + t + u = 1). In Example 2, the barrier layer was composed of Al _s In _t Ga _u N (s = 0.01, t = 0.03, u = 0.96). The configuration other than the barrier layer of Example 2 is the same as that of the first embodiment (Example 1). In Example 2, the same effect as in Example 1 was obtained.

Further, in the configuration of the second embodiment, the _{Al s In t Ga u N (} s + t + u = 1) of the barrier layer of Al composition ratio s, 0 <a range of s ≦ 0.08, the In composition ratio t, 0 Even in the case of <t ≦ 0.10, substantially the same effect was obtained.

When the barrier layer is made of Al _s In _t Ga _u N (s + t + u = 1), the Al composition is preferably smaller than the In composition. In order to realize the emission wavelength in the long wavelength region, the active layer must be formed at a low temperature of 900 ° C. or lower, usually about 700 ° C. to 800 ° C., so that the crystallinity is improved in the low temperature growth by adding In. I think that you do. Moreover, since the refractive index can be increased compared to the AlGaN layer by making the barrier layer an AlInGaN layer containing In, light confinement can be performed efficiently.

As the nitride semiconductor laser element according to Example 3, a GaN substrate having an off angle in the a-axis direction of 6 degrees and an off angle in the c-axis direction of −1.1 degrees with respect to the m-plane {1-100} is used as a barrier. A nitride semiconductor laser device having a layer made of Al _s In _t Ga _u N (s + t + u = 1) was fabricated. In Example 3, the first barrier layer is composed of _{Al s In t Ga u N (} s = 0.01, t = 0, u = 0.98), the second barrier layer and the third barrier layer, _{al s In t Ga u N (} s = 0.02, t = 0.01, u = 0.97) was formed from. That is, in Example 3, the first barrier layer was made of AlGaN, and the second and third barrier layers were made of AlInGaN different from the first barrier layer. The configuration other than the barrier layer of Example 3 is the same as that of the first embodiment (Example 1). Also in Example 3, the same effect as in Example 1 was obtained. As in Example 3, the composition of the first barrier layer and the second and third barrier layers may be different, or the Al composition of all the barrier layers may be different.

Further, in the configuration of Example 3, the Al composition ratio s of the barrier layer made of Al _s In _t Ga _u N is set in the range of 0 <s ≦ 0.08, the In composition ratio t is set to 0 <t ≦ 0. Even in the range of 10, almost the same effect was obtained.

Note that when Al _s In _t Ga _u N (s + t + u = 1) is used for the barrier layer, the Al composition is preferably larger than the In composition. By comprising in this way, the generation | occurrence | production suppression effect of a dark line by containing Al can be heightened.

  As a nitride semiconductor laser device according to Example 4, an n-type GaN substrate having an off angle in the a-axis direction of 6 degrees and an off angle in the c-axis direction of +2 degrees with respect to the m-plane {1-100} is used. A nitride semiconductor laser device substantially the same as 1 was fabricated. That is, in Example 4, the barrier layer was made of AlInGaN. However, in Example 1, the Al composition ratio and the In composition ratio of the three barrier layers (the first barrier layer, the second barrier layer, and the third barrier layer) are configured to be the same. Then, different Al composition ratio and In composition ratio were used. Specifically, the Al composition ratio of the first barrier layer was 2%, the In composition ratio was 5%, the Al composition ratio of the second and third barrier layers was 0.08%, and the In composition ratio was 4%. In Example 4, the same effect as in Example 1 was obtained. Note that the same effect was obtained when the Al composition ratio of the first barrier layer was higher than the Al composition ratio of the other barrier layers as in Example 4.

(Second Embodiment)
In the second embodiment, a nitride semiconductor wafer and a nitride semiconductor laser device are formed using a GaN substrate having an m-plane as a growth main surface. In addition, a recess (digging region) similar to that in the first embodiment is formed on the main growth surface of the GaN substrate. Furthermore, the barrier layer of the active layer is made of AlInGaN, which is a nitride semiconductor containing Al and In. Other configurations of the second embodiment are the same as those of the first embodiment.

  In the second embodiment, generation of dark lines can be suppressed by configuring the barrier layer from AlInGaN as described above. Moreover, since the steepness of the interface can be improved as compared with the case where the barrier layer is made of GaN or InGaN, the satellite peak by the X-ray diffraction measurement can be clarified.

  Further, in the second embodiment, by suppressing the occurrence of dark lines, it is possible to suppress a decrease in light emission efficiency, so that element characteristics and reliability can be improved. Note that by suppressing the occurrence of dark lines, a uniform light emission pattern can be obtained, and thus the gain can be increased.

  Furthermore, in the second embodiment, as in the first embodiment, a very high crack suppression effect can be obtained by forming a recess (digging region) in the GaN substrate. Can be effectively suppressed.

  It should be noted that when a GaN substrate having an m-plane as a growth principal surface is used, the layer is larger than when a GaN substrate having a growth main surface as a plane having an off-angle in the a-axis direction with respect to the m-plane is used. Although the surface flatness is inferior, the light emission efficiency can be sufficiently improved. For this reason, the luminous efficiency which can fully be used can be obtained. Further, by using AlInGaN for the barrier layer, the efficiency of In taken into the well layer can be made very good. For this reason, even when the gas flow rate of In is reduced, a high In composition ratio can be maintained. Thereby, since the capture efficiency can be improved, the wavelength can be effectively increased.

(Third embodiment)
FIG. 39 is a cross-sectional view for explaining a nitride semiconductor wafer and a nitride semiconductor laser device according to a third embodiment of the invention. FIG. 39 shows a cross section of a part of the substrate used for the nitride semiconductor wafer and the nitride semiconductor laser device according to the third embodiment. Next, with reference to FIGS. 1, 7 and 39, a nitride semiconductor wafer and a nitride semiconductor laser device according to a third embodiment of the invention will be described. In the third embodiment, an example in which the nitride semiconductor device of the present invention is applied to a nitride semiconductor laser device will be described.

  The nitride semiconductor wafer and nitride semiconductor laser device according to the third embodiment are further provided with a growth suppressing film for suppressing crystal growth of the nitride semiconductor in addition to the configuration of the first embodiment described above. Specifically, in the third embodiment, as shown in FIG. 39, a growth suppressing film made of an AlN film that is a nitride film is formed in the digging region 3 (the region inside the recess 2) of the n-type GaN substrate 10. 160 is further formed. The growth suppression film 160 is formed so as to cover the bottom surface portion 2a and the side surface portion 2b of the recess 2. Further, the growth suppression film 160 has a thickness that does not fill the recess 2 (digging region 3).

  Further, the growth suppression film 160 is formed so that the thickness t2 of the portion formed on the side surface portion 2b is smaller than the thickness t1 of the portion formed on the bottom surface portion 2a. Specifically, in the growth suppressing film 160, the thickness t1 of the portion formed on the bottom surface portion 2a of the recess 2 is formed to about 100 nm, and the thickness t2 of the portion formed on the side surface portion 2b of the recess 2 is set. Is formed at about 80 nm. With such a configuration, defects such as peeling of the growth suppression film 160 can be effectively suppressed.

  The thickness t1 of the growth suppression film 160 is preferably less than or equal to half the depth f of the recess 2. The thickness t2 of the growth suppression film 160 is preferably less than or equal to half the opening width g of the recess 2. If comprised in this way, it will become possible to suppress that the inside of the recessed part 2 will be filled with a growth suppression film | membrane.

  In the third embodiment, the growth suppression film 160 is formed so as to extend along the recess 2 (extend in the c-axis [0001] direction).

  Other configurations of the third embodiment are the same as those of the first embodiment.

  In the third embodiment, as described above, by forming the growth suppression film 160 that suppresses the crystal growth of the nitride semiconductor in the digging region 3 (the region inside the recess 2) of the n-type GaN substrate 10, When the nitride semiconductor layer 20 (see FIGS. 1 and 7) is formed, the recess 2 (digging region 3) is filled with the nitride semiconductor layer 20 (semiconductor layer constituting the nitride semiconductor layer 20). Can be reliably suppressed. For this reason, it can be facilitated by a state in which a depression is formed on the surface of the nitride semiconductor layer 20 (each layer constituting the nitride semiconductor layer 20) on the recess 2 (digging region 3). As a result, the lattice constant difference and the thermal expansion coefficient difference between the n-type GaN substrate 10 and the nitride semiconductor layer 20 become large, and even when the nitride semiconductor layer 20 is distorted, the non-dig region 4 The strain of the nitride semiconductor layer 20 formed in the above can be alleviated by the above-described depression formed on the surface of the nitride semiconductor layer 20 on the recess 2 (digging region 3).

  In particular, when it is necessary to form a nitride semiconductor layer (for example, an n-type cladding layer) thicker, the recess 2 (digging region 3) is likely to be embedded. It is very effective to form the growth suppressing film 160 as described above in the recess 2 (digging region 3). This is because if the recess 2 (digging region 3) is completely filled (if no dent is formed), it becomes difficult to alleviate the distortion, and the crack suppression effect is reduced.

  In the third embodiment, the nitride semiconductor layer on the recess 2 (digging region 3) can be easily formed by forming the growth suppressing film 160 to a thickness that does not fill the recess 2 (digging region 3). 20 (respective layers constituting the nitride semiconductor layer 20) can be in a state in which depressions are formed on the surface.

  In the third embodiment, the growth suppressing film 160 is made of an AlN film that is an aluminum nitride film, whereby a higher crack suppressing effect can be obtained. In addition, since AlN can have a crystal structure similar to that of a nitride semiconductor, the crystal structure can be made continuous between the growth suppression film 160 and where the growth suppression film 160 is not provided. For this reason, it can be said that AlN is suitable as a material for the growth suppression film.

  Further, the recess 2 (digging region 3) is formed in the n-type GaN substrate 10 having the growth main surface 10a as a surface having an off angle in the a-axis direction, and the growth suppressing film 160 is formed in the recess 2 (digging region 3). When the is formed, the width of the layer thickness gradient region 5 (see FIG. 7) can be reduced. In this case, since the light emitting portion forming region 6 (see FIG. 7) can be widened, it is preferable when it is desired to increase the number of chips that can be taken from one nitride semiconductor wafer.

  The remaining effects of the third embodiment are similar to those of the aforementioned first embodiment.

  40 and 41 are cross-sectional views for explaining the method for manufacturing the nitride semiconductor laser element according to the third embodiment of the invention. A method for manufacturing a nitride semiconductor laser element according to the third embodiment of the present invention is now described with reference to FIGS. In addition, since processes other than the formation process of the growth suppression film | membrane 160 in 3rd Embodiment are the same as that of the said 1st Embodiment, hereafter, only the formation process of the growth suppression film | membrane 160 is demonstrated.

  First, an n-type GaN substrate having a surface having an off-angle in the a-axis direction with respect to the m-plane as a growth principal surface is prepared, and an n-type is formed by the same method as in the first embodiment shown in FIGS. A recess 2 is formed in the GaN substrate.

  Next, as shown in FIG. 40, an AlN film 160a as a growth suppressing film is formed on the entire surface with a thickness of about 100 nm by sputtering using an ECR (Electron Cyclotron Resonance) apparatus. At this time, by adjusting sputtering conditions and the like, the AlN film 160a is formed so that the thickness of the AlN film 160a formed on the side surface 2b of the recess 2 is about 80 nm.

Then, as shown in FIG. 41, the SiO ₂ layer 420 (see FIG. 40) is removed using an etchant such as HF (hydrogen fluoride). Thus, the growth suppressing film 160 made of an AlN film is formed on the side surface portion 2b and the bottom surface portion 2a of the recess 2 by lift-off.

  FIG. 42 is a cross-sectional view for explaining a nitride semiconductor wafer and a nitride semiconductor laser device according to a first modification of the third embodiment. With reference to FIG. 24 and FIG. 42, the case where the shape of a growth suppression film | membrane differs in the 1st modification of 3rd Embodiment is demonstrated.

  In the first modification of the third embodiment, as shown in FIG. 42, a growth suppression film 161 made of an AlN film is formed in a region (position) lower than the growth main surface 10a in the recess 2. The growth suppressing film 160 is formed in a substantially U-shaped cross section (substantially concave) on a part of the side surface portion 2 b and the bottom surface portion 2 a of the recess 2.

  The growth suppression film 161 has a predetermined width D1 smaller than the opening width g of the recess 2 and extends along the recess 2 (c-axis [0001]) as in the third embodiment. To extend in the direction).

  In the first modification of the third embodiment, the distance t3 from the growth principal surface 10a (the surface of the non-digging region 4) to the growth suppression film 161 is set to be about 1.5 μm, for example. Yes. If the distance t3 becomes too small, it becomes difficult to form the growth suppressing film 161. Therefore, the distance t3 is preferably set to 0.5 μm or more.

  Other configurations of the first modification of the third embodiment are the same as those of the third embodiment. The effects of the first modification of the third embodiment are the same as those of the third embodiment.

  The above-described growth suppression film 161 can be formed as follows, for example.

  First, by using a method similar to that of the first embodiment, a concave portion (digging region) is formed in the substrate to form an n-type in which the concave portion 2 (digging region) as shown in FIG. 24 is formed. A GaN substrate 10 is prepared. Next, a resist is applied to the entire growth main surface 10 a of the n-type GaN substrate 10. Then, using a photolithography technique, the resist in a range narrower than the opening width g (see FIG. 42) of the recess 2 is selectively removed. Thereby, an opening as a resist pattern is formed so as to expose a part of the side surface 2b of the recess 2 and the bottom surface 2a of the recess 2.

  Subsequently, an AlN film as a growth suppression film is formed on the entire surface by sputtering using an ECR sputtering apparatus, and then the resist is removed using a resist stripping solution or an organic solvent (for example, acetone, ethanol, etc.). Thereby, the growth suppression film 161 as shown in FIG. 42 is formed by lift-off.

  FIG. 43 is a cross-sectional view for explaining a nitride semiconductor wafer and a nitride semiconductor laser device according to a second modification of the third embodiment. With reference to FIG. 43, the 2nd modification of 3rd Embodiment demonstrates the other example from which the shape of a growth suppression film | membrane differs.

  In the second modification of the third embodiment, as shown in FIG. 43, the growth suppression film 162 made of an AlN film is not only in the recess 2 (digging region 3) but also in a part of the non-digging region 4. Also formed.

  The growth suppression film 162 has a predetermined width D2 larger than the opening width g of the recess 2 and extends along the recess 2 (c-axis [0001]), as in the third embodiment. To extend in the direction).

  Other configurations of the second modified example of the third embodiment are the same as those of the third embodiment. The effect of the second modification of the third embodiment is the same as that of the third embodiment.

  Note that the above-described growth suppression film 162 can be formed, for example, by changing the resist pattern in the manufacturing method of the first modification. Specifically, by selectively removing a resist in a range wider than the opening width g of the concave portion 2 using photolithography technology, the concave portion 2 (digging region 3) and a part of the non-digging region 4 An opening as a resist pattern is formed so as to be exposed. Thereafter, by using the same method as in the first modification, the growth suppression film 162 as shown in FIG. 43 is formed.

(Fourth embodiment)
In the nitride semiconductor wafer and the nitride semiconductor laser device according to the fourth embodiment, unlike the first to third embodiments, after a nitride semiconductor layer is once grown on the nitride semiconductor substrate, A recess (digging area) is formed. A nitride semiconductor layer is further formed (regrown) on the nitride semiconductor substrate in which the recesses (digging regions) are formed. Here, the substrate (the substrate on which the nitride semiconductor layer is formed) before forming the concave portion (digging region) is referred to as a “template substrate” here.

The specific configuration of the fourth embodiment is that an n-type Al _0.02 Ga _0.98 N layer having a thickness of about 0.5 μm is formed on the same n-type GaN substrate as in the first embodiment. Yes. The first AlGaN layer is formed before the recess (digging region) is formed. A template substrate is formed by forming a first AlGaN layer on the n-type GaN substrate.

  In a predetermined region of the template substrate, a recess (digging region) similar to that in the first embodiment is formed. In addition, each layer of the nitride semiconductor is stacked on the template substrate on which the recesses (digging regions) are formed. And the element structure similar to the said 1st and 2nd embodiment is formed on the template board | substrate. Note that a growth suppression film similar to that of the second embodiment may be formed on the template substrate.

  Here, as described above, the width of the layer thickness gradient region is determined by the off-angle in the a-axis direction, but in addition to the off-angle in the a-axis direction, the width of the layer thickness gradient region is also determined by the layer thickness of the nitride semiconductor layer. It turns out that the width changes. Specifically, as the total thickness of the nitride semiconductor layer stacked on the substrate increases, the width of the layer thickness gradient region tends to increase. More specifically, as the layer thickness increases, the width of the layer thickness gradient region gradually increases from the side in contact with the recess (digging region). Therefore, when a thick nitride semiconductor layer is formed, the width of the layer thickness gradient region is widened, which may be undesirable because the light emitting portion forming region becomes narrow.

  On the other hand, in 4th Embodiment, it can suppress that the width | variety of a layer thickness inclination area | region spreads by comprising as mentioned above. That is, since the layer thickness gradient region is formed from the nitride semiconductor layer formed after forming the recess (digging region), the nitride semiconductor layer is formed before forming the recess (digging region). By doing so, it is possible to reduce the total thickness of each nitride semiconductor layer to be formed after forming the recesses (digging regions). Thereby, the width | variety of a layer thickness inclination area | region can be narrowed.

  Further, in the fourth embodiment, after forming the first AlGaN layer, the recess (digging region) is formed, so that even when a nitride semiconductor layer having a higher Al composition is formed, the strain is more effectively strained. Can be relaxed. For this reason, a higher crack suppression effect can be obtained.

  The remaining configuration and effects of the fourth embodiment are similar to those of the aforementioned first embodiment.

  44 to 46 are cross-sectional views for explaining the method for manufacturing a nitride semiconductor laser device according to the fourth embodiment of the present invention. FIG. 46 shows a cross section of a portion where a recess (digging area) is not formed. A method for manufacturing a nitride semiconductor laser element according to the fourth embodiment of the present invention is now described with reference to FIGS.

First, as shown in FIG. 44, the first AlGaN layer 21a made of n-type Al _0.02 Ga _0.98 N is formed on the main growth surface 10a using the same n-type GaN substrate 10 as in the first embodiment by MOCVD. Is grown with a thickness (for example, about 0.5 μm) that does not cause cracks. Thereby, a template substrate is formed. At this stage, since no recess (digging region) is formed in the n-type GaN substrate 10, no layer thickness gradient region is formed in the first AlGaN layer 21a.

  Next, the template substrate is taken out from the MOCVD apparatus once. And as shown in FIG. 45, the recessed part (digging area | region) 2 is formed in a template board | substrate using the method similar to the said 1st Embodiment. At this time, the distortion of the first AlGaN layer 21 a caused by lattice mismatch with the n-type GaN substrate 10 is alleviated by the formation of the recess 2. In addition, after forming the recessed part 2, you may form a growth suppression film | membrane on a template board | substrate.

Thereafter, the n-type GaN substrate 10 (template substrate) in which the recesses 2 are formed is again introduced into the MOCVD apparatus, and as shown in FIG. 46, the n-type GaN substrate 10 having a thickness of about 1.7 μm is formed on the first AlGaN layer 21a. A second AlGaN layer 21b made of type Al _0.06 Ga _0.94 N is grown. Thereby, the n-type cladding layer 121 having a thickness of about 2.2 μm (= 0.5 μm + 1.7 μm) is formed by the first AlGaN layer 21a and the second AlGaN layer 21b.

  Here, in the fourth embodiment, the second AlGaN layer 21b having a large thickness is grown on the first AlGaN layer 21a, thereby causing a lattice mismatch or the like as compared with the case where the second AlGaN layer 21b is directly grown on the n-type GaN substrate 10. Generation of distortion is suppressed. Thereby, a nitride semiconductor layer (for example, an AlGaN layer) having a higher Al composition can be formed thicker than before.

  Subsequently, the nitride semiconductor layers 22 to 27 similar to those of the first embodiment are grown on the n-type cladding layer 121 (second AlGaN layer 21b) by using the MOCVD method. At this time, a layer thickness gradient region is formed from the nitride semiconductor layer grown after forming the recess 2 (from the second AlGaN layer 21b). Therefore, by forming a nitride semiconductor layer (here, the first AlGaN layer 21a) before forming the recess 2, the total thickness of each layer of the nitride semiconductor grown after forming the recess 2 is reduced. It becomes possible to do. Thereby, the width | variety of a layer thickness inclination area | region is formed narrowly.

  Thereafter, the nitride semiconductor laser device according to the fourth embodiment is manufactured through the same steps as those of the first embodiment.

  In the case where the outermost layer of the template substrate is a nitride semiconductor layer containing Al (for example, an AlGaN layer, an AlInGaN layer, an AlInN layer, etc.), it is introduced into the MOCVD apparatus again and then re-growth 1100. When the temperature is raised to about 0 ° C., atoms such as Ga and In other than Al evaporate, and an Al-rich high resistance layer may be formed on the surface. For this reason, it is preferable to form the nitride semiconductor layer to be regrown at a growth temperature in the range of 700 ° C. to 950 ° C. Within this growth temperature range, the Al-rich high-resistance layer can be regrown without being formed.

  Furthermore, when a nitride semiconductor substrate having a growth main surface that has an off-angle in the a-axis direction with respect to the m-plane is used, even in the low-temperature growth in the range of 700 to 950 ° C. It was found that a film having good crystallinity and high surface flatness can be obtained. For this reason, also from such a viewpoint, it is preferable to perform regrowth using a nitride semiconductor substrate whose main growth surface is a surface having an off angle in the a-axis direction with respect to the m-plane. In order to suppress the generation of the Al-rich high resistance layer, the temperature at which regrowth starts may be in the range of 700 ° C. to 950 ° C., and when the growth starts, the temperature is raised to an optimum temperature. You can grow it.

  Further, regarding the suppression of the formation of the Al-rich high resistance layer, such a phenomenon can be suppressed by making the surface of the nitride semiconductor layer before regrowth a GaN layer. Therefore, from the viewpoint of suppressing the formation of the high resistance layer, the outermost layer of the template substrate is preferably a GaN layer.

Note that the nitride semiconductor layer formed before forming the concave portion (digging region) is Al _x Ga _y In _z N (0 ≦ x ≦ 1; 0 ≦ y ≦ 1; 0 ≦ z ≦ 1; x + y + z = Any semiconductor layer comprising 1) may be used. Moreover, if it is 10% or less, it may contain oxygen. For example, the nitride semiconductor layer may be an oxynitride film such as AlON.

Further, for example, before forming a recess (digging region) in the substrate, a template substrate is formed by sequentially forming an n-type GaN layer and a first cladding layer made of n-type Al _0.062 Ga _0.938 N using an MOCVD apparatus. May be formed. The formed template substrate is once taken out from the MOCVD apparatus, and after forming a recess (digging region), it can be introduced again into the MOCVD apparatus to re-grow the nitride semiconductor layers. Also in this case, as described above, it is possible to suppress the width of the layer thickness gradient region from widening.

(Fifth embodiment)
FIG. 47 is a cross-sectional view for explaining a nitride semiconductor wafer and a nitride semiconductor laser device according to a fifth embodiment of the present invention. Next, with reference to FIG. 47, in the fifth embodiment, a case will be described in which the layer thickness gradient region is formed using a substrate that is not substantially provided with an off angle. In the fifth embodiment, an example in which the nitride semiconductor device of the present invention is applied to a nitride semiconductor laser device will be described.

  As shown in FIG. 47, the nitride semiconductor wafer and the nitride semiconductor laser device according to the fifth embodiment use an n-type GaN substrate 510 with an m-plane as the growth main surface, and the nitride semiconductor wafer and nitride semiconductor. A laser element is formed. However, unlike the first, third, and fourth embodiments, the n-type GaN substrate 510 is substantially not provided with an off-angle. The n-type GaN substrate 510 is an example of the “nitride semiconductor substrate” in the present invention.

  In the fifth embodiment, the growth suppression film 162 that suppresses the crystal growth of the nitride semiconductor is formed on the upper surface of the n-type GaN substrate 510. Specifically, the growth suppression film 162 made of an AlN film is formed not only in the recess 2 (digging region 3) but also in a part of the non-digging region 4. That is, in the fifth embodiment, a growth suppression film 162 similar to that of the second modification of the second embodiment is formed on the n-type GaN substrate 510. The growth suppressing film 162 forms a layer thickness gradient region 505 in the portion of the nitride semiconductor layer 20 on the growth suppressing film 162.

  In the fifth embodiment, the growth suppressing film 162 is formed so as to cover the non-digging regions 4 on both sides with respect to the recess 2 (digging region 3). For this reason, the layer thickness inclination area | region 505 is each formed in the both sides of the recessed part 2 (digging area | region 3). In the layer thickness inclined region 505, the layer thickness is gradually (gradually) decreased as the concave portion 2 (digging region 3) is approached, similar to the layer thickness inclined region in the first and second embodiments. . Therefore, also in this case, a high crack suppression effect is obtained.

  Other configurations of the fifth embodiment are the same as those of the first to third embodiments. The configuration of the fourth embodiment can also be applied to the fifth embodiment.

  In the fifth embodiment, as described above, by forming the growth suppression film 162 on the n-type GaN substrate 510, even when an m-plane nitride semiconductor substrate having no off-angle in the a-axis direction is used, A layer thickness gradient region 505 can be formed in a part of the nitride semiconductor layer 20. Thereby, the high crack suppression effect can be acquired like the said 1st Embodiment.

  Note that when an oxide film is formed as the growth suppressing film, it is hardly epitaxially grown on the oxide film, so that it is difficult to form a beautiful layer thickness gradient region. Therefore, as the growth suppressing film in this case, an aluminum nitride film or an aluminum oxynitride film is preferable. By forming a growth suppressing film using such a material, epitaxial growth can be performed on the growth suppressing film, and a beautiful layer thickness gradient region can be easily formed.

  Other effects of the fifth embodiment are the same as those of the first to third embodiments.

(Sixth embodiment)
FIG. 48 is a cross-sectional view of a light emitting diode device according to a sixth embodiment of the present invention. Next, with reference to FIG. 6 and FIG. 48, the light emitting diode element (LED; Light Emitting Diode) by 6th Embodiment of this invention is demonstrated. In the sixth embodiment, an example in which the nitride semiconductor device of the present invention is applied to a light emitting diode device will be described.

  In the sixth embodiment, the same nitride semiconductor layers are formed on the same n-type GaN substrate 10 as in the first and second embodiments, thereby forming a light emitting diode element. However, in the sixth embodiment, unlike the first and second embodiments, the n-type guide layer 22 (see FIG. 6) and the p-type guide layer 25 (see FIG. 6) are not formed.

  Specifically, as shown in FIG. 48, an n-type cladding layer 21, an active layer 23, a carrier block layer 24, a p-type cladding layer 26, and a p-type contact layer are formed on the main growth surface 10a of the n-type GaN substrate 10. 27 are sequentially formed. On the p-type contact layer 27, a p-side electrode 131 made of an oxide-based transparent conductive film such as ITO (Indium Tin Oxide) is formed. An n-side electrode 32 is formed on the back surface of the n-type GaN substrate 10.

  In the sixth embodiment, the barrier layer of the active layer 23 is made of AlInGaN, which is a nitride semiconductor containing Al and In, as in the first to fourth embodiments.

  In the sixth embodiment, as described above, the barrier layer is made of a nitride semiconductor containing Al and In, whereby generation of dark lines can be suppressed. Thereby, luminous efficiency can be improved.

  In the case of a light-emitting diode element, since an AlGaN cladding layer necessary for light confinement is not necessary, the possibility of occurrence of cracks is reduced. However, when the barrier layer is made of a nitride semiconductor containing Al and In, it is preferable because generation of dark lines can be suppressed. In addition, when the digging region is formed in the substrate, the distortion of the active layer caused by using the nitride semiconductor layer containing Al and In as the barrier layer can be alleviated, so that a dark line is generated or enlarged. Can be effectively suppressed.

  Further, in the sixth embodiment, by configuring as described above, the flatness and crystallinity of the layer surface can be improved, so that the luminous efficiency can also be improved.

  In the sixth embodiment, the barrier layer is made of a nitride semiconductor containing Al and In, so that a decrease in light emission efficiency can be suppressed even when the number of well layers is increased. Therefore, the luminous efficiency can be easily improved by increasing the number of well layers.

  When the barrier layer is made of AlInGaN, the efficiency of In taken into the well layer can be made very good as described above. For this reason, even when the gas flow rate of In is reduced, a high In composition ratio can be maintained, so that the incorporation efficiency can be improved. This makes it possible to increase the wavelength more effectively. In this case, the well layer can be more easily multi-layered as compared with the case where the barrier layer is made of AlGaN.

  Furthermore, by constituting the barrier layer from AlInGaN, crystal strain can be reduced as compared with the case where the barrier layer is comprised of AlGaN. In other words, by alternately laminating InGaN well layers and AlInGaN barrier layers, a crystal resulting from a difference in lattice constant compared to alternately laminating InGaN well layers and AlGaN barrier layers. Distortion can be reduced. In general, in a light emitting diode element, an active layer may be configured in a quantum well structure having a relatively large number of two or more well layers. For this reason, from the viewpoint of crystal distortion, it is more advantageous to construct the barrier layer from AlInGaN than to construct the barrier layer from AlGaN.

  The other effects of the sixth embodiment are the same as the effects when the configurations of the first and second embodiments described above are applied to a light emitting diode element.

In Example 5, an LED was manufactured using an n-type GaN substrate having an off angle in the a-axis direction of 3 degrees and an off angle in the c-axis direction of +0.5 degrees with respect to the m-plane {1-100}. In Example 5, an n-type Al _0.01 Ga _0.99 N layer having a thickness of about 1 μm is formed on the main growth surface of the substrate, and then Al _0.01 In _0.01 Ga _0.98 N (layer thickness: about 15 nm) / In A 4QW active layer of _0.25 Ga _0.75 N (layer thickness: about 3 nm) was formed. Next, a p-type Al _0.2 Ga _0.8 N carrier blocking layer was formed on the 4QW active layer with a layer thickness of about 20 nm. Then, a p-type GaN contact layer having a thickness of about 0.2 μm was formed on the p-type Al _0.2 Ga _0.8 N carrier block layer. Thereafter, ITO, which is an oxide-based transparent conductive film, was formed on the p-type GaN contact layer with an EB (Electron Beam) vapor deposition apparatus with a layer thickness of about 50 nm, thereby forming a p-side electrode made of ITO. Also in Example 5 configured as described above, the effect of suppressing the generation of dark lines, the effect of improving the light emission efficiency, and the effect of suppressing the bright spot light emission were obtained.

As the oxide-based transparent conductive film, in addition to the indium oxide-based ITO transparent conductive film, In ₂ O ₃ —ZnO-based transparent conductive film, zinc oxide-based ZnO-based transparent conductive film, tin oxide-based SnO are used. _{A 2-} type transparent conductive film or the like may be used. By using these transparent conductive films, light extraction efficiency can be significantly improved. In addition, by using a substrate having an off-angle in the a-axis direction with respect to the m-plane, it can be formed on a p-type layer with improved surface morphology, so that low contact resistance can be obtained, and brightness Since the point light emission is suppressed and uniform light emission and uniform injection can be achieved, the light emission efficiency can be improved, and it is preferable to use it for the contact electrode of the nitride semiconductor layer formed on the substrate. An ITO electrode, which can be annealed at a low temperature, is particularly preferable from the viewpoint that the active layer is hardly damaged by heat. In Example 5, the annealing process is performed at 600 ° C.

  The oxide-based transparent conductive film is formed on the p-type contact layer 27 in an amorphous state by an EB vapor deposition apparatus or a sputtering apparatus, and then crystallized by thermal annealing at about 400 ° C. to 700 ° C. It is more preferable to further reduce the voltage by reducing the resistance of the film. At this time, a contact layer having a very high flatness can be formed by using a nitride semiconductor substrate having an off-angle in the a-axis direction, so that the contact between the oxide-based transparent conductive film and the p-type contact layer 27 can be formed. Since resistance can be lowered | hung, it is more preferable.

In Example 6, an LED having substantially the same structure as that of Example 5 was manufactured using the same substrate as that of Example 5. However, in Example 6, an Al _s In _t Ga _u N (s = 0.01, t = 0.03, u = 0.96) barrier layer is used. In this case, the same effect as described above was obtained. Further, it is preferable that the barrier layer contains Al and further contains In because growth at a low temperature is possible.

In Example 7, an LED similar to that of the sixth embodiment was manufactured using the same substrate as in Example 5. However, in Example 7, constitutes a barrier layer from the _{Al s In t Ga u N (} s = 0.02, t = 0.01, u = 0.97). The LED of Example 7 emitted light at an emission wavelength of 520 nm, and no dark line was observed in the emission pattern.

Also, when constituting the barrier layer from Al _s In _t Ga _u N, the range of the Al composition ratio s is 0 <s ≦ 0.08, in the range of the In composition ratio t is 0 <t ≦ 0.10, almost the same The effect of was obtained.

  Furthermore, when a plurality of devices with the number of well layers increased from two to eight layers one by one were manufactured and the light emission efficiency was measured, in a device in which the barrier layer is composed of GaN or InGaN, As the number of layers increased, the light emission efficiency decreased significantly. On the other hand, in a device in which the barrier layer is made of a nitride semiconductor containing Al (for example, AlInGaN), the light emission efficiency was not reduced. When the number of well layers is three or more, the luminous efficiency is improved by about 1.2 times by forming the barrier layer from AlInGaN as compared to the case where the barrier layer is formed from AlGaN.

(Seventh embodiment)
FIG. 49 is a cross-sectional view schematically showing a light emitting diode device according to a seventh embodiment of the present invention. Next, with reference to FIG. 49, 7th Embodiment demonstrates the example which applied the nitride semiconductor element of this invention to the light emitting diode element. In the seventh embodiment, an example in which the nitride semiconductor device of the present invention is applied to a light emitting diode device will be described.

  The light emitting diode device according to the seventh embodiment is formed by laminating the same nitride semiconductor layer 20 on the same n-type GaN substrate 10 as in the first embodiment. Specifically, as shown in FIG. 49, the light-emitting diode element includes an n-type nitride semiconductor layer 20a, an active layer 23, and a p-type nitride semiconductor layer 20b on the main growth surface 10a of the n-type GaN substrate 10. The nitride semiconductor layer 20 including the structure is formed. The n-type nitride semiconductor layer 20a is composed of an n-type cladding layer, and the p-type nitride semiconductor layer 20b is composed of a carrier block layer, a p-type cladding layer, and a p-type contact layer. . However, since it is not necessary to confine light unlike a laser element, the Al composition of the AlGaN layers of the n-type cladding layer and the p-type cladding layer does not need to be as high as the laser element, and is about 0% to 2%. It is formed.

  Further, in the light emitting diode device according to the seventh embodiment, the concave portion 2 (digging region 3) similar to the first embodiment is formed in a predetermined region of the n-type GaN substrate 10. Furthermore, in the seventh embodiment, the nitride semiconductor layer 20 is formed on the growth main surface 10a of the n-type GaN substrate 10 so that the nitride semiconductor layer 20 on the non-dig region 4 has a layer thickness gradient. A region 5 and a light emitting portion forming region 6 are formed.

  Here, although the layer thickness inclined region 5 is less effective in suppressing bright spot light emission than the light emitting portion forming region 6, EL light emission occurs. Further, the layer thickness gradient region 5 emits light at a shorter wavelength than the light emitting portion forming region 6. For this reason, in the light emitting diode device according to the seventh embodiment, the p-side electrodes 131a and 131b made of transparent electrodes are formed on both the light emitting part forming region 6 and the layer thickness inclined region 5, respectively. The p-side electrodes 131a and 131b are formed separately from each other so that the light emission of the light emitting portion forming region 6 and the light emission of the layer thickness inclined region 5 can be controlled independently.

  An n-side electrode 32 as a common electrode is formed on the back surface of the n-type GaN substrate 10.

  The nitride semiconductor wafer according to the seventh embodiment includes a plurality of light emitting diode elements according to the seventh embodiment.

  In the seventh embodiment, as described above, by forming light emitting regions in both the layer thickness gradient region 5 and the light emitting portion forming region 6, a new light emission having two or more light emission peaks in one element. An element (light emitting diode element) can be obtained.

  In the seventh embodiment, the light emission in the light emitting portion forming region 6 and the light emission in the layer thickness gradient region 5 can be controlled independently, so that light can be emitted in a very wide range of light emission wavelengths. In addition, a new light emitting element (light emitting diode element) can be obtained.

  The other effects of the seventh embodiment are the same as the effects when the configuration of the first embodiment described above is applied to a light emitting diode element.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims for patent, and further includes all modifications within the meaning and scope equivalent to the scope of claims for patent.

  For example, in the first to seventh embodiments, examples in which the present invention is applied to light-emitting elements such as nitride semiconductor laser elements and light-emitting diode elements, which are examples of nitride semiconductor elements, have been described. The present invention may be applied to semiconductor elements other than nitride semiconductor light emitting elements. For example, the present invention may be applied to devices using nitride semiconductors such as electronic devices (for example, power transistors, ICs (Integrated Circuits), LSIs (Large Scale Integrations), etc.) in general. In this case, the device may be formed in a region (region corresponding to the light emitting portion forming region) other than the layer thickness inclined region on the non-digging region. By comprising in this way, the electronic device which has the outstanding characteristic can be obtained.

  In the first to fifth embodiments, the example in which the present invention is applied to the nitride semiconductor laser element which is an example of the nitride semiconductor element has been described. However, the present invention is not limited thereto, and for example, a light emitting diode element. The present invention can also be applied to.

  In the first to seventh embodiments, an example in which the semiconductor layer in contact with the growth main surface of the n-type GaN substrate is a nitride semiconductor layer containing Al (AlGaN layer) has been described. The semiconductor layer in contact with the main growth surface of the n-type GaN substrate is not limited to a GaN layer. When the growth main surface of the substrate has an off angle in the a-axis direction with respect to the m-plane, the GaN layer in contact with the growth main surface is preferably formed with a small thickness. Thus, when a GaN layer is formed on a nitride semiconductor substrate having a growth main surface that is an off-angle in the a-axis direction with respect to the m-plane, the thickness of the GaN layer is By making it relatively small, it is possible to suppress the deterioration of the surface morphology. In this case, the thickness of the GaN layer is preferably 0.7 μm or less, and more preferably 0.5 μm or less. Further, it is more preferable that the thickness of the GaN layer is 0.3 μm or less.

  In the case where a GaN layer is formed on a nitride semiconductor substrate whose main growth surface is a surface having an off-angle in the a-axis direction with respect to the m-plane, the nitride semiconductor layer contains In from the substrate surface. The total thickness of the GaN layer formed between the well layers (when a plurality of well layers are formed, preferably the well layer on the most substrate side) is preferably 0.7 μm or less. More preferably, it is 5 μm or less. Further, it is more preferable if the total thickness of the GaN layer is 0.3 μm or less. Even in this case, it is preferable that a nitride semiconductor layer containing Al (for example, an AlGaN layer) is formed so as to be in contact with the main growth surface of the substrate. This is because if the surface morphology is deteriorated at the time of forming the active layer, the composition distribution becomes larger in the plane due to the influence of the surface morphology deteriorated by In contained in the well layer. When the in-plane distribution of the composition occurs, the portion where In incorporation is large becomes metallic or the crystallinity is remarkably lowered, thereby causing a decrease in emission intensity. For this reason, the above conditions are preferable.

  In addition, the layer structure laminated on the substrate does not include a GaN layer, and these layer structures are composed of a semiconductor layer having a composition different from GaN such as InGaN, AlGaN, InAlGaN, InAlN, etc. A light emitting element or an electronic device can be formed.

  In the first to seventh embodiments, the barrier layer is made of AlInGaN. However, the present invention is not limited to this, and the barrier layer may be made of AlInN, for example, other than AlInGaN. . The same effect as described above can also be obtained by configuring the barrier layer of the active layer from a nitride semiconductor containing Al (for example, AlGaN).

  In the first to seventh embodiments, the barrier layer is composed of a single nitride semiconductor layer containing Al and In. However, the present invention is not limited to this, and the barrier layer is made of Al and Al. A multilayer structure (for example, a superlattice structure of InGaN and AlInGaN) including at least one layer made of a nitride semiconductor containing In may be used. In that case, the layer adjacent to the well layer is preferably made of a nitride semiconductor containing Al and In. In the case of a multilayer structure, the layer composed of a nitride semiconductor containing Al and In adjacent to the well layer is preferably formed to a thickness of 1.0 nm or more, and a thickness of 3.0 nm or more. It is more preferable if it is formed. Such a configuration is effective for further functioning the effect of suppressing the occurrence of dark lines, the effect of improving the heat resistance of the active layer, and the effect of improving the flatness.

  In the first to seventh embodiments, an example in which all three barrier layers are AlInGaN layers is shown. However, the present invention is not limited to this, and a part of the three barrier layers may be It may be an AlInGaN layer. If at least one layer in contact with the well layer among the plurality of barrier layers is composed of a nitride semiconductor layer containing Al (for example, an AlGaN layer, an AlInGaN layer, an AlInN layer, etc.), the effect of improving the light emission efficiency can be obtained. . Although the number of barrier layers differs if the number of well layers of the active layer is different, in this case as well, by configuring at least one barrier layer from a nitride semiconductor layer containing Al and In, The above effects can be obtained. Taking the first embodiment as an example, for example, in order to improve the flatness of the base before forming the well layer, the first barrier layer and the second barrier layer which are the base layers before forming the well layer And a nitride semiconductor layer containing Al and In. Further, since the AlInGaN layer also serves as an evaporation preventing layer for the InGaN layer (a role for protecting the active layer), the second barrier formed on the well layer from the viewpoint of preventing evaporation (from the viewpoint of protecting the active layer). The layer and the third barrier layer may be a nitride semiconductor layer containing Al and In. Further, the second barrier layer has a two-layer structure of a side in contact with the first well layer and a side in contact with the second well layer, and the side of the second barrier layer in contact with the first well layer is a lower second barrier layer, The side of the second barrier layer in contact with the second well layer and the upper second barrier layer may be used. In order to improve the flatness of the underlying layer, the upper second barrier layer is preferably a nitride semiconductor layer containing Al and In. On the other hand, from the viewpoint of preventing evaporation, the lower second barrier layer is preferably a nitride semiconductor layer containing Al and In. All the barrier layers may be nitride semiconductor layers containing Al and In.

  Moreover, in the said 1st-7th embodiment, the opening width of the recessed part formed in a board | substrate and the depth of a recessed part can be changed suitably. In addition, it is preferable that the opening width of a recessed part is 1 micrometer or more and 50 micrometers or less. When the opening width of the recess is smaller than 1 μm, it becomes difficult to obtain a crack suppressing effect and the like. On the other hand, when the opening width of the recess is larger than 50 μm, the ratio of the recess (digging area) in the wafer surface becomes too large. Since it is not preferable to form the ridge portion on the concave portion (digging region), in this case, the number of elements that can be taken from one wafer is reduced. Moreover, it is preferable that the depth of a recessed part is 0.1 micrometer or more and 15 micrometers or less. When the depth of the recess is smaller than 0.1 μm, the recess is immediately filled. On the other hand, when the depth of the recess is larger than 15 μm, it takes a long time to form the recess.

  Furthermore, in the said 1st-7th embodiment, the cross-sectional shape of a recessed part can be changed suitably. For example, as shown in FIG. 53, the recess may be formed so that the cross-sectional shape is rectangular. In this case, the opening width g may be formed to be larger than the depth f as in the concave portion 502, or the opening width g and the depth f may be approximately equal to each other as in the concave portion 512. May be. Further, like the recess 522 and the recess 532, the depth f may be larger than the opening width g. Further, as shown in FIG. 54, the concave portion may be formed so that the side surface portion becomes an inclined surface. In this case, like the recessed part 542, you may form so that a cross-sectional shape may become V shape (inverted triangle shape). Further, like the concave portion 552 and the concave portion 562, the cross-sectional shape may be a trapezoidal shape. In this case, the opening width g and the depth f may be formed to be substantially equal as in the concave portion 552, or the opening width g is formed to be larger than the depth f as in the concave portion 562. May be. That is, the concave portion (digging region) formed on the substrate may be anything that causes uneven steps. In addition, about the relationship between the opening width of a recessed part and the depth of a recessed part, it is preferable that the opening width is formed larger than the depth. When the opening width is formed to a size equal to or smaller than the depth, the thickness of the film formed on the bottom surface of the recess may be reduced when the growth suppression film is formed. On the other hand, by forming the opening width larger than the depth, the growth suppressing film can be formed with a stable film thickness.

  In the first to seventh embodiments, the example in which the digging region is formed in the substrate by forming the concave portion having a certain opening width in a straight line is shown, but the present invention is not limited thereto, You may form a dug area | region in a board | substrate by forming a recessed part in shapes other than the above. For example, as shown in FIG. 55, the digging region 3 may be formed in the substrate by forming a zigzag-shaped recess 580 or a wave-shaped recess 583, and the recess 581 having a variable opening width and By forming 582, the digging region 3 may be formed in the substrate. Even when such a dug region is formed, the effect of the present invention can be obtained.

  In the first to seventh embodiments, the thickness, composition, etc. of the nitride semiconductor layers grown on the substrate may be appropriately combined or changed to those suitable for the desired characteristics. Is possible. For example, the semiconductor layers may be added or deleted, or the order of the semiconductor layers may be partially changed. Further, for example, a layer such as a buffer layer made of GaN may be formed between the GaN substrate and the n-type cladding layer. Furthermore, the conductivity type may be changed for some semiconductor layers. That is, it can be freely changed as long as the basic characteristics as a nitride semiconductor device are obtained.

  Moreover, in the said 1st-7th embodiment, although the example using the GaN substrate as a nitride semiconductor substrate was shown, this invention is not restricted to this, You may use nitride semiconductor substrates other than a GaN substrate. . As the nitride semiconductor substrate, a nitride semiconductor such as GaN, AlN, InN, BN, TlN, or a substrate made of a mixed crystal thereof can be used. Alternatively, a substrate in which a nitride semiconductor layer having a digging region and a non-digging region on a nitride semiconductor substrate or a substrate other than the nitride semiconductor can be used. For example, a substrate obtained by forming a nitride semiconductor base layer on a base substrate such as a GaN substrate, sapphire substrate, or SiC substrate and forming a recess in the base layer can be used. The “nitride semiconductor substrate” of the present invention is a concept including such a substrate (including a template substrate).

  Moreover, in the said 1st-7th embodiment, although the example which formed the several recessed part at equal intervals was shown, this invention is not restricted to this, A plurality of so that the space | interval of an adjacent recessed part may become a different space | interval. A recess may be formed. Moreover, you may make it form the recessed part from which cross-sectional shape differs in one board | substrate.

  In the first to seventh embodiments, the example in which the period of the recesses is set to about 400 μm is shown. However, the period of the recesses can be determined by the chip width (element width) of the nitride semiconductor laser element. For example, when the chip width (element width) is about 200 μm, the period of the recesses can be about 200 μm. The period (interval) of the recesses (digging area) is preferably 1 mm or less, and more preferably 400 μm or less. With this configuration, even if there is an abnormal portion on a part of the wafer (substrate) and the layer thickness fluctuates due to this, the lateral growth is divided by the depression on the surface of the semiconductor element layer on the recess. Thus, the diffusion of the layer thickness fluctuation caused by the abnormal part is suppressed. Further, when the period (interval) of the recesses (digging regions) is 5 μm or less, it becomes difficult to form the ridge portion. Therefore, the period (interval) of the recesses (digging regions) is preferably larger than 5 μm.

  Moreover, in the said 1st-7th embodiment, although the recessed part (digging area | region) was seen so planarly, the example formed so that it might extend in a c-axis direction and a parallel direction was shown, but this invention is not limited to this. Instead, the concave portion (digging region) may be formed so as to extend in a direction intersecting the c-axis direction at a predetermined angle in the plane of the growth main surface. That is, the concave portion (digging region) of the substrate may be formed so as to extend in the direction intersecting the a-axis direction. Specifically, for example, the concave portion (digging region) may be formed so as to extend in a direction intersecting with the c-axis direction at an angle within ± 15 degrees. Moreover, you may form a recessed part (digging area | region) in a grid | lattice form other than stripe form, for example. Even when the recesses (digging regions) are formed in this way, if the main growth surface of the substrate has an off-angle in the a-axis direction, the layer thickness gradient region can be easily formed in the nitride semiconductor layer. it can. In addition, the said recessed part (digging area | region) can also be formed in the stripe form extended in a direction parallel to a-axis direction. In this case, although the layer thickness gradient region is not formed in the nitride semiconductor layer, the strain can be sufficiently relaxed even without the layer thickness gradient region. By forming a dug area in the substrate to the last, distortion of the nitride semiconductor layer can be alleviated, and it is more preferable to have a layer thickness gradient area, but even without it, the effect of suppressing the occurrence of cracks and the active layer A strain relaxation effect can be obtained.

  In the first to seventh embodiments, the etching method used in the manufacturing process of the nitride semiconductor device (nitride semiconductor laser device, light emitting diode device) may be vapor phase etching or liquid phase etching. There may be.

  Moreover, in the said 1st-7th embodiment, the nitride semiconductor wafer was divided | segmented so that the nitride semiconductor element (nitride semiconductor laser element, light emitting diode element) might contain one recessed part (dent). However, the present invention is not limited to this, and the nitride semiconductor wafer may be divided so that the nitride semiconductor element (nitride semiconductor laser element, light emitting diode element) does not include a recess (dent). Further, the nitride semiconductor wafer may be divided so that the nitride semiconductor element (nitride semiconductor laser element, light emitting diode element) includes a plurality of recesses (dents), or the nitride semiconductor laser element is provided with a recess (depression). The nitride semiconductor wafer may be divided so as to include a part. More preferable is the case where the whole of the recess (dent) remains in the element or a part of the recess (depression) remains in the element by being divided so as to include the recess (depression). . Even in such a configuration, a nitride semiconductor device (nitride semiconductor laser device, light emitting diode device) having excellent device characteristics can be obtained with a high yield.

  In the first to seventh embodiments, the example in which the nitride semiconductor wafer is divided so as to include at least a part of the layer thickness gradient region is shown. However, the present invention is not limited to this, and the layer thickness gradient region is included. The nitride semiconductor wafer may be divided so that it does not contain.

Moreover, in the said 1st-7th embodiment, although the example which comprised the quantum well structure of the active layer in the DQW structure was shown, this invention is not restricted to this, An active layer is provided in quantum well structures other than a DQW structure. It may be configured. For example, the quantum well structure of the active layer may be configured as an SQW (Single Quantum Well) structure. Specifically, for example, as shown in FIG. 56, one well layer 43a made of InGaN and Al _0.005 In are formed on the n-type guide layer 22 (in the sixth and seventh embodiments, the n-type cladding layer). An active layer 43 having an SQW structure in which two barrier layers 43b made of _0.02 Ga _0.975 N are alternately stacked can be formed. The thickness of the well layer 43a can be about 3 nm to about 4 nm, and the thickness of the barrier layer 43b can be about 70 nm. Further, the active layer may be configured in an MQW structure in addition to the SQW structure. Even when the active layer has the SQW structure or the MQW structure, the effect of suppressing the generation of dark lines and the effect of suppressing the bright spot light emission can be obtained. In addition, in the case of a multiple quantum well structure having three or more well layers, optical confinement can be performed effectively, so that the gain can be increased. Furthermore, in the MQW structure having a relatively large number of well layers used in LEDs and the like, since the barrier layer is made of a nitride semiconductor containing Al and In, lattice strain with the well layer can be reduced. More preferred. The composition, thickness, etc. of the active layer (well layer, barrier layer) can be appropriately changed.

  In addition, when the active layer is configured in a multiple quantum well structure, the first quantum well, the second quantum well,... Need not have the same layer thickness and composition, and are different from each other. Also good. In that case, the emission wavelengths from the respective quantum wells are different, but in the relationship between the first quantum well and the second quantum well, the emission wavelength of the first quantum well closest to the substrate is the shortest, and the emission of the second quantum well. The wavelength is preferably configured to be longer than the emission wavelength of the first quantum well.

  In the first to seventh embodiments, the example in which the In composition ratio of the well layer is configured to be 0.2 to 0.28 has been described. However, the present invention is not limited to this, and the In composition ratio of the well layer is also illustrated. Can be appropriately changed within the range of 0.15 to 0.45. Further, the In composition ratio of the well layer may be a value smaller than 0.15. Further, the well layer may contain Al as long as it is within 5%. The carrier block layer may contain In as long as it is within 7%. It is preferable to include In because it is easy to form a film having good crystallinity at a low temperature, and further includes a barrier layer that includes Al or a nitride semiconductor layer that includes Al and In. This is preferable because distortion to the active layer can be reduced.

In the above first to seventh _{embodiments, Al s In t Ga u N} Al composition ratio s of the formed barrier layer of may be appropriately modified within the scope of 0 <s ≦ 0.08. In addition, the In composition ratio t of the barrier layer can be appropriately changed within a range smaller than the In composition ratio of the well layer.

  In the first to seventh embodiments, the distance between the carrier block layer and the well layer is the same as the thickness of the third barrier layer. However, the carrier block layer and the well layer (the well on the most carrier block layer side) A plurality of nitride semiconductor layers having different compositions may be formed between the two layers. Further, it is also preferable that a part between the carrier block layer and the well layer (most well layer on the carrier block layer side) is doped with a p-type impurity such as Mg to make it p-type. In the first to seventh embodiments, non-doping is performed.

  Moreover, although the example which formed the carrier block layer in the thickness of 40 nm or less was shown in the said 1st-7th embodiment, this invention is not limited to this, The thickness of a carrier block layer may be larger than 40 nm. The effect of the present invention can be obtained even if the carrier block layer contains about 3% In. The Al composition ratio of the carrier block layer is preferably higher than the Al composition ratio of the p-type cladding layer for the purpose of reducing the driving voltage.

  In the first to seventh embodiments, the example in which the carrier block layer is formed as a layer that blocks carriers (electrons) injected into the active layer from flowing into the p-type semiconductor layer has been described. However, the present invention is not limited to this, and in the case of a nitride semiconductor laser element, a cladding layer containing Al can also be used as a layer for blocking the carrier. In this case, the Al composition ratio of the cladding layer is preferably 0.08 or more.

  In the first to seventh embodiments, Si is used as the n-type impurity. However, the present invention is not limited to this, and other than Si, for example, O, Cl, S can be used as the n-type impurity. , C, Ge, Zn, Cd, Mg, or Be may be used. As the n-type impurity, Si, O and Cl are particularly preferable.

  In the first to seventh embodiments, as the epitaxial growth method, in addition to the MOCVD method, for example, an HVPE (Hydride Vapor Phase Epitaxy) method, an MBE (Molecular Beam Epitaxy) method, or the like can be used.

  In the first to seventh embodiments, the crystal axis directions ([1-100] direction, [11-20] direction and [0001] direction) may be crystallographically equivalent directions.

  In the first, third, fourth, sixth, and seventh embodiments, the example in which the off angle in the a-axis direction is configured to be larger than 0.1 degrees is shown. However, the present invention is not limited to this. Alternatively, the off angle in the a-axis direction may be an angle of 0.1 degrees or less. However, considering the effect of suppressing bright spot light emission, surface morphology, and the like, the off angle in the a-axis direction is preferably an angle larger than ± 0.1 degrees.

  In the first, third, fourth, sixth and seventh embodiments, if the growth main surface of the substrate has an off-angle in the a-axis direction, it has an off-angle in the c-axis direction. It does not have to be.

  In the first to third and fifth to seventh embodiments, the recess (digging region) is formed on the substrate once as in the fourth embodiment by using GaN, InGaN, AlGaN, InAlGaN, This may be performed after growing a layer of a nitride semiconductor such as InAlN. That is, the contents of the present specification can be applied even when the growth is performed once and then the concave portion (digging region) is formed.

In the above-mentioned first to fifth embodiments show the example in which the insulating layer from SiO _2, the present invention is not limited thereto, and may be the insulating layer of an insulating material other than SiO ₂ . For example, the insulating layer may be made of SiN, Al ₂ O ₃ , ZrO ₂ or the like.

  In the second and fifth embodiments, an example using a GaN substrate (just substrate) having an m-plane as a growth main surface has been shown. However, the present invention is not limited to this, and for example, for the m-plane A nitride semiconductor substrate having an off angle in the c-axis direction may be used. Alternatively, a nitride semiconductor substrate having off angles in the a-axis direction and the c-axis direction with respect to the m-plane may be used. That is, any substrate may be used as long as it is a nitride semiconductor substrate having a nonpolar surface as a growth main surface.

  In the third embodiment, the example in which the growth suppression film made of AlN is formed in the digging region has been shown. However, the present invention is not limited to this, and the material capable of suppressing the crystal growth of the nitride semiconductor. If so, a growth suppressing film made of a material other than AlN may be formed in the digging region. The growth suppressing film is preferably an aluminum (Al) nitride film, an aluminum (Al) oxynitride film, or an aluminum (Al) and gallium (Ga) nitride film. Such a material can obtain a high effect in all of the crack suppressing effect, the surface morphology improving effect, and the nitride semiconductor layer composition fluctuation suppressing effect. In addition, since such a material can have a crystal structure similar to that of a nitride semiconductor, the crystal structure is continuous between the growth suppressing film and the place without the growth suppressing film. For this reason, it is suitable as a material for the growth suppression film. The next preferred materials for the growth suppression film are silicon (Si) oxide, nitride and oxynitride, aluminum (Al) oxide, titanium (Ti) oxide, zirconia (Zr) oxide. Oxides of yttria (Y), oxides of niobium (Nb), oxides of hafnium (Hf), oxides of tantalum (Ta), and oxynitrides or nitrides of the above materials. The next preferred material is a refractory metal such as molybdenum (Mo), tungsten (W), or tantalum (Ta). As an effect of suppressing the growth of the nitride semiconductor, the oxide film is strongest, and becomes weaker in the order of the oxynitride film and the nitride film. For this reason, it is more preferable to form a growth suppression film made of an oxide film in the recess.

  In the third and fifth embodiments, the example in which the growth suppressing film is formed by the sputtering method using the ECR sputtering apparatus has been shown. However, the present invention is not limited to this, and the growth suppressing film is formed by a method other than the above. It can also be formed. For example, the growth suppression film can be formed by using a sputtering method using a magnetron sputtering apparatus, an EB (Electron Beam) vapor deposition method, a plasma CVD method, or the like.

  Note that the growth suppressing film is formed in a shape other than the shape shown in the third embodiment as long as it can form a depression on the surface of the nitride semiconductor layer on the recess (digging region). It may be.

  Further, in the fifth embodiment, the example in which the growth suppression film is formed so as to cover the non-digging regions on both sides with respect to the concave portion (digging region) is shown, but the present invention is not limited thereto, and the growth is not limited thereto. The suppression film may be formed so as to cover only the non-digging region on one side of the recess (digging region). In this case, the layer thickness gradient region is also formed only on one side of the concave portion (digging region). Even in such a case, a high crack suppression effect can be obtained as described above.

  In the seventh embodiment, the light emitting diode element in which both the layer thickness inclined region and the light emitting portion forming region are used as the light emitting region is shown. However, the present invention is not limited to this, and the layer thickness inclined region and the light emitting portion forming region are used. It is good also as a light emitting diode element which used only any one of these as the light emission area | region. In the case where only the light emitting portion forming region is used as the light emitting region, the nitride semiconductor wafer can be divided so that the light emitting diode element does not include the layer thickness inclined region.

2 recessed portion 2a bottom surface portion 2b side surface portion 3 digging region 4 non-digging region 5, 505 layer thickness inclined region 6 light emitting portion forming region 10, 510 n-type GaN substrate (nitride semiconductor substrate)
10a Main growth surface 20 Nitride semiconductor layer 20a N-type nitride semiconductor layer 20b P-type nitride semiconductor layer 21, 121 n-type cladding layer 22 n-type guide layer 23, 43 Active layer 23a, 43a Well layer 23b, 43b Barrier layer 24 carrier block layer 25 p-type guide layer 26 p-type cladding layer 27 p-type contact layer 28 ridge portion 29 optical waveguide region 30 insulating layer 31, 131 p-side electrode 32 n-side electrode 40 resonator surface 40a light exit surface 40b light reflection Surface 50 Nitride semiconductor wafer 100 Nitride semiconductor laser element (nitride semiconductor element)
131a, 131b p-side electrode 160, 161, 162 Growth inhibiting film

Claims (18)

a nitride semiconductor substrate having an m-plane as a main growth surface;
A nitride semiconductor layer including an active layer formed on a main growth surface of the nitride semiconductor substrate;
The nitride semiconductor substrate includes a digging region dug in the thickness direction from the growth main surface, and a non-digging region that is a non-digging region,
The active layer may have a barrier layer formed of nitride semiconductor containing Al and In,
The nitride semiconductor layer includes a layer thickness gradient region that is formed on the non-dig region and has a layer thickness gradient that gradually decreases as the digging region is approached,
The nitride semiconductor device, wherein the nitride semiconductor layer in the layer thickness gradient region and the nitride semiconductor layer in the digging region are continuous . 2. The nitride semiconductor device according to claim 1, wherein the digging region is formed so as to extend in a direction intersecting the a-axis direction when seen in a plan view . 3. The nitride semiconductor device according to claim 1, wherein an Al composition ratio of the barrier layer is greater than 0 and equal to or less than 0.08 . 4. 4. The nitride semiconductor device according to claim 1, wherein an In composition ratio of the barrier layer is greater than 0 and equal to or less than 0.10 . 5. The nitride according to any one of claims 1 to 4, wherein the active layer includes a plurality of the barrier layers, and at least a part of the plurality of barrier layers is made of AlInGaN . Semiconductor element. 6. The nitride semiconductor device according to claim 1, wherein a growth suppressing film that suppresses growth of a nitride semiconductor is formed in the digging region . 7. The nitride semiconductor element according to any one of claims 1 to 6, wherein the digging region is formed so as to extend in a c-axis direction when seen in a plan view. The nitride semiconductor layer includes an optical waveguide region,
The nitride semiconductor device according to claim 1, wherein the optical waveguide region is located on the non-dig region.   The active layer has a well layer made of a nitride semiconductor containing In and having a quantum well structure, and the In composition ratio of the well layer is 0.15 or more and 0.45 or less. The nitride semiconductor device according to any one of claims 1 to 8. a nitride semiconductor substrate having an m- plane as a main growth surface;
A nitride semiconductor layer including an active layer formed on a main growth surface of the nitride semiconductor substrate;
The nitride semiconductor substrate includes a digging region dug in the thickness direction from the growth main surface, and a non-digging region that is a non-digging region,
The active layer may have a barrier layer formed of nitride semiconductor containing Al and In,
The nitride semiconductor layer includes a layer thickness gradient region that is formed on the non-dig region and has a layer thickness gradient that gradually decreases as the digging region is approached,
The nitride semiconductor wafer, wherein the nitride semiconductor layer in the layer thickness gradient region and the nitride semiconductor layer in the digging region are continuous . The nitride semiconductor wafer according to claim 10, wherein the digging region is formed so as to extend in a direction intersecting the a-axis direction when seen in a plan view . 12. The nitride semiconductor wafer according to claim 10, wherein a growth suppression film that suppresses growth of a nitride semiconductor is formed in the digging region . The nitride semiconductor wafer according to any one of claims 10 to 12 , wherein the digging region is formed so as to extend in a c-axis direction when seen in a plan view. A nitride semiconductor device formed using the nitride semiconductor wafer according to any one of claims 10 to 13 . preparing a nitride semiconductor substrate having an m-plane as a growth principal surface;
Forming a recessed region dug into the main growth surface of the nitride semiconductor substrate;
Forming a nitride semiconductor layer on the main growth surface of the nitride semiconductor substrate,
The step of forming the nitride semiconductor layer includes a step of forming an active layer having a quantum well structure including a well layer and a barrier layer,
The step of forming the active layer, have a step of forming the barrier layer of a nitride semiconductor containing Al and In,
The step of forming the digging region includes a step of forming a non-digging region which is a region not dug in a region different from the digging region in the growth main surface,
The step of forming the nitride semiconductor layer includes a step of forming, in a region on the non-dig region, a layer thickness gradient region in which the layer thickness is gradually decreased as the digging region is approached,
The method for manufacturing a nitride semiconductor device, wherein the nitride semiconductor layer in the layer thickness gradient region and the nitride semiconductor layer in the digging region are continuous . The step of forming the digging region includes a step of forming the digging region so as to extend in a direction crossing the a-axis direction when seen in a plan view . A method for manufacturing a nitride semiconductor device. The method for manufacturing a nitride semiconductor device according to claim 15, further comprising a step of forming a growth suppressing film that suppresses growth of a nitride semiconductor in the digging region . 18. The method according to claim 15, wherein the step of forming the active layer includes a step of forming a well layer having an In composition ratio of 0.15 to 0.45. The manufacturing method of the nitride semiconductor element of description.