JP5178151B2 - Wireless communication system and wireless signal synthesis method - Google Patents

Description

  The present invention relates to a radio communication system and radio signal synthesis in which high-frequency radio signals received by a plurality of antennas installed at predetermined intervals are digitally processed and synthesized, and then converted to radio signals of the original frequency Regarding the method.

  Multiple systems with antenna, frequency converter and amplifier, received by each system, synthesized amplified radio signal by power combiner, then converted synthesized radio signal to radio signal frequency at reception There is a wireless communication system that outputs to a subsequent circuit. Such a wireless communication system is widely used as, for example, a joint reception system in a building, an adaptive control type (for example, see Patent Document 1) or a diversity reception type (for example, see Patent Document 2).

JP 2007-110765 A Japanese Patent Laid-Open No. 2005-159584

  In this type of conventional wireless communication system, the main circuit is composed of an analog circuit. That is, after a plurality of systems of radio signals are amplified, they are respectively sent to the power combiner by analog transmission, and the power combiner also combines the radio signals by analog means.

  When power combining is performed by analog means, there is a problem that the circuit scale of the power combiner increases in accordance with the number of reception systems for combining wireless signals, and power loss at the time of combining increases. In addition, when a plurality of antennas are arranged at a distance, there is a problem that power loss occurs according to the distance to the power combiner.

  An object of the present invention is to solve such a problem, and can easily cope with an increase in the number of receiving systems including antennas, and even if each antenna or receiving system is installed away from the combining means, power loss It is an object of the present invention to provide a radio signal synthesizing method and a radio communication system suitable for implementing this method.

The wireless communication system of the present invention is provided in a one-to-one correspondence with m (m is a natural number of 2 or more) antennas, and m wireless units that amplify wireless signals of a predetermined format received by the antennas. , M signal processing units provided in a one-to-one correspondence with each radio unit, a digital synthesis circuit that synthesizes the output of each signal processing unit, and a signal conversion unit provided at the subsequent stage of the digital synthesis circuit It is to be prepared.
The signal processing unit converts the radio signal output from the radio unit into digital data, and controls the average amplitude of the radio signal amplified by the radio unit to be constant based on the value of the converted digital data. It generates gain control data for, the gain control data, the output with the digital data to the digital synthesis circuit and outputting to the radio unit.
The digital synthesizing circuit takes in the data output from each signal processing unit through a digital transmission path, and synthesizes the digital data and the gain control data into one of the fetched data.
The signal conversion unit converts the digital data output from the digital synthesis circuit into the radio signal, and controls the amplitude of the converted radio signal based on the gain control data output from the digital synthesis circuit.

In one embodiment, the signal processing unit includes, for example, an orthogonal transform circuit that converts a radio signal into I / Q data, and a Log detection circuit that generates the gain control data based on the converted I / Q data. The converted I / Q data and the generated gain control data are multiplexed, and the multiplexed data is output to the digital synthesis circuit .
The digital synthesis circuit includes, for example, an adder group in which adder circuits for synthesizing I / Q data and gain control data input in two systems are connected in multiple stages, and an I output from a final stage adder circuit. / Q data including a quadrature modulation circuit for quadrature modulation.
When the number of input systems is 2n (n is a positive integer), the adder circuit is configured by multi-stage connection of 2n−1 circuits.
The adding circuit includes: I / Q data corresponding to the larger gain control data, I / Q data corresponding to the smaller gain control data of the two systems of input I / Q data and gain control data, A signal selection circuit for outputting a smaller gain control data, a difference between the gain control data, and an active table for converting the gain control data into a coefficient for amplitude adjustment of the I / Q data; Data obtained by adding the input I / Q data of the two systems by addition or multiplication of the data output from the active table and the coefficient output from the active table is output to the subsequent stage.

The radio signal synthesis method of the present invention is a method in which a radio signal of a predetermined format obtained by receiving by a plurality of reception systems is amplified by a radio unit of each reception system, and these are combined to obtain one radio signal. , Converts the radio signal of each receiving system into digital data, and generates gain control data for controlling the average amplitude of the radio signal amplified by the radio unit to be constant based on the value of the converted digital data The gain control data is output to the radio unit and output together with the digital data, and the digital data and gain control data output from each receiving system are acquired through the digital transmission path, and the acquired data Are digitally synthesized by weighting the digital data according to the gain control data, while the gain control data And combining the digital data according to a predetermined function, converting the combined digital data into the radio signal, and controlling the amplitude of the converted radio signal based on the combined gain control data. And

  According to the radio communication system of the present invention, by converting radio signals received by a plurality of systems into digital data, the problem of power loss according to the distance to the digital synthesis circuit can be solved. Also, the gain control data when the average amplitude in each receiving system is controlled to be constant is synthesized, and this is used for controlling the amplitude (gain) of the radio signal converted from the digital data. Can be stabilized.

FIG. 1 is a configuration diagram of a wireless communication system to which the present invention is applied.
The wireless communication system 1 includes eight antennas 100 (partially omitted in FIG. 1) arranged at a distance, a receiving unit 200 provided in a one-to-one correspondence with these antennas 100, and reception of these antennas. A plurality of signal processing units 300 provided in a one-to-one correspondence with the receiving unit 200 and one digital synthesis circuit 400 are provided after the unit 200. The antenna 100, the receiving unit 200, and the signal processing unit form one receiving system.

  The receiving unit 200 and the signal processing unit 300 of each receiving system all have the same configuration. In the example of the reception system in the upper part of FIG. 1, the receiving unit 200 receives a high-frequency received signal received by the antenna 100 at a first frequency lower than the frequency of the received signal by the first frequency converting unit 201. Convert to The converted first frequency signal is input to the variable amplifier 202. The variable amplifier 202 amplifies the input signal. The amplified signal is converted into a digital signal by an A (analog) / D (digital) converter 203 and then input to the signal processing unit 300.

  Since the gain of the variable amplifier 202 is automatically adjusted so that the average amplitude value of the analog signal input to the A / D converter 203 is constant, even if the signal has a small amplitude, S / N (signal to noise) The radio signal can be converted into a digital signal without degrading the ratio.

  In the signal processing unit 300, the digital signal sent from the receiving unit 200 is input to the orthogonal transform circuit 301, where it is converted into I / Q data. The orthogonal transform circuit 303 outputs the converted I / Q data to the multiplexing circuit 303 and also outputs this I / Q data to the log detection circuit 302. The log detection circuit 302 generates gain control data (ratio data expressed in dB) for controlling the gain of the amplifier and the attenuation of the attenuator described above, and the gain control data is multiplexed with the variable amplifier 202 and the multiplexing of the reception unit 200. Output to the circuit 303. The variable amplifier 202 performs gain control based on the gain control data so that the average amplitude of the input signal becomes constant. That is, if the level of I / Q data is excessive, the gain is lowered so as to attenuate it.

The multiplexing circuit 303 multiplexes the I / Q data and the above gain control data to generate a multiplexed signal, and outputs this to the digital synthesis circuit 400 by digital transmission. Since information is encoded and transmitted in digital transmission, the problem of distance to the digital synthesis circuit 400 that is the transmission destination, that is, the problem of power loss during analog transmission is solved.
The digital synthesizing circuit 400 synthesizes a plurality of systems of I / Q data and gain control data, and converts the synthesized I / Q data into a digital quadrature modulation signal. Details of the digital synthesis circuit 400 will be described later.

  The wireless communication system 1 further includes a D (digital) / A (analog) converter 500 that converts output data of the digital synthesis circuit 400 into an analog signal, and a frequency of the analog signal output from the D / A converter 500. A second frequency converter 600 that converts a signal having the same frequency as a radio signal received by the antenna 100 and a variable attenuator 700 are provided. The variable attenuator 700 makes the system gain constant by controlling the attenuation amount according to the gain control data synthesized by the digital synthesis circuit 400.

[Digital synthesis circuit]
Next, the digital synthesis circuit 400 in the present embodiment will be described.
FIG. 2 is a configuration diagram of the digital synthesis circuit 400. The digital synthesizing circuit 400 performs the addition processing of the outputs of the four first addition circuits 410a to 410d that perform addition processing of two systems of I / Q data and gain control data, respectively, and the two first addition circuits of the preceding stage, respectively. Two second adder circuits 410e and 410f to be performed, a third adder circuit 410g for adding the outputs of the two second adder circuits 410e and 410f, and an I / Q output from the third adder circuit 410g And an orthogonal modulation circuit 420 for converting data into an orthogonal modulation signal.
The first to third adder circuits 410a to 410g all have the same circuit configuration.

FIG. 2 shows an example of inputs (I / Q data and gain data) from eight receiving systems. However, when the number of inputs (the number of receiving systems) is 2 ⁿ (n is a positive integer), The adder circuit can easily cope with the multi-stage connection configuration with 2 ⁿ −1 circuits.

[Adder circuit]
A configuration example of each of the addition circuits 410a to 410g will be described.
FIG. 3 is a diagram illustrating a configuration example of the uppermost addition circuit 410a in FIG. Here, an example in which addition processing of two systems of I / Q data “Sa” and “Sb” and gain control data “Ga” and “Gb” is performed is shown, but the same applies to the other addition circuits 410b to 410g. It becomes composition.

The I / Q data “Sa” and “Sb” are 2's complement 16 bits each for I data and Q data, while the gain control data “Ga” and “Gb” are 0 to 60 [dB], 1 [ dB] Step 6 bits. These data are input to the signal selection circuit 411 and the second ROM 416.
The signal selection circuit 411 is firmware that operates according to a predetermined program. The signal selection circuit 411 includes two input signal data, that is, I / Q data “Sa” and “Sb”, gain control data “Ga” and “Gb”. Value comparison processing, calculation processing, and signal data generation processing are performed. In this example, among the gain control data “Ga” corresponding to the I / Q data “Sa” and the gain control data “Gb” corresponding to the I / Q data “Sb”, the gain control data “Ga”, “Gb” The following processing is performed according to the size of "."

(1) When Ga ≧ Gb I / Q data “Sa” corresponding to the larger gain control data “Ga” is signal data “Sgmax”, and I / Q data corresponding to the smaller gain control data “Gb”. “Sb” is signal data “Sgmin”. Further, the smaller gain control data “Gb” is signal data “Gmin” (dB), and the difference (= Ga−Gb) between the gain control data “Ga” and the gain control data “Gb” is the signal data “Gsub” ( dB) and these calculation processes are performed.

(2) When Ga <Gb I / Q data “Sb” corresponding to the larger gain control data “Gb” is signal data “Sgmax”, and I / Q data corresponding to the smaller gain control data “Ga”. Let “Sa” be signal data “Sgmin”. The smaller gain control data “Ga” is the signal data “Gmin” (dB value), and the difference (= Gb−Ga) between the gain control data “Ga” and the gain control data “Gb” is the signal data “Gsub”. (DB value) and these calculation processes are performed.

  After the above-described processing, the signal selection circuit 411 outputs each signal data “Sgmax”, “Sgmin”, “Gmin”, and “Gsub” as a signal selection result.

A first ROM 412 is provided following the signal selection circuit 411. The first ROM 412 multiplies the I / Q data (“Sgmax”) of the larger system by the signal data “Gsub” (dB) representing the difference between the gain control data “Ga” and the gain control data “Gb”. This is a kind of active table in which the gain attenuation coefficient (dB conversion ratio) “Ks” is calculated in advance and the calculation result is stored in association with the address. This active table can be created using, for example, an EXCEL (registered trademark of Microsoft Corporation) function. That is, in order to set the two's complement 17-bit data corresponding to the address value (6 bits) as the gain attenuation coefficient “Ks”, as shown in FIG. 4, for each address from “0” to “63” Data (“Ks”) is calculated in advance. Data (“Ks”) can be obtained from “ROUND (10 (−address / 20) power × 2 ¹⁶ )”. The “ROUND (•)” function means rounding. By using the signal data “Gsub” output from the signal selection circuit 411 as the address value of this active table, the corresponding gain attenuation coefficient “Ks” can be output from the first ROM 412. This gain attenuation coefficient “Ks” is input to multiplier 413.

  The multiplier 413 multiplies the signal data “Sgmax” output from the signal selection circuit 411 by the gain attenuation coefficient “Ks” output from the first ROM 412, thereby obtaining a gain difference with respect to the signal data “Sgmax”. The weighted signal data “KsSgmax” is output. This weighted signal data “KsSgmax” is input to the adder 414.

  The adder 414 adds the signal data “Sgmin” output from the signal selection circuit 411 and the weighted signal data “KsSgmax” output from the multiplier 413, and multiplies the signal data “Sgab” obtained thereby. Output to 418.

The second ROM 415 is used to integrate the two input gain control data “Ga” and “Gb” into one gain control data “Gab” and pass it to the next stage. The gain control data “Ga”, This is a kind of active table in which the attenuation amount (dB) for each of “Gb” is added as a true number, and the result of Log conversion of the result is calculated in advance for each address and stored.
This active table can be created using, for example, the above-described EXCEL function. That is, the address is composed of 12 bits and the data is composed of 6 bits. Among the 12 bits of the address, the upper address 6 bits are assigned to the gain control data of one system (for example, “Ga”), and the lower address 6 bits are assigned. Assigned to the gain control data (for example, “Gb”) of the other system. Then, a logarithmic addition result of the attenuation amount (dB) with respect to the gain control data corresponding to the value of each address is subjected to Log conversion, and the result is stored for each address as gain control data to be output. The gain control data to be output with respect to the address can be obtained by “−ROUND (10 Log (10 (−higher address / 10)) × 10 (−lower address / 10)))”. However, 0 is set when the gain control data to be output is negative.

An example of the contents of the second ROM 415 is shown in FIG.
In the example of FIG. 5, for each of the address values “0” to “4095”, a numerical value obtained by dividing the upper 6-bit address value by 64 is converted to an integer (rounded down to the nearest decimal point, and the numerical value is negative) For the lower 6 bits, the remainder is obtained by dividing the address value by 64, and the true addition value is calculated by the following Excel function.
“−ROUND (10 × Log (10 (−the upper 6 bits value / 10)) + 10 (−the lower 6 bits / 10th power))”)
The gain control data (dB) corresponding to each address value is calculated by the following Excel function.
"IF (value of true number addition <0,0, value of true number addition)"

  In this active table, the value of the upper address 6 bits is the value of one gain control data (eg, “Ga”) in the previous stage, and the value of the lower address 6 bits is the gain control data (eg, “Gb”) of the other system. By inputting a value, it is possible to output signal data “Gab” obtained by adding the values. The signal data “Gab” is output to the subsequent stage and also output to the adder 416.

  The adder 416 outputs signal data “Gmab”, which is the result of subtracting the signal data “Gab” output from the second ROM 415 from the signal data “Gmin” output from the signal selection circuit 411, to the third ROM 417.

The third ROM 417 outputs a gain attenuation coefficient “Km” corresponding to the address value of the ROM. For each address, signal data “Gmab” obtained by calculation processing is stored in advance. The signal data “Gmab” can be obtained by the following Excel function.
“ROUND (10−address / 20) power × 2 ¹⁶ )”
The address is 6 bits and the data is 2's complement 17 bits.

  The gain attenuation coefficient “Km” corresponding to the signal data “Gmab” is output to the multiplier 418 by accessing the address of the third ROM 417 using the Gmab output from the adder 416.

  The multiplier 418 multiplies the signal data “Sgab” output from the adder 414 and the gain attenuation coefficient “Km” output from the third ROM 417. As a result, the signal data “ΣSab”, which is the addition result of the two systems of I / Q data “Sa” and “Sb” that are finally input to the addition circuits 410a to 410g, is used as the I / Q data of this stage. Output to.

As described above, in the wireless communication system 1 according to the present embodiment, the wireless signal received by the antenna 100 is converted into digital data, so that the power loss corresponding to the distance to the digital combining circuit 400 does not occur and the digital combining is performed. Transmission to the circuit 400 can be performed.
Further, since the digital synthesis circuit can be configured by simply connecting the two-system input type adder circuit 410 in multiple stages, it is possible to easily cope with an increase or decrease in the number of I / Q data. Moreover, since it is a digital circuit, the power loss accompanying the increase of the adding circuit 410 is significantly suppressed as compared with the conventional system using analog means.
As a result, it can be easily incorporated into an LSI such as a gate array, and a smaller and lower cost circuit can be developed.

  In the present embodiment, in order to output gain attenuation coefficients Ks and Km corresponding to the gain control data as components of the adder circuit 410, the first and third ROMs 412 and 417 whose contents are shown in FIG. Furthermore, in order to output the gain control data “Gab” obtained by combining the two systems of gain control data “Ga” and “Gb”, the second ROM 415 whose contents are shown in FIG. 5 is used. For example, the above-described EXCEL function may be used to calculate the value each time.

  The present invention relates to a joint reception system in a building, a reception system in a wide area, an adaptive control type or a diversity reception type wireless communication system, and other applications in which a single wireless signal is obtained by combining wireless signals received by a plurality of antennas. It can be widely used in general.

The block diagram of the radio | wireless communications system to which this invention is applied. The block diagram of a digital composition circuit. The block diagram of an addition circuit. The contents explanatory view of the 1st and 3rd ROM which asks for the coefficient to gain control data. The content explanatory view of the 2nd ROM which adds two numbers of gain control data true number.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Radio | wireless communications system 100 Antenna 200 Radio | wireless part 201 1st frequency converter 202 Variable amplifier 203 A / D converter 300 Signal processing part 301 Orthogonal transformation circuit 302 Log detection circuit 303 Multiplexing circuit 400 Digital synthesis circuit 410 Addition circuit 411 Signal Selection circuit 412, 415, 417 ROM (active table)
413, 418 Multiplier 414, 416 Adder 420 Quadrature modulation circuit 500 D / A converter 600 Second frequency converter 700 Variable attenuator

Claims (6)

m radio units provided in a one-to-one correspondence with m antennas, amplifying radio signals of a predetermined format received by the antennas, and m radio units provided in a one-to-one correspondence with the radio units A signal processing unit, a digital synthesizing circuit that synthesizes the output of each signal processing unit, and a signal conversion unit provided at a subsequent stage of the digital synthesizing circuit,
The signal processing unit converts the radio signal output from the radio unit into digital data, and controls the average amplitude of the radio signal amplified by the radio unit to be constant based on the value of the converted digital data. generates gain control data for, the gain control data, the output with the digital data to the digital synthesis circuit and outputting to the radio unit,
The digital synthesis circuit captures the data output from each signal processing unit through a digital transmission path, and synthesizes the digital data and the gain control data into one of the captured data,
The signal conversion unit converts the digital data output from the digital synthesis circuit into the radio signal, and controls the amplitude of the converted radio signal based on the gain control data output from the digital synthesis circuit.
Wireless communication system. The signal processing unit includes an orthogonal transform circuit that converts a radio signal into I / Q data, and a Log detection circuit that generates the gain control data based on the converted I / Q data. Multiplexing the data and the generated gain control data, and outputting the multiplexed data to the digital synthesis circuit ;
The wireless communication system according to claim 1. The digital synthesis circuit includes an adder circuit group in which adder circuits that synthesize I / Q data and gain control data input in two systems are connected in multiple stages, and I / Q data output from the final stage adder circuit. An orthogonal modulation circuit for performing orthogonal modulation,
The wireless communication system according to claim 1. When the number of input systems is 2n (n is a positive integer), the adder circuit is configured by multistage connection of 2n−1 circuits.
The wireless communication system according to claim 3. The adding circuit includes: I / Q data corresponding to the larger gain control data, I / Q data corresponding to the smaller gain control data of the two systems of input I / Q data and gain control data, A smaller gain control data, a signal selection circuit for outputting a difference between the gain control data, and an active table for converting the gain control data into a coefficient for amplitude adjustment of the I / Q data;
Output the data obtained by adding the input I / Q data of the two systems by addition or multiplication of the data output from the signal selection circuit and the coefficient output from the active table to the subsequent stage;
The wireless communication system according to claim 4. In a method of amplifying radio signals of a predetermined format obtained by receiving by a plurality of receiving systems at the radio unit of each receiving system, and combining them to obtain one radio signal,
The radio signal of each receiving system is converted into digital data, and gain control data for controlling the average amplitude of the radio signal amplified by the radio unit based on the converted digital data value is generated. Outputting the gain control data to the radio unit and the digital data;
Digital data and gain control data output from each receiving system are acquired through a digital transmission line, and digital synthesis is performed by weighting the digital data among these acquired data according to the gain control data. Is composed according to a predetermined function,
Converting synthesized digital data into the radio signal and controlling the amplitude of the converted radio signal based on the synthesized gain control data.
Wireless signal synthesis method.

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