JP2009260489A - Frequency correcting predistortor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a frequency correction predistortor which improves distortion compensation precision while improving a frequency resolution near a carrier center frequency without increasing a circuit size of a digital unit. <P>SOLUTION: The predistortor includes: an amplifier which outputs an RF signal; a distortion compensation circuit for receiving an input base band signal and compensating a nonlinear distortion due to the amplifier; and a digital filter 9A which gives a frequency characteristic to a predistortion signal output from the distortion compensation circuit, and outputs the predistortion signal with the frequency characteristic as an input signal to the amplifier. The digital filter 9A is composed of: n units of delay circuits 11 to 18 connected in series; and a finite impulse response filter with n+1 units of multipliers 21, 23 to 27, 29 connected to the connecting points of the respective delay circuits 11 to 18 or the ends. Respective delay amounts between adjacent multipliers are partially set in different values. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a frequency correction predistorter including a distortion compensation circuit, a digital filter, and an amplifier.

In general, amplifiers used for satellite communications, terrestrial microwave communications, mobile communications, and broadcasting are required to amplify radio frequency (RF) signals with high efficiency and linearity. It is not compatible with increasing the linearity and increasing the linearity.
Therefore, in a communication system that strongly requires linearity, a distortion compensation method is applied in order to achieve both high efficiency and linearization of the amplifier.

Conventionally, a predistortion method has been proposed as a method that can achieve relatively high efficiency among a number of distortion compensation methods (see, for example, Patent Document 1).
The predistortion method gives the input signal a characteristic opposite to the nonlinear distortion generated by the amplifier in advance, so that the overall result when combining the predistortion circuit (predistorter) and the amplifier is obtained. This is a linearization method.

FIG. 6 is a block diagram schematically showing a configuration of a general digital predistorter (frequency correction predistorter) referred to in Patent Document 1 and the like.
In FIG. 6, the frequency correction predistorter includes an amplifier 5, a frequency conversion circuit 6 that converts a baseband signal BB into an RF signal RF, a digital analog (hereinafter referred to as “DA”) converter 7, and a distortion compensation circuit. 8 and a digital filter 9.

  The frequency correction predistorter includes an input terminal 1 for the baseband signal BB that is an input terminal of the distortion compensation circuit 8, an output terminal 2 for the RF signal RF that is an output terminal of the amplifier 5, and an output of the distortion compensation circuit 8. An input terminal 3 to the digital filter 9 as a terminal and an output terminal 4 from the digital filter 9 as an input terminal to the DA converter 7 are provided.

FIG. 7 is a block diagram showing a specific configuration of the digital filter 9 in FIG.
In FIG. 7, the digital filter 9 includes six delay units 12 to 17 connected in series to the input terminal 3, and seven multipliers 22 connected to each connection point and both ends of the delay units 12 to 17. And an adder 30 that adds the output signals of the multipliers 22 to 28 and outputs the added signals from the output terminal 4.

  As shown in FIG. 7, the digital filter 9 includes a finite impulse response filter (FIR filter) including six delay units 12 to 17 and seven multipliers 22 to 28. In addition, between the adjacent ones of the multipliers 22 to 28, an equal delay amount τ is given by each of the delay units 12 to 17.

  In FIG. 6, first, the distortion compensation circuit 8 in the frequency correction predistorter cancels the non-linear distortion generated in the amplifier 5 with respect to the baseband signal BB inputted into the circuit via the input terminal 1. Give a predistortion signal.

  Subsequently, the digital filter 9 adds a frequency characteristic for compensating the frequency characteristic of the circuit to the predistortion signal from the distortion compensation circuit 8, and two degradation factors of the nonlinear distortion and the frequency characteristic of the amplifier 5 are added. A predistortion signal having a frequency characteristic for compensating for is generated and output.

Subsequently, the DA converter 7 converts the predistortion signal having frequency characteristics generated by the digital filter 9 into an analog signal and inputs the analog signal to the frequency conversion circuit 6.
The frequency conversion circuit 6 converts the analog signal from the DA converter 7 into the RF frequency band and inputs it to the amplifier 5. Finally, the amplifier 5 amplifies the signal converted into the RF frequency band and outputs it to the output terminal. 2 is output.

In the conventional frequency correction predistorter shown in FIGS. 6 and 7, the digital filter 9 provides a characteristic (see the solid curve) opposite to the frequency characteristic of the amplifier 5 (see the broken curve) as shown in FIG. Thus, it is possible to compensate for distortion when there are two degradation factors, nonlinear distortion and frequency characteristics.
In addition, the distortion compensation circuit 8 and the digital filter 9 for correcting the frequency characteristics of the circuit combine the functions of both to compensate for two degradation factors of the non-linear distortion generated in the amplifier 5 and the frequency characteristics. Do.

Incidentally, since it is necessary to generate a predistortion signal that cancels the nonlinear distortion generated in the amplifier 5, the output signal from the DA converter 7 is larger than the signal bandwidth A with respect to the center frequency fc as shown in FIG. A bandwidth B several times wider is required.
Since a FIR filter is used as the digital filter 9 for correcting the frequency characteristics, the frequency resolution 1 / (6τ) is a predistortion signal output from the output terminal 2 as shown in FIG. Are given equally to the bandwidth B of

Japanese Patent Laid-Open No. 6-21990, FIG.

  Since the conventional frequency correction predistorter is configured as described above, in the digital filter 9, in order to improve the frequency resolution for the frequency characteristics of the signal band or the intermodulation distortion band (near the signal band), There is a problem that it is necessary to increase the number of multipliers constituting the FIR filter, which increases the digital circuit scale and increases the cost.

  The present invention has been made to solve the above problems, and in a frequency correction predistorter incorporating a digital filter for correcting frequency characteristics, without increasing the circuit scale of the digital unit, An object of the present invention is to obtain a frequency correction predistorter capable of improving the frequency resolution in the vicinity of the carrier frequency and improving the distortion compensation accuracy.

  In the frequency correction predistorter according to the present invention, the baseband signal input from the input terminal is converted into the RF signal and output from the output terminal, and the amplifier that outputs the RF signal and the baseband signal are input. , A distortion compensation circuit for compensating nonlinear distortion generated by an amplifier, and a digital filter for giving a frequency characteristic to a predistortion signal output from the distortion compensation circuit and outputting a predistortion signal having the frequency characteristic as an input signal to the amplifier The digital filter includes two or more natural number n delay elements connected in series and n + 1 multiplications connected to a connection point or one end of the n delay elements. Next to n + 1 multipliers. Each delay between each other, those which are set in partially different values.

  According to the present invention, the frequency resolution near the center frequency of the carrier wave can be improved and the distortion compensation accuracy can be improved without increasing the circuit scale of the digital unit.

Embodiment 1 FIG.
FIG. 1 is a block diagram showing a frequency correction predistorter according to Embodiment 1 of the present invention, and FIG. 2 is a block diagram showing a specific configuration of a digital filter 9A in FIG.
1 and 2, the same components as those described above (see FIGS. 6 and 7) are denoted by the same reference numerals as those described above, or are denoted by “A” after the reference numerals, and detailed description thereof is omitted.

FIG. 1 is the same as the above (FIG. 6) except that the internal configuration of the digital filter 9A is partially different.
In FIG. 2, the delay units 13 to 16 in the central part each have a delay amount τ, as described above (see FIG. 7).
However, the delay devices 11 and 12 located at the input side end portion constitute one delay device (delay amount 2τ), and the delay devices 17 and 18 located at the output side end portion constitute one delay. It is assumed that a device (delay amount 2τ) is configured.

  The digital filter 9A shown in FIG. 2 includes 6 delay units 11 to 18 connected in series to the input terminal 3A, and 5 connected to each connection point and both ends of the central four delay units 13 to 16. Two multipliers 21 and 29 connected to both ends (one end of each delayer located at both ends) of the series circuit composed of the multipliers 23 to 27 and the delay units 11 to 18, and the multipliers 21 and 23 And an adder 30A that adds the output signals of -27 and 29 and outputs them from the output terminal 4A.

As shown in FIG. 2, the digital filter 9A according to the first embodiment of the present invention is configured by an FIR filter including eight delay units 11 to 18 and seven multipliers 21, 23 to 27, 29. Yes. Further, between the adjacent ones of the multipliers 23 to 27, the equal delay amount τ is given by each of the delay units 13 to 16, respectively.
On the other hand, the delay amount 2τ is given by the two delay units 11 and 12 between the multipliers 21 and 23 on the input terminal 3A side, and two delays are provided between the multipliers 27 and 29 on the output terminal 4A side. A delay amount 2τ is given by the multipliers 17 and 18 and is different from the delay amount τ between adjacent ones of the multipliers 23 to 27.

Next, the operation of the first embodiment of the present invention shown in FIGS. 1 and 2 will be described with reference to FIG.
In FIG. 1, a baseband signal BB input from an input terminal 1 is given a predistortion signal that cancels nonlinear distortion generated in the amplifier 5 by a distortion compensation circuit 8 similar to the above, and then a digital filter 9A. Thus, a frequency characteristic for compensating the frequency characteristic of the circuit is added to the predistortion signal, and a predistortion signal having a frequency characteristic for compensating for two deterioration factors of the nonlinear distortion and the frequency characteristic of the amplifier 5 is obtained. , Input to the DA converter 7.

  The predistortion signal having frequency characteristics generated by the digital filter 9A is converted into an analog signal by the DA converter 7, converted into an RF frequency band by the frequency conversion circuit 6, and then amplified by the amplifier 5. Output from the output terminal 2.

At this time, the digital filter 9A is an FIR filter in which the delay amount τ between adjacent ones of the multipliers 23 to 27 is different from the delay amount 2τ between the multipliers 12 and 13 and between the multipliers 27 and 29. A small delay amount τ is given to the center portion of the multiplier of the FIR filter, and a large delay amount 2τ is given to the delay device as the distance from the center portion increases.
As a result, as shown in FIG. 3, the frequency resolution 1 / (8τ) in the vicinity of the center of the predistortion signal band is improved from the frequency resolution 1 / (4τ) at both ends.

  As described above, the frequency correction predistorter (FIG. 1) according to Embodiment 1 of the present invention converts the baseband signal BB input from the input terminal 1 into an RF signal and outputs the RF signal from the output terminal 2. In addition, an amplifier 5 that outputs an RF signal, a baseband signal BB, and a distortion compensation circuit 8 that compensates for nonlinear distortion generated by the amplifier 5, and a predistortion signal output from the distortion compensation circuit 8 are provided. And a digital filter 9A that outputs a predistortion signal having frequency characteristics as an input signal to the amplifier 5.

The digital filter 9A includes n or more natural number n (six in FIG. 2) delay devices 11 to 18 connected in series and n + 1 pieces connected to a connection point or one end of the n delay devices. This is constituted by a finite impulse response filter having 7 multipliers 21, 23 to 27, and 29 (in FIG. 2).
Further, the delay amounts between adjacent ones of the n + 1 multipliers 21, 23 to 27, 29 are partially set to different values.

  Specifically, the digital filter 9 </ b> A includes N delay units 11 to 18 having a natural number of 4 or more, and N + 1 multipliers 21, 23 to 27, and 29, and N + 1 multipliers 21 to 23. 27 and 29, the delay amount between adjacent ones of the N delay units 11 to 18 is between the connection points of the delay units 13 to 16 at the center and the multipliers 23 to 27 connected to both ends. Multiplier 21 connected to one end of each of the delay units 11, 12, 17, 18 at the ends away from the center of the N delay units 11 to 18 than the delay amount τ given to The delay amount 2τ given between 23, 27 and 29 is set to a larger value.

In this way, the delay amount between adjacent ones of a plurality of multipliers is not the same value, and a larger delay amount is given as the distance from the center portion to both sides increases, thereby increasing the circuit scale of the digital portion (digital filter 9A). Without improving the frequency resolution (1 / (8τ)) in the vicinity of the center frequency fc of the carrier as shown in FIG. 3, the distortion compensation accuracy can be improved.
That is, without increasing the number of multipliers of the FIR filter, it is possible to improve the frequency resolution in the vicinity of the center, which is important when performing distortion compensation, and it is necessary to ensure the desired distortion compensation capability. The circuit scale of the part can be reduced.

  Further, in the digital filter 9A, by giving a characteristic opposite to the frequency characteristic of the amplifier 5 to the predistortion signal, distortion compensation in the case where there are two degradation factors of nonlinear distortion and frequency characteristic becomes possible. .

  Further, the digital filter 9A may give a frequency characteristic to the nonlinear inverse distortion component in the predistortion signal output from the distortion compensation circuit 8, and output the predistortion signal having the frequency characteristic as an input signal to the amplifier 5. .

Embodiment 2. FIG.
In the first embodiment (FIG. 1), the output signal of the digital filter 9A (input signal to the amplifier 5) is directly input to the DA converter 7. However, as shown in FIG. An adder 33 that adds the baseband signal BB and inputs it to the DA converter 7 may be inserted.

4 is a block diagram showing a frequency correction predistorter according to Embodiment 2 of the present invention. The same components as those described above (see FIG. 1) are denoted by the same reference numerals as those described above, and detailed description thereof is omitted. .
In FIG. 4, an adder 33 is inserted between the digital filter 9A and the DA converter 7, and a delay circuit 35 is connected in parallel to the direct circuit composed of the distortion compensation circuit 8 and the digital filter 9A. Yes.

The adder 33 adds the baseband signal BB passed through the delay circuit 35 and the output signal of the digital filter 9 </ b> A, and inputs the result to the DA converter 7 as an input signal to the amplifier 5.
Also in this case, the digital filter 9A includes the six delay devices 11 to 18 connected in series and the seven multipliers 21 and 23 connected to the connection points of the delay devices, as described above (see FIG. 2). .., 27, 29, and a delay amount τ between adjacent multipliers 23-27 located in the center, between multipliers 12, 13, and between multipliers 27, 29. Are set to be different from each other.

Next, the operation according to the second embodiment of the present invention shown in FIG. 4 will be described.
First, similarly to the above, the distortion compensation circuit 8 applies a nonlinear inverse distortion component that cancels the nonlinear distortion generated in the amplifier 5 to the baseband signal BB input from the input terminal 1. The digital filter 9A adds a frequency characteristic for compensating for the frequency characteristic (memory effect) of the nonlinear distortion of the amplifier 5 to the nonlinear inverse distortion component.

Subsequently, the adder 33 adds the baseband signal input via the delay circuit 35 and the non-linear inverse distortion component to which the frequency characteristic is added in the digital filter 9A, so that the predistortion signal having the frequency characteristic is added. Is input to the DA converter 7.
At this time, the delay circuit 35 gives a delay time such that the delay times of both paths of the parallel circuit from the input terminal 1 to the adder 33 coincide with the baseband signal input to the adder 33. , Have been set in advance.

  The predistortion signal (having frequency characteristics) generated by the digital filter 9A and the adder 33 is converted into an analog signal by the DA converter 7, and then converted into an RF signal in the RF frequency band by the frequency conversion circuit 6. Further, the signal is amplified by the amplifier 5 and output from the output terminal 2.

Here, similarly to the above, the digital filter 9A (see FIG. 2) includes the delay amount τ between the multipliers 23 to 27, the multipliers 12 and 13, and the multipliers 27 and 29. The delay amount 2τ is composed of an FIR filter having a different configuration.
Therefore, as shown in FIG. 5, a small delay amount τ is given at the center of each multiplier in the FIR filter, and a large delay amount 2τ is given as it goes away from the center to both sides, so that the center of the predistortion signal band The frequency resolution in the vicinity (= 1 / (8τ)) is improved.

  As described above, the frequency correction predistorter (FIG. 4) according to the second embodiment of the present invention converts the baseband signal BB input from the input terminal 1 into an RF signal and outputs the RF signal from the output terminal 2. In addition, an amplifier 5 for outputting an RF signal, a baseband signal BB, and a distortion compensation circuit 8 for compensating for nonlinear distortion generated by the amplifier 5, and a predistortion signal output from the distortion compensation circuit 8 are provided. A non-linear inverse distortion component is extracted from the digital filter 9A, and a digital filter 9A that gives a frequency characteristic to the nonlinear inverse distortion component and outputs the resultant signal, a baseband signal BB, and an output signal from the digital filter 9A are added together to obtain a baseband signal BB A predistortion signal having a frequency characteristic caused by adding a nonlinear inverse distortion component to the amplifier 5 is input to the amplifier 5. And an adder 33 to output as a signal.

  Also, the digital filter 9A is connected to a connection point or one end of the N or more natural number N delay units 11 to 18 connected in series and the N delay units 11 to 18, similarly to the above (see FIG. 2). N + 1 multipliers 21, 23 to 27, 29, and each delay amount between adjacent N + 1 multipliers 21, 23 to 27, 29 is a partial The delay amount τ is set to be different from each other and is given between the multipliers 23 to 27 connected to the connection point of the delay units 12 to 17 in the center of the N delay units. The delay amount 2τ provided between the connection points of the delay units 11, 12, 17, 18 which are separated from the center of the delay units of the delay units 11, 23, 27, 29 connected to one end of the delay units Is set to a larger value.

In this way, the delay amounts between the multipliers are not the same, and a large delay amount is given as they move away from the center to both sides, so that the number of taps of the FIR filter is not increased, as shown in FIG. The circuit of the digital section that can improve the frequency resolution in the vicinity of the center frequency fc, which is important when performing distortion compensation using the frequency correction predistorter, and is necessary to ensure the desired distortion compensation capability The scale can be reduced.
In addition, in the digital filter 9A, by giving the predistortion signal the same characteristics as the frequency characteristics of the nonlinear distortion of the amplifier, distortion compensation can be performed when there are two degradation factors of nonlinear distortion and frequency characteristics. .

  Further, a delay circuit 35 inserted between the input terminal 1 and the adder 33 is provided. The delay circuit 35 includes a delay time of a path from the input terminal 1 to the adder 33 via the delay circuit 35, and an input terminal. Since a delay time that matches the delay time with the path from 1 to the adder 33 via the distortion compensation circuit 8 and the digital filter 9A is given, a predistortion signal having frequency characteristics can be generated reliably.

It is a block diagram which shows the frequency correction predistorter which concerns on Embodiment 1 of this invention. It is a block diagram which shows the specific structure of the digital filter in FIG. It is explanatory drawing which shows the frequency characteristic of the digital filter by Embodiment 1 of this invention. It is a block diagram which shows the frequency correction predistorter which concerns on Embodiment 2 of this invention. It is explanatory drawing which shows the frequency characteristic of the digital filter by Embodiment 2 of this invention. It is a block diagram which shows the conventional frequency correction predistorter. FIG. 6 is a block diagram showing a specific configuration of a digital filter in FIG. 5. It is explanatory drawing which shows the relationship between the frequency characteristic of the transmitter using the conventional frequency correction predistorter, and the frequency characteristic of a digital filter. It is explanatory drawing which shows the output signal spectrum of the conventional frequency correction predistorter. It is explanatory drawing which shows the frequency characteristic of the conventional digital filter.

Explanation of symbols

  1 input terminal, 2 output terminal, 3A digital filter input terminal, 4A digital filter output terminal, 5 amplifier, 6 frequency conversion circuit, 7 DA converter, 8 distortion compensation circuit, 9A digital filter, 11-18 delay device, 21, 23 to 27, 29 multiplier, 33 adder, 35 delay circuit, BB baseband signal, RF RF signal.

Claims (7)

In order to convert the baseband signal input from the input terminal into an RF signal and output it from the output terminal,
An amplifier for outputting the RF signal;
A distortion compensation circuit configured to compensate for nonlinear distortion generated by the amplifier while receiving the baseband signal;
A frequency correction predistorter comprising: a digital filter that gives a frequency characteristic to a predistortion signal output from the distortion compensation circuit and outputs a predistortion signal having the frequency characteristic as an input signal to an amplifier;
The digital filter includes a finite impulse response filter having two or more natural number n delay units connected in series and n + 1 multipliers connected to a connection point or one end of the n delay units. ,
The frequency correction predistorter, wherein each delay amount between adjacent n + 1 multipliers is set to a partially different value. The digital filter includes a natural number N delay units of 4 or more and N + 1 multipliers,
Each delay amount between adjacent N + 1 multipliers is:
More than the delay amount given between the multipliers connected to the connection point of the central delay unit among the N delay units,
The delay amount given between the connection points of the delay units that are separated from both sides from the center of the N delay units or between the multipliers connected to one end is set to a larger value. The frequency correction predistorter according to claim 1. In order to convert the baseband signal input from the input terminal into an RF signal and output it from the output terminal,
An amplifier for outputting the RF signal;
A distortion compensation circuit configured to compensate for nonlinear distortion generated by the amplifier while receiving the baseband signal;
A frequency correction program comprising: a digital filter that gives a frequency characteristic to a nonlinear inverse distortion component in the predistortion signal output from the distortion compensation circuit and outputs the predistortion signal having the frequency characteristic as an input signal to the amplifier. A readytor,
The digital filter includes a finite impulse response filter having two or more natural number n delay units connected in series and n + 1 multipliers connected to a connection point or one end of the n delay units. ,
The frequency correction predistorter, wherein each delay amount between adjacent n + 1 multipliers is set to a partially different value. The digital filter includes a natural number N delay units of 4 or more and N + 1 multipliers,
Each delay amount between adjacent N + 1 multipliers is:
More than the delay amount given between the multipliers connected to the connection point of the central delay unit among the N delay units,
The delay amount given between the connection points of the delay units that are separated from both sides from the center of the N delay units or between the multipliers connected to one end is set to a larger value. The frequency correction predistorter according to claim 3. In order to convert the baseband signal input from the input terminal into an RF signal and output it from the output terminal,
An amplifier for outputting the RF signal;
A distortion compensation circuit configured to compensate for nonlinear distortion generated by the amplifier while receiving the baseband signal;
A digital filter that extracts a nonlinear inverse distortion component from a predistortion signal output from the distortion compensation circuit, gives a frequency characteristic to the nonlinear inverse distortion component, and outputs it;
The baseband signal and the output signal from the digital filter are added, and the predistortion signal having the frequency characteristic generated by adding the nonlinear inverse distortion component to the baseband signal is output as an input signal to the amplifier. A frequency correction predistorter with an adder and
The digital filter includes a finite impulse response filter having two or more natural number n delay units connected in series and n + 1 multipliers connected to a connection point or one end of the n delay units. ,
The frequency correction predistorter, wherein each delay amount between adjacent n + 1 multipliers is set to a partially different value. The digital filter includes a natural number N delay units of 4 or more and N + 1 multipliers,
Each delay amount between adjacent N + 1 multipliers is:
More than the delay amount given between the multipliers connected to the connection point of the central delay unit among the N delay units,
The delay amount given between the connection points of the delay units that are separated from both sides from the center of the N delay units or between the multipliers connected to one end is set to a larger value. The frequency correction predistorter according to claim 5. A delay circuit inserted between the input terminal and the adder;
The delay circuit includes a delay time of a path from the input terminal to the adder via the delay circuit, and a delay from the input terminal to the adder via the distortion compensation circuit and the digital filter. The frequency correction predistorter according to claim 5 or 6, wherein a delay time is provided so that the times coincide with each other.

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