JP5144630B2 - Charging circuit and generator and electric motor using charging circuit - Google Patents

Description

  The present invention relates to a charging circuit that charges a battery by a generator using a rotation of an internal combustion engine in a vehicle such as an automobile, and a generator and an electric motor using the charging circuit.

  In a vehicle such as an automobile powered by an internal combustion engine, a synchronous generator or a synchronous generator having an armature winding and a field winding that operates as a starting motor when starting the internal combustion engine and also operates as a generator after starting A configuration is used in which a battery is charged with a rectifier including a bridge circuit using an alternating current generated by a generator motor.

  However, when a diode is used in the bridge rectifier circuit, power loss occurs due to its voltage / current characteristics. In addition, a large heat sink is required to cope with the heat generation of the diode accompanying power loss, and there is a problem that the charging circuit is enlarged. In order to reduce this power loss, a system using a MOS FET instead of a diode has been proposed.

For example, in the charging circuit disclosed in Patent Document 1, when a reverse drain / source voltage higher than the voltage across the battery is applied to one of the FETs of the bridge rectifier circuit in which each bridge element is configured by a MOS FET, the FET In addition, a positive gate voltage is applied to the source terminal so that the reverse drain current of the FET becomes conductive, and when the reverse drain-source voltage higher than the voltage across the battery is not applied, the source terminal is connected to the FET. Is provided with a control means for applying a negative gate voltage to block the drain current of the FET.
FIG. 5 is a circuit diagram showing a basic configuration of a conventional charging circuit, and FIG. 6 is a waveform diagram showing an induced voltage. In FIG. 5, each terminal of the three-phase output coil of the AC generator is connected to the FET connected to the battery side and the GND side, respectively, and in FIG. 6, the three-phase output coil is connected between the output terminals of the three-phase output coil. An induced voltage is generated. The control unit constantly compares the battery voltage and the induced voltage, and if the induced voltage is higher than the battery voltage, a positive voltage is applied to the FET gate terminal on the battery side to cause conduction, thereby allowing a reverse drain current to flow. The power consumption of the FET realizing the loss charging circuit is reduced.

  FIG. 7 shows a configuration of an FET called an active diode described in Patent Document 2 and an FET having an offset bias source. When the VCA (Vcatode-Vanode) becomes lower than the offset voltage Voffset, the FET becomes conductive. Become. For this reason, since the driver on the high potential side is already turned off at the time of determining the continuity of the FET, it is not necessary to set a dead time for setting a cutoff time for each FET for preventing a short through current.

JP-A-4-138030 JP 2005-295794 A

  However, in the charging circuit according to Patent Document 1, since the conduction / shutoff determination is made according to the potential difference between the drain-source voltage of the FET, once the FET is turned on, the potential difference between the drain-source voltage of the FET becomes the conduction of the FET. Since it depends on the resistance and the drain current, it becomes a minute value, and it is difficult to ensure the accuracy of the cutoff determination voltage. If the other FET is turned on without being able to determine whether one of the FETs is cut off, an abnormal large current (short-through current) may flow due to a short circuit between the pair of FETs in each phase in the bridge rectifier circuit, resulting in a failure. There was a problem that there was.

  In addition, when a fault condition occurs in which the source terminal voltage is higher than the drain terminal of the FET due to a short circuit fault in which the battery voltage is applied to the output terminal or other abnormality or fault, the presence or absence of the power generation voltage from the armature winding Regardless, there is a problem in that the FET is controlled to conduct, and the failure cannot be detected and a failure such as burnout damage due to an overcurrent factor of the bridge rectifier circuit occurs.

  Further, in the active diode according to Patent Document 2, the short-through current is prevented. However, when the anode terminal and the cathode terminal are connected to the power supply terminal or the GND terminal, the input range of the amplifier is widened. It was necessary to make the amplifier specifications special.

  The present invention has been made in order to solve the above-described problems, and provides a bridge rectifier circuit for reducing electrical loss during charging of a battery by a generator and for protection from abnormal current. It is an object of the present invention to provide a charging circuit used and a generator and a motor using the charging circuit.

In order to solve the above-described problems, a charging circuit according to the present invention includes a first control pole-attached semiconductor element and a second control pole connected to the armature winding of each phase of a generator having an armature winding. comprising a bridge rectifier circuit composed of a pair of control Kiwametsuki semiconductor device by the semiconductor element with, in the charging circuit for charging the battery by rectifying the alternating current generated by the generator, and a reference voltage terminal, said battery A first divided potential obtained by dividing the positive voltage and the reference voltage of the reference voltage terminal, a second divided potential obtained by dividing the phase voltage of the armature winding terminal and the reference voltage of the reference voltage terminal. And a third divided potential obtained by dividing the reference voltage and the ground voltage by the first comparator that outputs the determination result to the control pole of the semiconductor element with the first control pole. And a fourth voltage divider that divides the phase voltage and the reference voltage Compared bets, a second comparator outputs the determination result to the control electrode of the second control Kiwametsuki semiconductor device includes a control unit having the control unit, the armature winding If the phase voltage is the predetermined value higher than the positive voltage of the battery, the to conduct first control Kiwametsuki semiconductor device, in other cases block the said first control Kiwametsuki semiconductor element, wherein If the phase voltage is the predetermined value lower than the ground voltage, said to conduct the second control Kiwametsuki semiconductor device, in other cases the characteristics that you block the second control Kiwametsuki semiconductor element To do .

  Moreover, the generator of this invention is provided with the said charging circuit.

In the electric motor of the present invention, the charging circuit includes a changeover switch provided between the armature winding terminal and the reference voltage terminal, and an electric motor control circuit that is switched and connected by the changeover switch . a motor, said at motor operation, and is controlled by switching the connected the motor control circuit.

  According to the present invention, it is possible to reduce electrical loss by using a bridge rectifier circuit composed of a MOS type FET as a charging circuit for a battery by a generator, and it is possible to reliably cut off an FET by a control unit. Therefore, it is possible to avoid a failure due to a short through current.

3 is a circuit diagram illustrating a charging circuit according to Embodiment 1. FIG. FIG. 3 is a waveform diagram showing phase voltages in the charging circuit of the first embodiment. 6 is a circuit diagram showing a charging circuit in a second embodiment. FIG. FIG. 6 is a circuit diagram showing a charging circuit in a third embodiment. It is a circuit diagram which shows the conventional charging circuit. It is a wave form diagram which shows the induced voltage of the conventional charging circuit. It is a circuit diagram which shows the conventional active diode.

  Hereinafter, a charging circuit according to an embodiment of the present invention will be described with reference to FIGS.

Embodiment 1 FIG.
FIG. 1 is a diagram illustrating a circuit configuration of a charging circuit according to the first embodiment.
In FIG. 1, a charging circuit 1 is connected to a positive electrode of a battery 2 to be charged and grounded (GND), and is a MOS type that is a pair of semiconductor elements with control poles arranged in series to form a bridge rectifier circuit of each phase. The FET 1 and FET 2 of the FET, the armature winding 3 of the generator connected between the source S 1 of the FET 1 and the drain D 2 of the FET 2, and a control unit 4 that controls the FET 1 and FET 2. The control unit 4 includes voltage dividing resistors Rs1 and Rf1 for dividing the battery voltage VB and the reference voltage Vcom, a first divided potential Vm1 divided by the voltage dividing resistors Rs1 and Rf1, and an armature winding. The voltage dividing resistors Rf ′ and Rs for dividing the phase voltage Vph and the reference voltage Vcom of the line 3, the second divided potential Vp1 divided by the divided resistors Rf ′ and Rs, and the divided potential Vm1 and Vp1 are compared, the determination output is a first comparator COMP1 connected to the gate G1 of FET1, voltage dividing resistors Rf ′ and Rs for dividing the reference voltage Vcom and the phase voltage Vph, Divided by the third divided potential Vm2 divided by the voltage dividing resistors Rf ′ and Rs, the voltage dividing resistors Rs2 and Rf2 for dividing the reference voltages Vcom and GND, and the voltage dividing resistors Rs2 and Rf2. The fourth divided potential Vp2 that has been pressed and the divided voltage The potential Vm2 is compared with Vp2, and the determination output is constituted by a second comparator COMP2 connected to the gate G2 of the FET2. In the case of a three-phase AC generator, there are three armature windings, and the charging circuit is provided for each phase and connected to a battery.

  Next, the operation of the charging circuit in Embodiment 1 will be described with reference to FIGS. In addition, since the main body of this invention exists in a charging circuit, description of operation | movement of a generator is abbreviate | omitted.

In FIG. 1, a comparator COMP1 is a divided voltage Vm1 obtained by dividing the battery voltage VB and the reference voltage Vcom by resistors Rs1 and Rf1, and a divided voltage obtained by dividing the phase voltage Vph and the reference voltage Vcom by resistors Rs and Rf ′. The voltage potential Vp1 is compared, and if Vp1> Vm1, the gate G1 of the FET1 is turned on, and otherwise the gate G1 is turned off.
The comparator COMP2 includes a divided potential Vp2 obtained by dividing the reference voltage Vcom and the ground GND by the resistors Rs2 and Rf2, and a divided potential Vm2 obtained by dividing the phase voltage Vph and the reference voltage Vcom by the resistors Rs and Rf ′. When Vp2> Vm2, the gate G2 of the FET 2 is turned on, and in other cases, the gate G2 is turned off.

  Therefore, the voltage dividing ratio is set so that the minimum value of the divided potential Vp1 between the phase voltage Vph and the reference voltage Vcpm is larger than the maximum value of the divided potential Vm1 between the battery voltage VB and the reference voltage Vcom. Is set so that the FET 2 is turned on so that the maximum value of the divided potential Vp2 between the phase voltage Vph and the reference voltage Vcom is smaller than the minimum value of the divided potential Vm2 between the ground voltage VGND and the reference voltage Vcom. The partial pressure ratio is set.

Now, assume that Rf1> Rf ′, phase current flows in the forward direction, and phase voltage Vph becomes H output. Vm1, Vp1, and Vph are expressed by Formula (1) to Formula (4).

Vm1 = (Rs1 · VB + Rf1 · Vcom) / (Rs1 + Rf1) (1)
Vp1 = (Rs · Vph + Rf ′ · Vcom) / (Rs + Rf ′) (2)
The value of the phase voltage Vph at which the gate G1 is turned on is obtained when Rs1 = Rs because the divided potential Vm1 (formula (1)) and Vp1 (formula (2)) of the comparator COMP1 are equal. (4).

(Rs1 · VB + Rf1 · Vcom) / (Rs1 + Rf1)
= (Rs · Vph + Rf ′ · Vcom) / (Rs + Rf ′) (3)
Vph = VB + (Rf′−Rf1) (VB−Vcom) / (Rs + Rf1)
= VB + Voff1 (4)
However, Voff1 = (Rf′−Rf1) (VB−Vcom) / (Rs + Rf1).
From the equation (4), when the phase voltage Vph exceeds the battery voltage VB by a predetermined value Voff1, the gate G1 of the FET 1 is turned on.

Here, the behavior of the FET 1 during the period in which the phase current flows in the forward direction is considered.
When the gate G1 of the FET 1 is turned on, the phase voltage Vph and the battery voltage VB are substantially equal.

Vph≈VB <VB + Voff1 (5)
And the gate G1 is turned off,
When the gate G1 of the FET1 is turned off, the voltage of the phase voltage Vph increases,

Vph = VB + Voff1 (6)
Therefore, the gate G1 is turned on again.

  That is, during the period in which the forward phase current is generated and the phase voltage Vph exceeds VB + Voff1, the FET1 repeats conduction / cutoff, but the forward phase current disappears and the phase voltage Vph becomes VB + Voff1. When it does not exceed, the FET 1 is cut off and fixed (FIG. 2).

  Note that, during the above period, the phase voltage Vph is between the battery voltage VB and VB + Voff1, so that the FET 2 is always in a cut-off state.

Next, it is assumed that Rf2> Rf ′, a phase current flows in the opposite direction, and the phase voltage Vph becomes an L output. Vp2, Vm2, and Vph are expressed by Expression (7) to Expression (10).

Vp2 = Rf2 · Vcom / (Rs2 + Rf2) (7)
Vm2 = (Rs · Vph + Rf ′ · Vcom) / (Rs + Rf ′) (8)
The value of the phase voltage Vph at which the gate G2 is turned on is obtained when Rs2 = Rs because the divided potential Vp2 (equation (7)) and Vm2 (equation (8)) of the comparator COMP2 are equal. 10).

Rf2 · Vcom / (Rs + Rf2)
= (Rs · Vph + Rf ′ · Vcom) / (Rs + Rf ′) (9)
Vph = (Rf′−Rf2) · Vcom / (Rs + Rf2) = − Voff2 (10)
However, Voff2 = (Rf′−Rf2) · Vcom / (Rs + Rf2).
From equation (10), when the phase voltage Vph falls below the ground potential VGND by a predetermined value Voff2, the gate G2 of the FET 2 is turned on.

Here, the behavior of the FET 2 during the period in which the phase current flows in the reverse direction will be considered.
When the gate G2 of the FET 2 is turned on, the phase voltage Vph and the ground potential VGND become substantially equal.

Vph≈VGND> −Voff2 (11)
And gate G2 is turned off,
When the gate G2 of FET2 is turned off, the phase voltage Vph decreases,

Vph = -Voff2 (12)
Therefore, the gate G2 is turned on again.

  That is, while the phase current in the reverse direction is generated and the phase voltage Vph is output below −Voff2, the FET2 is repeatedly turned on / off, but the phase current in the reverse direction disappears and the phase voltage Vph becomes −Voff2 When it becomes less than the lower limit, FET2 is cut off and fixed (FIG. 2).

  In the period described above, the phase voltage Vph is between the ground VGND and -Voff2, so that the FET 1 is always cut off. Thereby, the battery 2 can be charged with the electric power generated by the generator by the charging circuit 1 using the bridge rectifier circuit.

  As described above, according to the charging circuit in the first embodiment, it is possible to reduce electrical loss by using the bridge rectifier circuit formed of the MOS type FET for the battery charging circuit by the generator. At the same time, the control unit 4 sets the conduction condition of the FET 1 to a high potential by a predetermined value Voff1 from VB and the conduction condition of the FET 2 to a low potential by a predetermined value Voff2 from VGND, so that the forward and reverse phase currents disappear. Then, since the FET is disconnected from the conduction condition and is quickly shut down, the FET conduction is not maintained, and the FET is reliably cut off, so that a failure due to a short-through current can be avoided. There is a remarkable effect.

  Since the battery voltage VB, the phase voltage Vph, and the ground voltage VGND are divided from the reference voltage Vcom, the input ranges of the comparators COMP1 and COMP2 can have a margin from the battery voltage VB and the ground potential VGND. Since the comparator does not need to have a special specification, the degree of freedom in designing the comparator is widened, and the comparator can be configured with an inexpensive comparator. In addition, since the circuit is configured with an analog circuit, the circuit configuration can be made relatively simple, so that the circuit scale can be reduced, and the cost can be reduced and the reliability can be increased. Regarding the setting of the value of the reference voltage Vcom, in order to set the input dynamic range of the comparator COMP effectively, it is desirable to set it as the midpoint of the COMP input range. When the COMP voltage is VB, Vcom is VB / 2 is reasonable.

  In order to obtain the effect, Voff1 and Voff2 need to be VF (about 0.7 V) or less. Therefore, Voff1 and Voff2 depend on the COMP accuracy, resistance accuracy, and resistance voltage division value, but it is desirable to make them as small as possible in consideration of variations and errors in each element, and about 0.1 V is appropriate. Thereby, the power consumption in FET can be suppressed and reliability can be improved.

  In FIG. 1, the charging circuit for one phase has been described for the rectification of alternating current. However, in the case of three-phase alternating current, there are three armature windings 3 and the charging circuit of FIG. .

Embodiment 2. FIG.
FIG. 3 is a diagram illustrating a circuit configuration of the charging circuit according to the second embodiment.
In the charging circuit of the second embodiment shown in FIG. 3, the charging circuit of the first embodiment shown in FIG. 1 is different from the output side of the first comparator COMP1 and the gate G1 of the FET1 between the second comparator COMP2. A switching circuit for driving a gate composed of resistors R3, R5, R7, R4, R6, and R8, transistors TR1 and TR2, and diodes Di1 and Di2 is added between the output side and the gate G2 of FET2. The gate G1 of the FET1 is connected to the base B2 of the transistor TR2 of the switching circuit that drives the gate of the FET2 via the diode Di1, and the gate G2 of the FET2 is the base of the transistor TR1 of the switching circuit that drives the gate of the FET1. It is connected to B1 through a diode Di2. The other components are the same as those in FIG.

Next, the operation of the charging circuit in the second embodiment will be described with reference to FIG.
The gate G1 of the FET1 is connected to the base B2 of the transistor TR2 of the switching circuit that drives the gate of the FET2, and the gate G2 of the FET2 is connected to the base B1 of the transistor TR1 of the switching circuit that drives the gate of the FET1. Thus, when the potential of the gate G1 of the FET 1 is H, the gate of the FET 2 is turned on, and the potential of the gate G2 of the FET 2 is L, that is, the FET 2 is cut off. Similarly, when the potential of the gate G2 of the FET2 is H, the gate of the FET2 is turned on, and the potential of the gate G1 of the FET1 is L, that is, the FET1 is cut off.
Therefore, in FIG. 3, when the gate G1 of the FET1 is H, the gate G2 of the FET2 is L, and when the gate G2 of the FET2 is H, the gate G1 of the FET1 is L. The FET1 and the FET2 are configured not to conduct at the same time.

  Since the operation of driving the FET gate of the bridge rectifier circuit using the resistor divider comparator is the same as in the first embodiment, the description thereof is omitted. Thereby, the battery 2 can be charged with the electric power generated by the generator by the charging circuit 1 using the bridge rectifier circuit.

  As described above, in the charging circuit according to the second embodiment, it is possible to reduce electrical loss by using a bridge rectifier circuit configured by a MOS FET for a battery charging circuit by a generator. By providing the control unit 4 for driving the gate of the FET and adding a switching circuit so that the pair of FETs are not in a conductive state at the same time, the same effect as in the first embodiment is obtained, and the gate G1 of the FET1 or FET2 Even if a short circuit of the potential of G2 occurs, there is a remarkable effect that a failure due to a short through current can be surely avoided.

  The diodes Di1 and Di2 in FIG. 3 are for preventing reverse current, but even if they are not present, there is no problem in operation.

Embodiment 3 FIG.
FIG. 4 is a diagram showing a circuit configuration of a charging circuit for an electric motor in the third embodiment.
In the charging circuit for the electric motor of the third embodiment shown in FIG. 4, the voltage dividing resistors Rs and Rf ′ between the phase voltage Vph of the armature winding 3 and the reference voltage Vcom are added to the charging circuit of the second embodiment shown in FIG. A changeover switch SW is provided between them, and the changeover destination of the changeover switch SW is connected to the motor control circuit 5 so that the phase voltage Vph and the electric control circuit 5 can be switched. The other components are the same as those in FIGS. 1 and 3 and will not be described. This charging circuit is applied to an electric motor that also serves as a generator.

Next, the operation of the charging circuit in Embodiment 3 will be described with reference to FIG.
When the motor operates as a generator, the switch SW is connected between the phase voltage Vph and the reference voltage Vcom in order to operate the comparators COMP1 and COMP2 by the voltage dividing resistors Rs and Rf ′. The comparator COMP is operated by the normal resistance voltage division, and the battery 2 is charged by controlling the gate of the FET by the switching circuit. On the other hand, when operating as an electric motor, the changeover switch SW is connected to the electric motor control circuit 5 side, and the gate of the FET is controlled by the switching circuit by the electric motor control circuit 5 under different conditions. In the third embodiment, the case where the changeover switch SW is provided in the charging circuit of the second embodiment shown in FIG. 3 has been described. However, in the case where the changeover switch SW is provided in the charging circuit of the first embodiment shown in FIG. There may be.

  In the third embodiment of FIG. 4, the case where the changeover switch SW is provided between the voltage dividing resistors Rs and Rf ′ has been described. However, the switch SW is provided between the voltage dividing resistor Rf ′ and the armature winding 3. Produces the same effect.

  As described above, in the charging circuit according to the third embodiment, by using the bridge rectifier circuit configured by the MOS type FET in the charging circuit to the battery by the electric motor that also serves as the generator, the electrical loss is the same as in the first embodiment. In the case of charging the battery as a generator, the charging is controlled by normal resistance voltage division, and in the case of operating as a motor, the power generation is performed by switching to the motor control circuit. There is a remarkable effect that a failure due to a short through current can be avoided not only during operation but also during electric operation.

  Moreover, in the figure, the same code | symbol shows the same or an equivalent part.

DESCRIPTION OF SYMBOLS 1 Charging circuit 2 Battery 3 Armature winding 4 Control part 5 Motor control circuit FET1, FET2 MOS type FET
COMP1, COMP2 comparator Vph phase voltage Vcom reference voltage Rs1, Rf1, Rf ', Rs, Rs2, Rf2 voltage dividing resistor TR1, TR2 transistor SW changeover switch

Claims (6)

It is composed of a pair of semiconductor elements with control poles composed of a first semiconductor element with control poles and a second semiconductor element with control poles connected to the armature windings of each phase of a generator having an armature winding In a charging circuit comprising a bridge rectifier circuit, rectifying the alternating current generated by the generator and charging the battery,
A reference voltage terminal, a first divided potential obtained by dividing a positive voltage of the battery and a reference voltage of the reference voltage terminal, a phase voltage of the armature winding terminal, and a reference voltage of the reference voltage terminal are divided. A first comparator that compares the second divided potential and outputs the determination result to the control electrode of the semiconductor element with the first control electrode, and divides the reference voltage and the ground voltage. The third divided potential that has been compressed is compared with the fourth divided potential that is obtained by dividing the phase voltage and the reference voltage, and the determination result is applied to the control electrode of the semiconductor element with the second control electrode. A control unit having a second comparator for outputting,
Wherein, wherein, when the phase voltage of the armature winding a predetermined value greater than the positive voltage of the battery, the to conduct first control Kiwametsuki semiconductor device, the first in other cases of blocking the control Kiwametsuki semiconductor device, when the phase voltage is the predetermined value lower than the ground voltage, the second control Kiwametsuki is conducting semiconductor device, the second control electrode is otherwise charging circuit, wherein the benzalkonium to cut off the semiconductor element with. Wherein the first condition to conduct a control Kiwametsuki semiconductor device, the first partial potential dividing ratio so that the minimum value of the second partial potential than the maximum value becomes large is set, the first as a condition for conducting the second control Kiwametsuki semiconductor device, wherein the third partial potential dividing ratio so that the minimum value maximum value of said fourth partial potential than decreases in is set The charging circuit according to claim 1 . Provided a switching circuit between the control electrode of the first comparator and the first control Kiwametsuki the second and between the second comparator and the control electrode of the semiconductor element of the control Kiwametsuki semiconductor element , wherein the time of conduction of the first control Kiwametsuki semiconductor device, wherein the second control Kiwametsuki semiconductor elements and cut-off state, during conduction of the second control Kiwametsuki semiconductor device, the first control Kiwametsuki semiconductor element The charging circuit according to claim 1 , wherein the charging circuit is in a cut-off state. The charging circuit as claimed in any one of claims 3, wherein the first and second control Kiwametsuki semiconductor device is a MOS type FET. Generator with a charging circuit according to any one of claims 1 to 4. A charging circuit as claimed in any one of claims 5, and changeover switch provided between the reference voltage terminal and the armature winding terminals, motor connected switched by the changeover switch An electric motor provided with a control circuit, wherein the electric motor is controlled by the electric motor control circuit that is switched and connected during operation of the electric motor.

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