JP5143515B2 - PWM DC voltage controller - Google Patents

Description

  The present invention relates to a PWM DC voltage control apparatus capable of controlling a voltage value of a DC voltage generated from a PWM output.

Conventionally, in an electronic circuit controlled according to the voltage value of a control voltage, such as a variable capacitor or a voltage controlled current source, for example, the control voltage is, for example, The PWM output output from the microcomputer is generated by smoothing with a low-pass filter circuit (see, for example, Patent Document 1). Control (change) of the voltage value of the control voltage generated in this way is realized by controlling the duty ratio (Duty ratio) of the PWM output, and this duty ratio control is performed by changing the counter value in the counter in the microcomputer. It is realized by specifying.
Japanese Patent Laid-Open No. 11-341801

  By the way, since the counter in the microcomputer is operated by the reference clock supplied to the microcomputer, the control of the duty ratio is normally realized in units of the clock width (clock period) of the reference clock. The resolution is determined by (clock width of reference clock) / (pulse period of PWM output).

  For this reason, to increase the resolution of the duty ratio in order to perform electronic control with high accuracy, it is necessary to narrow the clock width of the reference clock, that is, to increase the clock frequency. As a result, power consumption and cost increase. On the other hand, it is conceivable to increase the pulse period of the PWM output, but in this case, it is necessary to increase the time constant of the low-pass filter circuit. As a result, the rise time of the DC voltage increases.

  The present invention has been made in view of the above circumstances, and its purpose is to increase the resolution without increasing the clock frequency of the reference clock or increasing the pulse period of the PWM output in order to increase the resolution. The present invention is to provide a PWM DC voltage control device capable of increasing the frequency.

As a result of various studies, the present inventor has found that the above object is achieved by the present invention described below. That is, the PWM DC voltage control apparatus according to one aspect of the present invention can change the PWM output unit that outputs a PWM output having a pulse width and a pulse period corresponding to a reference clock, and the duty ratio of the PWM output with a predetermined resolution. A PWM control unit that changes a combination of a pulse width and a pulse period of the PWM output that is output from the PWM output unit, and a smoothing that generates a DC voltage from the PWM output that is output from the PWM output unit. And the pulse width that allows the duty ratio of the PWM output output from the PWM output unit to be changed with a predetermined resolution among a plurality of combinations of pulse widths and pulse periods that can be generated by the reference clock DC voltage output from the smoothing unit is input to a controlled device having a predetermined input / output characteristic. A combination storage unit that stores the combination for obtaining a DC voltage value corresponding to an input value that can change the output value of the controlled device at substantially equal intervals, and the PWM control unit includes the combination The combination of the pulse width and the pulse period corresponding to the duty ratio to be realized is selected from the combination of the pulse width and the pulse period stored in the storage unit, and the PWM output is selected as the selected combination. The combination of the pulse width and the pulse period of the PWM output outputted from the unit is changed .

According to this configuration, the PWM control unit changes the combination of the pulse width and the pulse period of the PWM output output from the PWM output unit so that the duty ratio of the PWM output can be changed with a predetermined resolution. That is, conventionally, only the pulse width is changed in order to adjust the duty ratio, but in the present invention, not only the pulse width but also the pulse period is changed within a range that can be generated from the reference clock. Therefore, the duty ratio can be changed with higher resolution than when the pulse period is constant and only the pulse width is changed. Therefore, the PWM DC voltage control apparatus having such a configuration can increase the resolution without increasing the clock frequency of the reference clock or increasing the pulse period of the PWM output.
Further, a plurality of combinations of pulse widths and pulse periods corresponding to a plurality of duty ratios of PWM output with a predetermined resolution set in advance are stored in the combination storage unit, and from among the plurality of combinations stored, A combination corresponding to the duty ratio to be realized is selected, and the PWM output output from the PWM output unit is changed to the pulse width and pulse period of the selected combination. For this reason, the PWM control unit selects the combination corresponding to the duty ratio to be realized from the combinations stored in the combination storage unit, and sets the duty ratio of the PWM output output from the PWM output unit with a predetermined resolution. It becomes possible to control (change).
Moreover, it becomes possible to control the output of the controlled device substantially linearly only by selecting a combination stored in the combination storage unit.

Further, PWM DC voltage control device according to another aspect of the present invention includes a PWM output unit for outputting the PWM output of the pulse width and pulse period corresponding to the reference clock, the PWM output outputted from the PWM output unit A duty ratio of the PWM output output from the PWM output unit with a predetermined resolution among a plurality of combinations of a smoothing unit that generates a DC voltage from the pulse width and a pulse width and a pulse period that can be generated by the reference clock. A combination storage unit that stores a combination of the pulse width and pulse period that can be changed, and a PWM output that is output from the PWM output unit so that the duty ratio of the PWM output can be changed with a predetermined resolution. a PWM control unit for changing the combination of pulse width and pulse period, the pulse width and pulse period stored in the combination storing unit The combination of the pulse width and the pulse period corresponding to the duty ratio to be realized is selected from among the combinations, and the pulse width and the pulse period of the PWM output output from the PWM output unit are selected as the selected combination. A PWM control unit that changes the combination of the second, a second PWM output unit that outputs a second PWM output having a second pulse width and a second pulse period according to the reference clock, and a pulse period in the combination selected by the PWM control unit And a second PWM control unit that changes the duty ratio of the second PWM output that is output from the second PWM output unit by changing the second pulse width, and the second PWM output unit. And a second smoothing unit that generates a second DC voltage from the second PWM output output from the second PWM output .

According to this configuration, the PWM control unit changes the duty ratio of the PWM output with a predetermined resolution.
A set of PWM output pulse width and pulse period output from the PWM output unit so that it is possible
Change the alignment. In other words, conventionally, only the pulse width is changed to adjust the duty ratio.
However, in the present invention, not only the pulse width but also the pulse period can be generated from the reference clock.
Will be changed within a certain range. Therefore, if the pulse period is constant and only the pulse width is changed,
Compared to the case, the duty ratio can be changed with higher resolution. Therefore, like this
The configured PWM DC voltage controller increases the clock frequency of the reference clock or outputs PWM.
The resolution can be increased without increasing the force pulse period.
Further, a plurality of combinations of pulse widths and pulse periods corresponding to a plurality of duty ratios of PWM output with a predetermined resolution set in advance are stored in the combination storage unit, and from among the plurality of combinations stored, A combination corresponding to the duty ratio to be realized is selected, and the PWM output output from the PWM output unit is changed to the pulse width and pulse period of the selected combination. For this reason, the PWM control unit selects the combination corresponding to the duty ratio to be realized from the combinations stored in the combination storage unit, and sets the duty ratio of the PWM output output from the PWM output unit with a predetermined resolution. It becomes possible to control (change).
A DC voltage generated from a duty ratio having a predetermined resolution is generated by the smoothing unit, and is determined by (clock width of reference clock) / (lower limit value of pulse period in combination selected by PWM control unit). A DC voltage generated from the resolution duty ratio can be generated by the second smoothing unit.

  In the PWM DC voltage control apparatus described above, the combination storage unit stores the combination in which the duty ratio of the PWM output is within a predetermined range.

  According to this configuration, the combination storage unit selects a duty ratio within a predetermined range in the duty ratio of the PWM output that can be generated from a plurality of combinations of the pulse width and the pulse period that can be generated with the reference clock. A combination of a pulse width and a pulse period for generating the selected duty ratio is stored. For this reason, the storage capacity of the combination storage unit can be reduced as compared with the case where a plurality of combinations of pulse widths and pulse periods that can be generated by the reference clock are all stored. In particular, when the storage capacity of a storage element such as a microcomputer is relatively small, the PWM DC voltage control device having such a configuration is preferably applied.

  The PWM DC voltage control apparatus described above further includes an offset unit that adds a predetermined offset voltage to the DC voltage output from the smoothing unit.

  According to this configuration, the DC voltage range to be adjusted with a predetermined resolution can be changed by adding the offset voltage to the DC voltage by the offset unit. For example, when controlling the output of another circuit with the voltage value of the DC voltage output from the PWM DC voltage control device, by adding the offset voltage to the DC voltage by the offset unit according to the input range of the circuit, The circuit can be suitably controlled with a predetermined resolution.

  In the PWM DC voltage control apparatus described above, the offset unit can change the offset voltage.

  According to this configuration, since the offset voltage applied to the DC voltage can be changed, it is possible to cope with a DC voltage range to be adjusted with various predetermined resolutions with one PWM DC voltage control device.

  The PWM DC voltage control apparatus according to the present invention can increase the resolution without increasing the clock frequency of the reference clock or increasing the pulse period of the PWM output.

DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, an embodiment of the invention will be described with reference to the drawings. In addition, the structure which attached | subjected the same code | symbol in each figure shows that it is the same structure, The description is abbreviate | omitted.
(First embodiment)
FIG. 1 is a block diagram showing a configuration of a PWM DC voltage control apparatus according to the first embodiment. FIG. 2 is a diagram illustrating the relationship between the pulse period, the pulse width, the duty ratio, and the step width. FIG. 3 is a diagram illustrating the relationship between the duty ratio and the step width. The horizontal axis in FIG. 3 is the duty ratio expressed in%, and the vertical axis is the step width expressed in%. FIG. 4 is a flowchart showing the operation of the PWM DC voltage control apparatus in the first embodiment.

  In FIG. 1, a PWM DC voltage control device E1 according to the first embodiment includes a PWM output unit 1, a PWM control unit 2, and a smoothing unit 3A. In the example shown in FIG. 1, the PWM DC voltage controller E <b> 1 further includes a reference clock generation unit 4.

  The reference clock generation unit 4 is a circuit that generates a reference clock at a predetermined frequency (predetermined period, predetermined clock width) set in advance and outputs the reference clock to the PWM output unit 1. The reference clock generation unit 4 includes an oscillation circuit including a crystal resonator, a capacitor, a transistor, and the like, for example.

  The PWM output unit 1 outputs a PWM output having a pulse width and a pulse period corresponding to the reference clock input from the reference clock generation unit 4. In this embodiment, the PWM output unit 1 is realized by a microcomputer (microcomputer) 5A, and a counter or the like in the microcomputer 5A is used. The microcomputer 5A includes, for example, a microprocessor, a storage element, and its peripheral circuits.

  The PWM control unit 2 changes the combination of the pulse width and pulse period of the PWM output output from the PWM output unit 1 so that the duty ratio of the PWM output can be changed with a predetermined resolution. In this embodiment, the PWM control unit 2 is functionally realized by the microcomputer 5A.

  When the PWM control unit 2 determines the pulse width and the pulse period, the PWM control unit 2 starts up the PWM pulse of the PWM output at the timing when the clock pulse of the reference clock is input from the reference clock generation unit 4 to generate the PWM pulse of the PWM output. At the same time, counting of clock pulses starts from 0, and when the number of counted clock pulses reaches the number corresponding to the determined pulse width (the counting is continued), the PWM pulse of the PWM output at this timing When the number of counted clock pulses reaches the number corresponding to the determined pulse period, the PWM pulse of the PWM output is started at this timing in order to generate the next PWM pulse in the PWM output. The clock pulse count starts from 0 and this count When the number of clock pulses counted reaches the number corresponding to the determined pulse width (the count is continued), the PWM pulse of the PWM output is lowered at this timing, and the number of clock pulses counted is When the number corresponding to the determined pulse cycle is reached, the PWM pulse of the PWM output is started at this timing and the count of the clock pulse is started from 0 at this timing to generate the next PWM pulse in the PWM output. . In this way, the PWM control unit 2 sets the pulse width and pulse period in the PWM output according to the number of clock pulses in the reference clock. By operating in this way, the PWM control unit 2 controls the PWM output unit 1 and outputs a PWM output having a pulse width and a pulse period corresponding to the reference clock input from the reference clock generation unit 4 to the PWM output unit 1. Let

  The PWM output that can be generated by the PWM control unit 2 operating in this way can be a combination of a value that can be taken by the pulse period and a value that can be taken by the pulse width. For example, when the pulse period is set to 255 or less of the clock width, the possible values of the pulse period are from one clock width to 255 clock widths. When one of the possible values of the pulse period is set as the pulse period, the possible value of the pulse width is determined, and the number of clocks corresponding to the set pulse period is determined from 0 clock widths. Up to width. Therefore, when this pulse period is set to 255 or less of the clock width, the PWM output that can be generated by the PWM control unit 2 can be the one shown in FIG. 2 and FIG. FIG. 2 shows columns of a pulse period, a pulse width, a duty ratio (duty ratio), and a step width from the left. The pulse period and pulse width are each represented by the number of clock widths, and the number of clock widths is registered in the respective fields of the pulse period and pulse width. For example, when “255” is registered in the pulse period column, the pulse period is (clock width) × 255, and when “1” is registered in the pulse width column, the pulse period is The width is (clock width) × 1. In the column of duty ratio, the duty ratio of PWM output generated by the pulse period and pulse width registered in each column of pulse period and pulse width is registered. In FIG. 2, when the upper limit of the pulse period is set, the duty ratios are obtained for all combinations of the pulse width and the pulse period that can be generated by the reference clock, and are rearranged in ascending order. When rearranged in this order, the difference between the duty ratio and the next duty ratio is the step width and is registered in the step width column.

  FIG. 3 shows a combination of a pulse width and a pulse period that can be generated by the reference clock generated as described above, and a duty ratio and a step width that can be generated by this combination. Represents the step width that can be set. For example, when the duty ratio is set to any of 0% to 27% or when the duty ratio is set to any of 73% to 100%, the step is 0.1% or less. It can be seen from FIG. 3 that the duty ratio can be changed by the width.

  Returning to FIG. 1, and in this embodiment, the PWM control unit 2 sets the duty ratio closest to the duty ratio to be realized from among a plurality of combinations of the pulse width and the pulse period that can be generated by the reference clock. The combination of the corresponding pulse width and pulse period is selected, and the combination of the pulse width and pulse period of the PWM output output from the PWM output unit 1 is changed to the selected combination.

  The smoothing unit 3A is a circuit that generates a DC voltage from the PWM output output from the PWM output unit 1. The smoothing unit 3A is, for example, a low-pass filter circuit, and includes, for example, a resistance element R1 and a capacitor C1 connected in series as shown in FIG. 1, and is connected to both ends of the resistance element R1 and the capacitor C1 connected in series. A PWM output is applied, and a connection point between the resistance element R1 and the capacitor C1 is an output of the smoothing unit 3A. The output of the smoothing unit 3A is also the output of the PWM DC voltage control device E1.

In the PWM DC voltage control device E1 having such a configuration, for example, when a duty ratio is set from a duty ratio setting unit that receives an input of a duty ratio (not shown), the PWM control is performed to realize the set duty ratio. The unit 2 operates as shown in FIG. That is, in FIG. 4, in step S11, the pulse period T is set to zero. Next, in step S12, the pulse period T is incremented by one (T ← T + 1). Next, in step S13, the difference dx between the set duty ratio D and the duty ratio that can be realized from the pulse period T is obtained by one equation.
dx = abs (D-ROUND (T × D) / T) (Formula 1)
Here, abs (x) is an operator for obtaining the absolute value of x, and ROUND (x) is an operator for rounding off the decimal part of x.

  Next, in step S14, it is determined whether or not the difference dx has been minimized so far, and if the result of this determination is the minimum, step S16 is performed after step S15 is performed. If not, step S16 is executed.

  In step S15, the difference dx is overwritten and stored in the storage element (not shown) of the microcomputer 5A as the minimum value of the difference dx, and the pulse period T and the pulse width W are stored in the storage element (not shown) of the microcomputer 5A. It is overwritten and saved.

  In step S16, it is determined whether or not the pulse period T has reached the upper limit, for example, “255” in the above example. If the result of this determination is that the upper limit has been reached, step S17 is executed, and the upper limit is reached. If not, the process returns to step S12.

  In step S17, the pulse period T and the pulse width W stored in the storage element (not shown) of the microcomputer 5A are adopted as the pulse period and the pulse width for realizing the set duty ratio.

  By operating in this way, the PWM control unit 2 can perform the duty to be realized from a plurality of combinations of the pulse width and the pulse period that can be generated by the reference clock when the upper limit of the pulse period is set. A combination of the pulse width W and the pulse period T corresponding to the duty ratio closest to the ratio is selected. The PWM control unit 2 changes the combination of the pulse width and the pulse period of the PWM output output from the PWM output unit 1 to the selected combination, and the PWM output having the pulse width W and the pulse period T. Is output from the PWM output unit 1.

  As described above, the PWM control unit changes the combination of the pulse width and pulse period of the PWM output output from the PWM output unit 1 so that the duty ratio of the PWM output can be changed with a predetermined resolution. That is, conventionally, only the pulse width is changed in order to adjust the duty ratio, but in this embodiment, not only the pulse width but also the pulse period is changed within a range that can be generated from the reference clock below a predetermined upper limit. The Therefore, the duty ratio can be changed with higher resolution than when the pulse period is constant and only the pulse width is changed.

  For example, when the pulse period is fixed to 255 clock widths ((pulse period) = (clock width) × 255), the pulse width is incremented from one clock width to two clock widths. The step ratio of the duty ratio is about 0.4%, but instead of incrementing the pulse width (assuming the pulse width is one clock width), the pulse period is changed from 255 clock widths to 254 clock widths. When decrementing, the step width of the duty ratio is about 0.0015%, and a much smaller step width (higher resolution) is realized as compared with the case where the pulse period is fixed.

  Therefore, the PWM DC voltage control device E1 having such a configuration can increase the resolution without increasing the clock frequency of the reference clock or increasing the pulse period of the PWM output.

Next, another embodiment will be described.
(Second Embodiment)
FIG. 5 is a block diagram illustrating a configuration of the PWM DC voltage control apparatus according to the second embodiment. FIG. 6 is a diagram illustrating the relationship between the duty ratio and the step width. The horizontal axis in FIG. 6 is the duty ratio expressed in%, and the vertical axis is the step width expressed in%.

  In FIG. 5, the PWM DC voltage control device E2 in the second embodiment has a pulse width and a pulse period that can be generated with a reference clock, as compared with the PWM DC voltage control device E1 in the first embodiment shown in FIG. A combination storage unit 6 that stores a combination of a pulse width and a pulse period that enables the duty ratio of the PWM output that is output from the PWM output unit 1 to be changed with a predetermined resolution. The control unit 2 selects a combination of the pulse width and the pulse period corresponding to the duty ratio to be realized from the combinations of the pulse width and the pulse period stored in the combination storage unit 6, and selects the selected combination The difference is that the combination of the pulse width and the pulse period of the PWM output output from the PWM output unit 1 is changed, and the other points are the same. The description of the same point is omitted. For example, in the present embodiment, the combination storage unit 6 is functionally realized by the microcomputer 5B. Similar to the microcomputer 5A, the microcomputer 5B includes, for example, a microprocessor, a storage element, and its peripheral circuits.

  For example, a combination of a pulse width and a pulse period that can change the duty ratio of the PWM output with a predetermined resolution (including a resolution closest to the predetermined resolution if the predetermined resolution is not obtained) is extracted from FIG. Thus, a table in which such combinations are registered is created, and this table is stored in the combination storage unit 6. For example, when the pulse period is a clock width of 255 or less and the duty ratio changes with a resolution of about 0.1% in the range from 0% to 100%, the result is as shown in FIG. In this case, as shown in FIG. 6, the step width does not become 0.1% or less only in the case of the duty ratios at the points P1, P2, and P3, but the step width is generally made 0.1% or less. . Therefore, in this example, the PWM DC voltage control device E2 in the second embodiment can change the duty ratio from 0% to 100% with a resolution of about 0.1%, and the DC voltage is about 0.1%. % Resolution can be controlled.

  In the PWM DC voltage control device E2 in the second embodiment, when the duty ratio is set, the PWM control unit 2 uses the pulse width stored in the combination storage unit 6 to realize the set duty ratio. The combination of the pulse width and the pulse period corresponding to the duty ratio to be realized is selected from the combination of the pulse period and the pulse period. The PWM control unit 2 changes the combination of the pulse width and the pulse period of the PWM output output from the PWM output unit 1 to the selected combination, and the PWM output having the pulse width W and the pulse period T. Is output from the PWM output unit 1. The combination storage unit 6 can change the duty ratio of the PWM output output from the PWM output unit 1 with a predetermined resolution from a plurality of combinations of pulse widths and pulse periods that can be generated by the reference clock. A combination of a pulse width and a pulse period is stored. Therefore, the PWM DC voltage control device E2 in the second embodiment can select the combination corresponding to the duty ratio to be realized from the combinations stored in the combination storage unit 6, and the PWM output unit 1 with a predetermined resolution. It is possible to control (change) the duty ratio of the PWM output that is output from. In addition, since multiple combinations of pulse width and pulse period that can be generated with the reference clock can change not only the pulse width but also the pulse period, the clock frequency of the reference clock can be increased or the pulse period of the PWM output can be increased. The predetermined resolution can be increased without any trouble.

  Here, in the PWM DC voltage control device E2 of the second embodiment described above, the combination storage unit 6 may be configured to store combinations in which the duty ratio of the PWM output is within a predetermined range.

  For example, when the duty ratio of the PWM output required from the PWM DC voltage control device E2 is about 0.1% resolution and in the range from 0% to 30%, the combination storage unit 6 has the configuration shown in FIG. A plurality of combinations of a pulse width and a pulse period for realizing a duty ratio in a range from 0% to 30% in the case shown are stored.

  In such a configuration, a duty ratio within a predetermined range is selected as the duty ratio of the PWM output that can be generated from a plurality of combinations of a pulse width and a pulse period that can be generated with the reference clock, and the selected duty ratio is selected. Is stored in the combination storage unit 6. For this reason, when the upper limit of the pulse period is set, the combination storage unit 6 has a plurality of combinations of the pulse width and the pulse period that can be generated by the reference clock. The storage capacity can be reduced. In particular, when the storage capacity of the storage element such as the microcomputer 5B is relatively small, the PWM DC voltage control device E2 having such a configuration is preferably applied.

  FIG. 7 is a block diagram showing a configuration of a first modification in the PWM DC voltage control apparatus of the second embodiment. FIG. 8 is a block diagram showing a configuration of a second modification in the PWM DC voltage control apparatus of the second embodiment.

  The PWM DC voltage control device E2 having such a configuration may further include an offset unit 11 that adds a predetermined offset voltage to the DC voltage output from the smoothing unit 3A.

  For example, as shown in FIG. 7, the offset unit 11 includes resistance elements R11, R12, and R13, and an operational amplifier OP1. The resistance element R11 and the resistance element R12 are connected in series with each other, one end of the resistance element R11 is connected to the constant voltage power supply voltage Va, the other end is connected to one end of the resistance element R12, The other end is connected to the output of the smoothing unit 3A. A connection point between the resistance element R11 and the resistance element R12 is connected to a non-inverting input of the operational amplifier OP1. Both ends of the resistor element R13 are connected to the non-inverting input and the output of the operational amplifier OP1, respectively. The inverting input of the operational amplifier OP1 is grounded. The offset unit 11 having such a configuration adds a fixed offset voltage to the output of the smoothing unit 3A and outputs the result.

  In such a configuration, since the offset voltage is added to the DC voltage by the offset unit 11, the DC voltage range to be adjusted with a predetermined resolution can be changed. For example, when the duty ratio of the PWM output is about 0.1% resolution and changes in the range from 0% to 30%, the output of the PWM DC voltage controller E2 changes in the range from 0V to 3V. When the offset unit 11 adds the offset voltage of 2V to the DC voltage of the smoothing unit 3A, the output of the PWM DC voltage control device E2 can be changed to a range from 2V to 5V. In particular, when the output of another device or circuit is controlled by the voltage value of the DC voltage output from the PWM DC voltage control device E2, the offset voltage is offset into the DC voltage by the offset unit 11 according to the input range of the device. By adding the above, it becomes possible to suitably control the apparatus and the like with a predetermined resolution.

  Moreover, in the PWM direct-current voltage control device E2 of the first modification, the offset unit 11 may be able to change the offset voltage. In such a configuration, the offset unit 11 shown in FIG. 7 has a constant voltage voltage power supply Va connected to one end of the resistor element R11. However, instead of the constant voltage voltage power supply Va, a variable voltage voltage power supply Vr is used. Connected to one end of resistance element R11. For example, in the PWM DC voltage control device E2 of this modification, as shown in FIG. 8, the microcomputer 5C includes a PWM output unit (first PWM output unit) 1, a PWM control unit (first PWM control unit) 2 and a microcomputer 5B. In addition to the combination storage unit (first combination storage unit) 6, the second PWM output unit 12, the second PWM control unit 13, and the second combination function in the same manner as the PWM output unit 1, the PWM control unit 2, and the combination storage unit 6. A second smoothing unit 3B configured to functionally include the storage unit 14 and smoothing the output of the second PWM output unit 12 is further provided. The second smoothing unit 3B is configured to include a resistance element R2 and a capacitor C2, similarly to the smoothing unit 3A including the resistance element R1 and the capacitor C1, and the output of the second smoothing unit 3B is the resistance element R11. Is connected to one end. Similar to the microcomputer 5A and the microcomputer 5B, the microcomputer 5C includes, for example, a microprocessor, a storage element, and its peripheral circuits.

  In such a configuration, the offset voltage applied to the DC voltage can be changed, so that one PWM DC voltage control device E2 can cope with various ranges of the DC voltage to be adjusted with a predetermined resolution. Become. For example, in the microcomputer 5C and the smoothing unit 3A, the PWM output duty ratio changes within a range from 0% to 25% with a resolution of about 0.1%. In the microcomputer 5C and the second smoothing unit 3B, the PWM output PWM DC voltage controller E2 outputs a DC voltage in the range of 0 to 100% at about 0.1% when the duty ratio of the signal is a resolution of about 25% and changes in the range of 0% to 75%. It becomes possible.

  Further, in the PWM DC voltage control device E2 of the second modification, the second PWM control unit 13 uses the second PWM output in the second PWM output output by the second PWM output unit 12 to indicate the pulse period in the combination selected by the PWM control unit 2. The duty cycle of the second PWM output may be changed by changing the second pulse width of the second PWM output while setting the pulse period. In such a configuration, the DC voltage generated from the duty ratio of the predetermined resolution is generated by the smoothing unit 3A, while the lower limit of the pulse period in the combination selected by (clock width of the reference clock) / (PWM control unit) The DC voltage generated from the duty ratio of the resolution determined by (value) can be generated by the second smoothing unit 3B. As described above, when the plurality of microcomputers 5C output two PWM outputs in the example shown in FIG. 8, the counter of the pulse period is usually common because of the circuit configuration. Even in a low-cost microcomputer in which the counter for setting the pulse period of the 2PWM output is the same as the counter for setting the pulse period of the first PWM output, the second PWM output can be used with the duty ratio of the second PWM output with a predetermined resolution. Become. In such a configuration, the lower limit of the pulse period that can be selected by the PWM control unit 2 is determined according to the resolution required for the second smoothing unit 3B. For this reason, it is preferable that the PWM control unit 2 selects a pulse period of a predetermined value or more so that the duty ratio of the second PWM output unit 12 can be changed with a predetermined resolution set in advance. For example, when the resolution required for the second smoothing unit 3B is 1%, the lower limit of the pulse period that can be selected by the PWM control unit 2 is 100 clock pulses. When the resolution to be applied is 2%, the lower limit of the pulse period that can be selected by the PWM control unit 2 is 50 clock pulses. For example, the resolution required for the second smoothing unit 3B is 0.5%. In some cases, the lower limit of the pulse period that can be selected by the PWM controller 2 is 200 clock pulses.

  Next, an example of a controlled device controlled by the PWM DC voltage control device E2 of such an embodiment will be described.

  FIG. 9 is a diagram for explaining a controlled device controlled by the PWM DC voltage control device of the embodiment. FIG. 10 is a diagram illustrating a relationship between a control input and an output in the controlled apparatus. The horizontal axis in FIG. 10 is the voltage of the control input, and the vertical axis is the output frequency.

  In FIG. 9, the controlled device 21 includes a variable capacitor VC and an oscillating unit 211. The capacitance of the variable capacitance capacitor VC is changed according to the voltage value of the control input, and the oscillation frequency of the oscillation unit 211 changes according to the capacitance of the variable capacitance capacitor VC. Thus, the controlled device 21 has a predetermined input / output characteristic, in this case, a predetermined relationship between the control input and the oscillation frequency. The controlled device 21 receives the DC voltage output from the PWM DC voltage control device E2 (smoothing unit 3A) as the control input.

  In such a configuration, when the oscillation frequency of the controlled device 21 is set, the variable capacitor VC according to the set oscillation frequency is set according to the relationship between the oscillation frequency of the oscillator 211 and the capacitance of the variable capacitor VC. The voltage value of the control input corresponding to the determined capacity is determined according to the relationship between the control input and the capacity of the variable capacitor, and the PWM DC voltage control device is determined according to the determined voltage value. The output of E2 is determined. For this reason, the combination storage unit 6 of the PWM DC voltage control device E2 stores the voltage value of the control input according to the oscillation frequency to be realized from among a plurality of combinations of pulse width and pulse period that can be generated by the reference clock. That is, a combination of a pulse width and a pulse period corresponding to the voltage value of the control input is stored.

  Here, when the input / output characteristics of the controlled device 21, in this example, the relationship between the control input and the oscillation frequency is non-linear as shown in FIG. 10, the combination storage unit 6 preferably stores this oscillation. The pulse width and the pulse period corresponding to the voltage value (input value) of the control input in which the oscillation frequency (output value) of the controlled device 21 can be changed at substantially equal intervals according to the nonlinear relationship between the frequency and the control input. The combination is stored. With this configuration, the PWM DC voltage control device E2 can control the oscillation frequency of the controlled device 21 to be substantially linear only by selecting the combination stored in the combination storage unit 6. It becomes possible.

  In order to express the present invention, the present invention has been appropriately and fully described above with reference to the drawings. However, those skilled in the art can easily change and / or improve the above-described embodiments. It should be recognized that this is possible. Therefore, unless the modifications or improvements implemented by those skilled in the art are at a level that departs from the scope of the claims recited in the claims, the modifications or improvements are not covered by the claims. To be construed as inclusive.

It is a block diagram which shows the structure of the PWM DC voltage control apparatus in 1st Embodiment. It is a figure which shows the relationship between a pulse period, a pulse width, a duty ratio, and a step width. It is a figure which shows the relationship between a duty ratio and step width. It is a flowchart which shows operation | movement of the PWM DC voltage control apparatus in 1st Embodiment. It is a block diagram which shows the structure of the PWM DC voltage control apparatus in 2nd Embodiment. It is a figure which shows the relationship between a duty ratio and step width. It is a block diagram which shows the structure of the 1st modification in the PWM DC voltage control apparatus of 2nd Embodiment. It is a block diagram which shows the structure of the 2nd modification in the PWM DC voltage control apparatus of 2nd Embodiment. It is a figure for demonstrating the to-be-controlled device controlled by the PWM DC voltage control apparatus of embodiment. It is a figure which shows the relationship between the control input and output in a to-be-controlled device.

Explanation of symbols

E1, E2 PWM DC voltage control device 1 PWM output unit 2 PWM control unit 3A smoothing unit 3B second smoothing unit 4 reference clock generation units 5A, 5B, 5C microcomputer 6 combination storage unit 11 offset unit 12 second PWM output unit 13 second PWM Control unit 14 Second combination storage unit 21 Controlled device

Claims (5)

A PWM output unit that outputs a PWM output having a pulse width and a pulse period according to a reference clock;
A PWM control unit that changes a combination of a pulse width and a pulse period of the PWM output that is output from the PWM output unit so that the duty ratio of the PWM output can be changed with a predetermined resolution;
A smoothing unit that generates a DC voltage from the PWM output output from the PWM output unit ;
The pulse width and pulse period that can change the duty ratio of the PWM output output from the PWM output unit with a predetermined resolution from a plurality of combinations of pulse width and pulse period that can be generated by the reference clock When the DC voltage output from the smoothing unit is input to a controlled device having predetermined input / output characteristics, the output value of the controlled device can be changed at substantially equal intervals. A combination storage unit that stores the combination in which a DC voltage value corresponding to the value is obtained;
The PWM control unit selects the combination of the pulse width and the pulse period corresponding to the duty ratio to be realized from the combinations of the pulse width and the pulse period stored in the combination storage unit, The PWM DC voltage control apparatus , wherein a combination of a pulse width and a pulse period of the PWM output output from the PWM output unit is changed to the selected combination . A PWM output unit that outputs a PWM output having a pulse width and a pulse period according to a reference clock;
A smoothing unit that generates a DC voltage from the PWM output output from the PWM output unit;
The pulse width and pulse period that can change the duty ratio of the PWM output output from the PWM output unit with a predetermined resolution from a plurality of combinations of pulse width and pulse period that can be generated by the reference clock a combination storage unit that stores a combination of,
A PWM control unit that changes a combination of a pulse width and a pulse period of the PWM output that is output from the PWM output unit so that the duty ratio of the PWM output can be changed with a predetermined resolution. A combination of the pulse width and the pulse period corresponding to the duty ratio to be realized is selected from the combinations of the pulse width and the pulse period stored in the unit, and the PWM output unit is selected as the selected combination. A PWM controller that changes a combination of a pulse width and a pulse period of the PWM output output from
A second PWM output unit for outputting a second PWM output having a second pulse width and a second pulse period according to the reference clock;
The pulse period in the combination selected by the PWM control unit is set as the second pulse period, and the duty ratio of the second PWM output output from the second PWM output unit is changed by changing the second pulse width. A second PWM control unit;
P WM DC voltage controller it anda second smoothing unit for generating a second DC voltage from said first 2PWM output outputted from the second 2PWM output unit. The combination storage unit, PWM DC voltage control apparatus according to claim 1 or 2 duty ratio of the PWM output and to store the combination falls within a predetermined range. The PWM DC voltage control apparatus according to claim 3, further comprising an offset unit that adds a predetermined offset voltage to the DC voltage output from the smoothing unit. The PWM DC voltage control apparatus according to claim 4, wherein the offset unit is capable of changing the offset voltage.

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