JP2001251189A - A/d converter and semiconductor pressure sensor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an inexpensive and highly precise A/D converter by using an analog circuit where a crystal oscillator and the like are not used. SOLUTION: The number Fref of clock pulses CP that a clock pulse signal generation circuit 3 generates while the output voltage V of an integration circuit 1, which is constituted of an analog circuit and performs an integration operation reaches a second reference voltage V2 from a first reference voltage V1 that a reference voltage generation circuit 5 generates is counted by a first counter 10a constituted of a comparator 7a and a counter circuit 9a. The number Fm of counting times while the output voltage of the integration circuit 1 exceeds V1 and rises to an analog voltage Vm being the object of digital conversion, is counted by a comparator 7b and a counter 9a. An arithmetic circuit 11 outputs Fm/Fref or Fref/Fm and a coefficient k(Fm/Fref)×k or (Fref/Fm)×k (k is coefficient) as the digital conversion value of the analog voltage Vm.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an A / D converter using an integrating circuit constituted by an analog circuit and a clock pulse generating circuit, and a semiconductor pressure sensor device using the A / D converter. is there.

[0002]

2. Description of the Related Art It is known that the conversion accuracy of an A / D converter can be improved by using a microcomputer or a crystal oscillator. However, recent demands for lower prices for electronic components and sensors are very strong, and in many cases, microcomputers and crystal oscillators cannot be used in terms of price. In order to meet such demands, the A / D converter must be configured using a clock pulse generation circuit that does not use a crystal oscillator including an integration circuit of an analog circuit and a CR oscillation circuit.

[0003]

However, it is difficult to increase the conversion accuracy of an integrating circuit of an analog circuit, a CR oscillation circuit, or the like because errors and variations occur in the output depending on the performance of components used.

An object of the present invention is to provide an A / D converter capable of improving conversion accuracy with a simple configuration without using a microcomputer.

Another object of the present invention is to provide a semiconductor pressure sensor device which has high accuracy and is inexpensive.

[0006]

An A / D converter according to the present invention comprises an integrating circuit constituted by an analog circuit for performing an integrating operation, and an analog circuit constituted by an analog circuit without using a quartz oscillator and having a predetermined period. A clock pulse generating circuit for generating a clock pulse, and a predetermined first reference voltage V1
And a reference voltage generating circuit for generating a second reference voltage V2 higher than the first reference voltage, first and second counters, and an arithmetic circuit including a gate array.

The first counter receives the output of the integrating circuit, the output of the clock pulse generating circuit, and the output of the reference voltage generating circuit as inputs and waits until the output of the integrating circuit exceeds a predetermined first reference voltage V1. The number Fref of the clock pulses output from the clock pulse generation circuit until the reference voltage V2 reaches 2 is counted. The second counter receives the output of the integration circuit, the analog voltage Vm to be subjected to digital conversion smaller than the second reference voltage V2, and the output of the reference voltage generation circuit, and the output of the integration circuit is predetermined. The number Fm of clock pulses output from the clock pulse generation circuit during a period from when the voltage exceeds the first reference voltage V1 to when the voltage reaches the analog voltage Vm is counted. Then, the arithmetic circuit calculates the value Fm / Fref obtained by dividing the count value Fm counted by the second counter by the count value Fref counted by the first counter or the count value Fref counted by the first counter. The value Fref divided by the counted value Fm /
A value (Fm / Fref) × k or (Fref / Fm) × k obtained by multiplying Fm by a coefficient k is output as a digital conversion value of the analog voltage Vm. If this arithmetic circuit is constituted by a gate array, necessary arithmetic operations can be performed without using a microcomputer, and the price of an apparatus using an A / D converter can be reduced.

In the present invention, the first and second signals are output using the output of one common integrator and the output of the clock pulse generator.
The counter performs the counting operation, and the arithmetic circuit
Since the division of m / Fref or Fref / Fm is performed, an error or variation in output caused by the common integration circuit and clock pulse generation circuit can be eliminated by the division operation. Therefore, even if an integrating circuit and a clock pulse generating circuit composed of analog circuits are used, it is possible to reduce variations in the output of the A / D converter caused by the configuration of both circuits and the components used. Note that the coefficient k is a value arbitrarily determined by the integration circuit and the clock pulse circuit used.

Although the A / D converter of the present invention can be used in any applications, it is particularly suitable for a small-sized and low-cost sensor signal processing circuit. For example, if the A / D converter of the present invention is applied to a semiconductor pressure sensor device provided with an A / D converter that converts an analog output voltage Vm of a semiconductor pressure sensor into a digital value and outputs the digital value, the price of the device will be significantly increased. Can be lowered.

[0010] In a semiconductor pressure sensor device, the output of the semiconductor pressure sensor fluctuates due to fluctuations in temperature. Therefore, temperature compensation is generally performed on the sensor output. Therefore, if the present invention is applied to the case where the output of the temperature sensor is A / D converted, the output accuracy of the sensor can be further improved. In this case, the temperature sensor that measures the temperature of the semiconductor pressure sensor and outputs the measurement result as a voltage value, and the output of the integration circuit, the output of the clock pulse generation circuit, and the output voltage of the temperature sensor as inputs, The output is a predetermined first
And a third counter that counts the number Ft of clock pulses output from the clock pulse generation circuit during a period from when the reference voltage V1 exceeds the reference voltage V1 to when the output voltage of the temperature sensor is reached. And the arithmetic circuit composed of the gate array is
A value (Fm / Fref) × (Fm / Fref) × Fm / Fref obtained by dividing the count value Fm counted by the second counter by the count value Fref counted by the first counter.
k is corrected using a value Ft / Fref obtained by dividing the value Ft counted by the third counter by the count value Fref counted by the first counter, and is output as a digital conversion value of the analog output voltage Vm. By doing so, the measurement value of the temperature sensor is also corrected, so that the measurement accuracy of the semiconductor pressure sensor device is further improved.

Although the method of temperature correction is arbitrary, a value obtained by adding / subtracting the value Ft / Fref to the value (Fm / Fref) × k may be output as a digital conversion value of the output of the semiconductor pressure sensor device. . In this way, the temperature can be easily corrected.

[0012]

BRIEF DESCRIPTION OF THE DRAWINGS FIG.
An example of an embodiment of the semiconductor pressure sensor device of the present invention to which the / D converter is applied will be described. FIG. 1 is a block diagram showing a configuration of an example of an embodiment of the present invention. In FIG. 1, reference numeral 1 denotes an integration circuit which is constituted by an analog circuit and repeats an integration operation at a predetermined constant period T0. As the integration circuit 1, for example, a known circuit configured by combining an operational amplifier, a capacitor, and a resistor can be used. The integration circuit 1 generates a periodic triangular wave as shown in FIG. Output voltage V of integration circuit 1
Increases substantially linearly from V = 0 to Vmax from t = 0 to T0 as a function of time t, and returns to V = 0 at t = T0. The output of the integrating circuit 1 repeats this process periodically. The constant A of Vmax = A · T0 is the rising slope of the linear relationship between the voltage V and the time t.

In FIG. 1, reference numeral 3 denotes a clock pulse generating circuit which is constituted by an analog circuit without using a crystal oscillator and generates a clock pulse having a period Ts. As the clock pulse generation circuit 3 not using the crystal oscillator, for example, a known LC oscillation circuit or CR oscillation circuit can be used.

Reference numeral 5 denotes a predetermined first reference voltage V1 and a first reference voltage V1.
Is a reference voltage generating circuit for generating a second reference voltage V2 higher than the reference voltage V1 of the first embodiment. The reference voltage generating circuit 5 is composed of, for example, a voltage dividing circuit in which a plurality of resistors are connected in series, and outputs two types of reference voltages V1 and V2 from two voltage dividing points. The two types of reference voltages V1 and V2 define a lower limit value and an upper limit value of the analog voltage Vm to be subjected to digital conversion.

Reference numeral 6 denotes a known semiconductor pressure sensor,
An analog voltage Vm to be D-converted is output. The switch circuit SW1 selects the first and second reference voltages V1 and V2 output from the reference voltage generation circuit 5 and supplies the same to the first comparator 7a, and is configured by a semiconductor switch circuit such as a transistor. Is done. The switch circuit SW1 switches in synchronization with the output of the integration circuit 1, and selects the first reference voltage V1 before the output voltage of the integration circuit 1 reaches V1 during the period T0. The second reference voltage V2 is selected after the output voltage V reaches V1, and the first reference voltage V1 is selected after the output voltage V of the integration circuit 1 reaches the second reference voltage. I have.

The switch circuit SW2 selects the output terminal of the reference voltage generation circuit 5 for outputting the first reference voltage V1 and the output terminal of the semiconductor pressure sensor 6, and selects the respective outputs to the second comparator 7b. Output. The switch circuit SW2 also has an integration circuit 1 like the switch circuit SW1.
And switches in synchronism with the output of the switch circuit SW1 to select the first reference voltage V1 together with the switch circuit SW1. However, the output voltage V of the integration circuit 1 is equal to the first reference voltage V
After reaching 1, the switching operation is immediately performed to output the output of the semiconductor pressure sensor 6 to the second comparator 7b. Then, when the switch SW1 switches from selection of the second reference voltage V2 to selection of the first reference voltage V1, the switch SW2 selects the first reference voltage V1 in synchronization therewith.

The first comparator 7a outputs an output voltage V of the integration circuit 1 and a signal from the switch SW1 (first and second signals).
And the reference voltages V1 and V2) as inputs, and compares the two with each other to generate a rectangular wave comparison signal as shown in FIG.
Output. That is, the first comparator 7 a
Outputs a comparison signal S0 indicating a logical value 1 from the time when the output voltage V exceeds the first reference voltage V1 to the time when the output voltage V reaches the second reference voltage V2. Is output. The time Tref during which the comparison signal S0 is at the logical value 1 within one cycle T0 of the output of the integration circuit 1 is Tr
ef = (V2-V1) / A.

The second comparator 7b includes an integrating circuit 1
Output voltage V and the voltage signal (V
1, Vm). Second comparator 7b
Compares two input voltages and outputs a comparison signal S1 as shown in FIG. That is, the second comparator 7
b outputs a comparison signal S1 having a logic value of 1 from the time when the output voltage V of the integration circuit 1 exceeds the reference voltage V1 until reaching the analog voltage Vm, and outputs a signal having a logic value 0 during other times. I do. The time Tm during which the comparison signal S1 is at the logical value 1 within one cycle T0 of the output of the integrating circuit 1 is Tm
= (Vm-V1) / A.

First and second comparators 7a and 7b
Are input to the first and second counter circuits 9a and 9b, respectively. First and second counter circuits 9a
And 9b are supplied with a clock pulse signal CP from the clock pulse generation circuit 3, respectively. The first and second counter circuits 9a and 9b each include an AND circuit AN
Da and ANDb, and counting means CMa and CMb. The comparison signal S0 from the first comparator 7a and the clock pulse signal CP of the cycle Ts (<T0) output from the clock pulse generation circuit 3 are input to the AND circuit ANDa of the first counter circuit 9a. The output signal of the AND circuit ANDa has a waveform as shown in FIG. That is, the first comparator 7a outputs the clock pulse signal CP output from the clock pulse generation circuit 3 only during the time Tref in the state of the logical value 1. Then, the counting means CMa counts the number of pulses Fref generated during this time and outputs this as a digital value. This Fref can be expressed as the following equation.

Fref = [(V2−V1) / (A · Ts)] (1) The AND circuit ANDb of the second counter circuit 9b has the comparison signal S1 from the second comparator 7b and the clock pulse generation circuit 3 Is input. The output signal of the AND circuit ANDb is shown in FIG.
It becomes a waveform like That is, the clock pulse signal CP is supplied to the AND circuit A only during the time Tm when the comparison signal S1 input from the second comparator 7b is in the state of the logical value 1.
Output from NDb. The counting means CMb counts the number Fm of clock pulses output from the AND circuit ANDb during this time Tm, and outputs a digital value. Here, the pulse number Fm can be expressed as the following equation.

Fm = [(Vm−V1) / (A · Ts)] (2) The outputs Fref of the first and second counter circuits 9a and 9b,
Fm is held during one cycle T0 of the integration circuit 1. When one cycle of the integration circuit 1 ends and the output voltage V of the triangular waveform becomes 0, the outputs of the first and second counter circuits 9a and 9b are reset to 0. In this example, a first counter 10a is configured by the first comparator 7a and the first counter 9a, and a second counter 10b is configured by the second comparator 7b and the second counter 9b. .

First and second counter circuits 9a and 9b
Output from the arithmetic circuit 1 constituted by a gate array
1 is input. The arithmetic circuit 11 includes a second counter 9b
Fm / Fr obtained by dividing the count value Fm counted by the above by the count value Fref counted by the first counter 9a.
ef or a value obtained by multiplying ef by a coefficient k (Fm / Fref) ×
k or value Fref / F obtained by dividing value Fref by value Fm
m or a value obtained by multiplying this by a coefficient k (Fref / Fm) ×
k is output as a digital conversion value of the analog voltage Vm within one cycle of the integration circuit 1.

Here, the output of AD conversion is Fm / Fref
The reason for using the ratio (or Fref / Fm) will be described.
The values of Fm and Fref depend on the dispersion of component performance.
As shown in the equations (1) and (2), the value changes when the constant A of the integration circuit 1 and the cycle Ts of the output of the clock pulse generation circuit 3 change. However, when the ratio of Fm / Fref is taken, these constants are erased, and the calculation result does not change even if the constant A and the period Ts fluctuate due to variations in the performance of components. Using the above relationship, the relationship of Vm−V1 ≒ (Fm / Fref) (V2−V1) (3) is established. First and second reference voltages V1, V2
Is unchanged, the converted value of Vm is correct. Here, the expressions on the left and right sides of the equation ≒ meaning “substantially equal” are seemingly mixed expressions of digital numbers and analog variables. Therefore, it is assumed that the analog variable in the equation is written with the same number of significant digits as the digital number. Then, the left side and the right side become digital numbers, and the equation between them approximately holds. Hereinafter, all the equal signs て い る express such a meaning. Here, for example, (V2-
When (V2−V1) is represented by a digital value k as in (V1) ≒ k, a digital conversion value of Vm based on V1 is obtained from Vm−V1 ≒ k (Fm / Fref) (4).
This converted value does not include an error caused by a change in the constant A of the integration circuit and the cycle Ts of the clock circuit.

FIG. 3 is a block diagram showing the configuration of the second embodiment of the present invention. In this embodiment, A in FIG.
The / D converter includes a circuit for A / D converting the signal of the temperature sensor 13 and a calculation circuit 11 'having a calculation function for performing temperature compensation. Since other circuit configurations are the same as those shown in FIG. 1, circuit blocks having the same functions are given the same reference numerals as those shown in FIG.

The temperature sensor 13 is constituted by a diffusion resistor formed on a semiconductor substrate constituting a sensor element of the semiconductor pressure sensor 6, and its resistance value changes according to a temperature change of the semiconductor substrate. Outputs an analog signal corresponding to the change in temperature. The output terminal of the temperature sensor 13 is connected to one contact of the switch SW3. The first reference voltage V1 output from the reference voltage generation circuit 5 is input to the other contact of the switch SW3.
The switch SW3 switches between the first reference voltage V1 output from the reference voltage generation circuit 5 and the output voltage Vt from the temperature sensor 13 in synchronization with the switches SW1 and SW2. Similarly to the switch circuit SW1, the switch circuit SW3 switches in synchronization with the output of the integration circuit 1, and selects the first reference voltage V1 together with the switch circuit SW1. However,
After the output voltage V of the integration circuit 1 reaches the first reference voltage V1, the switch circuit SW3 immediately performs a switching operation and outputs the output of the temperature sensor 13 to the third comparator 7c. The third comparator 7c receives the output voltage of the integration circuit 1 (FIG. 4A) and the output of the switch SW3 as inputs.
The third comparator 7c compares the output voltage V of the integrating circuit 1 with the signals (V1, Vt) input from the switch SW3, and after the output V of the integrating circuit 1 exceeds the reference voltage V1, The comparison signal S2 meaning the logical value 1 is output until the output voltage Vt is reached, and the signal of the logical value 0 is output at other times. One cycle T0 of the integration circuit
The time Tt during which the comparison signal S2 is in the state of the logical value 1 is
Tt = (Vt-V1) / A

The output of the third comparator 7c is input to a third counter circuit 9c. Third counter circuit 9c
Is composed of an AND circuit, ANDc, and count-counting means CMc, like the first and second counter circuits 9a and 9b. Then, the third counter circuit 9c operates similarly to the first and second counter circuits 9a and 9b. The comparison signal S2 output from the comparator 7c and the clock pulse signal CP having the cycle Ts output from the clock pulse generation circuit 3 are input to the AND circuit ANDc of the third counter circuit 9c. The output signal of the AND circuit ANDc has an output waveform as shown in FIG. That is,
The pulse signal input from the clock pulse generation circuit 3 is output only during the time Tt when the comparison signal S2 output from the comparator 7c is in the state of the logical value 1. The counting means CMc counts the number of pulses Ft generated within the time Tt. This pulse number Ft can be expressed as the following equation.

Ft = [(Vt−V1) / (A · Ts)] The output Fref of the first to third counter circuits 9a to 9c,
Fm and Ft are held during one cycle T0 of the output of the integration circuit 1. One cycle of the output of the integration circuit 1 ends, and the integration circuit 1
When the output voltage V of the triangular waveform becomes 0, the output of the counter circuit 9 is reset to 0. Note that, in this example, a third counter 10c is configured by the third comparator 7c and the third counter circuit 9c.

Arithmetic circuit 11 composed of a gate array
'Calculates Fm / Fref and Ft / Fref. As a result, an A / D conversion error caused by the parameter A of the integration circuit 1 and the cycle Ts of the clock pulse generation circuit 3 is eliminated. This is the same as the output processing of the semiconductor pressure sensor according to the embodiment shown in FIG. When the characteristics of the semiconductor pressure sensor 6 vary as a function of temperature, Fm / Fref also becomes a function of temperature. Since Ft / Fref corresponds to temperature, such a temperature dependency can be compensated by using Ft / Fref so that the digital conversion value of the pressure sensor does not change with temperature. Especially in a narrow temperature range, Ft / Fre
Since both f and Fm / Fref are linear functions with respect to temperature change, Fm / Fref ± k × Ft / Fref or k × Fm
The temperature compensation can be realized in the form of / Fref ± Ft / Fref.

[0029]

According to the present invention, the count operation is performed by the first and second counters using the output of one common integrator and the output of the clock pulse generator, and Fm / Fref or Fm / Fref is calculated by the arithmetic circuit. To divide Fref / Fm,
An error or variation in output caused by the common integrator and clock pulse generator can be removed by a division operation. Therefore, even if an integrating circuit and a clock pulse generating circuit composed of analog circuits are used, it is possible to reduce variations in the output of the A / D converter caused by the configuration of both circuits and the components used.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an example of an embodiment of a semiconductor pressure sensor device using an A / D converter of the present invention.

2 (A) to 2 (E) are diagrams showing output waveforms of each unit in FIG. 1;

FIG. 3 is a block diagram showing a configuration of an example of a second embodiment of a semiconductor pressure sensor device using an A / D converter according to the present invention.

4 (A) to 4 (E) are diagrams showing output waveforms of each unit in FIG. 3;

[Explanation of symbols]

 Reference Signs List 1 integration circuit 3 clock circuit 5 reference voltage circuit 6 pressure sensor SW1, SW2, SW3 switch 7a to 7c first to third comparators 9a to 9c first to third counter circuits 10a to 10c first to third counters 11 arithmetic circuit 13 temperature sensor

Claims (4)

[Claims] An integrated circuit configured to perform an integration operation by an analog circuit; a clock pulse generation circuit configured to generate a clock pulse of a predetermined cycle configured by an analog circuit without using a crystal oscillator; A first reference voltage V1 and a reference voltage generation circuit for generating a second reference voltage higher than the first reference voltage; an output of the integration circuit, an output of the clock pulse generation circuit, and a reference voltage generation circuit. With the output as an input, the clock pulse output from the clock pulse generation circuit between the time when the output of the integration circuit exceeds the predetermined first reference voltage V1 and the time when the output reaches the second reference voltage V2 A first count means for counting the number Fref, and an output of the integration circuit, which is a target of digital conversion smaller than the second reference voltage V2. With the analog voltage Vm and the output of the reference voltage generation circuit as inputs, the clock pulse is generated between the time when the output of the integration circuit exceeds the predetermined first reference voltage V1 and the time when the output reaches the analog voltage Vm. A second counter for counting the number Fm of the clock pulses output from the circuit; and a value Fm / Fref obtained by dividing a count value Fm counted by the second counter by a count value Fref counted by the first counter. Or a value Fref / Fm obtained by dividing the count value Fref counted by the first counter by the count value Fm counted by the second counter.
Multiplied by a coefficient k (Fm / Fref) × k or (Fr
ef / Fm) × k, and an arithmetic circuit comprising a gate array for outputting the analog voltage Vm as a digital conversion value. 2. An analog output voltage V of a semiconductor pressure sensor.
A semiconductor pressure sensor device including an A / D converter that converts m into a digital value and outputs the digital value, wherein the A / D converter is configured by an analog circuit and performs an integration operation; A clock pulse generating circuit which is constituted by an analog circuit without using a clock signal and generates a clock pulse having a predetermined period; a first reference voltage V1, a predetermined first reference voltage, and the expected analog output voltage A reference voltage generation circuit for generating a second reference voltage higher than the maximum value of Vm; and an output of the integration circuit, an output of the clock pulse generation circuit, and an output of the reference voltage generation circuit, and The output from the clock pulse generation circuit during a period from when the output exceeds the predetermined first reference voltage V1 to when the output reaches the second reference voltage V2. A first counter that counts the number of lock pulses Fref, and an output of the integration circuit, the analog output voltage Vm, and an output of the reference voltage generation circuit. A second counter that counts the number Fm of the clock pulses output from the clock pulse generation circuit during a period from when the reference voltage V1 exceeds the analog output voltage Vm, and counting by the second counter. The value Fm / Fref obtained by dividing the counted value Fm thus obtained by the count value Fref counted by the first counter or the count value Fref counted by the first counter is divided by the count value Fm counted by the second counter. Value Fref / Fm
Multiplied by a coefficient k (Fm / Fref) × k or (Fr
ef / Fm) × k, and an arithmetic circuit comprising a gate array that outputs a digital conversion value of the analog output voltage Vm. 3. An analog output voltage V of a semiconductor pressure sensor.
A semiconductor pressure sensor device including an A / D converter that converts m into a digital value and outputs the digital value, wherein the A / D converter is configured by an analog circuit and performs an integration operation; A clock pulse generating circuit which is constituted by an analog circuit without using a clock signal and generates a clock pulse having a predetermined period; a first reference voltage V1, a predetermined first reference voltage, and the expected analog output voltage A reference voltage generation circuit that generates a second reference voltage higher than the maximum value of Vm; a temperature sensor that measures a temperature of the semiconductor pressure sensor and outputs a measurement result as a voltage value; an output of the integration circuit; With the output of the clock pulse generation circuit and the output of the reference voltage generation circuit as inputs, after the output of the integration circuit exceeds the predetermined first reference voltage V1, A first counter that counts the number Fref of the clock pulses output from the clock pulse generation circuit until the reference voltage V2 reaches 2. The output of the integration circuit, the analog output voltage Vm, and the reference voltage With the output of the generation circuit as an input, the clock pulse generation circuit outputs the output of the integration circuit from the clock pulse generation circuit until the output of the integration circuit exceeds the predetermined first reference voltage V1 and reaches the analog output voltage Vm. A second counter that counts the number Fm of clock pulses, and an output of the integration circuit, an output of the clock pulse generation circuit, and an output voltage of the temperature sensor as inputs, and the output of the integration circuit is the first counter. From the clock pulse generating circuit during a period from when the reference voltage V1 exceeds the reference voltage V1 to when the output voltage of the temperature sensor reaches the output voltage. A third counter for counting the number Ft of the clock pulses to be obtained; and a coefficient Fm / Fref obtained by dividing a count value Fm counted by the second counter by a count value Fref counted by the first counter. (Fm /
Fref) × k, the value Ft counted by the third counter is replaced by the count value F counted by the first counter.
a semiconductor pressure sensor device comprising: an arithmetic circuit including a gate array that corrects using the value Ft / Fref divided by ref and outputs the result as a digital conversion value of the analog output voltage Vm. 4. The arithmetic circuit according to claim 1, wherein the value (Fm / Fre
4. The semiconductor pressure sensor device according to claim 3, wherein a value obtained by adding / subtracting the value Ft / Fref to f) × k is output as the digital conversion value. 5.