JP5133441B2 - Game machine - Google Patents

Description

  The present invention includes a variable display device capable of variably displaying identification information, and can control to a specific gaming state advantageous to a player when the identification information displayed as a display result on the variable display device is in a specific display mode. It relates to gaming machines such as pachinko machines.

  As a gaming machine, a game medium such as a game ball is launched into a game area by a launching device, and when a game medium wins a prize area such as a prize opening provided in the game area, a predetermined number of prize balls are paid out to the player. There is something to be done. Furthermore, there is provided a variable display unit capable of changing the display state, and configured to give a predetermined game value to the player when the display result of the variable display unit is in a predetermined specific display mode. is there.

  Note that the game value is the right that the state of the variable winning ball device provided in the gaming area of the gaming machine is advantageous for a player who is likely to win a ball, or the advantageous state for a player. In other words, or a condition for winning a prize ball is easily established.

  In a pachinko gaming machine, a combination of a predetermined display mode with a display result of a variable display unit that displays a special symbol is usually referred to as “big hit”. When the big hit occurs, for example, the big winning opening is opened a predetermined number of times, and the game shifts to a big hit gaming state where the hit ball is easy to win. And in each open period, if there is a prize for a predetermined number (for example, 10) of the big prize opening, the big prize opening is closed. And the number of times the special winning opening is opened is fixed to a predetermined number (for example, 16 rounds). An opening time (for example, 29.5 seconds) is determined for each opening, and even if the number of winnings does not reach a predetermined number, the big winning opening is closed when the opening time elapses. Further, when a predetermined condition (for example, winning in the V zone provided in the big prize opening) is not established at the time when the big prize opening is closed, the big hit gaming state is ended.

  In addition, in the variable display device, the symbols other than the symbol that becomes the final stop symbol (for example, the middle symbol in the left, middle, and right symbols) are continuously stopped for a predetermined time, stopped, swung, and enlarged in a state that matches the specific display mode. The possibility of big hits continues before the final result is displayed due to a reduced or deformed state, or multiple symbols changing synchronously with the same symbol, or the position of the display symbol changing. An effect performed in a state in which the player is in a state (hereinafter, these states are referred to as reach states) is referred to as reach effect. A variable display including a reach effect is referred to as a reach variable display. In the reach state, the interest of the game is enhanced by making the variation pattern different from the variation pattern in the normal state. Then, when the display result of the symbols variably displayed on the variable display device does not satisfy the condition for reaching the reach state, the state is “missed” and the variable display state is terminated. The player plays the game while enjoying how to generate the big hit.

  The game progress in the gaming machine is controlled by game control means such as a microcomputer. The identification information, character image, and background image displayed on the variable display unit are controlled by a video display processor (VDP) that generates image data in accordance with instructions from the microcomputer and transfers the image data to the variable display unit side. The program capacity of the microcomputer is large.

  Therefore, it is impossible to control the identification information displayed on the variable display unit by the microcomputer of the game control means having a limited program capacity, and the display control microcomputer is different from the microcomputer of the game control means. The symbol control board carrying the display control means is installed. The game control means for controlling the progress of the game needs to transmit a display control command to the display control means.

  When the payout control means for controlling the prize ball payout is mounted on a payout control board different from the main board on which the game control means is mounted, the progress of the game is performed by the game control means mounted on the main board. Since it is controlled, the number of winning balls based on winning is determined by the game control means and transmitted to the payout control board. On the other hand, the rental of game media is irrelevant to the progress of the game, and is generally controlled by the payout control means without going through the game control means.

  As described above, various control means are mounted on the gaming machine in addition to the game control means. Then, the game control means for controlling the progress of the game transmits each command indicating an operation instruction according to the game situation to each control means mounted on each control board. Hereinafter, the game control means and other control means may be referred to as electrical component control means, and the board on which the electrical component control means is mounted may be referred to as an electrical component control board.

  In general, each electrical component control means includes a microcomputer. That is, a program is stored in a ROM or the like, and data temporarily generated for control or data that changes as control proceeds is stored in the RAM. Then, when the power supply stop state due to a power failure or the like occurs in the gaming machine, the data in the RAM is lost. Therefore, when recovering from a power outage or the like, the player must return to the initial state (for example, the state when the game machine was first turned on at the game store for the first time in the day), which may cause a disadvantage to the player. There is. For example, if the power supply stop state occurs during the jackpot game and the gaming machine returns to the initial state, the player cannot enjoy the profit based on the jackpot occurrence.

  There is a gaming machine that can restore the control state so that even if the power supply stop state occurs, there is no disadvantage to the player. In such a gaming machine as well, the game control means transmits a control signal for designating the initial screen to the display control means, so that control for causing the variable display device to display the initial screen after the start of power supply is performed. Is called. However, because the initial screen is composed of a plurality of identification information, the control for displaying the initial screen cannot be performed quickly, and such control becomes complicated and unstable. There is a fear.

  Therefore, the present invention provides a gaming machine that can display an initial screen on a variable display device by simple control, and can speed up and stabilize the control for displaying the initial screen. Objective.

  The gaming machine according to the present invention includes a variable display device (for example, a variable display device 9) capable of variably displaying identification information, and when the identification information displayed as a display result on the variable display device has a specific display mode. A gaming machine that can be controlled to a specific gaming state advantageous to the player, and the display control means (for example, the display control CPU 101) for controlling the variable display device and the power supply to the gaming machine are stopped. Also, for a predetermined period (for example, a period in which power is supplied from the capacitor 916 serving as a backup power source), it has a variable data storage means (for example, the RAM 55) capable of holding the stored contents, and controls the progress of the game. A game control means (for example, CPU 56) for sending a command to the display control means according to the progress of the game and a command according to the progress of the game A game control means, a power supply monitoring means for outputting a detection signal based on a drop in power supply voltage used in the gaming machine, and an initialization operation means for outputting an operation signal in response to an operation. According to the input of the detection signal from the monitoring means, processing for setting the backup flag in the fluctuation data storage means, and creating check data used to determine whether or not the storage contents of the fluctuation data storage means are normal, the fluctuation data storage When a power-off process including a process to be stored in the means and a process for prohibiting access to the fluctuation data storage means is executed and power supply is started, an operation signal is input from the initialization operation means In this case, an initialization process for initializing the storage contents of the variation data storage means is executed, and when the power supply is started, the operation signal from the initialization operation means is not input. In this case, it is determined whether or not the backup flag is set in the variable data storage means. If it is determined that the backup flag is not set, initialization processing is executed, and the backup flag is set in the variable data storage means. If it is determined that it is set, it is determined whether or not the storage content of the fluctuation data storage means is normal based on the check data stored in the fluctuation data storage means, and the storage content of the fluctuation data storage means is normal If it is determined that the stored data of the fluctuation data storage means is normal, the control state is changed to the state when the power is turned off based on the storage contents of the fluctuation data storage means. When the recovery process is performed to return to the power supply and the recovery process is executed at the start of power supply (for example, when the process shown in FIG. (For example, the control command shown in FIG. 13, FIG. 15 to FIG. 19, FIG. 21, and FIG. 22) and the initialization process is executed at the start of power supply (eg, the process shown in FIG. An initialization command (for example, a special symbol power-on designation command) is transmitted when not performed.

  According to the present invention, it is possible to perform an initial display operation at the start of power supply by simple control, and it is possible to speed up and stabilize the initial display operation at the start of power supply.

It is the front view which looked at the pachinko game machine from the front. It is a front view which shows the front surface of the game board in the state which removed the glass door frame. It is the rear view which looked at the gaming machine from the back. It is a block diagram which shows the circuit structural example of a game control board (main board). It is a block diagram which shows the circuit structural example of a symbol control board. It is a block diagram which shows the circuit structure in a lamp control board. It is a block diagram which shows the circuit structural example of a power supply board. It is a block diagram which shows one structural example of CPU periphery for a power supply monitoring and a power supply backup. It is a flowchart which shows the main process which CPU in a main board | substrate performs. It is explanatory drawing which shows an example of the relationship between a backup flag and whether to perform a game state restoration process. It is explanatory drawing which shows the example of the command transmission table at the time of initialization. It is a flowchart which shows a game state restoration process. It is explanatory drawing which shows the example of the command transmission table at the time of backup. It is explanatory drawing which shows the example of the command selection table at the time of a special symbol backup. It is explanatory drawing which shows the example of a standby backup command transmission table. It is explanatory drawing which shows the example of the backup command transmission table at the time of a fluctuation | variation. It is explanatory drawing which shows the example of the backup command transmission table before big winning opening. It is explanatory drawing which shows the example of the backup command transmission table during a big winning opening. It is explanatory drawing which shows the example of the backup command transmission table at the time of jackpot completion. It is explanatory drawing which shows the example of the command selection table at the time of a normal symbol backup. It is explanatory drawing which shows the example of the backup command transmission table at the time of a normal symbol change. It is explanatory drawing which shows the example of the backup command transmission table at the time of a normal symbol stop. It is a flowchart which shows a 2 ms timer interruption process. It is explanatory drawing which shows each random number. It is a flowchart which shows a non-maskable interruption process (process at the time of an electric power supply stop). It is a timing diagram which shows the mode of the power supply fall and NMI signal at the time of the electric power supply stop to a game machine. It is explanatory drawing which shows an example of a left middle right design. It is a flowchart which shows special symbol process processing It is a flowchart which shows the process which determines that the hit ball won the start winning opening. It is a flowchart which shows the process which determines the stop symbol of variable display, and the process which determines a fluctuation pattern. It is a flowchart which shows the process of jackpot determination. It is explanatory drawing which shows the signal line of a display control command. It is explanatory drawing which shows one structural examples, such as a command transmission table. It is explanatory drawing which shows an example of the command form of a control command. It is a timing diagram showing the relationship between an 8-bit control signal and an INT signal constituting a control command. It is explanatory drawing which shows an example of the content of a display control command. It is explanatory drawing which shows an example of the content of a lamp control command. It is a flowchart which shows the process example of a command set process. It is a flowchart which shows a command transmission process routine. It is a flowchart which shows the main process which CPU for display control performs. It is a flowchart which shows a timer interruption process. It is explanatory drawing which shows the structure of a command reception buffer. It is a flowchart which shows a command reception interruption process. It is a flowchart which shows a command analysis process. It is explanatory drawing which shows the example of a response | compatibility with the EXT data of a fluctuation pattern command, and a fluctuation pattern table. It is explanatory drawing which shows the example of a fluctuation pattern table. It is a flowchart which shows a display control process process. It is a flowchart which shows the display control command reception waiting process of a display control process process. It is a flowchart which shows the display control command reception waiting process of a display control process process. It is a flowchart which shows the fluctuation pattern table setting process of a display control process. It is explanatory drawing which shows the example of the state by which the fluctuation pattern command etc. were set to the command transmission table. It is a flowchart which shows all the design variation start processes of a display control process process. It is a flowchart which shows the process during symbol change of a display control process process. It is a flowchart which shows all the symbol stop waiting processes of a display control process. It is a flowchart which shows the jackpot display process of a display control process process. It is a flowchart which shows the main process which CPU for lamp control performs. It is a flowchart which shows the timer interruption process which CPU for lamp control performs. It is explanatory drawing which shows the lamp data in the address map of ROM mounted in the lamp control board. It is a flowchart which shows a command execution process.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
First, the overall configuration of a first type pachinko gaming machine that is an example of a gaming machine will be described. FIG. 1 is a front view of a pachinko gaming machine as viewed from the front, and FIG. 2 is a front view showing the front of the game board.

  The pachinko gaming machine 1 includes an outer frame (not shown) formed in a vertically long rectangular shape, and a game frame attached to the inside of the outer frame so as to be opened and closed. Further, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape that is provided in the game frame so as to be opened and closed. The game frame includes a front frame (not shown) installed to be openable and closable with respect to the outer frame, a mechanism plate to which mechanism parts and the like are attached, and various parts attached to them (excluding a game board described later). Is a structure including

  As shown in FIG. 1, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2 is a hitting ball supply tray (upper plate) 3. Under the hitting ball supply tray 3, an extra ball receiving tray 4 for storing game balls that cannot be accommodated in the hitting ball supply tray 3 and a hitting operation handle (operation knob) 5 for firing the hitting ball are provided. A game board 6 is detachably attached to the back surface of the glass door frame 2. The game board 6 is a structure including a plate-like body constituting the game board 6 and various components attached to the plate-like body. A game area 7 is formed on the front surface of the game board 6.

  Near the center of the game area 7, a variable display device (special variable display section) 9 including a plurality of variable display sections each variably displaying a symbol as identification information is provided. The variable display device 9 has, for example, three variable display portions (symbol display areas) of “left”, “middle”, and “right”. Below the variable display device 9, a variable winning ball device 15 is provided as a start winning port 14. The winning ball that has entered the start winning opening 14 is guided to the back of the game board 6 and detected by the start opening switch 14a. A variable winning ball device 15 that opens and closes is provided below the start winning opening 14. The variable winning ball device 15 is opened by a solenoid 16.

  An open / close plate 20 that is opened by a solenoid 21 in a specific gaming state (big hit state) is provided below the variable winning ball device 15. The opening / closing plate 20 is a means for opening and closing the special winning opening. Of the winning balls guided from the opening / closing plate 20 to the back of the game board 6, the winning ball entering one (V winning area) is detected by the V winning switch 22, and the winning ball from the opening / closing plate 20 is detected by the count switch 23. Is done. On the back of the game board 6, a solenoid 21A for switching the route in the special winning opening is also provided. Also, at the bottom of the variable display device 9, a special symbol start memory display (hereinafter referred to as a start memory display) 18 using four LEDs for displaying the number of effective winning balls that have entered the start winning opening 14, that is, the start memory number. Is provided. Every time there is a valid start prize, the start memory display 18 increases the number of LEDs to be turned on by one. Each time variable display of the variable display device 9 is started, the number of LEDs to be lit is reduced by one.

  When a game ball wins the gate 32 and is detected by the gate switch 32a, a predetermined random number value is extracted if the normal symbol start memory has not reached the upper limit. And if it is a state which can start the variable display in which a display state changes in the normal symbol display 10, the variable display of the display of the normal symbol display 10 will be started. If the normal symbol display 10 is not ready to start variable display whose display state changes, the value of the normal symbol start memory is incremented by one. In the vicinity of the normal symbol display 10, a normal symbol start memory display 41 having a display unit with four LEDs for displaying the number of normal symbol start memories is provided. Each time there is a prize at the gate 32, the normal symbol start memory display 41 increases the number of LEDs to be turned on by one. Each time variable display on the normal symbol display 10 is started, the number of LEDs to be lit is reduced by one. The special symbol and the normal symbol can be variably displayed on one variable display device. In that case, the special variable display unit and the normal variable display unit are realized by one variable display device.

  In this embodiment, the left and right lamps (designs can be visually recognized when lit) are alternately lit to perform variable display, and the variable display continues for a predetermined time (for example, 29 seconds). If the left lamp is turned on at the end of the variable display, it is a win. Whether or not to win is determined by whether or not the value of the random number extracted when the game ball wins the gate 32 matches a predetermined hit determination value. When the display result of the variable display on the normal symbol display 10 is a win, the variable winning ball apparatus 15 is opened for a predetermined number of times for a predetermined time so that the game ball is likely to win. That is, the state of the variable winning ball device 15 changes from a disadvantageous state to a player's advantageous state when the normal symbol is a winning symbol.

  Further, in the probability variation state, the probability that the stop symbol in the normal symbol display 10 becomes a winning symbol is increased, and one or both of the opening time and the number of times of opening of the variable winning ball device 15 are increased. It becomes even more advantageous. Further, in a predetermined state such as a probability change state, the variable display period (fluctuation time) in the normal symbol display 10 may be shortened, which may be more advantageous for the player.

  The gaming board 6 is provided with a plurality of winning holes 29, 30, 33, 39, and winning of the game balls to the winning holes 29, 30, 33 is detected by winning hole switches 29a, 30a, 33a, 39a, respectively. The Decorative lamps 25 blinking during the game are provided around the left and right sides of the game area 7, and an outlet 26 for absorbing a hit ball that has not won a prize is provided below. Two speakers 27 that emit sound effects are provided on the left and right upper portions outside the game area 7. On the outer periphery of the game area 7, a top frame lamp 28a, a left frame lamp 28b, and a right frame lamp 28c are provided. Further, a decoration LED is installed around each structure (such as a big prize opening) in the game area 7. The top frame lamp 28a, the left frame lamp 28b, the right frame lamp 28c, and the decoration LED are examples of a decorative light emitter provided in the gaming machine.

  In this example, a prize ball lamp 51 that is turned on when there is a remaining number of prize balls is provided in the vicinity of the left frame lamp 28b, and a ball that is turned on in the vicinity of the top frame lamp 28a when the supply ball is cut. A cut lamp 52 is provided. Further, FIG. 1 also shows a card unit 50 that is installed adjacent to the pachinko gaming machine 1 and enables lending of a ball by inserting a prepaid card.

  The card unit 50 has a usable indicator lamp 151 indicating whether or not it is in a usable state, and when the remaining amount information recorded in the card has a fraction (a number less than 100 yen), the fraction is indicated as a hitting tray. 3, a fraction display switch 152 for displaying on a frequency display LED provided in the vicinity of 3, a connecting table direction indicator 153 indicating which side of the pachinko gaming machine 1 corresponds to the card unit 50, in the card unit 50 Check the card insertion indicator lamp 154 indicating that a card is inserted, the card insertion slot 155 into which a card as a recording medium is inserted, and the mechanism of the card reader / writer provided on the back of the card insertion slot 155. In some cases, a card unit lock 156 is provided for releasing the card unit 50.

  The game balls launched from the hit ball launching device enter the game area 7 through the hit ball rail, and then descend the game area 7. When the hit ball enters the start winning opening 14 and is detected by the start opening switch 14a, the variable display device 9 starts variable display (variation) if the variable display of the symbol can be started. If the variable display of the symbol cannot be started, the start memory number is increased by one.

  The variable display of the special symbol on the variable display device 9 stops when a certain time has elapsed. If the combination of the special symbols at the time of the stop is a jackpot symbol (specific display mode), the game shifts to a jackpot gaming state. That is, the opening / closing plate 20 is opened until a predetermined time elapses or a predetermined number (for example, 10) of hit balls wins. When the hit ball enters the V winning area while the opening / closing plate 20 is opened and is detected by the V winning switch 22, a continuation right is generated and the opening / closing plate 20 is opened again. The generation of the continuation right is allowed a predetermined number of times (for example, 15 rounds).

  When the combination of special symbols in the variable display device 9 at the time of stopping is a combination of jackpot symbols (probability variation symbols) with probability fluctuations, the probability of the next jackpot increases. That is, it becomes a more advantageous state for the player in the probability variation state.

  Next, the structure of the back surface of the pachinko gaming machine 1 will be described with reference to FIG. FIG. 3 is a rear view of the gaming machine as seen from the back side.

  As shown in FIG. 3, on the back side of the gaming machine, a game control board (main board) 31 on which a variable display control unit 49 including a symbol control board 80 for controlling the variable display device 9, a game control microcomputer, and the like are mounted. Is installed. In addition, a payout control board 37 on which a payout control microcomputer for performing ball payout control is mounted is installed. Further, various decoration LEDs provided on the game board 6, start memory display 18 and normal symbol start memory display 41, decoration lamp 25, top frame lamp 28a provided on the frame side, left frame lamp 28b, right A lamp control board 35 on which lamp control means for controlling lighting of the frame lamp 28c, the prize ball lamp 51 and the ball break lamp 52 is mounted, and a sound control board 70 on which sound control means for controlling sound generation from the speaker 27 are also mounted. Is provided. In addition, a power supply board 910 and a launch control board 91 on which a power supply circuit for generating DC30V, DC21V, DC12V, and DC5V is mounted are provided.

  On the back side of the gaming machine, a terminal board 160 provided with terminals for outputting various information to the outside of the gaming machine is installed above. The terminal board 160 has at least a ball break terminal for introducing and outputting an output of the ball break detection switch, an award ball terminal for outputting the award ball number signal to the outside, and a ball lending number signal externally output. A ball lending terminal is provided. In addition, an information terminal board 34 having terminals for outputting various information from the main board 31 to the outside of the gaming machine is installed near the center.

  Further, backup data stored in storage content holding means (for example, variable data storage means that can hold the contents even when power supply is stopped, that is, a backup RAM) included in each board (main board 31 and payout control board 37). There is provided a switch board 190 on which a clear switch 921 is mounted as an operation means for clearing. The switch board 190 is provided with a clear switch 921 and a connector 922 connected to another board such as the main board 31.

  The game balls stored in the storage tank 38 pass through the guide rail and reach the ball payout device covered with the prize ball case 40A. A ball break switch 187 as a game medium break detection means is provided on the upper part of the ball payout device. When the ball break switch 187 detects a ball break, the dispensing operation of the ball dispensing device stops. The ball break switch 187 is a switch for detecting the presence or absence of a game ball in the game ball passage, but the ball break detection switch 167 for detecting the shortage of supply balls in the storage tank 38 is also an upstream portion of the guide rail (in the storage tank 38). (Proximate part). When the ball break detection switch 167 detects the shortage of game balls, the game machine is replenished to the game machine from the supply mechanism provided on the gaming machine installation island.

  A large number of game balls as prizes based on winning prizes and game balls based on ball lending requests are paid out to fill the hitting ball supply tray 3, and when the game balls are further paid out, the game balls are guided to the surplus ball receiving tray 4. When the game ball is further paid out, a full switch 48 (not shown in FIG. 3) is turned on. In this state, the rotation of the payout motor in the ball payout device stops, the operation of the ball payout device stops, and the drive of the launching device also stops.

  FIG. 4 is a block diagram illustrating an example of a circuit configuration in the main board 31. 4 also shows a payout control board 37, a lamp control board 35, a sound control board 70, a launch control board 91, and a symbol control board 80. The main board 31 includes a basic circuit 53 for controlling the pachinko gaming machine 1 according to a program, a gate switch 32a, a start port switch 14a, a V winning switch 22, a count switch 23, winning port switches 29a, 30a, 33a, 39a, A switch circuit 58 for supplying signals from the tongue switch 48, the ball break switch 187, the prize ball count switch 301A and the clear switch 921 to the basic circuit 53, a solenoid 16 for opening and closing the variable winning ball apparatus 15, and a solenoid for opening and closing the opening and closing plate 20. 21 and a solenoid circuit 59 for driving a solenoid 21A for switching a route in the special winning opening in accordance with a command from the basic circuit 53 is mounted.

  Although not shown in FIG. 4, the count switch short circuit signal is also transmitted to the basic circuit 53 via the switch circuit 58. Further, the gate switch 32a, the start port switch 14a, the V winning switch 22, the count switch 23, the winning port switches 29a, 30a, 33a, 39a, the full switch 48, the ball running switch 187, the winning ball count switch 301A, etc. Also, what is called a sensor may be used. That is, the name of the game medium detection means is not limited as long as it is a game medium detection means (game ball detection means in this example) that can detect a game ball. What is called a switch may be what is called a sensor, that is, that the switch is an example of a game medium detecting unit, as in other embodiments.

  Further, according to the data given from the basic circuit 53, the jackpot information indicating the occurrence of the jackpot, the effective starting information indicating the number of starting winning balls used for starting the variable display of the symbols in the variable display device 9, the probability variation has occurred. An information output circuit 64 for outputting an information output signal such as probability variation information indicating the above to an external device such as a hall computer is mounted.

  The basic circuit 53 includes a ROM 54 for storing a game control program and the like, a RAM 55 as storage means (means for storing variation data) used as a work memory, a CPU 56 for performing control operations according to the program, and an I / O port unit 57. including. In this embodiment, the ROM 54 and RAM 55 are built in the CPU 56. That is, the CPU 56 is a one-chip microcomputer. The one-chip microcomputer only needs to incorporate at least the RAM 55, and the ROM 54 and the I / O port unit 57 may be externally attached or built-in.

  Further, a part or all of the RAM (may be a CPU built-in RAM) 55 is a backup RAM that is backed up by a backup power source created in the power supply substrate 910. That is, even if the power supply to the gaming machine is stopped, a part or all of the contents of the RAM 55 is saved for a predetermined period.

  A ball hitting device for hitting and launching a game ball is driven by a drive motor 94 controlled by a circuit on the launch control board 91. Then, the driving force of the drive motor 94 is adjusted according to the operation amount of the operation knob 5. That is, the circuit on the firing control board 91 is controlled so that the hit ball is fired at a speed corresponding to the operation amount of the operation knob 5.

  In this embodiment, the lamp control means mounted on the lamp control board 35 performs display control of the start memory display 18, the normal symbol start memory display 41 and the decoration lamp 25 provided on the game board. The display control of the top frame lamp 28a, the left frame lamp 28b, the right frame lamp 28c, the prize ball lamp 51 and the ball-out lamp 52 provided on the frame side is performed. Each lamp may be an LED or other types of light emitters, and the LEDs used in this embodiment and other embodiments may be other types of light emitters. That is, a lamp or LED is an example of a light emitter. In addition, display control of the variable display device 9 for variably displaying the special symbol and the normal symbol display 10 for variably displaying the normal symbol is performed by display control means mounted on the symbol control board 80.

  FIG. 5 shows the circuit configuration in the symbol control board 80, LCD (liquid crystal display device) 82, which is one example of realization of the variable display device 9, the normal symbol display 10, and the output ports (ports 0 and 2) of the main board 31. It is a block diagram shown with 570,572 and output buffer circuit 620,62A. The output port (output port 2) 572 outputs 8-bit data, and the output port 570 outputs a 1-bit strobe signal (INT signal).

  The display control CPU 101 operates in accordance with a program stored in the control data ROM 102. When an INT signal is input from the main board 31 via the noise filter 107 and the input buffer circuit 105B, display control is performed via the input buffer circuit 105A. Receive commands. As the input buffer circuits 105A and 105B, for example, general-purpose ICs 74HC540 and 74HC14 can be used. When the display control CPU 101 does not have an I / O port, an I / O port is provided between the input buffer circuits 105A and 105B and the display control CPU 101.

  Then, the display control CPU 101 performs display control of the screen displayed on the LCD 82 in accordance with the received display control command. Specifically, a command according to the display control command is given to a VDP (video display processor) 103. The VDP 103 reads out necessary data from the character ROM 86. The VDP 103 generates image data to be displayed on the LCD 82 according to the input data, and outputs R, G, B signals and a synchronization signal to the LCD 82.

  5 also shows a reset circuit 83 for resetting the VDP 103, an oscillation circuit 85 for supplying an operation clock to the VDP 103, and a character ROM 86 for storing frequently used image data. The frequently used image data stored in the character ROM 86 is, for example, a person, animal, or an image made up of characters, figures, symbols, or the like displayed on the LCD 82.

  The input buffer circuits 105A and 105B can pass signals only in the direction from the main board 31 toward the symbol control board 80. Therefore, there is no room for signals to be transmitted from the symbol control board 80 side to the main board 31 side. That is, the input buffer circuits 105A and 105B constitute irreversible information input means together with the input ports. Even if the tampering is added to the circuit in the symbol control board 80, the signal output by the tampering is not transmitted to the main board 31 side.

  For example, a three-terminal capacitor or a ferrite bead is used as the noise filter 107 that cuts off the high-frequency signal. However, even if noise is added between the substrates due to the presence of the noise filter 107, the influence is eliminated. . A noise filter may also be provided on the output side of the buffer circuits 620 and 62A of the main board 31.

  FIG. 6 is a block diagram showing signal transmission / reception portions in the main board 31 and the lamp control board 35. In this embodiment, the dot frame lamp 28a, the left frame lamp 28b, the right frame lamp 28c provided on the outside of the game area 7 and the decoration lamp 25 provided on the game board are turned on / off, and a prize ball lamp. 51 and a lamp control command indicating turning on / off of the ball-out lamp 52 are output from the main board 31 to the lamp control board 35. A lamp control command indicating the number of lighting of the start memory display 18 and the normal symbol start memory display 41 is also output from the main board 31 to the lamp control board 35.

  As shown in FIG. 6, the lamp control command related to the lamp control is output from the output ports (output ports 0 and 3) 570 and 573 of the I / O port unit 57 in the basic circuit 53. The output port (output port 3) 573 outputs 8-bit data, and the output port 570 outputs a 1-bit INT signal. In the lamp control board 35, a control command from the main board 31 is input to the lamp control CPU 351 via the input buffer circuits 355A and 355B. When the lamp control CPU 351 does not include an I / O port, an I / O port is provided between the input buffer circuits 355A and 355B and the lamp control CPU 351.

  In the lamp control board 35, the lamp control CPU 351 performs the ceiling frame lamp according to the lighting / extinguishing pattern of the ceiling frame lamp 28a, the left frame lamp 28b, the right frame lamp 28c, and the decoration lamp 25 defined according to each control command. 28a, left frame lamp 28b, right frame lamp 28c, and decorative lamp 25 are turned on / off. The on / off signal is output to the top frame lamp 28a, the left frame lamp 28b, the right frame lamp 28c, and the decoration lamp 25. The on / off pattern is stored in the built-in ROM or external ROM of the lamp control CPU 351.

  In the main board 31, the CPU 56 outputs a control command for instructing the lighting of the prize ball lamp 51 when there is an unpaid prize ball remaining in the stored contents of the RAM 55, and is installed upstream of the payout ball passage on the back of the game board. When the off-ball switch 187 (see FIG. 3) is no longer detecting a game ball, a control command for instructing lighting of the off-ball lamp 52 is output. In the lamp control board 35, each control command is input to the lamp control CPU 351 via the input buffer circuits 355A and 355B. The lamp control CPU 351 turns on / off the prize ball lamp 51 and the ball-out lamp 52 in accordance with these control commands. The on / off pattern is stored in the built-in ROM or external ROM of the lamp control CPU 351.

  Further, the lamp control CPU 351 outputs a turn-on / off signal to the start memory display 18 and the normal symbol start memory display 41 in accordance with the control command.

  As the input buffer circuits 355A and 355B, for example, 74HC540 and 74HC14 which are general-purpose CMOS-ICs are used. The input buffer circuits 355A and 355B can pass signals only in the direction from the main board 31 toward the lamp control board 35. Therefore, there is no room for signals to be transmitted from the lamp control board 35 side to the main board 31 side. Even if unauthorized modification is added to the circuit in the lamp control board 35, the signal output by the unauthorized modification is not transmitted to the main board 31 side. Note that a noise filter may be provided on the input side of the input buffer circuits 355A and 355B.

  In the main board 31, buffer circuits 620 and 63A are provided outside the output ports 570 and 573. As the buffer circuits 620 and 63A, for example, general-purpose CMOS-ICs 74HC250 and 74HC14 are used. According to such a configuration, since a signal input from the outside to the inside of the main board 31 is blocked, it is possible to more reliably eliminate a signal line from which a signal may be given from the lamp control board 35 to the main board 31. be able to. A noise filter may be provided on the output side of the buffer circuits 620 and 63A.

  FIG. 7 is a block diagram illustrating a configuration example of the power supply substrate 910. The power supply board 910 is installed independently of the electric part control boards such as the main board 31, the symbol control board 80, the sound control board 70, the lamp control board 35, and the payout control board 37, and each electric part control board in the gaming machine and Generates voltage used by mechanical components. In this example, AC24V, VSL (DC + 30V), DC + 21V, DC + 12V, and DC + 5V are generated. Further, a capacitor 916 serving as a backup power source, that is, a memory holding means, is charged from a line of power source for driving DC + 5V, that is, an IC on each substrate. Note that VSL is generated by rectifying and boosting AC24V with a rectifier element in the rectifier circuit 912. VSL is a solenoid driving power source.

  The transformer 911 converts AC voltage from the AC power source into 24V. The AC 24V voltage is output to the connector 915. The rectifier circuit 912 also generates a DC voltage of +30 V from AC 24 V and outputs it to the DC-DC converter 913 and the connector 915. The DC-DC converter 913 has one or a plurality of converter ICs 922 (only one is shown in FIG. 7), generates + 21V, + 12V, and + 5V based on VSL and outputs the generated voltages to the connector 915. A relatively large capacitor 923 is connected to the input side of the converter IC 922. Accordingly, when the power supply to the gaming machine from the outside is stopped, the DC voltage such as + 30V, + 12V, + 5V, etc., decreases relatively slowly. The connector 915 is connected to, for example, a relay board, and power of a voltage necessary for each electric component control board and the mechanism component is supplied from the relay board.

  However, each connector reaching each electric component control board may be provided on the power supply board 910 to supply each voltage from the power supply board 910 to each board without going through the relay board. FIG. 7 shows one connector 915 as a representative, but the connector is provided for each electric component control board.

  The + 5V line from the DC-DC converter 913 branches to form a backup + 5V line. A large-capacitance capacitor 916 is connected between the backup + 5V line and the ground level. The capacitor 916 has a storage state with respect to the backup RAM of the electrical component control board when the power supply to the gaming machine is stopped (a RAM that is backed up by power, that is, a backup storage unit that can be in a storage content holding state even when the power supply is stopped). It becomes a backup power supply that supplies power so that it can be maintained. Further, a backflow preventing diode 917 is inserted between the + 5V line and the backup + 5V line. In this embodiment, +5 V for backup is supplied to the main board 31 and the payout control board 37.

  The power supply board 910 is equipped with a power supply monitoring IC 902 as a power supply monitoring circuit. The power monitoring IC 902 detects the occurrence of power supply stoppage to the gaming machine by introducing the VSL voltage and monitoring the VSL voltage. Specifically, when the VSL voltage becomes equal to or lower than a predetermined value (+22 V in this example), a power-off signal is output because power supply is stopped. The power supply voltage to be monitored is preferably higher than the power supply voltage (+5 V in this example) of the circuit element mounted on each electric component control board. In this example, VSL, which is a voltage immediately after being converted from AC to DC, is used. A power-off signal from the power monitoring IC 902 is supplied to the main board 31, the payout control board 37, and the like.

  The predetermined value for the power monitoring IC 902 to detect the stop of power supply is lower than the normal voltage, but is a voltage that allows the CPU on each electrical component control board to operate for a while. Further, the power monitoring IC 902 is configured to monitor a voltage that is higher than a voltage for driving a circuit element such as a CPU (+5 V in this example) and immediately after being converted from AC to DC. Therefore, the monitoring range can be expanded for the voltage required by the CPU. Therefore, more precise monitoring can be performed. Furthermore, when VSL (+ 30V) is used as the monitoring voltage, the voltage supplied to the various switches of the gaming machine is + 12V, so that it can be expected to prevent erroneous switch-on detection at the time of instantaneous power interruption. That is, when the voltage of the + 30V power supply is monitored, it is possible to detect a decrease in the level before + 12V created after the creation of + 30V starts to drop.

  When the voltage of the + 12V power supply decreases, the switch output becomes on. However, if the power supply voltage is monitored by monitoring the + 30V power supply voltage, which decreases faster than + 12V, and the power supply is stopped, the switch output is turned on. It is possible to enter a supply recovery waiting state and not detect the switch output.

  Further, since the power monitoring IC 902 is mounted on the power supply board 910 that is separate from the electrical component control board, a power-off signal can be supplied from the power monitoring circuit to the plurality of electrical component control boards. Even if there are any number of electrical component control boards that require a power-off signal, it is only necessary to provide one power supply monitoring means. Therefore, even if each electrical component control means in each electrical component control board performs recovery control described later. The cost of the gaming machine does not increase so much.

  In the configuration shown in FIG. 7, the detection signal (power cut-off signal) of the power monitoring IC 902 is sent to the respective electric component control boards (for example, the main board 31 and the payout control board 37) via the buffer circuits 918 and 919. For example, a configuration may be adopted in which one detection signal is transmitted to the relay board, and the same signal is distributed from the relay board to each electrical component control board. Further, a buffer circuit corresponding to the number of substrates that require a power-off signal may be provided. Further, regarding the power-off signal output to the main board 31 and the payout control board 37, the monitoring voltage of the power supply monitoring circuit that outputs the power-off signal may be different.

  FIG. 8 is a block diagram illustrating a configuration example around the CPU 56 in the main board 31. As shown in FIG. 8, the power-off signal from the power supply monitoring circuit (power supply monitoring means; first power supply monitoring means) of the power supply board 910 is connected to the non-maskable interrupt terminal (XNMI terminal) of the CPU 56. Therefore, the CPU 56 can confirm the occurrence of the stop of power supply to the gaming machine by the non-maskable interrupt (NMI) process.

  FIG. 8 also shows a system reset circuit 65. When the power is turned on, the reset IC 651 sets the output to a low level for a predetermined time determined by the capacity of the external capacitor, and sets the output to a high level when the predetermined time has elapsed. That is, the reset signal is raised to a high level to make the CPU 56 operable. The reset IC 651 monitors the power supply voltage of VSL, which is the same as the power supply voltage monitored by the power supply monitoring circuit, and the voltage value is lower than a predetermined value (the power supply voltage value at which the power supply monitoring circuit outputs a power-off signal). When the value is less than or equal to, the output is set to low level. Accordingly, the CPU 56 performs a predetermined power supply stop process in response to the power-off signal from the power supply monitoring circuit, and then the system is reset.

  As shown in FIG. 8, the reset signal from the reset IC 651 is input to the NAND circuit 947 and also input to the clear terminal of the counter IC 941 via the inverting circuit (NOT circuit) 944. The counter IC 941 counts the clock signal from the oscillator 943 when the input to the clear terminal becomes low level. The Q5 output of the counter IC 941 is input to the NAND circuit 947 via the NOT circuits 945 and 946. The Q6 output of the counter IC 941 is input to the clock terminal of the flip-flop (FF) 942. The D input of the flip-flop 942 is fixed at a high level, and the Q output is input to an OR circuit (OR circuit) 949. The output of the NAND circuit 947 is introduced into the other input of the OR circuit 949 via the NOT circuit 948. The output of the OR circuit 949 is connected to the reset terminal of the CPU 56. According to such a configuration, since the reset signal (low level signal) is given twice to the reset terminal of the CPU 56 when the power is turned on, the CPU 56 surely starts operation.

  For example, the detection voltage of the power supply monitoring circuit (the voltage that outputs the power-off signal) is + 22V, and the detection voltage for setting the reset signal to low level is + 9V. In such a configuration, since the power supply monitoring circuit and the system reset circuit 65 monitor the voltage of the same power supply VSL, the timing at which the voltage monitoring circuit outputs a power-off signal and the system reset circuit 65 reset the system. It is possible to reliably set the difference in timing for outputting the signal within a desired predetermined period. The desired predetermined period is a period from the start of the power supply stop process in response to the power-off signal from the power supply monitoring circuit until the completion of the power supply stop process.

  The power supply voltage monitored by the power supply monitoring circuit and the system reset circuit 65 may be different. The system reset circuit 65 corresponds to second power supply monitoring means.

  While power is not supplied from the + 5V power source that is the driving power source of the CPU 56 or the like, at least a part of the RAM is backed up by the backup power source supplied from the power supply board, and the contents are preserved even if the power supply to the gaming machine is stopped. Is done. When the +5 V power supply is restored, a reset signal is issued from the system reset circuit 65, so that the CPU 56 returns to a normal operation state. At that time, since necessary data is stored in the backup RAM, it is possible to restore the gaming state at the time of occurrence of a power failure or the like at the time of recovery from the power failure or the like.

  In the configuration shown in FIG. 8, two reset signals (low level signals) are given to the reset terminal of the CPU 56 when the power is turned on, but the reset is reliably released even if the reset signal rises only once. When the CPU is used, the circuit elements denoted by reference numerals 941 to 949 are not necessary. In that case, the output of the reset IC 651 is directly connected to the reset terminal of the CPU 56.

  The CPU 56 used in this embodiment also incorporates an I / O port (PIO) and a timer / counter circuit (CTC). The PIO has 4 bits PB0 to PB3 and 1 byte port PA0 to PA7. The ports PB0 to PB3 and PA0 to PA7 can be set to either input / output.

  Next, the operation of the gaming machine will be described. FIG. 9 is a flowchart showing main processing executed by game control means (CPU 56 and peripheral circuits such as ROM and RAM) in the main board 31. When power is turned on to the gaming machine and the input level of the reset terminal becomes high level, the CPU 56 starts main processing after step S1. In the main process, the CPU 56 first performs necessary initial settings.

  In the initial setting process, the CPU 56 first sets the interrupt prohibition (step S1). Next, the interrupt mode is set to interrupt mode 2 (step S2), and a stack pointer designation address is set to the stack pointer (step S3). Then, the built-in device register is initialized (step S4). Further, after initialization (step S5) of CTC (counter / timer) and PIO (parallel input / output port) which are built-in devices (built-in peripheral circuits), the RAM is set in an accessible state (step S6).

  The CPU 56 used in this embodiment also incorporates an I / O port (PIO) and a timer / counter circuit (CTC). The CTC also includes two external clock / timer trigger inputs CLK / TRG2, 3 and two timer outputs ZC / TO0,1.

  The CPU 56 used in this embodiment is provided with the following three modes as maskable interrupt modes. When a maskable interrupt occurs, the CPU 56 automatically sets the interrupt disabled state and saves the contents of the program counter in the stack.

  Interrupt mode 0: The built-in device that has issued the interrupt request sends an RST instruction (1 byte) or a CALL instruction (3 bytes) onto the internal data bus of the CPU. Therefore, the CPU 56 executes the instruction at the address corresponding to the RST instruction or the address specified by the CALL instruction. At reset, the CPU 56 automatically enters interrupt mode 0. Therefore, when setting to interrupt mode 1 or interrupt mode 2, it is necessary to perform a process for setting to interrupt mode 1 or interrupt mode 2 in the initial setting process.

  Interrupt mode 1: In this mode, when an interrupt is accepted, the mode always jumps to address 0038 (h).

  Interrupt mode 2: A mode in which the address synthesized from the value (1 byte) of the specific register (I register) of the CPU 56 and the interrupt vector (1 byte: least significant bit 0) output by the built-in device indicates the interrupt address It is. That is, the interrupt address is an address indicated by 2 bytes in which the upper address is the value of the specific register and the lower address is the interrupt vector. Therefore, an interrupt process can be set at an arbitrary address (although it is skipped). Each built-in device has a function of sending an interrupt vector when making an interrupt request.

  Therefore, when the interrupt mode 2 is set, it becomes possible to easily process an interrupt request from each built-in device, and it is possible to install an interrupt process at an arbitrary position in the program. . Furthermore, unlike interrupt mode 1, it is also easy to prepare each interrupt process for each interrupt generation factor. As described above, in this embodiment, the CPU 56 is set to the interrupt mode 2 in step S2 of the initial setting process.

  Next, the CPU 56 checks the state of the output signal of the clear switch 921 input via the input port only once (step S7). When the on-state is detected in the confirmation, the CPU 56 executes normal initialization processing (steps S11 to S15). When the clear switch 921 is on (when pressed), a low-level clear switch signal is output. For example, the game store clerk can easily execute the initialization process by starting the power supply to the gaming machine while the clear switch 921 is turned on. That is, RAM clear or the like can be performed.

  If the clear switch 921 is not in the on state, whether or not data protection processing of the backup RAM area (for example, power supply stop processing such as addition of parity data) has been performed when power supply to the gaming machine is stopped Confirm (step S8). In this embodiment, when power supply is stopped, a process for protecting data in the backup RAM area is performed. When such protection processing is performed, it is assumed that there is a backup. When it is confirmed that such protection processing is not performed, the CPU 56 executes initialization processing.

  In this embodiment, whether or not there is backup data in the backup RAM area is confirmed by the state of the backup flag set in the backup RAM area in the power supply stop process. In this example, as shown in FIG. 10, if “55H” is set in the backup flag area, it means that there is a backup (ON state), and if a value other than “55H” is set, there is no backup (OFF). State).

  After confirming that there is a backup, the CPU 56 performs a data check of the backup RAM area (parity check in this example) (step S9). In this embodiment, clear data (00) is set in the checksum data area, and the checksum calculation start address is set in the pointer. Also, the number of checksum calculations corresponding to the number of data to be checksum is set. Then, the exclusive OR of the contents of the checksum data area and the contents of the RAM area pointed to by the pointer is calculated. The calculation result is stored in the checksum data area, the pointer value is incremented by 1, and the checksum calculation count value is decremented by 1. The above processing is repeated until the value of the checksum calculation count becomes zero. When the value of the checksum calculation count reaches 0, the CPU 56 inverts the value of each bit of the contents of the checksum data area and uses the inverted data as the checksum.

  In the power supply stop process, a checksum is calculated by the same process as described above, and the checksum is stored in the backup RAM area. In step S9, the calculated checksum is compared with the stored checksum. When the power supply is stopped after an unexpected power failure or the like, the data in the backup RAM area should be saved, so the check result (comparison result) is normal (matched). That the check result is not normal means that the data in the backup RAM area is different from the data when the power supply is stopped. In such a case, since the internal state cannot be returned to the state when the power supply is stopped, an initialization process that is executed when the power is turned on is not performed when the power supply is stopped.

  If the check result is normal, the CPU 56 performs a game state restoration process for returning the internal state of the game control means and the control state of the electric component control means such as the display control means to the state when the power supply is stopped (step S10). ). Then, the saved value of the PC (program counter) stored in the backup RAM area is set in the PC, and the address is restored.

  In this way, it is possible to accurately return the gaming state to the state when the power supply is stopped by checking whether the data in the backup RAM area is stored using the backup flag and check data such as a checksum. it can. That is, the certainty of the state restoration process based on the data in the backup RAM area is improved. In this embodiment, it is confirmed whether or not the data in the backup RAM area is stored by using both the backup flag and the check data, but only one of them may be used. That is, either the backup flag or the check data may be used as an opportunity for executing the state recovery process.

  In addition, when “backup exists” is not confirmed according to the status of the backup flag, the initialization process described later is performed without performing the gaming state recovery process described later, so the backup data does not exist. Nevertheless, it is possible to prevent the gaming state restoration process from being executed, and it is possible to return the control state to the initial state by the initialization process.

  Furthermore, when the check result using the check data is not normal, the initialization process described later is performed without performing the gaming state recovery process described later, so that the contents differ from those at the time of stopping the power supply. It is possible to prevent the gaming state restoration process from being executed based on the backup data that has been made, and the control state can be returned to the initial state by the initialization process.

  In the initialization process, the CPU 56 first performs a RAM clear process (step S11). Also, a predetermined work area (for example, a normal symbol determination random number counter, a normal symbol determination buffer, a special symbol left middle right symbol buffer, a special symbol process flag, a normal symbol process flag, a payout command storage pointer, a winning ball flag, A work area setting process for setting an initial value to a flag for selectively performing processing according to the control state, such as a ball break flag and a payout stop flag, is performed (step S12).

  Next, the CPU 56 transmits an initialization command for initializing the sub-boards (the payout control board 37, the lamp control board 35, the sound control board 70, and the display control board 80) in accordance with the initialization command transmission table (step). S13). In the initialization command transmission table, as shown in FIG. 11, commands for instructing the extinction of the prize ball lamp 51, the ball-out lamp 52, etc. (for the lamp control board 35) and the variable display device 9 are displayed. INT data, command data 1 and command data 2 for transmitting an initialization command such as a command indicating the initial symbol (to the display control board 80) are set.

  In this example, as shown in FIG. 11, the initialization command includes a start winning memory number lamp designation command (E100 (H)) for turning off the start memory display 18, and the normal symbol start memory display 41 is turned off. A gate passing memory number lamp designation command (E000 (H)) for causing the prize ball lamp 51 to turn off, a prize ball remaining lamp designation command (E200 (H)) for turning off the prize ball lamp 51, and a ball for turning off the ball break lamp 52 Presence lamp designation command (E300 (H)), special symbol power-on designation command (8F00 (H): initial display mode command) for displaying the power-on screen on the variable display device 9, normal symbol display Normal symbol power-on designation command (8F01 (H): initial display mode command) and ball payout for causing 10 to perform a display executed when the power is turned on There payout permission state specification command instructing (0101 (H)) that it is possible to dispensing from location 97. Note that the initialization command transmission table shown in FIG. 11 is a command transmission table to be described later in a state where the initialization command is set. A specific command transmission form will be described later.

  Further, the CPU 56 stores data indicating the initial screen of the special symbol stored in the ROM 54 in the left middle right symbol buffer provided in the RAM 55 (step S14). Further, the CPU 56 also stores data indicating the initial display contents of the normal symbol stored in the ROM 54 in the normal symbol buffer provided in the RAM 55. The control command is not transmitted based on the stored contents of the left middle right symbol buffer and the normal symbol buffer.

  The data of the initial screen and initial display contents are stored in the left middle right symbol buffer and the normal symbol buffer because the power supply is stopped again before the variable symbol special symbol or normal symbol variable display is started. This is because a control command for designating an initial screen is transmitted based on the same data as the data stored in the ROM 54 when the supply is started and the state is restored.

  For example, in the case of a special symbol, when the state is restored, a symbol designation command is sent based on the data stored in the left middle right symbol buffer in step S84 described later. In this example, as described above, after the initial symbol data stored in the ROM 54 is stored in the left middle right symbol buffer when the power supply is resumed, before the variable symbol special symbol display is started (left middle right symbol). If the power supply is stopped again before the stored contents of the buffer are rewritten), and then the power supply is resumed to restore the state, the left middle right symbol buffer to which the symbol designation command is sent is referred. Is stored in the initial symbol data stored in the ROM 54. Therefore, when the state is restored as described above, in step S84 described later, the symbol designation is made based on the stored data in the left middle right symbol buffer in which the initial symbol data stored in the ROM 54 is stored. A command is sent. Therefore, the result is the same as when the control command for designating the initial screen is sent based on the data stored in the ROM 54.

  Then, a CTC register set in the CPU 56 is set so that a timer interrupt is periodically generated every 2 ms (step S15). That is, a value corresponding to 2 ms is set in a predetermined register (time constant register) as an initial value.

  When the execution of the initialization process (steps S11 to S15) is completed, the display random number update process (step S17) and the initial value random number update process (step S18) are repeatedly executed in the main process. When the display random number update process and the initial value random number update process are executed, the interrupt disabled state is set (step S16). When the display random number update process and the initial value random number update process are finished, the interrupt enabled state is set. (Step S19). The display random number is a random number for determining a symbol displayed on the variable display device 9, and the display random number update process is a process for updating the count value of the counter for generating the display random number. . The initial value random number update process is a process for updating the count value of the counter for generating the initial value random number. The initial value random number is a random number for determining an initial value of a count value such as a counter for generating a random number for determining whether or not to make a big hit (a big hit determination random number generation counter). In a game control process described later, when the count value of the jackpot determination random number generation counter makes one round, an initial value is set in the counter.

  Note that when the display random number update process is executed, the interrupt is prohibited. The display random number update process is also executed in the timer interrupt process described later, and thus conflicts with the process in the timer interrupt process. This is to avoid that. That is, if the timer interrupt is generated during the process of step S17 and the counter value for generating the display random number is updated during the timer interrupt process, the continuity of the count value is impaired. There is a case. However, such an inconvenience does not occur if the interrupt is prohibited during the process of step S17.

  FIG. 12 is a flowchart illustrating an example of the game state restoration process. In the game state restoration process, the CPU 56 first performs a stack pointer restoration process (step S81). The value of the stack pointer is saved in a predetermined RAM area (stack pointer save buffer in the work area backed up by power) in the power supply stop process described in detail later. Therefore, in step S81, the RAM area value is set in the stack pointer to return. Note that the register value and the value of the program counter (PC) when the power supply is stopped are saved in the area pointed to by the restored stack pointer (that is, the stack area).

  Next, the CPU 56 transmits a recovery command for recovering the control state of each sub-board in accordance with the data stored in the backup RAM area and the backup command transmission table (step S82). In the backup command transmission table, as shown in FIG. 13, a command (for the lamp control board 35) for instructing the state restoration of the winning ball lamp 51, the ball-out lamp 52, etc., and the control state of the variable display device 9 are displayed. INT data, command data 1 and command data 2 for transmitting a recovery command such as a command (to the display control board 80) for recovering data are set.

  In this example, as shown in FIG. 13, the recovery command transmitted in step S82 includes a start winning memory number lamp designation command (E1XX (H): XX = start) for recovering the state of the start memory display 18. (Number of winning prizes), a gate passing memory number lamp designation command (E0XX (H): XX = gate passing memory number) for restoring the state of the normal symbol start memory display 41, and the state of the winning ball lamp 51. Prize ball lamp command (no prize ball remaining lamp designation command (E200 (H)) or prize ball remaining lamp designation command (E201 (H))), a ball dead lamp command for restoring the state of the ball dead lamp 52 (In-ball lamp designation command (E300 (H)) or out-of-ball lamp designation command (E301 (H))), control state of the variable display device 9 ( Here, a special symbol restoration designation command (B6XX (H): XX = whether or not the probability variation state) for restoring the control state (whether or not the probability variation is in progress), the control state of the variable display device 9 (here Then, the normal symbol recovery designation command (B7XX (H)) for recovering the control state as to whether or not it is in a high probability state), in order to cause the normal symbol display 10 to perform the display executed when the power is turned on. Normal symbol power-on designation command (8F01 (H)), payout permission state designation command (01XX (H): XX = 01 (payout possible) for instructing whether or not payout from the ball payout device 97 is possible ), XX = 00 (payout prohibited)). Note that the backup command transmission table shown in FIG. 13 is a command transmission table to be described later in a state where a recovery command is set.

  The starting winning memory number, the gate passing memory number, the state of the winning ball lamp 51 and the ball-out lamp 52, whether or not it is in a probable change state, and whether or not it is in a payout stopped state are stored in the RAM area that is backed up. Data of a predetermined work area (for example, start winning memory number buffer, gate passing memory number buffer, probability variation flag, winning ball flag, out of ball flag, payout stop flag, etc.).

  Further, the CPU 56 selects one of the special symbol backup command transmission tables based on the value of the special symbol process flag stored in the RAM area where the power is backed up (step S83). For example, as shown in FIG. 14, the special symbol backup command transmission table is a standby backup command transmission table, a variable backup command transmission table, a backup command transmission table before opening a big prize opening, and a backup during opening a big prize opening. There are a command transmission table and a backup command transmission table at the end of jackpot.

  The standby backup command transmission table is selected when a special symbol fluctuation waiting process or the like (step S300 to step S304: see FIG. 28) is being executed when the power supply is stopped. The fluctuating backup command transmission table is selected when all symbol stop waiting processing is being executed when the power supply is stopped (step S305: see FIG. 28). The backup command transmission table before the big prize opening is selected when the big prize opening opening process (step S306: see FIG. 28) is being executed when the power supply is stopped. The special winning opening open backup command transmission table is selected when a special winning opening open processing or the like (steps S307 to S308: see FIG. 28) is executed when power supply is stopped. The big hit end backup command transmission table is selected when the big hit end process (step S309: see FIG. 28) is being executed when the power supply is stopped. The effect state is confirmed by the value of the special symbol process flag stored in the RAM area that is backed up.

  When the special symbol backup command transmission table is selected, the CPU 56 transmits a recovery command according to the selected special symbol backup command transmission table (step S84).

  In the standby backup command transmission table, as shown in FIG. 15, as a recovery command, a command (identification information mode designation command) for specifying the left middle right command, a special symbol confirmation command, and a customer waiting demonstration display designation command INT data, command data 1 and command data 2 are set. Here, the left middle right symbol specified by the display control command is specified based on the information stored in the left middle right symbol buffer, and is stopped and displayed at the last special symbol fluctuation before the power supply stops here. It becomes a design. When the variable display device 9 is waiting to receive the variation pattern command when the power supply is stopped, the display control command is transmitted to the display control board 80. The standby backup command transmission table shown in FIG. 15 is a command transmission table to be described later in a state where a recovery command is set.

  When receiving the confirmation command, the display control means performs control for causing the variable display device 9 to display the special symbol designated by the display control command for designating the left middle right symbol. Further, when the customer waiting demonstration command is received, control is performed so that the display state of the background of the variable display device 9 is changed to the standby display state.

  In addition, as shown in FIG. 16, a command for designating the left / middle / right special symbol (identification information mode designation command) and a special symbol power failure recovery display command are transmitted to the backup command transmission table at the time of change as shown in FIG. INT data, command data 1 and command data 2 are set. Here, the symbols in the middle left and right designated by the display control command are symbols that should have been stopped and displayed due to the special symbol fluctuation that was performed when the power supply was stopped. When the special display is changing in the variable display device 9 when the power supply is stopped, the display control command is transmitted to the display control board 80.

  Upon receiving the special symbol power failure recovery display command, the display control means performs a predetermined notification process. For example, the variable display device 9 displays that a power failure has occurred. Based on the various information that was backed up, the gaming state returns to the state prior to the stop of power supply.After that, when the special symbol change period ends, the gaming control means issues a confirmation command to the display control means. Send. Based on the receipt of the confirmation command, the display control means is in a state where the next special symbol can be changed.

  Also, in the backup command transmission table before the big prize opening is opened, as shown in FIG. 17, as a recovery command, a command (identification information mode designation command) for designating a left middle right special symbol, a special symbol confirmation command, INT data, command data 1 and command data 2 for transmitting a display command before winning a prize opening are set. Here, the middle left and right symbols specified by the display control command are jackpot symbols that are stopped and displayed by the last special symbol fluctuation before the power supply is stopped. Therefore, if the pre-opening process for the special winning opening is being performed when the power supply is stopped, the display control command is transmitted to the display control board 80.

  When the display control means receives the display command before opening the big prize opening, it performs a predetermined notification process. For example, the variable display device 9 displays the number of rounds to be executed from now on.

  As shown in FIG. 18, the backup command transmission table during the big prize opening opening command includes a command for specifying the left middle right special symbol (identification information mode designation command), a special symbol confirmation command, a special prize as shown in FIG. INT data, command data 1 and command data 2 for transmitting a mouth open display command and a count display command are set. Here, the middle left and right symbols specified by the display control command are jackpot symbols that are stopped and displayed by the last special symbol fluctuation before the power supply is stopped. Therefore, if the big prize opening opening process is being performed when the power supply is stopped, the display control command is transmitted to the display control board 80.

  When the display control means receives the display command when the special winning opening is opened, it performs a predetermined notification process. For example, the number of rounds of the currently executed round game is displayed on the variable display device 9. Further, when receiving the count display command, the display control means displays the count number on the count switch 23 in the round game.

  Furthermore, in the backup command transmission table at the time of jackpot end, as shown in FIG. 19, as a recovery command, a command (identification information mode designation command) for specifying the left middle right command, a special symbol confirmation command, and a jackpot end display INT data, command data 1 and command data 2 for transmitting a command (a specific jackpot end display command or a non-specific jackpot end display command) are set. Here, the middle left and right symbols specified by the display control command are jackpot symbols that are stopped and displayed by the last special symbol fluctuation before the power supply is stopped. Accordingly, when the processing related to the end of the big deal is being performed when the power supply is stopped, the display control command is transmitted to the display control board 80.

  Upon receiving the jackpot end display command, the display control means performs a predetermined notification process. For example, a display indicating that the big hit gaming state has ended is performed. Further, the display control means performs control to change the background color of the variable display device 9 when the gaming state after the big hit is controlled to the probability changing state.

  In this example, after the power supply is started and the storage process in step S14 described above is executed, the power is supplied before the special symbol variable display is started (before the contents of the left middle right symbol buffer are rewritten). When the power supply is resumed after stopping, the left middle right design designated by the display control command transmitted in step S84 becomes the initial screen based on the data stored in the ROM 54.

  That is, in step S84, a symbol designation command is sent based on the data stored in the left middle right symbol buffer. However, after the storage process in step S14 described above is executed, before the special symbol variable display is started (left If the power supply is stopped before the memory contents of the middle right symbol buffer are rewritten), and then the power supply is resumed to restore the state, the left middle right that is referenced for sending the symbol designation command The symbol buffer stores the initial symbol data stored in the ROM 54 (the data stored in the left middle right symbol buffer is backed up, and the storage state of the left middle right symbol buffer has already been restored. ). Therefore, when the state is restored when the power supply is resumed as described above, in step S84, the initial symbol data stored in the ROM 54 is stored based on the stored data in the left middle right symbol buffer. A symbol designation command is sent. Therefore, the result is the same as when the control command for designating the initial screen is sent based on the data stored in the ROM 54.

  As described above, after the storage process of step S14 is executed, the power supply is stopped before the variable symbol special display is started, and then the power supply is resumed and the state is restored. In step S84, a control command for designating the left middle right symbol to be displayed on the variable display device 9 based on the data stored in the ROM 54 may be transmitted. In this case, for example, it is set when power supply is started (for example, it may be when the storage process in step S14 is executed), and when variable symbol special display is started (more specifically, And a recovery state flag that is reset when the stored contents of the left middle right symbol buffer are rewritten). If the recovery state flag is set in step S84, the recovery state flag is set based on the data stored in the ROM 54. A control command for designating the initial screen is sent, and if the recovery state flag is not set, control for designating the left middle right design to be displayed on the variable display device 9 based on the data stored in the left middle right design buffer. The command may be sent out.

  Further, the CPU 56 selects the normal symbol backup command transmission table based on the value of the normal symbol process flag stored in the RAM area where the power is backed up (step S85). The normal symbol backup command transmission table includes, for example, as shown in FIG. 20, a normal symbol variation backup command transmission table and a normal symbol stop backup command transmission table.

  The normal symbol change backup command transmission table is selected when the normal symbol is changing in the normal symbol display 10 when the power supply is stopped. The normal symbol stop backup command transmission table is selected when the normal symbol on the normal symbol display 10 has not been changed when the power supply is stopped. Whether or not the normal symbol is changing is confirmed by the value of the normal symbol process flag stored in the RAM area where the power is backed up.

  When the normal symbol backup command transmission table is selected, the CPU 56 transmits a recovery command according to the selected normal symbol backup command transmission table (step S86).

  In the normal symbol fluctuation backup command transmission table, as shown in FIG. 21, INT data, command data 1 and command data for transmitting left and right normal symbols and normal symbol power failure recovery display commands as recovery commands are shown. Command data 2 is set. Here, the left and right symbol states (lit state or extinguished state) specified by the display control command are turned on / off when the power supply is stopped after a normal symbol change that has been performed. It was in a state that should have been. Therefore, when the normal symbol display 10 is changing the normal symbol when the power supply is stopped, the display control command is transmitted to the display control board 80. The normal symbol fluctuation backup command transmission table shown in FIG. 21 is a command transmission table to be described later in a state in which a recovery command is set.

  Upon receiving the normal symbol power failure recovery display command, the display control means performs a predetermined notification process. For example, a display indicating that a power failure has occurred on the normal symbol display 10 (for example, a display that blinks the left and right areas) is performed. Based on the various information that was backed up, the gaming state returns to the state before the power supply was stopped. After that, when the normal symbol variation period ends, the gaming control means stops the normal symbol with respect to the display control means. Send a command. Based on the reception of the normal symbol stop command, the display control means is ready to change the next normal symbol.

  In addition, as shown in FIG. 22, the normal symbol stop backup command transmission table includes a command for designating the left and right normal symbols, and INT data for transmitting a normal symbol stop command, command data 1 and Command data 2 is set. Here, the left and right symbols designated by the display control command are symbols stopped and displayed by the last normal symbol fluctuation before the power supply is stopped. Therefore, when the symbol change is not performed in the normal symbol display 10 when the power supply is stopped, the above display control command is transmitted to the display control board 80. The normal symbol stop backup command transmission table shown in FIG. 22 is a command transmission table to be described later in a state where a recovery command is set.

  When receiving the normal symbol stop command, the display control means performs a control to display the normal symbol on the normal symbol display 10 in the on / off state designated by the display control command for designating the left and right symbols.

  In this example, after the power supply is started and the normal symbol initial display symbol saving process executed together with the saving process in step S14 described above is executed, before the normal symbol variable display is started (normal symbol). If the power supply is stopped before the buffer contents are rewritten) and then the power supply is resumed, the left and right normal symbols designated by the display control command transmitted in step S86 are stored in the ROM 54. The initial screen is based on the stored data.

  Thereafter, the CPU 56 clears the backup flag (step S91), that is, resets a flag indicating that a predetermined storage protection process has been executed when the previous power supply was stopped. Therefore, unnecessary information can be prevented from remaining after the control state is restored. Also, the saved values of various registers are read from the stack area and set in various registers (IX register, HL register, DE register, BC register) (step S92). That is, register restoration processing is performed. Each time each register is restored, the value of the stack pointer is decreased. In other words, the value of the stack pointer is updated to point to the previous address in the stack area. If the parity flag is not turned on, an interrupt permission state is set (steps S93 and S94). Finally, the AF register (accumulator and flag register) is restored from the stack area (step S95).

  Then, the RET instruction is executed. When the RET instruction is executed, the CPU 56 realizes a program return operation by setting the data stored in the area pointed to by the stack pointer in the program counter. However, the return destination here is not the part that called the game state restoration process. This is because the stack pointer restoration process is performed in step S81, and after the register restoration process is completed in step S92, the stack pointer indicating the stack area is executed when the power supply stop process by the NMI is started. Indicates the area where the program address is saved. That is, the return address stored in the stack area pointed to by the returned stack pointer is the address where the NMI occurred when the power supply was last stopped in the program. Therefore, in response to the RET instruction subsequent to step S95, the process returns to the address where the NMI occurred when the power supply was stopped. That is, the recovery control is executed based on the address saved in the stack area.

  Next, the timer interrupt process will be described. When the timer interrupt occurs, the CPU 56 performs the register saving process (step S20), and then executes the game control processes of steps S21 to S32 shown in FIG. In the game control process, the CPU 56 first inputs detection signals of switches such as the gate switch 32a, the start port switch 14a, the count switch 23, and the winning port switch 24a through the switch circuit 58, and determines their state. (Switch process: Step S21).

  Next, various abnormality diagnosis processes are performed by the self-diagnosis function provided in the pachinko gaming machine 1, and an alarm is issued if necessary according to the result (error process: step S22).

  Next, a process of updating the count value of each counter for generating each determination random number such as a big hit determination random number used for game control is performed (step S23). The CPU 56 further performs a process of updating the count value of the counter for generating the display random number and the initial value random number (steps S24 and S25).

FIG. 24 is an explanatory diagram showing each random number. Each random number is used as follows.
(1) Random 1: Decide whether or not to generate a big hit (for big hit determination = special symbol determination)
(2) Random 2-1 to 2-3: For determining the left middle right off symbol (3) Random 3: For determining the symbol combination at the time of jackpot (for jackpot symbol determination = special symbol determination)
(4) Random 4: Determine the fluctuation pattern at the time of reach (for fluctuation pattern determination)

In order to enhance the gaming effect, random numbers other than the random numbers (1) to (4) (for example, an initial value determining random number) are also used. Further, for example, by periodically setting an initial value for each random number (for example, an initial value determined for each random number), the random numbers of (1) to (4) are configured not to synchronize with each other. It is desirable that
In step S23, the CPU 56 counts up (adds 1) a counter for generating the jackpot determination random number (1) and the jackpot symbol determination random number (3). That is, they are determination random numbers, and other random numbers are display random numbers.

  Further, the CPU 56 performs special symbol process processing (step S26). In the special symbol process control, corresponding processing is selected and executed according to a special symbol process flag for controlling the pachinko gaming machine 1 in a predetermined order according to the gaming state. The value of the special symbol process flag is updated during each process according to the gaming state. Further, normal symbol process processing is performed (step S27). In the normal symbol process, the corresponding process is selected and executed according to the normal symbol process flag for controlling the display state of the normal symbol display 10 in a predetermined order. The value of the normal symbol process flag is updated during each process according to the gaming state.

  Next, the CPU 56 performs a process of setting a display control command related to the special symbol in a predetermined area of the RAM 55 and sending the display control command (special symbol command control process: step S28). In addition, a display control command related to the normal symbol is set in a predetermined area of the RAM 55, and a process of sending the display control command is performed (normal symbol command control process: step S29).

  Further, the CPU 56 performs information output processing for outputting data such as jackpot information, start information, probability variation information supplied to the hall management computer, for example (step S30).

  Further, the CPU 56 issues a drive command to the solenoid circuit 59 when a predetermined condition is satisfied (step S31). The solenoid circuit 59 drives the solenoids 16, 21, and 21A in response to a drive command in order to open or close the variable winning ball device 15 or the opening / closing plate 20, or to switch the game ball passage in the special winning opening. To do.

  Then, the CPU 56 executes a prize ball process for setting the number of prize balls based on the detection signals from the winning opening switches 29a, 30a, 33a, 39a (step S32). Specifically, a payout control command indicating the number of winning balls is output to the payout control board 37 in response to detection of winning based on any one of the winning opening switches 29a, 30a, 33a, 39a being turned on. The payout control CPU 371 mounted on the payout control board 37 drives the ball payout device 97 according to a payout control command indicating the number of prize balls. Next, the CPU 56 confirms the start winning memory number, and turns on / off the corresponding hold lamp of the start memory display 18 when the current starting winning memory number has changed compared to the previous confirmation. A storage process for setting a lamp control command for designating the command in the command transmission table is executed (step S33). In addition, when designating lighting / extinguishing of the holding lamp of the normal symbol start memory display 41, the same module as that used when designating lighting / extinguishing of the holding lamp of the starting memory display 18 is used. The Thereafter, the contents of the register are restored (step S34), and the interrupt permission state is set (step S35).

  With the above control, in this embodiment, the game control process is started every 2 ms. In this embodiment, the game control process is executed by the timer interrupt process. However, in the timer interrupt process, for example, only a flag indicating that an interrupt has occurred is set, and the game control process is performed by the main process. May be executed.

  FIG. 25 is a flowchart illustrating a processing example of a non-maskable interrupt process (power supply stop process) executed in response to a power-off signal from the power supply board 910. When a non-maskable interrupt occurs, the interrupt control mechanism built in the CPU 56 sets the address of the program executed when the non-maskable interrupt occurs (specifically, the next address after completion of execution) as a stack pointer. Is saved in the stack area pointed to by and the value of the stack pointer is increased. That is, the stack pointer value is updated to point to the next address in the stack area.

  In the power supply stop process, the CPU 56 saves the AF register (accumulator and flag register) in the stack area pointed to by the stack pointer (step S51). At this time, the value of the stack pointer is updated to point to the next address in the stack area. Further, the interrupt flag is copied to the parity flag (step S52). The parity flag is formed in the backup RAM area. The interrupt flag is a flag indicating whether the interrupt is permitted or the interrupt prohibited state, and is in a control register built in the CPU 56. The on state of the interrupt flag indicates that the interrupt is prohibited. As described above, the parity flag is referred to in the gaming state restoration process. In the gaming state recovery process, if the parity flag is on, the interrupt permission state is not set.

  Further, the BC register, DE register, HL register, and IX register are saved in the stack area pointed to by the stack pointer (steps S54 to S57). At this stage, the address of the program, BC register, DE register, HL register, and IX register values that were being executed when the non-maskable interrupt occurred are sequentially stored in the stack area. Each time each register is saved, the value of the stack pointer is updated to point to the next address in the stack area. Further, the value of the stack pointer is saved in a predetermined area (stack pointer saving buffer) in the work area (step S58).

  Next, the backup specified value ("55H" in this example) is stored in the backup flag. The backup flag is formed in the backup RAM area. Next, parity data is created (steps S60 to S67). That is, first, the clear data (00) is set in the checksum data area (step S60), and the checksum calculation start address is set in the pointer (step S61). Also, the number of checksum calculations is set (step S62).

  Then, the exclusive OR of the contents of the checksum data area and the contents of the RAM area pointed to by the pointer is calculated (step S63). The calculation result is stored in the checksum data area (step S64), the pointer value is incremented by 1 (step S65), and the value of the checksum calculation count is decremented by 1 (step S66). The processes in steps S63 to S66 are repeated until the value of the checksum calculation count becomes 0 (step S67).

  When the value of the checksum calculation count becomes 0, the CPU 56 inverts the value of each bit of the contents of the checksum data area (step S68). Then, the inverted data is stored in the checksum data area (step S69). This data becomes parity data to be checked when the power is turned on. Next, an access prohibition value is set in the RAM access register (step S70). Thereafter, the built-in RAM 55 cannot be accessed. Therefore, even if a program runaway occurs as the voltage drops, the stored contents of the RAM will not be destroyed.

  When the access prohibition value is set in the RAM access register, the CPU 56 enters a standby state (loop state). Therefore, nothing is done until the system is reset.

  In this embodiment, the power supply stop process is executed according to the NMI. However, the power supply stop signal is connected to the maskable terminal of the CPU 56 and the power supply stop process is executed by the maskable interrupt process. May be. Alternatively, a power-off signal may be input to the input port and the power supply stop process may be executed according to the input port check result.

  FIG. 26 is a timing chart showing a state of a power supply voltage drop and an NMI signal (= power supply cut-off signal: power supply stop signal) when power supply to the gaming machine is stopped. When the power supply to the gaming machine is stopped, the voltage value of VSL, which is the highest DC power supply voltage, gradually decreases. In this example, when the voltage drops to +22 V, a power cut-off signal is output from the power monitoring IC 902 mounted on the power board 910 (becomes a low level).

  The power-off signal is introduced into the electrical component control board (in this embodiment, the main board 31 and the payout control board 37) and input to the NMI terminals of the CPU 56 and the payout control CPU 371. The CPU 56 and the payout control CPU 371 execute predetermined power supply stop processing by NMI processing.

  When the voltage value of VSL further decreases to a predetermined value (+9 V in this example), the output of the system reset circuit mounted on the main board 31 and the payout control board 37 becomes low level, and the CPU 56 and payout control CPU 371 enters a system reset state. Note that the CPU 56 and the payout control CPU 371 have completed the power supply stop process before being set to the system reset state.

  When the voltage value of VSL is further decreased to be lower than a voltage capable of generating Vcc (+5 V for driving various circuits), each circuit cannot be operated on each substrate. However, at least the main board 31 and the payout control board 37 execute the power supply stop process, and the CPU 56 and the payout control CPU 371 are in the system reset state.

  As described above, in this embodiment, the power supply monitoring circuit monitors the voltage of the highest power supply VSL among the DC voltages used in the gaming machine, and the voltage drops when the voltage of the power supply falls below a predetermined value. Generates a signal (power failure detection signal). As shown in FIG. 26, at the timing when the power-off signal is output, the IC drive voltage is still a voltage value that can sufficiently drive various circuit elements. Therefore, an operation time is ensured for the CPU 56 of the main board 31 operating with the IC drive voltage to perform a predetermined power supply stop process.

  In this case, the power supply monitoring circuit monitors the voltage of the highest power supply VSL among the DC voltages used in the gaming machine, but the timing for generating the power-off signal is the electrical component control that operates with the IC drive voltage. The monitoring target voltage may not be the highest voltage of the power source VSL as long as the operation time for the means to perform the predetermined power supply stop process is ensured. That is, if at least a voltage higher than the IC drive voltage is monitored, the power-off signal can be generated at such a timing that the operation time for the electrical component control means to perform the predetermined power supply stop process is ensured. .

  In this case, as described above, the monitoring target voltage is preferably a voltage that can be expected to prevent erroneous switch-on detection when power supply is stopped. That is, since the voltage (switch voltage) supplied to the various switches of the gaming machine is + 12V, it is preferable that the voltage drop can be detected before the + 12V power supply voltage starts to drop. Therefore, it is preferable to monitor a voltage higher than at least the switch voltage.

  FIG. 27 is an explanatory diagram showing an example of the left middle right symbol used in this embodiment. As shown in FIG. 27, in this embodiment, the symbols displayed as the left middle right symbol are the same 10 symbols on the left middle right. When the symbol number 0 is displayed, next, the symbol number 9 is displayed. Then, when the left middle right symbols are all stopped at “1”, “3”, “5”, “7” or “9”, for example, a high probability state is set. That is, they become probabilistic symbols.

  FIG. 28 is a flowchart illustrating an example of a special symbol process processing program executed by the CPU 56. The special symbol process shown in FIG. 28 is a specific process of step S26 in the flowchart of FIG. When performing the special symbol process, the CPU 56 performs any one of steps S300 to S309 according to the internal state after performing the fluctuation shortening timer subtraction process (step S310). The variation shortening timer is a timer for setting the variation time when the variation time of the special symbol is shortened.

  Special symbol variation waiting process (step S300): The start winning opening 14 is hit and the start opening switch 14a is turned on. When the start opening switch 14a is turned on, if the start winning memory number is not full, the start winning memory number is incremented by 1 and a jackpot determining random number or the like is extracted.

  Special symbol determination process (step S301): When variable symbol special display can be started, the number of start winning memories is confirmed. If the start winning memorized number is not 0, it is determined whether to win or not according to the extracted value of the big hit determination random number.

  Stop symbol setting process (step S302): The stop symbol of the left middle right symbol is determined.

  Reach operation setting process (step S303): It is determined whether or not the reach operation is performed based on the combination of the left, middle and right stop symbols. To determine the variable period of reach.

  All symbol variation start processing (step S304): Control is performed so that variation of all symbols is started in the variable display device 9. At this time, the left middle right final stop symbol and information for instructing the variation mode are transmitted to the symbol control board 80. When the process is finished, the internal state (process flag) is updated to shift to step S305.

  All symbol stop waiting process (step S305): When a predetermined time (the time indicated by the fluctuation shortening timer in step S310) elapses, all symbols displayed on the variable display device 9 are stopped. If the stop symbol is a combination of jackpot symbol, the internal state (process flag) is updated to shift to step S306. If not, the internal state is updated to shift to step S300.

  Big winning opening opening process (step S306): Control for opening the big winning opening is started. Specifically, the counter and the flag are initialized, and the solenoid 21 is driven to open the special winning opening. The process timer sets the execution time of the big prize opening opening process, and sets a big hit flag (a flag indicating that the big hit is being made). When the process is finished, the internal state (process flag) is updated to shift to step S307.

  Processing during opening of the special winning opening (step S307): Control for sending display control command data for the large winning opening round display to the symbol control board 80, processing for confirming the establishment of the closing condition of the special winning opening, and the like are performed. If the final closing condition of the big prize opening is satisfied, the internal state is updated to shift to step S308.

  Specific area valid time process (step S308): The presence / absence of passing of the V winning switch 22 is monitored, and the process of confirming that the big hit gaming state continuation condition is satisfied is performed. If the condition for continuing the big hit gaming state is satisfied and there are still remaining rounds, the internal state is updated to shift to step S306. In addition, when the big hit gaming state continuation condition is not satisfied within a predetermined effective time, or when all rounds are finished, the internal state is updated to shift to step S309.

  Big hit end process (step S309): A display for notifying the player that the big hit gaming state has ended is performed. When the display is completed, the internal state is updated to shift to step S300.

  FIG. 29 is a flowchart showing a process of determining that the hit ball has won the start winning opening 14. When the hit ball wins the start winning opening 14 provided in the game board 6, the start opening switch 14a is turned on. For example, in the special symbol variation waiting process in step S300 of the special symbol process, as shown in FIG. 29, when the CPU 56 determines that the start port switch 14a is turned on via the switch circuit 58 (step S41), the start is started. It is confirmed whether or not the number of winning prizes has reached the maximum value of 4 (step S42). If the starting winning memory number has not reached 4, the starting winning memory number is increased by 1 (step S43), and the value of each random number such as a big hit determination random number is extracted. Then, they are stored in a random value storage area corresponding to the value of the number of stored start winning prizes (step S44). When the start winning memory number has reached 4, the process for increasing the starting win memory number is not performed. That is, in this embodiment, it is possible to store the number of hit balls that have been won in up to four start winning holes 14. Furthermore, in this example, if it is not in a state where variable display of a display symbol can be started (a state where variable display processing of a display symbol is not executed) (N in step S45), the start winning after being added in step S43 The stored number is stored in the reserved number storage area (step S46), and transmission setting of a lamp control command for turning on the corresponding reserved lamp of the start memory display 18 is performed (step S47). The reserved number storage area is provided in a predetermined area of the RAM 55, for example.

  In the special symbol process of step S26, the CPU 56 confirms the value of the start winning memory number as shown in FIG. 30 (step S51). If the starting winning memory number is not 0, the value stored in the random number value storage area corresponding to the starting winning memory number = 1 is read (step S52), the value of the starting winning memory number is decreased by 1, and each The value in the random value storage area is shifted (step S53). That is, each value stored in the random number storage area corresponding to the starting winning memory number = n (n = 2, 3, 4) is stored in the random value storing area corresponding to the starting winning memory number = n−1. To do. Next, the CPU 56 compares the start winning memorized number stored in the reserved number storing area with the current start winning memorized number subtracted in step S53, and if the values are different (current start winning memorized memory). When the number is smaller by 1), a process for transmitting a lamp control command for turning off the corresponding hold lamp of the start memory indicator 18 and storing the current start winning memory number in the hold number storage area (Step S53a). As described above, if the variable display of the display symbol can be started, the process of turning on the hold lamp of the start memory display 18 is not executed, and the start memory display 18 is held using the stored value in the hold number storage area. Since it is configured to determine whether or not the lamp is extinguished, when the variable display of the display symbol based on the start detection is made immediately after the start detection is made, the start memory display 18 is held by the start detection. Since the process of turning on / off the lamp is not executed, it is possible to prevent the hold lamp of the start memory display 18 from being turned on for a moment. 29 and FIG. 30 described above may be applied to one common module (in this case, the process may be shifted to the process of step S51 when “Y” is determined in step S45). It is desirable to be executed.

  Then, the CPU 56 determines the winning / losing based on the value read in step S52, that is, the extracted value of the jackpot determination random number (step S54). Here, the jackpot determination random number takes a value in the range of 0-299. As shown in FIG. 31, at the time of low probability, for example, when the value is “3”, it is determined as “big hit”, and when it is any other value, it is determined as “out of”. When the probability is high, for example, when the value is any one of “3”, “7”, “79”, “103”, “107”, “big hit” is determined. It is determined that it is out of place.

  When the big hit is determined, the big hit symbol determining random number (random 3) is extracted, and the big hit symbol is determined according to the value (step S55). In this embodiment, each symbol of the symbol number set in the jackpot symbol table corresponding to the extracted random 3 value is determined as a jackpot symbol. In the jackpot symbol table, left, middle and right symbol numbers corresponding to a plurality of types of combinations of jackpot symbols are set. Further, the variation pattern of the symbol is determined based on the value read in step S52, that is, the value of the extracted random number for variation pattern determination (random 4) (step S56).

  When it is determined that there is a loss, the CPU 56 determines a stop symbol when it is not a big hit. In this embodiment, the left symbol is determined according to the value read in step S52, that is, the extracted random 2-1 value (step S57). Further, the medium symbol is determined according to the value of random 2-2 (step S58). Then, the right symbol is determined according to the random 2-3 value (step S59). Here, if the determined middle symbol matches the left and right symbols, the symbol corresponding to the value obtained by adding 1 to the random number corresponding to the middle symbol is set as the stop symbol of the middle symbol so that it does not match the jackpot symbol. To do.

  Further, when the left and right symbols become the same, that is, when it is determined that the reach is established, the CPU 56 reads the value read in step S52, that is, the extracted random number for determining the variation pattern (random 4). ) Is determined based on the value of () (step S60).

  In the case of a high probability state, a variation pattern with a shortened variation time may be used as a variation pattern at the time of disconnection. In this way, it is possible to increase the number of fluctuations per hour, and to provide a player with many opportunities for big hits.

  As described above, it is determined whether the display mode of the symbol variation based on the start winning is the big hit, the reach mode, or the off mode, and the combination of the respective stop symbols is determined.

  The process shown in FIG. 30 corresponds to the process when the processes of steps S301 to S303 in the special symbol process shown in FIG. 28 are collectively shown.

  Next, transmission of a display control command from the main board 31 to the symbol control board 80 will be described. FIG. 32 is an explanatory diagram showing signal lines for display control commands transmitted from the main board 31 to the symbol control board 80. As shown in FIG. 32, in this embodiment, the display control command is transmitted from the main board 31 to the symbol control board 80 through eight signal lines of display control signals D0 to D7. A signal line for a display control INT signal for transmitting a strobe signal is also provided between the main board 31 and the symbol control board 80.

  When a control command is to be output from the game control means to another electrical component control board (sub board), the head address of the command transmission table is set. FIG. 33A is an explanatory diagram showing a configuration example of the command transmission table. One command transmission table is composed of 3 bytes, and INT data is set in the first byte. In the command data 1 of the second byte, MODE data of the first byte of the control command is set. Then, in the command data 2 of the third byte, the EXT data of the second byte of the control command is set.

  Although the EXT data itself may be set in the area of the command data 2, the command data 2 may be set with data for designating the address of the table storing the EXT data. . For example, if bit 7 (work area reference bit) of command data 2 is 0, it indicates that EXT data itself is set in command data 2. Such EXT data is data in which bit 7 is 0. In this embodiment, if the work area reference bit is 1, it indicates that the contents of the transmission buffer are used as EXT data. If the work area reference bit is 1, the other 7 bits may be configured to indicate an offset for designating an address of a table storing EXT data.

  FIG. 33B is an explanatory diagram showing a configuration example of INT data. Bit 0 in the INT data indicates whether or not a payout control command should be sent to the payout control board 37. If bit 0 is “1”, it indicates that a payout control command should be sent. Accordingly, the CPU 56 sets “01 (H)” in the INT data, for example, in a prize ball process (step S32 of the timer interrupt process). Bit 1 in the INT data indicates whether or not a display control command should be sent to the display output control board 80. If bit 1 is “1”, it indicates that a display control command should be sent. Accordingly, the CPU 56 sets “02 (H)” in the INT data, for example, in the special symbol command control process (timer interrupt process step S28).

  Bits 2 and 3 of the INT data are bits indicating whether or not a lamp control command and a sound control command should be sent, respectively, and the CPU 56 performs special symbol process processing when it is time to send those commands. Etc., INT data, command data 1 and command data 2 are set in the command transmission table pointed to by the pointer. When these commands are transmitted, the corresponding bit of the INT data is set to “1”, and MODE data and EXT data are set to the command data 1 and the command data 2.

  In this embodiment, a ring buffer and a transmission buffer are prepared for the payout control command as shown in FIG. In the prize ball processing, when the prize ball payout condition is established, the number of prize balls according to the established condition is sequentially set in the ring buffer. Further, when a payout control command relating to the number of prize balls is sent, one piece of data is transferred from the ring buffer to the transmission buffer. In the example shown in FIG. 33C, data corresponding to 12 payout control commands can be stored in the ring buffer. That is, there are 12 buffers. Note that the number of buffers in the ring buffer may be a number corresponding to the number of winning openings for generating a prize ball. This is because even when simultaneous winnings occur, it is possible to store payout control command data based on each winning.

  FIG. 34 is an explanatory diagram showing an example of a command form of a control command sent from the main board 31 to another electrical component control board. In this embodiment, the control command has a 2-byte configuration, the first byte represents MODE (command classification), and the second byte represents EXT (command type). The first bit (bit 7) of the MODE data is always “1”, and the first bit (bit 7) of the EXT data is always “0”. As described above, the control command serving as a command to the electrical component control board is composed of a plurality of data and can be distinguished from each other by the first bit. Note that the command form shown in FIG. 34 is an example, and other command forms may be used. For example, a control command composed of 1 byte or 3 bytes or more may be used.

  FIG. 35 is a timing chart showing the relationship between an 8-bit control signal and an INT signal (strobe signal) that constitute a control command for the symbol control board 80. As shown in FIG. 35, when a predetermined period elapses after MODE or EXT data is output to the output port, the CPU 56 turns on an INT signal that is a signal indicating data output. Further, when a predetermined period has elapsed from that point, the INT signal is turned off.

  Although the display control command has been described here, each control command sent to other sub-boards is also the same as that shown in FIGS. 34 and 35.

  FIG. 36 is an explanatory diagram showing an example of the contents of a display control command sent to the display control board 80. In the example shown in FIG. 36, commands 8000 (H) to 80XX (H) (X = any value of 4 bits) are display controls for designating a special symbol variation pattern in the variable display device 9 that variably displays a special symbol. It is a command. Note that the command for specifying the variation pattern also serves as a variation start instruction.

  Commands 8F00 (H) and 8F01 (H) are special symbol power-on designation commands (an example of initial display mode commands) and normal symbol power-on designation commands (an example of initial display mode commands) that are sent when the power is turned on. is there. The initial display mode command is a command for instructing the mode of the identification information (initial display mode) to be displayed on the variable display device 9 at the start of power supply and instructing the display of the initial display mode. Specifically, the initial display mode command is, for example, that data indicating the initial display mode is stored in a predetermined area of the character ROM 86, and data indicating the initial display mode is read from the predetermined area of the character ROM 86. This is a command for instructing display on the variable display device 9. The initial display mode command is, for example, a command for instructing that the initial display mode is a special symbol of “7”, “8”, “9”, and that the initial display mode is displayed on the variable display device 9. It may be said that. The normal symbol power-on designation command is used when the display control means performs normal symbol variation control. When the normal symbol display 10 is controlled by the lamp control means, it is sent to the display control board 80. Not. When receiving the special symbol power-on designation command, the display control means starts control for initial display.

  Commands 91XX (H), 92XX (H), and 93XX (H) are display control commands for designating a left middle right stop symbol of a special symbol. Command A000 (H) is a display control command (confirmation command) for instructing stop of variable symbol special display.

  The command BXXX (H) is a display control command that is sent from the start of the big hit game to the end of the big hit game. The command B1XX (H) is a display control command for designating display of the number of times of opening of the big winning opening (number of rounds) during the big hit game. Command B200 (H) is a display control command for designating a display indicating the start of a big hit game when the big hit game is started. The command B2XX (H) (XX = 01 or more) is for designating a display before the big winning opening is released during the big hit game (for example, a display for notifying which round is to be executed from now on). Display control command. Command B3XX (H) is a display control command (count display command) for designating display of the count number by the count switch 23 in each round game during the big hit game, although not shown. The command B400 (H) is a command that is sent a predetermined number of times at a predetermined timing (for example, the number of rounds minus 1 at a timing at which a big hit symbol is displayed between rounds) during a big hit game. This is a display control command (hit symbol display command) for designating symbol display. Command B500 (H) is a display control command for designating a display indicating that the non-specific big hit (non-probable big hit) has ended. Command B 501 (H) is a display control command for designating a display indicating that the specific big hit (probability change big hit) has ended. Command B6XX (H) is a display control command (special symbol restoration designation command) for designating special symbol restoration display (not shown). Command B7XX (H) is a display control command (ordinary symbol restoration designation command) for designating normal symbol restoration display (not shown). The command CXXX (H) is a display control command related to the display state of the variable display device 9 which is not related to the special symbol variation and the big hit game. The commands D000 (H) to D400 (H) are display control commands relating to a normal symbol variation pattern.

  When the display control means of the symbol control board 80 receives the above-described display control command from the game control means of the main board 31, the display state of the variable display device 9 and the normal symbol display 10 is changed according to the contents shown in FIG. change.

  FIG. 37 is an explanatory diagram showing an example of the contents of a lamp control command sent from the main board 31 that controls the game to the lamp control board 35. The lamp control command also has a 2-byte configuration of MODE and EXT. In the example shown in FIG. 37, a command 80XX (X = any value of 4 bits) is a lamp control command for designating a lamp / LED display control pattern corresponding to a special symbol variation pattern in the variable display device 9. Although not shown, the command A0XX (H) is a lamp control command for instructing a lamp / LED display control pattern when the variable symbol display is stopped. The command BXXX (H) is a big hit from the start of the big hit game. This is a lamp control command for instructing a lamp / LED display control pattern until the end of the game. A command 9001 (H) is a lamp control command for instructing a lamp / LED display control pattern during a customer waiting demonstration.

  Note that the commands 8XXX (H), 9XXX (H), AXXX (H), BXXX (H), and CXXX (H) are ramp control commands sent from the game control means in accordance with the game progress status. When the lamp control means receives the above-described lamp control command from the game control means of the main board 31, the lamp / LED display state is changed according to the contents shown in FIG. Note that the commands 8XXX (H), 9XXX (H), AXXX (H), BXXX (H), and CXXX (H) are used in common, for example, in a common control state with display control commands and voice control commands.

  The command E1XX (H) is a lamp control command indicating the number of lighting of the start memory display 18. For example, the lamp control means turns on the number of indicators designated by “XX (H)” in the start memory indicator 18. The command E0XX (H) is a lamp control command indicating the number of lighting of the normal symbol start memory display 41. For example, the lamp control means turns on the number of indicators designated by “XX (H)” in the normal symbol start memory indicator 41. That is, these commands are commands for instructing the control of the light emitters provided for informing the information of the reserved number. In addition, the command regarding the number of lighting of the start memory | storage display 18 and the normal symbol start memory | storage display 41 may be comprised so that increase / decrease in the number of lighting may be shown.

  Commands E200 (H) and E201 (H) are lamp control commands related to the display state of the prize ball lamp 51, and commands E300 (H) and E301 (H) are lamp control commands related to the display state of the ball-out lamp 52. is there. When the lamp control means receives the lamp control command of “E201 (H)” from the game control means of the main board 31, the display state of the prize ball lamp 51 is changed to a display state determined in advance as a case where there is a prize ball remaining. When the lamp control command of “E200 (H)” is received, the display state of the prize ball lamp 51 is set to a display state that is determined in advance as a case where no prize ball remains. When the lamp control command “E300 (H)” is received from the game control means of the main board 31, the display state of the ball-out lamp 52 is changed to the display state with a ball, and the lamp control command “E301 (H)” is set. When received, the display state of the ball-out lamp 52 is changed to the display state during the ball-out. That is, commands E200 and E201 (H) are commands indicating control of a light emitter provided for notifying a player or the like that there is an unsuccessful game ball, and command E300 (H) E301 (H) is a command indicating that the light emitter provided to notify the player or game store clerk that the supply ball has run out is controlled.

  FIG. 38 is a flowchart illustrating an example of command set processing. The command set process is a process including a command output process and an INT signal output process. In the command set process, the CPU 56 first saves the address of the command transmission table in a stack or the like (step S331). Then, the INT data of the command transmission table pointed to by the pointer is loaded into the argument 1 (step S332). The argument 1 is input information for a command transmission process to be described later. Also, the address indicating the command transmission table is incremented by 1 (step S333). Therefore, the address indicating the command transmission table matches the address of the command data 1.

  Therefore, the CPU 56 reads the command data 1 and sets it as the argument 2 (step S334). The argument 2 is also input information for a command transmission process to be described later. Then, the command transmission processing routine is called (step S335).

  FIG. 39 is a flowchart showing a command transmission processing routine. In the command transmission processing routine, the CPU 56 first sets the data set as the argument 1, that is, the INT data, in the work area determined as the comparison value (step S351). Next, the number of transmissions = 4 is set in the work area determined as the number of processes (step S352). Then, the port 1 address for outputting the payout control signal is set to the IO address (step S353). In this embodiment, the port 1 address is the output port address for outputting the payout control signal. The addresses of ports 2 to 4 are the addresses of output ports for outputting display control signals, lamp control signals, and audio control signals.

  Next, the CPU 56 shifts the comparison value to the right by 1 bit (step S354). As a result of the shift processing, it is confirmed whether or not the carry bit has become 1 (step S355). When the carry bit becomes 1, it means that the rightmost bit in the INT data is “1”. In this embodiment, four shift processes are performed. For example, when it is specified that a payout control command should be sent, the carry bit is set to 1 in the first shift process.

  When the carry bit becomes 1, the data set in the argument 2, in this case, the command data 1 (that is, MODE data) is output to the address set as the IO address (step S 356). Since the address of port 1 is set as the IO address when the first shift processing is performed, MODE data of the payout control command is output to port 1 at that time.

  Next, the CPU 56 adds 1 to the IO address (step S357) and subtracts 1 from the number of processes (step S358). If port 1 is indicated before addition, the address of port 2 is set as the IO address by the addition processing for the IO address. Port 2 is a port for outputting a display control command. Then, the CPU 56 confirms the value of the number of processes (step S359), and if the value is not 0, returns to step S354. In step S354, the shift process is performed again.

  In the second shift process, the value of bit 1 in the INT data is pushed out, and the carry flag is set to “1” or “0” depending on the value of bit 1. Therefore, it is checked whether or not it is specified that the display control command should be sent. Similarly, it is checked whether or not the lamp control command and the sound control command are to be sent by the third and fourth shift processes. Thus, when each shift process is performed, the IO address corresponding to the control command (payout control command, display control command, lamp control command, sound control command) checked by the shift process is included in the IO address. Is set.

  Therefore, when the carry flag becomes “1”, a control command is sent to the corresponding output port (port 1 to port 4). That is, a single common module can perform control command transmission processing for each electric component control means.

  In addition, since it is determined to which electrical component control means the control command should be output only by the shift processing, the process for determining to which electrical component control means the control command should be output is simplified. It has become.

  Next, the CPU 56 reads the content of the argument 1 in which the INT data before the start of the shift process is stored (step S360), and outputs the read data to the port 0 (step S361). In this embodiment, the address of port 0 is a port for outputting an INT signal for each control signal, and bits 0 to 4 of port 0 are a payout control INT signal, a display control INT signal, and a ramp, respectively. This is a port for outputting a control INT signal and a sound control INT signal. In the INT data, the bit corresponding to the output bit of the INT signal corresponding to the control command (payout control command, display control command, lamp control command, sound control command) output in the processing of steps S351 to S359 is “1”. It has become. Therefore, the INT signal corresponding to the control command (payout control command, display control command, lamp control command, sound control command) output to any of the ports 1 to 4 becomes high level.

  Next, the CPU 56 sets a predetermined value in the wait counter (step S362), and subtracts one by one until the value becomes 0 (steps S363 and S364). This process is a process for setting the ON period of the INT signal (control signal INT) shown in the timing chart of FIG. When the value of the wait counter becomes 0, clear data (00) is set (step S365), and the data is output to port 0 (step S366). Therefore, the INT signal becomes low level. Then, a predetermined value is set in the wait counter (step S362), and 1 is subtracted one by one until the value becomes 0 (steps S368 and S369). This process is a process for setting a period from the fall of the first INT signal shown in the timing chart of FIG. 35 to the start of EXT data output. However, the actual period set here is the time required for the subsequent processing time (the control required to output EXT data if MODE data is output at this time) in the time created in steps S367 to S369. The time taken to add). In this way, by setting the period from the fall of the INT signal to the start of EXT data output, even if commands are sent continuously, after the output of one command is completed, There will be a predetermined period of time before the transmission is started, and it is possible to easily identify the delimiter between successive commands on the side of the electrical component control means that receives the command, and each command is received reliably. .

  Therefore, the value set in the wait counter in step S367 is the period from the falling edge of the first INT signal until the start of EXT data output. The value is such that a sufficient period of time is obtained for surely receiving the command. Further, the value set in the wait counter is a value such that the period becomes longer than the time required for the processing of steps S351 to S359.

  As described above, the MODE data of the first byte of the control command is transmitted. Therefore, the CPU 56 adds 1 to the value indicating the command transmission table in step S336 shown in FIG. Therefore, the command data 2 area of the third byte is designated. The CPU 56 loads the contents of the indicated command data 2 into the argument 2 (step S337). Further, it is confirmed whether or not the value of bit 7 (work area reference bit) of the command data 2 is “0” (step S339). If not 0, the contents of the transmission buffer are loaded into the argument 2 (step S341). When the extension data is used when the value of the work area reference bit is “1”, the head address of the command extension data address table is set in the pointer, and the command data is set in the pointer. The address is calculated by adding 2 bits 6 to 0. Then, the data of the area pointed to by the address is loaded into the argument 2.

  Since data capable of specifying the number of winning balls is set in the transmission buffer, the data is set in the argument 2. If the extension data is used when the value of the work area reference bit is “1”, the command extension data address table contains EXT data that can be sent to the electrical component control means. Set sequentially. Therefore, if the value of the work area reference bit is “1”, the EXT data in the command extension data address table corresponding to the contents of the command data 2 is loaded into the argument 2.

  Next, the CPU 56 calls a command transmission processing routine (step S342). Therefore, the EXT data is transmitted at the same timing as the transmission of MODE data.

  As described above, the control command (payout control command, display control command, lamp control command, sound control command) having a 2-byte configuration is transmitted to the corresponding electrical component control means. The electrical component control means starts the capture process of the control command when the rising edge of the INT signal is detected. For any electrical component control means, a new signal from the game control means is signaled before the capture process is completed. There is no output on the line. That is, reliable command reception processing is performed in each electric component control means. In addition, each electric component control means may start taking in the control command at the falling edge of the INT signal. Further, the polarity of the INT signal may be reversed from that shown in FIG.

  In this embodiment, in the prize ball processing, when the prize ball payout condition is satisfied, data capable of specifying the number of prize balls is stored in a ring buffer capable of storing a plurality of data at the same time, and the number of prize balls is designated. When the payout control command is sent, the data in the ring buffer area pointed to by the read pointer is transferred to the transmission buffer. Therefore, even if a plurality of winning ball payout conditions are satisfied at the same time, data capable of specifying the number of winning balls based on the satisfaction of these conditions is stored in the ring buffer, so there is no problem in command output processing based on the satisfaction of each condition. Executed.

  Furthermore, in this embodiment, both a payout stop state designation command or a payout enable state designation command and a command indicating the number of prize balls can be sent out within one prize ball process. That is, a plurality of commands can be sent within one control period activated every 2 ms. In this embodiment, a plurality of ring buffers are prepared for each control command (display control command, lamp control command, sound control command, payout control command) to each control means. When data that can specify a control command is set in the ring buffer of the control command, lamp control command, and sound control command, a plurality of display control commands, lamp control commands, and sound control commands are performed in one command control process. It is also possible to configure so that That is, a plurality of control commands can be sent simultaneously (meaning in the start cycle of the game control process, that is, the 2 ms timer interrupt process). Since the sending timing of these control commands is generated at the same time in the progress of the game effect, it is convenient to have such a configuration. However, since the payout control command is generated regardless of the progress of the game effect, it is generally not sent simultaneously with the display control command, the lamp control command, and the sound control command.

  Next, display control means will be described as an example of electrical component control means other than game control means.

  FIG. 40 is a flowchart showing main processing executed by the display control CPU 101. In the main processing, first, initialization processing is performed for clearing the RAM area, setting various initial values, initializing a 33 ms timer for determining the display control activation interval, and the like (step S701). Thereafter, in this embodiment, the display control CPU 101 shifts to a loop process for monitoring the timer interrupt flag (step S702). In the loop, a process for updating a counter for generating a predetermined random number is also performed (step S710). As shown in FIG. 41, when a timer interrupt occurs, the display control CPU 101 sets a timer interrupt flag (step S711). If the timer interrupt flag is set in the main process, the display control CPU 101 clears the flag (step S703) and executes the following variable display control process.

  In this embodiment, it is assumed that the timer interrupt takes every 33 ms. That is, the variable display control process is started every 33 ms. In this embodiment, only the flag is set in the timer interrupt process, and the specific variable display control process is executed in the main process. However, the variable display control process may be executed in the timer interrupt process. .

  In the variable display control process, the display control CPU 101 first analyzes the received display control command (command analysis execution process: step S705). Next, the display control CPU 101 performs display control process processing (step S708). In the display control process process, a process corresponding to the current control state is selected and executed from among the processes corresponding to the control state. Thereafter, the process returns to step S710. The display control process process includes a special symbol process process and a normal symbol process process. The special symbol process and the normal symbol process are selected according to different process flags, and the processes are performed independently.

  Next, display control command reception processing from the main board 31 will be described. FIG. 42 is an explanatory diagram showing a configuration example of a command reception buffer for storing a display control command received from the main board 31. In this example, a command reception buffer of a ring buffer format capable of storing six display control commands having a 2-byte configuration is used. Therefore, the command reception buffer is configured by a 12-byte area of reception command buffers 1 to 12. A command reception number counter indicating in which area the received command is stored is used. The command reception number counter takes a value from 0 to 11. It is not always necessary to use the ring buffer format. For example, three symbol designating command storage areas (2 × 3 = 6 byte command receiving buffer) and other command storing areas for designating other variation patterns ( (2 × 1 = 2-byte command reception buffer). Similarly, the sound control means and the lamp control means may have a buffer format other than the ring buffer format. In this case, the display control means, the sound control means, and the lamp control means are controlled based on the latest command stored in the storage area such as the variation pattern. Thereby, it is possible to quickly respond to an instruction from the main board 31.

  FIG. 43 is a flowchart showing display control command reception processing by interrupt processing. An INT signal for display control from the main board 31 is input to an interrupt terminal of the CPU 101 for display control. For example, when the INT signal from the main board 31 is turned on, the display control CPU 101 is interrupted. Then, the display control command reception process shown in FIG. 43 is started.

  In the display control command reception process, the display control CPU 101 first saves each register to the stack (step S670). When an interrupt occurs, the display control CPU 101 automatically sets the interrupt prohibited state. However, if a CPU that does not automatically enter the interrupt prohibited state is used, before executing the process of step S670. It is preferable to issue an interrupt prohibition instruction (DI instruction). Next, data is read from an input port assigned to input of display control command data (step S671). And it is confirmed whether it is the 1st byte of the display control command of 2 bytes composition (Step S672).

  Whether or not it is the first byte is confirmed by whether or not the first bit of the received command is “1”. The first bit of “1” is supposed to be MODE data (first byte) in the display control command having a 2-byte configuration (see FIG. 34). Therefore, if the first bit is “1”, the display control CPU 101 stores the received command in the reception command buffer indicated by the command reception number counter in the reception buffer area, assuming that the first valid byte has been received (step S1). S673).

  If it is not the first byte of the display control command, it is confirmed whether or not the first byte has already been received (step S674). Whether or not it has already been received is confirmed by whether or not valid data is set in the reception buffer (reception command buffer).

  If the first byte has already been received, it is confirmed whether or not the first bit of the received 1 byte is “0”. If the first bit is “0”, it is determined that a valid second byte has been received, and the received command is stored in the reception command buffer indicated by the command reception number counter + 1 in the reception buffer area (step S675). The first bit of “0” is supposed to be EXT data (second byte) in the display control command having a 2-byte configuration (see FIG. 34). If the confirmation result in step S674 indicates that the first byte has already been received, the process ends unless the first bit of the data received as the second byte is “0”.

  In step S675, when the command data of the second byte is stored, 2 is added to the command reception number counter (step S676). Then, it is confirmed whether or not the command reception counter is 12 or more (step S677), and if it is 12 or more, the command reception number counter is cleared (step S678). Thereafter, the saved register is restored (step S679), and interrupt permission is set (step S680).

  The display control command has a two-byte configuration, and the first byte (MODE) and the second byte (EXT) are configured to be immediately distinguishable on the receiving side. In other words, the reception side can immediately detect whether the data as MODE or the data as EXT has been received by the first bit. Therefore, as described above, it can be easily determined whether or not appropriate data has been received. This also applies to the payout control command, the lamp control command, and the voice control command.

  FIG. 44 is a flowchart illustrating a specific example of command analysis processing (step S705). The display control command received from the main board 31 is stored in the reception command buffer. In the command analysis process, the content of the command stored in the reception command buffer is confirmed.

  In the command analysis process, the display control CPU 101 first checks whether or not a reception command is stored in the command reception buffer (step S681). Whether it is stored or not is determined by comparing the value of the command reception counter with the read pointer. The case where both match is the case where the received command is not stored. When the reception command is stored in the command reception buffer, the display control CPU 101 reads the reception command from the command reception buffer (step S682). When read, the value of the read pointer is incremented by one.

  If the received received command is a left symbol designation command (step S683), the EXT data of the command is stored in the left stop symbol storage area (left symbol buffer) of the current storage area (step S684), and the corresponding valid flag is set. Set (step S685). Whether or not it is a left symbol designation command can be immediately recognized by the first byte (MODE data) of the 2-byte display control command.

  If the received received command is a middle symbol designation command (step S686), the EXT data of the command is stored in the middle stop symbol storage area (medium symbol buffer) of the current storage area (step S687), and the corresponding valid flag is set. Set (step S688). If the received received command is a right symbol designation command (step S689), the EXT data of the command is stored in the right stop symbol storage area (right symbol buffer) of the current storage area (step S690), and the corresponding valid flag is set. Set (step S691). The left middle right stop symbol storage area (left middle right symbol buffer) is provided in, for example, a RAM provided in the display control board 80.

  If the read command received is a variation pattern command (step S692), the display control CPU 101 stores the EXT data of the command in the variation pattern storage area (step S693) and sets the variation pattern reception flag (step S694). ). The variation pattern storage area is provided in, for example, a RAM provided in the display control board 80.

  If the read reception command is another display control command, a flag corresponding to the reception command is set (step S695).

  FIG. 45 is an explanatory diagram showing the relationship between the EXT data of the variation pattern command and the variation content (variation pattern table). As shown in FIG. 45, since the EXT data of the variation pattern command and the variation content are associated with each other, one variation content is specified based on the EXT data of the variation pattern command.

  FIG. 46 is an explanatory diagram showing an example of the contents of the variation pattern table. The variation pattern table is set in a ROM included in the display control board 80. As shown in FIG. 46, each variation pattern table is provided corresponding to the EXT data of the variation pattern command. Each variation pattern table is composed of a plurality of variation blocks, and each variation state (variation speed, variation period at that speed, etc.) is set.

  FIG. 47 is a flowchart showing the display control process (step S708) in the main process shown in FIG. In the display control process process, any one of steps S800 to S805 is performed according to the value of the display control process flag. In each process, the following process is executed.

  Display control command reception waiting process (step S800): It is confirmed whether or not a display control command (variation pattern command) capable of specifying the variation time has been received by the command reception interrupt process. Specifically, it is confirmed whether or not a flag indicating that the variation pattern command has been received is set. Such a flag is set when the received command stored in the received command buffer is a variation pattern command. In this example, in the initial setting after the power supply is started, the value of the display control process flag is set to a value corresponding to the display control command reception waiting process. Therefore, display control for restoring the display state of the variable display device 9 is also included in the process of step S800.

  Fluctuation pattern table setting process (step S801): A process of setting a fluctuation pattern table according to the received fluctuation pattern command is performed.

  All symbol variation start processing (step S802): Control is performed so that variation of the left middle right symbol is started.

  Symbol variation processing (step S803): Controls the switching timing of each variation state (variation speed, background, character) constituting the variation pattern, and monitors the end of the variation time. In addition, stop control of the left and right symbols is performed.

  All symbol stop waiting setting process (step S804): When a display control command (confirmation command) instructing all symbol stops is received at the end of the variation time, the symbol variation is stopped and the stop symbol (determined symbol) is displayed. Control.

  Big hit display process (step S805): After the end of the fluctuation time, the control of the probability variable big hit display or the normal big hit display is performed.

  48 and 49 are flowcharts showing the display control command reception waiting process (step S800). In the display control command reception waiting process, the display control CPU 101 first checks whether or not a special symbol power-on designation command has been received (step S811). If a special symbol power-on designation command has been received, the initial screen data stored in the ROM included in the display control board 80 is read and stored in the left middle right symbol buffer, and then stored in the left middle right symbol buffer. An initial screen is displayed on the variable display device 9 based on the data indicating the stored identification information (step S812). Therefore, before the initial screen is displayed on the variable display device 9, the stored contents of the left middle right symbol buffer of the main board 31 and the stored contents of the left middle right symbol buffer of the display control board 80 are made common. Will be. In this example, a special symbol of a predetermined combination is displayed on the initial screen. The special symbol power-on designation command is a display control command that is set and transmitted in the initialization command transmission table (see FIG. 11) described above, and initializes the control state when power supply is started. It is a display control command transmitted in the case.

  Note that whether or not the display control command in step S811 described above, step S813, step S815, step S816, step S819, step S821, step S824, and step S828 described below has been received is received by the corresponding command. Confirmation of the state of the flag indicating that it has been performed is performed. For example, with regard to a special symbol power-on designation command, it is performed by confirming whether or not a flag indicating that the special symbol power-on designation command has been received is set. Such a flag is set when the received command stored in the received command buffer is a special symbol power-on designation command. Then, the flag is reset before or after the processing based on the flag being set is executed.

  If the flag indicating reception of the special symbol power-on designation command is not set, the display control CPU 101 confirms whether or not a special symbol confirmation command has been received (step S813). If the special symbol confirmation command is received, the stored data of the left middle right symbol buffer stored in accordance with the symbol designation command received after the power supply is started is read out and the special symbol is read to the variable display device 9. Is displayed (step S814). Note that the special symbol confirmation commands to be confirmed here are the backup command transmission table during standby (see FIG. 15), the backup command transmission table before opening the big prize opening (see FIG. 17), and the backup while the big prize opening is open. A display control command that is set and transmitted in the command transmission table (see FIG. 18) or backup command transmission table at the time of jackpot end transmission (see FIG. 19), and transmitted when the control state is restored after the power supply is started. Display control command.

  If the flag indicating reception of the special symbol confirmation command is not set, the display control CPU 101 confirms whether or not a customer waiting demonstration display designation command has been received (step S815). If the customer waiting demonstration display designation command has been received, the process of step S827 described later is performed. The customer waiting demonstration display designation command is a display control command that is set and transmitted in the above-described standby backup command transmission table (see FIG. 15), and is used to restore the control state after the power supply is started. A display control command to be transmitted.

  If the flag indicating reception of the customer waiting demonstration display designation command is not set, the display control CPU 101 confirms whether or not a special symbol power failure recovery display command has been received (step S816). If the special symbol power failure recovery display command is received, the special symbol power failure recovery display screen is displayed on the variable display device 9 based on the data stored in the ROM included in the display control board 80 (step S817). The special symbol power failure recovery display command is a display control command that is set and transmitted in the above-described fluctuation backup command transmission table (see FIG. 16), and is used when the control state is restored after the power supply is started. A display control command to be transmitted. When the special symbol power failure recovery display screen is displayed, the value of the display control process flag is changed to a value corresponding to the symbol changing process (step S803) (step S818).

  If the flag indicating the reception of the special symbol power failure recovery display command is not set, the display control CPU 101 confirms whether or not the display command before the big winning opening is received (step S819). If the display command before the big winning opening is received, the display screen before opening the big winning opening is displayed on the variable display device 9 based on the data stored in the ROM included in the display control board 80 (step S820). . The display command before opening the winning a prize opening is a display control command that is set and transmitted in the backup command transmission table before opening the winning opening described above (see FIG. 17), and the control state is changed after the power supply is started. This is a display control command that is sent when restoring. When the display screen before opening the big prize opening is displayed, the value of the display control process flag is changed to a value corresponding to the jackpot display process (step S805) (step S823).

  If the flag indicating reception of the display command before opening the big winning opening is not set, the display control CPU 101 confirms whether or not the display command when opening the big winning opening is received (step S821). If the display command for opening the special winning opening is received, the display screen for opening the special winning opening is displayed on the variable display device 9 based on the data stored in the ROM included in the display control board 80 (step S822). . The display command when the special prize opening is opened is a display control command that is set and transmitted in the above-described special prize opening open backup command transmission table (see FIG. 18), and the control state is displayed after the power supply is started. This is a display control command that is sent when restoring. When the display screen when the big prize opening is opened is displayed, the value of the display control process flag is changed to a value corresponding to the jackpot display process (step S805) (step S823).

  If the flag indicating the reception of the display command when the big winning opening is opened is not set, the display control CPU 101 confirms whether or not the big hit end command has been received (step S824). If the jackpot end command has been received, the jackpot end display screen is displayed on the variable display device 9 based on the data stored in the ROM included in the display control board 80 (step S825). The jackpot end command is a display control command that is set and transmitted in the above-mentioned jackpot end backup command transmission table (see FIG. 19), and is transmitted when the control state is restored after the power supply is started. This is a display control command.

  If the flag indicating reception of the jackpot end command is not set, the display control CPU 101 checks whether or not the command non-reception timer has timed out (step S826). The command non-reception timer is timed out when a display control command indicating a change in symbol is not received from the main board 31 for a predetermined period or longer. If the time-out has occurred, the display control CPU 101 performs control to display a demonstration screen on the variable display device 9 (step S827). The main board 31 measures a period during which the display control command indicating the variation of the symbol is not transmitted, and transmits a display control command for instructing display of the demonstration screen when the measurement period is equal to or longer than the predetermined period. You may do it. If comprised in this way, in the demonstration display by the variable display apparatus 9, it will become possible to produce | present by the game presentation apparatus 29 grade | etc.,. In addition, if the main board 31 transmits a command instructing to perform a demonstration effect to the lamp control board 35 and the sound control board 70, it is also possible to perform a demonstration effect using a light emitter or sound.

  If the command non-reception timer has not timed out, the display control CPU 101 confirms whether or not a display control command capable of specifying the variation pattern has been received (step S828). In this embodiment, the display control command that can specify the variation pattern is any one of the variation pattern designation commands (variation pattern designation # 1 to variation pattern designation XX-1) shown in FIG. When a display control command capable of specifying the variation pattern is received, the value of the display control process flag is changed to a value corresponding to the variation pattern table setting process (step S801) (step S829).

  When changing the special symbol, the display control command first transmitted from the main board 31 to the display control board 80 is a command indicating a fluctuation pattern and a command designating a stop symbol of the left middle right symbol. They are stored in a definite command buffer.

  FIG. 50 is a flowchart showing the variation pattern table setting process (step S801). In the variation pattern table setting process, the display control CPU 101 identifies a variation pattern table based on the value of the received variation pattern command EXT data, and sets the variation pattern table as the variation pattern table to be used (step S831). ). Then, the display control CPU 101 changes the value of the display control process flag to a value corresponding to the all symbol variation start process (step S802) (step S832).

  Here, a transmission form of a command for designating a variation pattern command and a stop symbol of the left middle right symbol is described. The change pattern command and the command for designating the stop symbol of the left middle right symbol are transmitted in the display control command control process described above. When these commands are sent out, for example, as shown in FIG. 51, the CPU 56 sets INT data, command data 1 and command data 2 in the command transmission table pointed to by the command transmission number counter. First, the first command data (command data for designating the variation pattern set in the command transmission table +0) composed of the above three data is transmitted. Next, in the display control command control process executed for the next 2 ms (in this embodiment, the repetition cycle in which the built-in CTC of the CPU 56 repeatedly generates a timer interrupt is set to 2 ms), the next command Data (command data for designating a special symbol left stop symbol set in the command transmission table +1) is transmitted. When such a process is repeated and the special symbol command transmission pointer indicates the end code, the command data is not transmitted until the command transmission table is effectively designated by the special symbol command transmission pointer. The command data transmitted in this manner is received by the command reception process described above and stored in the reception command buffer. Each value indicating the command shown in FIG. 51 is an example, and 81 (H), 82 (H), and 83 (H) indicating the special symbol left middle right symbols are, for example, “1” and “2”, respectively. , “3” is a command for displaying on the variable display device 9.

  FIG. 52 is a flowchart showing all symbol variation start processing (step S802) in the display control process. In the all symbol variation start process, the display control CPU 101 first starts a variation time timer (step S840). Next, the special symbol variation is started (step S841), and the value of the display control process flag is set to a value corresponding to the symbol variation processing (step S842).

  FIG. 53 is a flowchart showing the symbol variation processing (step S803). In the symbol variation processing, the display control CPU 101 performs variation display on the variable display device 9 according to the contents shown in the variation pattern table set in step S821 (step S851). Specifically, the display control CPU 101 controls the VDP 103 so that display on the variable display device 9 is performed according to the set fluctuation pattern table.

  Next, the display control CPU 101 checks whether or not the variable time timer has timed out (step S852). When the variable time timer times out, the value of the display control process flag is changed to a value corresponding to the all symbol stop waiting process (step S804) (step S853).

  FIG. 54 is a flowchart showing the all symbol stop waiting process (step S804). In the all symbol stop waiting process, the display control CPU 101 confirms whether or not a display control command instructing all symbol stops has been received (step S871). If a display control command for instructing stop of all symbols has been received, control is performed to stop the symbols with the stored stop symbol (step S872). Then, in order to monitor the time until reception of the next display control command, a command non-reception timer is started (step S873).

  If the display control command for designating all symbols to be stopped has not been received, it is confirmed whether or not the monitoring timer has timed out (step S875). If the timeout has occurred, it is determined that some abnormality has occurred, and control is performed to display an error screen on the variable display device 9 (step S876).

  When the processing of step S873 is performed, if the big hit symbol is displayed in step S872, the display control CPU 101 sets the value of the display control process flag to a value corresponding to the big hit display processing (step S805) (step S805). S874). Note that if the jackpot symbol is not displayed in step S872 (when the missing symbol is displayed), the display control CPU 101 sets the value of the display control process flag to the value corresponding to the display control command reception waiting process (step S800). Set to.

  FIG. 55 is a flowchart showing the jackpot display process (step S805). In the big hit display process, the display control CPU 101 determines whether or not it is a probable big hit (step S881). For example, the display control CPU 101 can determine whether or not it is a probable big hit based on a confirmed symbol. If it is a probable big hit, the display control CPU 101 performs display control for displaying “probable big hit” on the variable display device 9 (step S882). Specifically, the display instruction of “probability big hit” is notified to the VDP 103. Then, the VDP 103 creates image data for the instructed display. Also, the image data is synthesized with the background image. If it is not a probable big hit, the display control CPU 101 performs display control for displaying “big hit” on the variable display device 9, for example (step S883).

  Thereafter, in the jackpot display process, display control of the variable display device 9 is performed based on the display control command in the jackpot gaming state transmitted from the main board 31. For example, display of the number of rounds, display of the count number indicating the number of game balls detected by the count switch 23 in the round game, and the like are performed. When a display control command indicating the end of the big hit game is received from the main board 31 (step S884), the value of the display control process flag is set to a value corresponding to display control command reception waiting (step S800) (step S885). .

  Next, the operation of the effect control means other than the display control means will be described. First, the operation of the lamp control means as the light emitter control means including the lamp control CPU 351 mounted on the lamp control board 35 as an example of the effect control means will be described.

  FIG. 56 is a flowchart showing main processing executed by the lamp control CPU 351. In the main process, the lamp control CPU 351 first executes an initialization process for initializing a register, a RAM including a work area, an output port, and the like (step S441). Next, it is confirmed whether or not a lamp control command has been received from the main board 31 (step S442: command confirmation processing). Further, a process of updating the random number according to the content of the received lamp control command is performed (step S443).

  Next, in accordance with the received lamp control command, command execution processing that is processing such as changing lamp data to be used is performed (step S444). The lamp control command from the main board 31 is taken in by an interrupt process activated in response to the input of the INT signal and stored in an input buffer formed in the RAM.

  Thereafter, in this embodiment, the lamp control CPU 351 proceeds to a loop process for monitoring the timer interrupt flag (step S445). As shown in FIG. 57, when a timer interrupt occurs, the lamp control CPU 351 sets a timer interrupt flag (step S449). If the timer interrupt flag is set in the main processing, the lamp control CPU 351 clears the flag (step S446), and performs lamp process update processing and port output processing (steps S447 and S448).

  In this embodiment, the lighting pattern of the lamp / LED that is controlled to blink according to the progress of the game is controlled according to the lamp data stored in the ROM. The ramp data is prepared for each type of control pattern (a control command indicating the variation pattern designation type shown in FIG. 37 and other game effects control sent from the game control means in accordance with the game progress status). Prepared for each command). In the lamp data, data indicating that the lamp / LED is turned on or off and data indicating a lighting or extinguishing period (process timer value) are set. That is, data indicating the lighting pattern of the light emitter is stored in the control data area.

  In the ramp process update process, the value of the timer corresponding to the process timer value is initially subtracted, and when the timer times out, the ramp data is updated according to the data set at the next address in the ramp data. A decision is made to turn off or turn on the LED, and a process timer value corresponding to the decision result is set in the timer. In addition, since the process timer value is set to the timer, it is when the lighting / extinguishing is switched, so in the port output processing, the data for turning on / off the lamp / LED is output to the corresponding output port. .

  In this embodiment, it is assumed that the timer interruption takes every 2 ms. That is, the ramp process update process and the port output process are started every 2 ms.

  Here, an address map of the ROM mounted on the lamp control board 35 will be described. The ROM area includes a control data area and a control program area. The control data area includes an initialization data table used for initialization of registers, RAM, output ports, etc., a storage display LED display table used for lighting / extinguishing control of the start memory indicator 18 and the like, and a lamp described later. Data etc. are stored. The control program area stores main processing programs, initialization processing, command recognition processing, and command execution processing programs, and specific lamp / LED processing, lamp process update processing, port output processing, command reception Stores programs for interrupt processing and timer interrupt processing.

  FIG. 58 is an explanatory diagram showing an example of the contents of lamp data stored in the control data area. In this embodiment, data indicating the lamp / LED lighting pattern is stored in the lamp data in the control data area. In the lamp / LED lighting pattern stored in the lamp data, the lamp / LED lighting pattern as shown in FIG. 58 is determined in correspondence with the variation pattern command (80XX (H)). That is, in this example, the lamp / LED lighting pattern stored in the lamp data is set so that the lamp / LED is lit in synchronization with the display variation mode executed in the display control board 80. ing. Then, in the lamp process update process (step S447) in the main process, lighting / extinguishing of the lamp / LED is controlled with reference to the lamp data. Accordingly, when control is performed according to the lamp / LED lighting pattern selected in accordance with the variation pattern command from the main board 31, the lighting / extinction of the lamp / LED is controlled in synchronization with the display on the display control board 80. It becomes like this.

  FIG. 59 is a flowchart illustrating an example of command execution processing executed by the lamp control CPU 351. In the command execution process, the lamp control CPU 351 checks whether or not a start winning memorized number lamp designation command has been received (step S444a). If the start winning memory number lamp designation command has been received, the lamp provided in the start memory display 18 is turned on or off according to the starting prize memory number designated by the received command (step S444b).

  For example, when the start winning memory number lamp designation command transmitted according to the initialization command transmission table (see FIG. 11) described above is received, the lamp control CPU 351 displays all the lamps included in the start memory display 18. Control to turn off. Further, for example, when the start winning memory number lamp designation command transmitted according to the above-mentioned backup command transmission table (see FIG. 13) is received, the lamp control CPU 351 receives the received start prize memory number lamp designation command. Control to turn on / off the lamp provided in the start memory display 18 is performed according to the contents.

  Next, the lamp control CPU 351 confirms whether or not a gate passing memory number lamp designation command has been received (step S444c). If the gate passing memory number lamp designation command has been received, the lamp provided in the normal symbol start memory display 41 is turned on or off according to the gate passing memory number designated by the received command (step S444d).

  For example, when the gate passing memory number lamp designation command transmitted according to the initialization command transmission table (see FIG. 11) described above is received, the lamp control CPU 351 receives all of the normal symbol start memory display 41. Control to turn off the lamp. For example, when the gate passing memory number lamp designation command transmitted according to the backup command transmission table (see FIG. 13) is received, the lamp control CPU 351 receives the received gate passing memory number lamp designation command. Control to turn on / off the lamp of the normal symbol start memory display 41 is performed according to the contents.

  Also, the lamp control CPU 351 checks whether or not a prize ball lamp command has been received (step S444e). If a prize ball lamp command has been received, the prize ball lamp 51 is turned on or off according to the content of the received command (step S444f). In this example, the lamp control CPU 351 turns off the prize ball lamp 51 when the received prize ball lamp command is a no prize ball remaining lamp designation command, and the received prize ball lamp command is a prize ball remaining lamp. If it is a designated command, the prize ball lamp 51 is turned on.

  For example, when a prize ball remaining lamp designation command transmitted according to the above-described initialization command transmission table (see FIG. 11) is received, the lamp control CPU 351 performs control to turn off the prize ball lamp 51. For example, when a prize ball lamp command transmitted according to the backup command transmission table (see FIG. 13) is received, the lamp control CPU 351 receives a prize ball according to the content of the received prize ball lamp command. Control to turn on / off the lamp 51 is performed.

  Further, the lamp control CPU 351 confirms whether or not a ball-out lamp command has been received (step S444g). If a ball break lamp command has been received, the ball break lamp 52 is turned on or off according to the content of the received command (step S444h). In this example, the lamp control CPU 351 turns off the bulb-out lamp 52 when the received bulb-out lamp command is a ball-in-battery lamp designation command, and the received bulb-out lamp command is a ball-less medium lamp designation command. If it is, the ball break lamp 52 is turned on.

  For example, when a ball-with-ball lamp designation command transmitted according to the above-described initialization command transmission table (see FIG. 11) is received, the lamp control CPU 351 performs control to turn off the bulb-out lamp 52. Further, for example, when a ball break lamp command transmitted according to the above-described backup command transmission table (see FIG. 13) is received, the lamp control CPU 351 performs ball break according to the content of the received ball break lamp command. Control to turn on / off the lamp 52 is performed.

  As described above, the game control means (CPU 56) instructs the display control means (display control CPU 101) to indicate the display mode of the variable display device at the start of power supply in relation to the start of power supply. When the startup display mode designating unit includes a time display mode designating unit (CPU 56) and is activated to restore the control state based on the storage contents of the fluctuation data storage unit, it is specified by the stored contents of the fluctuation data storage unit. A command (for example, the control command shown in FIG. 13, FIG. 15 to FIG. 19, FIG. 21, FIG. 22) according to the recovery control state to be transmitted is transmitted, and the initial state is based on the storage contents of the fluctuation data storage means In the case of initial startup for starting more control, an initial display that is a display mode of identification information in a variable display device at the time of starting power supply determined in advance And the initial display mode command (for example, a special symbol power-on screen display command) for instructing the display means a single command ("one command composed of a combination of command data 1 and command data 2") And the display control means executes a control to display the identification information in a predetermined initial display mode in response to the reception of the initial display mode command. An initial display operation at the start of supply can be performed, and the initial display operation at the start of power supply can be speeded up and stabilized.

  Further, as described above, the data indicating the initial display mode is stored in the non-volatile display data storage means (ROM 86 mounted on the display control board 80), and the identification information is initialized according to the reception of the initial display mode command. When executing the control to display in the display mode, since it is configured to be read from the nonvolatile display data storage means and used, the predetermined data stored in the nonvolatile display data storage means is used. Based on this, it is possible to display the initial display mode.

  Further, as described above, when the game control means is initially activated, the data indicating the initial display form stored in the non-volatile display data storage means (ROM 54) is displayed in association with the start of the control. Since it is configured to store in the storage area (left middle right symbol buffer), it is possible to grasp the initial display mode displayed on the variable display device by the game control means.

  Further, as described above, when the power supply is stopped until the initial variable display of the first identification information is executed in the variable display device after the initial start-up, in the case of the recovery start-up, the display mode designation means at start-up Is configured to transmit a command for designating the display mode of the identification information based on the data indicating the initial display mode stored in the display mode storage area in association with the start of the control at the time of the initial startup last time. Therefore, if the power supply does not stop after the initial activation, the initial display mode that was originally displayed can be displayed on the variable display device.

  In addition, as described above, the game control means executes a game control process that can transmit a command corresponding to the progress state of the game to the display control means in response to a timer interrupt that occurs every time a predetermined period elapses. Until the display mode of the variable display device at the start of power supply is specified by the startup display mode designating means (the process of step S13 shown in FIG. 9 at the time of initialization and the process of step S86 shown in FIG. 12 at the time of recovery are completed). Is configured to limit the execution of game control processing by timer interruption, so commands used for display control are not transmitted until the display mode of the variable display device at the start of power supply is specified. Therefore, the command transmission process at the time of activation can be executed smoothly, and the control of the display mode at the time of activation can be surely executed.

  In this example, when power supply is started, interrupt prohibition is set (step S1 shown in FIG. 9), and step S94 (FIG. 12) is performed when the game state recovery process restores the interrupt permission state. When the interrupt is enabled and the initialization process is performed, the interrupt is permitted in the loop process (step S19 shown in FIG. 9) executed after the timer interrupt is set. State. When the initialization process is performed, an interrupt permission state may be set after setting the timer interrupt (after step S15 shown in FIG. 9). If the game state restoration process does not restore the interrupt-permitted state, the interrupt-permitted state is obtained in the process after the game state is restored (for example, step S19 shown in FIG. 9 and step S35 shown in FIG. 23). It is said. Even in the case of recovery during the execution of the game control process by timer interruption in the game state recovery process, each process shown in FIG. 9 in the game state recovery process is completed before the game control process is resumed. Yes. As described above, in this example, at least the display mode of the variable display device at the start of power supply is specified (the process of step S13 shown in FIG. 9 at the time of initialization and the process of step S86 shown in FIG. 12 at the time of recovery). Since the interrupt is prohibited until the process is completed, execution of the game control process by the timer interrupt is limited.

  Further, as described above, the startup display mode designating unit determines the power according to the recovery command transmission table (the backup command transmission table shown in FIGS. 13, 15 to 19, 21, and 22). Since it is configured to transmit a command for designating the display mode of the variable display device at the start of supply, the control burden related to the transmission of the command for designating the display mode at the time of activation is reduced.

  In addition, as described above, when the recovery control state (the control state recovered based on the storage contents of the backup RAM in the game state recovery process) is being executed in the variable display of the identification information in the variable display device Indicates that the identification information mode designation command (designation designation command) for designating the display mode of the identification information specifies the mode of the identification information that is the display result of the variable display to be restored and that the control state is restored. Since it is configured to send a recovery display command (special symbol power failure recovery display command) that specifies the display of the recovery screen, when recovering to the control state during the variable display of identification information in the variable display device, The display mode of the variable display device at the time of restoration can be designated. These commands are transmitted according to the recovery command transmission table (see FIG. 16). Since the control signal to be transmitted is predetermined according to the control state to be recovered, the control state is changed. A control burden related to transmission of a control signal for recovery is reduced.

  In this example, the display control means is configured to execute variable display for a predetermined period based on a variation pattern command from the game control means. If the game control means cannot grasp the display mode of the variable display device 9 during execution of variable display, and the recovery control state is during execution of variable display of identification information in the variable display device, the game control means recovers. Because the display mode during variable display cannot be specified as the control status to be restored, the recovery screen indicating that the control status is restored (for example, “The control status has been restored now.”) Control for designating the display mode of the screen indicating that there is. Therefore, in this example, when the recovery control state is during execution of variable display of identification information in the variable display device, the display control means responds to reception of a special symbol power failure recovery display command at the start of power supply. After the restoration screen is displayed on the variable display device 9 for a predetermined period (remaining period in which variable display is executed), control is performed to display a confirmed symbol based on the received symbol designation command.

  The display control means may be configured to change the display mode in response to the reception of a command from the game control means when executing variable display and maintain the display until the command is received. . In this case, when the recovery control state is during execution of variable display of identification information in the variable display device, at the start of power supply, the game control means transmits again the command transmitted before the power supply is stopped The display mode of the variable display device 9 may be controlled to be restored to the display mode when power supply is stopped.

  In addition, as described above, when the recovery control state is a standby state for execution of variable display of identification information in the variable display device, an identification information mode designation command (designation designation command for designating the display mode of identification information) ) To send the standby screen display command (customer waiting display display command) to specify the status of the identification information that is the display result of the previous variable display and to specify the standby state display indicating the standby state Therefore, when the variable display device is restored to the standby state for executing the variable display of the identification information, the display mode of the variable display device at the time of recovery can be designated. These commands are transmitted according to the recovery command transmission table (see FIG. 15). Since the control signal to be transmitted is predetermined according to the control state to be recovered, the control state is A control burden related to transmission of a control signal for recovery is reduced.

  Further, as described above, when the recovery control state is a gaming state related to a specific gaming state, the specific gaming state is generated by an identification information mode designation command (designation designation command) for designating a display mode of identification information. The mode of the identification information that is the display result of the variable display that is the condition of the game is specified, and the game state corresponding to the progress state of the specific game state is specified (for example, the display command before opening the big prize opening, the big prize) The display mode of the variable display device at the time of restoration is designated when restoring the gaming state related to the specific gaming state. be able to. In addition, these commands are configured to be transmitted according to the recovery command transmission table (see FIG. 17 to FIG. 19), and since the control signal to be transmitted is predetermined according to the control state to be recovered, A control burden related to transmission of a control signal for restoring the control state is reduced.

  In addition, as described above, when the recovery control state is during a round game in the specific game state (during the execution of the round game in the big hit game state), the identification information mode designation command for designating the display mode of the identification information (Designation command) is used to specify the mode of identification information that is the display result of the variable display that is the condition for the occurrence of the specific gaming state, and to specify the display of the screen during the round (display command when the big prize opening is opened) ) Is transmitted, it is possible to specify the display mode of the variable display device at the time of recovery when the game state is restored to the game state during the round game in the specific game state. These commands are transmitted according to the recovery command transmission table (see FIG. 18). Since the control signal to be transmitted is predetermined according to the control state to be recovered, the control state is changed. A control burden related to transmission of a control signal for recovery is reduced.

  When the recovery control state is a round game in the specific game state, a command indicating whether or not the game control means has won a V prize (detection of a game ball by the V prize switch 22) at the start of power supply. It is good also as a structure which displays the presence or absence of V prize (whether round continuation right was acquired) on the display screen of the restored variable display apparatus 9 as a structure which transmits.

  Further, as described above, when the recovery control state is in the round interval in the specific gaming state, the specific gaming state is determined by the identification information mode specifying command (designating command) for specifying the display mode of the identification information. Since it is configured to specify the mode of the identification information that is the display result of the variable display that is the condition for occurrence, and to send a command (display command before opening the big prize opening) that specifies the display of the round interval screen When the game state is restored during the round interval in the specific game state, the display mode of the variable display device at the time of restoration can be designated. In addition, these commands are transmitted according to the recovery command transmission table (see FIG. 17). Since the control signal to be transmitted is predetermined according to the control state to be recovered, the control state is changed. A control burden related to transmission of a control signal for recovery is reduced.

  Further, as described above, when the recovery control state is at the end of the specific gaming state, the specific gaming state is generated by the identification information mode specifying command (design specifying command) for specifying the display mode of the identification information. Since the mode of the identification information that is the display result of the variable display that becomes the condition of the above is specified, and the command for specifying the display of the screen indicating the end of the specific gaming state (the jackpot end command) is transmitted When the game state at the end of the specific game state is restored, the display mode of the variable display device at the time of restoration can be designated. These commands are transmitted according to the recovery command transmission table (see FIG. 19). Since the control signal to be transmitted is predetermined according to the control state to be recovered, the control state is changed. A control burden related to transmission of a control signal for recovery is reduced.

  Further, as described above, since the identification information mode designation command (symbol designation command) for designating the display mode of the identification information is transmitted regardless of the control state of the recovery control state, variable display is possible. The display mode displayed on the device can always be synchronized between the game control means and the display control means.

  In addition, as described above, when the initialization process is performed when the power supply is started, the electrical component that notifies the control state by the light emitter configured by a lamp, the LED, or the like according to the initialization command transmission table For example, an initialization command (see FIG. 11) for initializing the state of the start memory display 18, normal symbol start memory display 41, prize ball lamp 51, ball break lamp 52, etc. is transmitted. Therefore, it is possible to initialize the electrical components at the start of power supply by simple control, and to speed up and stabilize the initial operation at the start of power supply.

  In addition, as described above, when the state restoration process is performed after the power supply is started, the electrical component (notifying the control state by a light emitter configured by a lamp, an LED, etc.) according to the backup command transmission table ( For example, since it is configured to transmit a recovery command (see FIG. 13) for recovering the state of the start memory display 18, normal symbol start memory display 41, prize ball lamp 51, ball break lamp 52, etc., it is simple. Such control makes it possible to restore the state of the electrical components at the start of power supply, and to speed up and stabilize the initial operation at the start of power supply.

  In addition, as described above, electrical components that notify the control state by a light emitter composed of a lamp, an LED, etc. (for example, the start memory display 18, the normal symbol start memory display 41, the prize ball lamp 51, the ball-out lamp) 52), the case where the state is initialized and the case where the state is restored are configured to use different command transmission tables, so that it is possible to prevent an erroneous control state from being notified.

  In addition, as described above, the initialization command and the recovery command transmitted at the time of startup are the same as the control commands used in normal control, so that the control state to be initialized or restored as in this example is set. Even if the initial operation is performed using the corresponding command transmission table, the number of commands does not increase.

  Further, as described above, when the power supply is started and the state restoration process is performed, a restoration command (prize ball lamp command) indicating whether or not there is an unpaid prize ball to be given to the player is transmitted. Since it is set as the structure and it is set as the structure which restores the state of the prize ball lamp 51, it becomes possible to protect a player's profit.

  Further, as described above, when power supply is started and state recovery processing is performed, a recovery command (out of ball) indicating whether or not a predetermined amount or more of game media to be given to the player is stored in the gaming machine. Lamp command) is transmitted and the state of the ball-out lamp 52 is restored, so that it is possible to protect the player's profit.

  Furthermore, as described above, the initial specified by the left middle right symbol buffer storing the identification information displayed as the display result of the variable display on the variable display device 9 based on the initialization command transmitted at the time of activation. Since the data indicating the display mode is stored, it is possible to improve the efficiency of the control in the display control means.

  In the above-described embodiment, “single command” means one command for giving a control command to each electric component control board on the command receiving side. In the embodiment described above, a “single command” is configured by a combination of MODE data and EXT data. It should be noted that either one of the MODE data and the EXT data may be a control command, and one of the data may constitute a “single command”. The “single command” may have any byte structure as long as it is recognized as one command for performing a control command.

  In the above-described embodiment, the display control means receives the data indicating the initial display mode stored in the character ROM 86 in response to the reception of the initial mode display command (for example, the special symbol power-on screen display command). The configuration is such that the initial display mode is read and displayed on the variable display device 9, but the data indicating the initial display mode stored in the character ROM 86 is not used, or the data indicating the initial display mode is not stored in the character ROM 86. It is good. In this case, the initial mode display command includes data for specifying the initial display mode (for example, data indicating the initial display mode), and the display control means sets the initial display mode derived by the received initial mode display command. What is necessary is just to make it display on the variable display apparatus 9. FIG.

  In the above-described embodiment, the display control means receives data indicating the initial display mode stored in the character ROM 86 in response to reception of an initial mode display command (for example, a special symbol power-on screen display command). The initial display mode is read and displayed on the variable display device 9, but the display control unit displays the initial display mode derived based on the data stored in the character ROM 86 on the variable display device 9. It may be configured to execute. In this case, for example, a plurality of data stored in the character ROM 86 may be calculated, and an initial display mode may be derived according to the calculation result.

  In the embodiment described above, the command to be transmitted is determined using the command transmission table (see FIGS. 11, 13, 15 to 19, 21, and 22) at the start of power supply. The command to be transmitted may be determined according to processing based on software.

  Further, in the above-described embodiment, when power supply is started and state recovery processing is performed, a command (for example, whether there is a probability change state or not) indicating whether or not a special gaming state (for example, a probability change state, a time reduction state) is determined. A special symbol recovery designation command for designating a normal symbol and a normal symbol restoration designation command for designating whether or not it is in a short-time state (see FIG. 13). The display control means is a variable display device in response to the reception of the command. Although the example of changing the background color of 9 is described, for example, a gaming state lamp for notifying whether or not the control state is a special gaming state is provided to the gaming machine, and whether or not the special gaming state is set. The lamp control means may be configured to turn on / off the gaming state lamp in response to receiving a command indicating the above.

  In the embodiment described above, the “specific game state” means a state that is advantageous for a player who is given a predetermined game value. Specifically, the “specific game state” is, for example, a right for a variable winning ball apparatus to be in a state advantageous to a player who easily hits a ball (a big hit gaming state) or a state advantageous to a player. Is a state in which a predetermined game value is given, such as a state in which a game has occurred, or a condition in which a premium game medium payout condition is easily established.

  In the embodiment described above, the “special game state” means a state advantageous to a player who is likely to make a big hit. Specifically, the “special gaming state” includes, for example, a probability variation state in which the probability that a special symbol is a big hit symbol is a high probability state, a short time state in which the number of fluctuations of a normal symbol per unit time is increased, This is a high probability state in which the probability of a big hit such as an open extended state in which the opening period and the number of opening times of the device 15 are increased is increased. In the short-time state, since the number of opening of the variable winning ball apparatus 15 is increased, the number of winnings per unit time is increased, and the variable display number of special symbols per unit time is increased. It can be said that has been raised. Similarly, in the open extended state, since the opening period and the number of opening times of the variable winning ball apparatus 15 are increased, the number of winnings per unit time is increased, and the number of special symbols variable display times per unit time is increased. Therefore, it can be said that the probability of being a big hit is increased.

  Further, the pachinko gaming machine 1 according to each of the embodiments described above has a predetermined game value given to the player when the special symbol stop symbol variably displayed on the variable display device 9 based on the start winning is a combination of the predetermined symbols. The first type pachinko gaming machine that can be granted, the second type pachinko that can be given a predetermined game value to the player if there is a winning in a predetermined area of the electric game that is released based on the start winning A third-class pachinko machine where a predetermined right is generated or continued when there is a prize for a predetermined electric game that is released when the stop symbol of the pattern variably displayed based on the starting prize is a combination of the predetermined pattern The present invention can also be applied to a gaming machine.

  In the above embodiment, the following gaming machines are also disclosed.

(1) The display control means includes a non-volatile display data storage means (for example, a character ROM 86) in which data used for controlling the variable display device is stored, and the data indicating the initial display mode is stored in the display data. A gaming machine stored in the means and used by being read from the display data storage means and executing control for displaying the identification information in the initial display mode in response to reception of the initial display mode command.
According to such a configuration, it becomes possible to display the initial display mode based on predetermined data stored in the non-volatile display data storage means.

(2) The game control means includes non-volatile control data storage means (for example, ROM 54) in which control data used when controlling the progress of the game is stored, and the identification information is variable with respect to the display control means. Identification information to be displayed on a variable display device, including a display mode storage area for transmitting data for specifying a display mode of identification information to be displayed as a display result of display, and storing data capable of specifying the identification information specified by the command Display mode storage area (for example, left middle right symbol buffer) that stores data that can specify the display mode of the game, and when the game control means is initially activated, the initial stored in the control data storage means A gaming machine configured to store data indicating a display mode in a display mode storage area (for example, stored by the process of step S14).
According to such a configuration, the initial display mode displayed on the variable display device can be grasped by the game control means.

(3) After the initial activation, when the power supply is stopped before the variable display of the identification information is executed in the variable display device, when the activation display mode designation means is initially activated in the recovery activation A game machine configured to transmit a command (for example, a symbol designating command) for designating a display mode of identification information based on data indicating an initial display mode stored in the display mode storage area.
According to such a configuration, it is possible to cause the variable display device to display the initial display mode originally displayed unless the power supply is stopped after the initial startup.

(4) A game control process (for example, as shown in FIG. 23) in which the game control means can transmit a command corresponding to the progress state of the game to the display control means in response to a timer interrupt that occurs every elapse of a predetermined period. Process) until the display mode of the variable display device at the start of power supply is specified by the startup display mode specifying means (for example, until the processing of step S13 is completed or until the processing of step S86 is completed). Is a gaming machine configured to limit the execution of game control processing by timer interruption.
According to such a configuration, it is possible to reliably execute control of the display mode at the time of activation.

(5) A recovery time command transmission table (backup time command transmission tables shown in FIGS. 13, 15 to 19, 21, and 22) in which the contents of commands to be transmitted for each recovery control state are stored, and at startup A gaming machine configured such that the display mode designating unit transmits a command (for example, a symbol designating command) for designating the display mode of the variable display device at the start of power supply in accordance with the recovery time command transmission table. .
According to such a configuration, a control burden related to transmission of a command for designating a display mode at the time of recovery is reduced.

(6) When the recovery control state is during execution of variable display of identification information in the variable display device, it is executed by an identification information mode specifying command (for example, symbol specifying command) for specifying the display mode of the identification information A gaming machine configured to designate an aspect of identification information which is a display result of variable display in the middle.
According to such a configuration, it is possible to specify a display mode of identification information when recovery is performed during execution of variable display.

(7) When the recovery control state is a standby state in which the variable display of the previous identification information on the variable display device ends and the variable display of the next identification information starts, A gaming machine configured to designate an aspect of identification information that is a display result of the previous variable display by an identification information aspect designation command (for example, a symbol designation command) that designates a display aspect.
According to such a configuration, it is possible to specify the display mode of the identification information when the variable display is restored to the standby state.

(8) When the recovery control state is a specific gaming state, an identification information mode specifying command (for example, a symbol specifying command) that specifies the display mode of the identification information has become a condition for generating the specific gaming state. A gaming machine configured to designate an aspect of identification information that is a display result of variable display.
According to such a configuration, it is possible to specify a display mode of identification information when the game state is restored.

(9) A gaming machine configured to transmit an identification information mode designation command (for example, a symbol designation command) for designating a display mode of identification information regardless of the recovery control status.
According to such a configuration, the display mode displayed on the variable display device can always be synchronized between the game control means and the display control means.

1 Pachinko machine 9 Variable display 10 Normal symbol display 31 Main board 35 Lamp control board 54 ROM
55 RAM (variable data storage means)
56 CPU
80 Display control board 101 Display control CPU
351 CPU for lamp control

Claims (1)

A game having a variable display device capable of variably displaying identification information, and capable of being controlled to a specific gaming state advantageous to the player when the identification information displayed as a display result on the variable display device is in a specific display mode. Machine,
Display control means for controlling the variable display device;
Even if the power supply to the gaming machine is stopped, it has a variable data storage means capable of holding the stored contents for a predetermined period, and controls the progress of the game and transmits a command according to the progress of the game Game control means;
Power supply monitoring means for outputting a detection signal based on a decrease in power supply voltage used in the gaming machine;
An initialization operation means for outputting an operation signal according to the operation,
The game control means includes
In response to the input of the detection signal from the power supply monitoring means, a process for setting a backup flag in the fluctuation data storage means and check data used for determining whether or not the stored contents of the fluctuation data storage means are normal And executing a power-off process including a process of storing in the fluctuation data storage means and a process of prohibiting access to the fluctuation data storage means,
When the operation signal from the initialization operation unit is input when power supply is started, an initialization process for initializing the storage contents of the variation data storage unit is performed.
When the operation signal from the initialization operation means is not inputted when power supply is started, it is determined whether or not the backup flag is set in the variation data storage means, and the backup If it is determined that the flag is not set, the initialization process is executed. If it is determined that the backup flag is set in the variable data storage unit, the initialization is stored in the variable data storage unit. Based on the check data that is stored, it is determined whether or not the storage content of the variation data storage means is normal, and if it is determined that the storage content of the variation data storage means is not normal, the initialization process is executed, If it is determined that the storage content of the data storage means is normal, the control state is changed to the power-off state based on the storage content of the fluctuation data storage means. Run the recovery process for returning to the state,
When the recovery process is executed at the start of power supply, a recovery command is sent,
A gaming machine, wherein an initialization command is transmitted when the initialization process is executed at the start of power supply.

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