JP5127273B2 - Method for manufacturing solar cell element - Google Patents

Description

  The present invention relates to a method for manufacturing a solar cell element.

  A general solar cell element is manufactured as follows.

  First, a p-type semiconductor substrate made of single crystal silicon, polycrystalline silicon, or the like having a thickness of about 0.2 to 0.5 mm and a size of about 100 to 150 mm square is prepared.

  Next, an n-type diffusion layer having an n-type conductivity is provided by diffusing an n-type impurity of a reverse conductivity type to a certain depth in the vicinity of the surface (light-receiving surface) side of the semiconductor substrate, and between the p-type semiconductor substrate. A pn junction is formed.

  Next, an antireflection film made of a silicon oxide film, a silicon nitride film, a titanium oxide film, or the like is formed.

  And the surface electrode and back surface electrode of a solar cell element can be obtained by apply | coating and baking the electrically conductive paste which has a metal as a main component.

  In recent years, in order to reduce the cost of solar cell elements, a reduction in the thickness of the silicon substrate to 200 μm or less has been studied. As a problem in realizing such a thinning, as the silicon substrate is made thinner, the warpage due to the difference in thermal expansion between the current collector 5b (aluminum electrode) of the back electrode 5 mainly composed of aluminum is increased. It may be easy to occur.

That is, the thermal expansion coefficient of silicon is 2.5 × 10 ⁻⁶ / deg, whereas aluminum is 23.25 × 10 ⁻⁶ / deg, both having a difference of about 10 times. The warpage of the silicon substrate is caused by the difference in the coefficient of thermal expansion when the temperature is lowered after the aluminum paste is printed on the silicon substrate and baked.

  When such a warp occurs, there is a problem that a handling error to an automatic machine is likely to occur in the subsequent processes, the solar cell element is cracked or chipped, and the manufacturing yield is lowered due to a transportation trouble. Moreover, it is necessary to make a solar cell element into a flat state in the case of a module process, and in that case, a crack may generate | occur | produce in a semiconductor substrate and a problem may be produced on an electrical property and an external appearance.

  As a solution to such a problem, a method of physically reducing the warping force by reducing the amount of aluminum paste applied and making the aluminum electrode thin is assumed.

  However, this method has a problem that the amount of aluminum diffused into the silicon substrate is reduced, the back surface electric field region 6 is hardly formed, and the power generation efficiency is lowered.

For this, an aluminum powder, an organic vehicle, an inorganic compound having a lower coefficient of thermal expansion than aluminum and a melting temperature, softening temperature, or decomposition temperature higher than the melting point of aluminum, specifically SiO ₂ And a method of forming a back electrode by using a paste added with Al ₂ O ₃ or the like (see, for example, Patent Document 1).
Japanese Patent Laid-Open No. 2003-223813

  However, although the above-described method can reduce the warpage of the silicon substrate, the inorganic compound added to the conductive paste is present as it is after firing, so that the resistance of the back electrode is increased and the device characteristics are increased. There was a problem of lowering.

  This invention is made | formed in view of the said subject, and it aims at providing the manufacturing method of the solar cell element which can suppress the fall of an element characteristic and can reduce the curvature of a semiconductor substrate.

According to one aspect of the present invention, there is provided a method for manufacturing a solar cell element comprising: a baking step of baking a semiconductor substrate having a conductive paste formed on one main surface at a maximum baking temperature of 450 ° C. or more; And a maintaining step of maintaining a predetermined temperature of 250 ° C. or higher and 400 ° C. or lower during the cooling process for 20 seconds or longer and 600 seconds or shorter.

In addition, a method for manufacturing a solar cell element according to one embodiment of the present invention includes a baking step of baking a semiconductor substrate having a conductive paste formed on one main surface at a maximum baking temperature of 450 ° C. or higher, and after the baking step. A cooling step of cooling to 100 ° C. or lower at a cooling rate of 10 ° C./second or higher, and after the cooling step, the semiconductor substrate is maintained at a predetermined temperature of 250 ° C. or higher and 400 ° C. or lower for 20 seconds or longer and 600 seconds or shorter And a maintenance step.

  According to these, it becomes possible to obtain a solar cell element in which the deterioration of the element characteristics is suppressed and the warpage of the semiconductor substrate is reduced.

In each of the above inventions, the maintenance time is preferably 20 seconds or more and 600 seconds or less , and the conductive paste preferably contains aluminum as a main component, and thereby more effectively achieves the object. Is possible.

  The manufacturing method of the solar cell element of this invention is demonstrated in detail.

≪Solar cell element≫
FIG. 1 is a cross-sectional view showing a solar cell element formed using the method for manufacturing a solar cell element according to an embodiment of the present invention, and FIG. 2 shows an example of the electrode shape of the solar cell element shown in FIG. 2A is a light receiving surface side (front surface), and FIG. 2B is a non-light receiving surface side (back surface). In the figure, 1 is a semiconductor substrate, 2 is a diffusion layer, 3 is an antireflection film, 4 is a front electrode, 5 is a back electrode, 5a is an output extraction part, 5b is a current collecting part, and 6 is a back surface electric field region. .

  Here, the effect | action of the solar cell element shown in FIG. 1 is demonstrated easily.

  When light is incident from the side of the antireflection film 3 that is the light receiving surface side of the solar cell element, it is absorbed and photoelectrically converted in the bulk region of the semiconductor substrate 1 that is mainly a p-type semiconductor, and electron-hole pairs (electron carriers and Hole carriers) are generated. Photoelectron-generated electron carriers and hole carriers (photogenerated carriers) generate a photovoltaic force between the front electrode 4 provided on the front side of the solar cell element and the back electrode 5 provided on the back side.

  The antireflection film 3 plays the role of increasing the amount of photogenerated carriers by reducing the reflectance in a desired light wavelength region depending on the refractive index and the film thickness of the film to be the antireflection film, and thus the light of the solar cell element. The current density Jsc is improved.

Also, aluminum acting as a p-type impurity element is usually diffused into the back surface of the silicon substrate with respect to silicon, which is a semiconductor substrate, to form a back surface electric field region 6 that becomes a p ⁺ region on the back surface side portion of the silicon substrate. . The back surface field region 6 is also called a BSF (Back Surface Field) region, and prevents a decrease in efficiency due to recombination due to photogenerated carriers near the back surface of the semiconductor substrate 1. For this reason, photogenerated carriers generated near the back surface of the semiconductor substrate 1 are accelerated by this electric field, so that electric power is effectively extracted, and in particular, photosensitivity of a long wavelength is increased. As a result, the photocurrent density Jsc is improved, and since the minority carrier (electron) density is reduced in the back surface electric field region 6, the diode current amount (dark current amount) in the region in contact with the back electrode 5 is reduced. As a result, the open circuit voltage Voc is improved.

≪Method for manufacturing solar cell element≫
Next, a method for manufacturing a solar cell element having the above-described structure will be described for each step.

<Preparation process of semiconductor substrate>
The semiconductor substrate 1 is made of single crystal or polycrystalline silicon. When semiconductor silicon is used as the semiconductor substrate 1, it contains about 1 × 10 ¹⁶ to 10 ¹⁸ atoms / cm ^{3 of} semiconductor impurities having p-type conductivity such as boron (B), and has a specific resistance of 0.2 to 2. A substrate of about 0 Ω · cm is preferably used. A single crystal silicon substrate is formed by a pulling method or the like, and a polycrystalline silicon substrate is formed by a casting method or the like. Since a polycrystalline silicon substrate can be mass-produced and is more advantageous than a single crystal silicon substrate in terms of manufacturing cost, an example using polycrystalline silicon will be described here.

  The polycrystalline silicon ingot is formed by, for example, a casting method, sliced to a thickness of 500 μm or less, more preferably 350 μm or less, and cut into a size of about 10 cm × 10 cm to 20 cm × 20 cm to form a semiconductor substrate 1. . In order to clean the mechanically damaged layer and the contaminated layer on the cut surface of the substrate, it is desirable that the surface is etched by a very small amount with NaOH, KOH, hydrofluoric acid, or hydrofluoric acid.

  Thereafter, it is desirable to form minute protrusions on the surface of the silicon substrate using a dry etching method or a wet etching method. In particular, it is preferable to form a concavo-convex (roughened) structure having a light reflectance reduction function on the semiconductor substrate surface side, which is a light incident surface, using a dry etching method, a wet etching method, or the like.

<Diffusion layer formation process>
Thereafter, an n-type diffusion layer 2 is formed. P (phosphorus) is preferably used as the n-type doping element, and the n + type having a sheet resistance of about 30 to 300 Ω / □ is used. As a result, a pn junction is formed between the p-type bulk region.

The diffusion layer 2 includes an ion implantation method in which p ⁺ ions are directly diffused, a coating thermal diffusion method in which P ₂ O ₅ in a paste state is applied to a semiconductor substrate surface to thermally diffuse, and a POCl ₃ (phosphorus oxychloride in a gas state). ) As a diffusion source. The diffusion layer 2 is formed to a depth of about 0.2 to 0.5 μm. In the case where a diffusion region is also formed on the surface opposite to the target surface, a diffusion prevention film may be previously formed on that portion, or the portion may be removed by etching later. At this time, the diffusion layer 2 other than the surface side of the semiconductor substrate 1 is removed by applying a resist film on the surface side of the semiconductor substrate 1 and etching away using hydrofluoric acid or a mixed solution of hydrofluoric acid and nitric acid. This is done by removing the resist film. As will be described later, when the back surface electric field region 6 is formed of an aluminum paste, aluminum which is a p-type dopant can be diffused to a sufficient depth at a sufficient concentration. The influence of the shallow n-type diffusion layer can be ignored, and it is not necessary to remove the n-type diffusion layer formed on the back surface side.

  Note that the method for forming the diffusion layer 2 is not limited to the above method. For example, a thin film technology and conditions are used to form a hydrogenated amorphous silicon film, a crystalline silicon film including a microcrystalline silicon film, or the like. Also good. Furthermore, an i-type silicon region (not shown) may be formed between the semiconductor substrate 1 and the diffusion layer 2.

<Antireflection film formation process>
Next, the antireflection film 3 is formed. Examples of the material for the antireflection film 3 include a SiNx film (composition ratio (x) having a width centered on Si ₃ N ₄ stoichiometry), a TiO ₂ film, a SiO ₂ film, a MgO film, an ITO film, and a SnO film. _Two films, a ZnO film, or the like can be used. The thickness is appropriately selected depending on the material so that a non-reflection condition can be realized with respect to appropriate incident light. For example, when the semiconductor substrate 1 is a silicon substrate, the refractive index may be about 1.8 to 2.3 and the thickness may be about 500 to 1200 mm.

  As a manufacturing method of the antireflection film 3, it is formed using a PECVD method, a vapor deposition method, a sputtering method or the like. The antireflection film 3 is patterned in a predetermined pattern in order to form the surface electrode 4 when the surface electrode 4 is not formed by a fire-through method described later. As a patterning method, an etching method using a mask such as a resist (wet or dry), or a method in which a mask is formed in advance when the antireflection film 3 is formed, and then the antireflection film 3 is formed and then removed can be used. On the other hand, in the case of using the so-called fire-through method in which the surface electrode 4 and the diffusion layer 2 are electrically contacted by directly applying and baking the conductive paste of the surface electrode 4 on the antireflection film 3, the patterning is necessary. Absent. In FIG. 2A, since the fire-through method is used, the patterning is not performed.

Further, it is desirable to form a back surface electric field region 6 in which one conductivity type semiconductor impurity is diffused at a high concentration on the back surface side of the semiconductor substrate 1. B (boron) or Al (aluminum) can be used as the impurity element, and an ohmic contact can be obtained with the back surface electrode 5 to be described later by setting the impurity element concentration to a high concentration and p ⁺ type. . As a manufacturing method, a thermal diffusion method using BBr ₃ (boron tribromide) as a diffusion source is used and formed at a temperature of about 800 to 1100 ° C. After applying by the printing method, a method in which aluminum is diffused toward the semiconductor substrate 1 by heat treatment (baking) at a temperature of about 700 to 850 ° C. can be used. When the back surface electric field region 6 is formed by a thermal diffusion method, it is desirable to previously form a diffusion barrier such as an oxide film in the diffusion layer 2 that has already been formed. Further, if a method of printing and baking aluminum paste is used, not only a desired diffusion region can be formed only on the printing surface, but also at the same time as the diffusion layer 2 is formed on the back surface side as described above. It is not necessary to remove the n-type reverse conductivity type diffusion layer. The back surface electric field region 6 forms an internal electric field on the back surface side of the semiconductor substrate 1 in order to prevent a decrease in efficiency due to carrier recombination near the back surface of the semiconductor substrate 1.

  Further, the baked aluminum can be used as it is as the current collector 5a of the back electrode without being removed.

  Next, the surface electrode 4, the back electrode 5 comprised from the current collection part 5b and the output extraction part 5a are formed as follows.

<Application process of conductive paste>
For the surface electrode 4, for example, a metal powder made of silver or the like, an organic vehicle, and a glass frit are added in a paste form by adding 10 to 30 parts by weight and 0.1 to 5 parts by weight, respectively, with respect to 100 parts by weight of silver. The conductive paste is applied to a predetermined electrode shape such as a lattice as shown in FIG. As a coating method, a known method such as a screen printing method can be used. After coating, it is preferable to dry the solvent by evaporating at a predetermined temperature of about 150 ° C., for example. The drying after applying the conductive paste may be omitted if there is no problem that the previous conductive paste adheres to the work table or screen of the printing machine when the conductive paste is applied later. This also applies to the following steps.

  For the output extraction part 5a constituting the back electrode 5, as in the case of the front electrode 4, for example, a metal powder made of silver powder, an organic vehicle, and a glass frit are 10 to 30 parts by weight with respect to 100 parts by weight of silver. .1-5 parts by weight of a conductive paste made into a paste is applied so as to have an electrode shape as shown in FIG. As the coating method, a known method such as a screen printing method can be used. After coating, it is preferable to evaporate the solvent at a predetermined temperature of about 150 ° C. and dry it.

  For the current collector 5b constituting the back electrode 5, 10 to 30 parts by weight and 0.1 to 5 parts by weight, for example, of metal powder made of aluminum powder, an organic vehicle, and glass frit are added to 100 parts by weight of silver. The conductive paste added to form a paste is applied so as to have an electrode shape as shown in FIG. That is, it is preferable to provide an opening excluding the above-described output extraction portion 5a and apply to almost the entire back surface, and the current collection portion 5b and the output extraction portion 5a are formed so as to partially overlap. As the coating method, a known method such as a screen printing method can be used. After coating, it is preferable to evaporate the solvent at a predetermined temperature of about 150 ° C. and dry it.

  Here, after the silver paste is applied to form the output extraction part 5a, the current collecting part 5b may be formed by applying an aluminum paste, or may be formed in the reverse order.

<Baking process of conductive paste>
The semiconductor substrate 1 is subjected to a baking process in which the conductive paste applied and dried as described above is baked at a maximum temperature of 450 to 850 ° C., more preferably 500 ° C. or more for several tens of seconds to several tens of minutes. On the other hand, the front electrode 4 and the back electrode 5 (the output extraction part 5a and the current collection part 5b) can be formed.

  In the firing process, a batch-type firing furnace or a continuous firing furnace such as a walking beam type or a belt-type continuous firing furnace can be used. However, when a continuous firing furnace is used, a large amount is continuously produced. It is desirable because the semiconductor substrate 1 can be processed and the productivity is high. Among continuous firing furnaces, the semiconductor substrate 1 is placed on a conveyor belt that penetrates the heating section of the firing furnace, and this conveyor belt is rotated endlessly to pass through the heating section of the firing furnace. The belt-type continuous firing furnace is desirable because it is easy to adjust and provides high reproducibility, and can smoothly pass the semiconductor substrate through the firing furnace.

  FIG. 3 is a schematic cross-sectional view showing a belt-type continuous firing furnace used in the method for producing a solar cell element of the present invention. In the figure, 11 is a conveyor belt, 12 is an upper heater, 13 is a lower heater, 14 is a cover, and 15 is a roller.

  The belt-type continuous firing furnace for treating the semiconductor substrate 1 has a plurality of upper heaters 12 and lower heaters 13 mounted in a cover 14 provided to insulate heat and safety, and the atmosphere from outside air. Yes. The upper heater 10 and the lower heater 13 are heaters such as far-infrared and near-infrared, and include a resistance coil and a lamp. In FIG. 3, each of the upper heater 12 and the lower heater 13 is divided into three parts, but is not limited to this and may be more or less than this. However, in order to freely set the temperature profile for heating the semiconductor substrate, it is desirable that the temperature is divided into three or more.

  Furthermore, although both the upper heater 12 and the lower heater 13 were described in FIG. 3, it is not restricted to this, The structure of only the upper heater 12 or only the lower heater 13 may be sufficient. However, when the conductive paste is applied to both surfaces of the semiconductor substrate 1, it is more desirable that both the upper heater 12 and the lower heater 13 are provided, because firing can be performed simultaneously by using these.

  A conveyor belt 11 is provided through the furnace in the longitudinal direction of the belt-type continuous firing furnace, and the conveyor belt 11 circulates when the roller 15 is driven to rotate, whereby the conveyor belt 11 is placed on the conveyor belt 11. The semiconductor substrate 1 passes through the firing furnace. The transport belt 11 is made of, for example, a metal mesh having heat resistance. Further, a loader (not shown) for continuously disposing the semiconductor substrate 1 before firing on the transport belt 11 is provided on the entrance side of the transport belt 11, and further, firing is performed on the exit side of the transport belt 11. You may provide the unloader (not shown) which can pick up the subsequent semiconductor substrate 1 from the conveyance belt 11 continuously.

  About such a baking process, the characteristic part of this invention is demonstrated in detail.

  Hereinafter, the belt-type continuous firing furnace of FIG. 3 will be described, but other firing furnaces may be used as long as similar firing conditions can be realized. The belt type continuous firing furnace is set to a temperature distribution in which the temperature rises rapidly from the vicinity of the inlet, rises to 450 to 850 ° C., which is the maximum firing temperature, and quickly decreases after reaching the maximum firing temperature. ing.

[First embodiment]
The present embodiment is characterized by including a maintaining step of maintaining a cooling rate of 7.5 ° C./second or less for a predetermined time in a temperature region of 250 ° C. or more in the cooling process from the maximum firing temperature.

  That is, if the firing temperature of the electrode, for example, silver / aluminum, reaches the maximum firing temperature and sinters the electrode, the electrode is maintained at a temperature of 250 ° C. or higher at which the tensile strength of the electrode (eg, aluminum electrode) is significantly reduced. By setting the temperature to 250 ° C. or higher, the elongation rate with respect to the load (stress) per unit area of aluminum is remarkably improved. By maintaining the temperature for a predetermined time, the semiconductor substrate returns to the flat (original shape). A force to try is generated and aluminum can be formed. In this way, the stress generated in the solar cell element is removed by reducing the tensile strength of the electrode and using the effect of returning to the flat (original shape) with respect to the bending of the semiconductor substrate, thereby reducing warpage. To do.

[Second Embodiment]
In the present embodiment, a semiconductor substrate having a conductive paste formed on one main surface is baked at a maximum baking temperature of 450 ° C. or higher, and after the baking step, a cooling rate of 10 ° C./second or higher is set to 100. A cooling step of cooling to a temperature of less than or equal to ° C., and a maintenance step of maintaining the semiconductor substrate in a temperature region of 250 ° C. or higher for a predetermined time after the cooling step.

  In other words, after the firing process / cooling process, by providing a separate maintenance process, the tensile strength of the electrode is reduced, and the effect of trying to return to the flat (original shape) against the bending of the semiconductor substrate is utilized. Thus, the stress generated in the solar cell element is removed, the warp after firing is reduced, and a solar cell element with a good manufacturing yield is obtained. Cooling to 100 ° C. or lower, more preferably 50 ° C. or lower in the cooling step is preferable in terms of workability such as taking out the substrate.

  Next, various preferable aspects in the first embodiment and the second embodiment will be described.

  First, the temperature in the maintaining step is preferably 400 ° C. or lower, more preferably 350 ° C. or lower, but it may be determined based on the temperature at which the tensile strength of the electrode is lowered. Setting to 400 ° C. or lower is preferable because damage to the reverse conductivity type diffusion region 2 can be suppressed and adverse effects on the electrical characteristics of the solar cell element can be reduced.

  Further, the maintaining time is preferably 20 seconds or more and 600 seconds or less, more preferably 60 seconds or more and 480 seconds or less. However, if it is shorter than 20 seconds, the warp may not be sufficiently reduced, which is not preferable. On the other hand, when the time is longer than 600 seconds, the reverse conductivity type diffusion region 2 is damaged and may adversely affect the electrical characteristics of the solar cell element.

  Furthermore, since the firing step is preferably performed at a temperature of 10 ° C./second or more, more preferably 20 ° C./second or more before and after the maximum firing temperature, from the viewpoint of output characteristics, the maintaining step from the maximum firing temperature. It is preferable to maintain at a predetermined temperature after rapid cooling to a predetermined temperature in (in the second embodiment, rapid cooling to 100 ° C. or lower and heating to a predetermined temperature). The temperature increase rate and the temperature decrease rate are calculated from the gradient of the temperature profile before and after the maximum firing temperature by attaching a thermocouple to the semiconductor substrate and taking a temperature profile (temperature-time).

  Furthermore, when forming the front surface electrode 4 and the back surface electrode 5, even when the firing step is separated, a maintenance step may be provided after each firing step (cooling step), or the final firing step. You may provide a maintenance process only after (-cooling process).

  Furthermore, in the maintenance step, the temperature maintained in a multistage manner at a temperature of 250 ° C. or higher may be changed. For example, after rapid cooling from the highest firing temperature to 350 ° C., the temperature is maintained at 350 ° C. for a predetermined time (several tens of seconds to several minutes), and further maintained at a temperature of 300 ° C. for a predetermined time (several tens of seconds to several minutes). It doesn't matter. Furthermore, after rapid cooling from the highest firing temperature to 350 ° C. (heating in the second embodiment), the temperature is lowered at a rate of temperature drop of 7.5 ° C./second or less, more preferably 2.5 ° C./second or less. The semiconductor substrate may be maintained.

  Furthermore, after maintaining at a predetermined temperature, the temperature may be returned to room temperature at a rate of about 10 ° C./second.

  By passing through each process demonstrated above, it becomes possible to obtain the solar cell element with which curvature was reduced, without adding an inorganic compound etc. in an electrically conductive paste.

  In addition, this invention is not limited to the said embodiment, Many corrections and changes can be added within the scope of the present invention.

  For example, the structure of the solar cell element is not limited to this, and the solar cell element can be used for a solar cell element having electrodes on only one side, and is not limited to a crystalline silicon solar cell element.

  Also, the conductive paste to be fired, the electrode shape to be applied, or the application method are not limited to the above examples, and any combination of materials and shapes that can exhibit characteristics as a solar cell element is unique to the present invention. Needless to say, the effects can be obtained.

  An n-type diffusion layer 2 having a sheet resistance of 60Ω / □ was formed by diffusing phosphorus atoms on the surface of a polycrystalline silicon p-type semiconductor substrate 1 having a thickness of 150 μm and an outer shape of 15 cm × 15 cm. An antireflection film 3 made of a silicon nitride film was formed on the diffusion layer 2. Then, as shown in FIG. 2, an aluminum paste is applied to the substantially entire surface on the back surface side, and a silver paste is applied to the front surface side and the back surface side, dried, and then subjected to surface conditions according to the firing conditions described below. 4 and the output extraction part 5a, the current collection part 5b, and the back surface electric field area | region 6 were formed, and the solar cell element was produced.

  The firing condition of the solar cell element (No. 1) as a comparative example is a belt type continuous firing furnace, the semiconductor substrate coated with the conductive paste is put into the firing furnace, and the maximum firing temperature is set as the firing condition. The temperature was set to 750 ° C., and after reaching the maximum firing temperature, it was rapidly cooled at a temperature lowering rate of 30 ° C./second, and then returned to room temperature without being maintained at a predetermined temperature.

  In the firing conditions of the solar cell elements (Nos. 2 to 7) which are the examples of the present invention, the semiconductor substrate coated with the conductive paste was put into the firing furnace using a belt type continuous firing furnace, and the firing conditions were set. The maximum firing temperature is set to 750 ° C., and after reaching the maximum firing temperature, the sample is rapidly cooled to a predetermined temperature of 420 to 200 ° C. at a temperature drop rate of 30 ° C./second, and then maintained at a temperature of 420 to 200 ° C. for 25 seconds and then returned to room temperature. It was.

  The firing conditions were confirmed by attaching a thermocouple to the semiconductor substrate in advance and taking a temperature profile (temperature-time).

  Thus, about each solar cell element produced, the curvature amount and element characteristic were evaluated.

  FIG. 4 is a cross-sectional view for explaining a method of evaluating the warpage amount of the semiconductor substrate according to this example. The amount of warpage was evaluated by a value including the thickness of the semiconductor substrate 1. Specifically, the height of a predetermined position is measured with a laser displacement meter, and as shown in FIG. 4, the amount of warpage is calculated by the difference in height between the lowest part (horizontal plane) and the highest part when placed on a horizontal plane. evaluated.

  The element characteristic measured VI characteristic on AM1.5 conditions using a solar simulator. In addition, F. in an Example. F. The decrease rate of (−) and Pm (W) is the same as that of the comparative example. F. It is the value which compared the value of (-) and Pm (W) as a reference value.

The evaluation results are shown in Table 1.

  As shown in Table 1, the comparative example (No. 1) had a warp value of 5.5 mm, whereas the present example (Nos. 2 to 6) had a warp value of 5.0 mm. The device characteristics were almost the same as those of the comparative example. However, No. in which the temperature of a maintenance process is 200 degreeC. No. 7 had a warp value of 5.3 mm, and it was found that the effect of reducing the warp was poor compared to other examples.

  Next, regarding the rate of decrease in device characteristics, No. Although 3 to 6 is 97% or more and deterioration of characteristics can be suppressed, 2 was 95%, showing a slight decrease compared to the other examples.

  The manufacturing method of the solar cell element is the same as that of the above-described Example 1, and only different parts will be described below.

  In the firing conditions of the solar cell element (No. 1) which is a comparative example, the semiconductor substrate coated with the conductive paste is put into the firing furnace using a belt type continuous firing furnace, and the maximum firing temperature is set as the firing condition. The temperature was set to 750 ° C., and after reaching the maximum firing temperature, it was rapidly cooled at a temperature lowering rate of 30 ° C./second, and then returned to room temperature (25 ° C.) without being maintained at a predetermined temperature.

  The baking process of the solar cell element (No. 8-18) which is an Example of this invention once cools to normal temperature on the baking conditions similar to a comparative example, and heats to predetermined temperature after that, and performs a maintenance process. In the maintaining step, the semiconductor substrate on which the electrode was formed was maintained at a temperature of 420 to 200 ° C. for 480 seconds, and then returned to room temperature. For the temperature of 350 ° C., an experiment was conducted in which the maintenance time was changed from 20 seconds to 780 seconds.

  About each solar cell produced in this way, the amount of warpage and device characteristics of the solar cell element were evaluated in the same manner as in Example 1.

The evaluation results are shown in Table 2.

  As shown in Table 2, the comparative example No. In No. 1, the value of warpage was 5.5 mm. In 8-12 and 14-18, the value of the warp was 5.0 mm or less, and the device characteristics were also substantially equivalent to those of the comparative example. However, no. In No. 13, the value of the warpage was 5.2 mm, and it was found that the effect of reducing the warp was poor as compared with other examples.

  Furthermore, no. In Nos. 9-12 and 15-18, the deterioration rate of the element characteristics can be suppressed to 97% or more. In Nos. 8 and 14, the reduction rate of the element characteristics was about 95%, and a slight reduction was observed as compared with other examples.

  In particular, No. having maintenance temperatures of 250 ° C., 300 ° C., and 350 ° C. No. 9-12, and the maintenance time is 480 seconds, 120 seconds, 60 seconds. 10, no. More preferable results were obtained in 15-17.

It is sectional drawing which shows the solar cell element formed using the manufacturing method of the solar cell element which concerns on one Embodiment of this invention. It is a top view which shows an example of the electrode shape of the solar cell element shown in FIG. 1, (a) is a light-receiving surface side (front surface), (b) is a non-light-receiving surface side (back surface). It is a schematic sectional drawing which shows the belt type continuous baking furnace used for the manufacturing method of the solar cell element of this invention. It is sectional drawing for demonstrating the evaluation method of the curvature amount of a semiconductor substrate.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate 2 ... Diffusion layer 3 ... Antireflection film 4 ... Front electrode 5 ... Back electrode 5a ... Output extraction part 5b ... Current collecting part 6 ... Back electric field field 11. ・ Conveyor belt 12 ・ ・ Upper heater 13 ・ ・ Lower heater 14 ・ ・ Cover 15 ・ ・ Roller

Claims (3)

A firing step of firing a semiconductor substrate having a conductive paste formed on one main surface at a maximum firing temperature of 450 ° C. or higher;
And a maintenance step of maintaining a predetermined temperature of 250 ° C. or higher and 400 ° C. or lower during the cooling process from the maximum firing temperature for a time of 20 seconds or longer and 600 seconds or shorter. A firing step of firing a semiconductor substrate having a conductive paste formed on one main surface at a maximum firing temperature of 450 ° C. or higher;
A cooling step of cooling to 100 ° C. or lower at a cooling rate of 10 ° C./second or higher after the firing step;
And a maintaining step of maintaining the semiconductor substrate at a predetermined temperature of 250 ° C. or higher and 400 ° C. or lower for a time of 20 seconds or longer and 600 seconds or shorter after the cooling step. The conductive paste, a method for manufacturing a solar cell element according to claim 1 or 2, characterized in that the main component of aluminum.

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