KR20130104309A - Solar cell and method for manufacturing the same - Google Patents

Abstract

PURPOSE: A solar cell and a manufacturing method thereof are provided to remove a separate isolation process by etching the side of a semiconductor substrate when an emitter layer is removed from the rear of the semiconductor substrate. CONSTITUTION: A semiconductor substrate (10) including a first surface and a second surface is prepared. The first surface faces the second surface. A first uneven part (102) is formed by etching the first surface and the second surface of the semiconductor substrate. An emitter layer (20) is formed by doping the first surface and the second surface of the semiconductor substrate with a second conductive dopant. A second uneven part (104) is formed by etching the second surface of the semiconductor substrate and is different from the first uneven part. A rear electric field layer (30) is formed by doping the second surface of the semiconductor substrate with the second conductive dopant.

Description

SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME

The present invention relates to a solar cell and a manufacturing method thereof, and more particularly, to a solar cell including a semiconductor substrate and a manufacturing method thereof.

With the recent depletion of existing energy sources such as oil and coal, interest in alternative energy to replace them is increasing. Among them, solar cells are attracting attention as a next-generation battery that converts solar energy into electric energy.

In such a solar cell, a dopant layer is formed to cause photoelectric conversion to form a pn junction, or the like, and an electrode connected to the n-type dopant layer and / or the p-type dopant layer is formed. The difficulty of the process and the characteristics of the solar cell may vary according to the order of the process of forming such various layers and electrodes. Therefore, there is a need for a manufacturing method that can simplify the process of a solar cell while improving the characteristics of the solar cell.

An embodiment of the present invention is to provide a solar cell and a method of manufacturing the same that can improve productivity by improving the characteristics of the solar cell while simplifying the process of the solar cell.

The method of manufacturing a solar cell according to the present embodiment includes preparing a semiconductor substrate having a first surface and a second surface opposite to each other and including a first conductivity type dopant; Etching the first and second surfaces of the semiconductor substrate to form first unevenness; Forming an emitter layer by doping a second conductive dopant to the first surface and the second surface of the semiconductor substrate; Etching the second surface of the semiconductor substrate to form second unevenness having a shape different from the first unevenness while removing the emitter layer from the second surface; And doping a second conductive dopant on the second surface of the semiconductor substrate to form a backside electric field layer.

A solar cell according to the present embodiment includes a semiconductor substrate having a first surface and a second surface opposite to each other and including a first conductivity type dopant; An emitter layer formed on the first surface of the semiconductor substrate and including a second conductivity type dopant; A backside field layer formed on the second surface of the semiconductor substrate and including a first conductivity type dopant; A first electrode electrically connected to the emitter layer; And a second electrode electrically connected to the rear front layer. First unevenness including an angled portion is formed on the first surface of the semiconductor substrate, and second unevenness having a rounded shape is formed on the second surface of the semiconductor substrate so as to have a shape different from the first unevenness. do.

According to the present exemplary embodiment, the manufacturing method of the solar cell can be simplified while changing the process order, the process method, and the like to improve the characteristics of the solar cell.

That is, after the emitter layers are formed on both surfaces of the semiconductor substrate, the emitter layer formed on the rear surface of the semiconductor substrate is removed, and the rear electric field layer is formed on the rear surface of the semiconductor substrate 10. As a result, the process of forming the anti-doping layer and the process of removing the anti-doping layer may be omitted, thereby simplifying the process. In addition, damage to the semiconductor substrate that may occur when the anti-doping layer is removed may be prevented, and a drop in open voltage, which may occur because the anti-doping layer is not completely removed, may be prevented. In addition, it is possible to effectively remove impurities (eg, metal such as iron (Fe)) collected by the guttering phenomenon that may be caused by the dopant. In this case, the process of removing the emitter layer may be performed in an inline process to simplify the process.

In addition, the first unevenness and the emitter layer having an angular shape are formed on both sides of the semiconductor substrate, and then the first unevenness is etched together when the emitter layer formed on the rear surface of the semiconductor substrate is removed to form the second unevenness of the round shape. Can be. Then, it is possible to improve the rear passivation characteristics by reducing the area of the rear surface without adding a separate process. In addition, when the emitter layer formed on the rear surface is removed, the side surface of the semiconductor substrate may be etched together so that a separate isolation process may be omitted.

1 is a cross-sectional view of a solar cell according to an embodiment of the present invention.
2 is a flowchart illustrating a method of manufacturing a solar cell according to an embodiment of the present invention.
3A to 3G are cross-sectional views illustrating a method of manufacturing a solar cell according to an embodiment of the present invention.
4 is a cross-sectional view illustrating a step of forming second unevenness of the method of manufacturing a solar cell according to the embodiment of the present invention.
5 is a cross-sectional view of a solar cell according to another embodiment of the present invention.
6 is an optical micrograph of the second unevenness of the solar cell manufactured according to the experimental example of the present invention.
7 is a graph showing the reflectivity at the front and rear of the solar cell manufactured according to the experimental example of the present invention.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention; However, it is needless to say that the present invention is not limited to these embodiments and can be modified into various forms.

In the drawings, the same reference numerals are used for the same or similar parts throughout the specification. In the drawings, the thickness, the width, and the like are enlarged or reduced in order to clarify the description. The thickness, the width, and the like of the present invention are not limited to those shown in the drawings.

Wherever certain parts of the specification are referred to as "comprising ", the description does not exclude other parts and may include other parts, unless specifically stated otherwise. Also, when a portion of a layer, film, region, plate, or the like is referred to as being "on" another portion, it also includes the case where another portion is located in the middle as well as the other portion. When a portion of a layer, film, region, plate, or the like is referred to as being "directly on" another portion, it means that no other portion is located in the middle.

Hereinafter, with reference to the accompanying drawings will be described in detail a solar cell and a method of manufacturing the same according to an embodiment of the present invention.

1 is a cross-sectional view of a solar cell according to an embodiment of the present invention.

Referring to FIG. 1, the solar cell 100 according to the present exemplary embodiment is positioned on the first surface (hereinafter, “front surface”) of the semiconductor substrate 10 including the first conductivity type dopant, and the semiconductor substrate 10. The emitter layer 20 including the second conductivity type dopant, the back surface field layer 30 including the first conductivity type dopant, which is located on the second side (hereinafter referred to as the "back side") of the semiconductor substrate 10, and the semiconductor substrate ( The anti-reflection film 22 and the first electrode 24, the passivation film 32 and the second electrode 34 positioned on the rear surface of the semiconductor substrate 10 may be formed on the front surface of the 10. This will be described in more detail as follows.

The semiconductor substrate 10 may include various semiconductor materials. For example, the semiconductor substrate 10 may include silicon including a first conductivity type dopant. As silicon, single crystal silicon or polycrystalline silicon may be used, and the first conductivity type dopant may be, for example, n-type. That is, the semiconductor substrate 10 may be formed of single crystal or polycrystalline silicon doped with a Group 5 element such as phosphorus (P), arsenic (As), bismuth (Bi), and antimony (Sb)

As such, when the semiconductor substrate 10 having the n-type dopant is used, the emitter layer 20 having the p-type dopant is formed on the entire surface of the semiconductor substrate 10 to form a pn junction. When the pn junction is irradiated with light, electrons generated by the photoelectric effect move toward the rear surface of the semiconductor substrate 10, are collected by the second electrode 34, and the holes move toward the front surface of the semiconductor substrate 10 1 electrode 24, respectively. Thereby, electric energy is generated.

In this case, holes having a slower moving speed than electrons may move to the front surface of the semiconductor substrate 10 instead of the rear surface, thereby improving conversion efficiency.

First and second uneven surfaces 102 and 104 having different shapes may be formed on the front and rear surfaces of the semiconductor substrate 10 by texturing, which will be described in detail later.

An emitter layer 20 having a second conductivity type dopant may be formed on the front side of the semiconductor substrate 10. In the present exemplary embodiment, the emitter layer 20 may use p-type dopants such as boron (B), aluminum (Al), gallium (Ga), and indium (In), which are Group 3 elements, as the second conductivity type dopant.

The anti-reflection film 22 and the first electrode 24 are formed on the emitter layer 20 in front of the semiconductor substrate 10.

The antireflection film 22 may be formed substantially entirely on the entire surface of the semiconductor substrate 10 except for the portion where the first electrode 24 is formed. The antireflection film 22 reduces the reflectivity of light incident on the front surface of the semiconductor substrate 10 and immobilizes defects existing in the surface or bulk of the emitter layer 20. [

The anti-reflection film 22 may increase the amount of light that reaches the pn junction formed at the interface between the semiconductor substrate 10 and the emitter layer 20 by decreasing the reflectance of light incident through the entire surface of the semiconductor substrate 10. Accordingly, the short circuit current Isc of the solar cell 100 can be increased. The anti-reflection film 22 may passivate defects in the emitter layer 20 to remove recombination sites of minority carriers, thereby increasing the open voltage Voc of the solar cell 100. As described above, the conversion voltage of the solar cell 100 may be improved by increasing the open voltage and the short circuit current of the solar cell 100 by the anti-reflection film 22.

The anti-reflection film 22 may be formed of various materials. For example, the antireflection film 22 may be a single film selected from the group consisting of a silicon nitride film, a silicon nitride film including hydrogen, a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, MgF ₂ , ZnS, TiO ₂ and CeO ₂ , Layer structure having a combination of at least two layers. However, the present invention is not limited thereto, and it goes without saying that the anti-reflection film 22 may include various materials.

The first electrode 24 may include various metals having excellent electrical conductivity. For example, the first electrode 24 may include silver (Ag) having excellent electrical conductivity. However, the present invention is not limited thereto, and may be formed of a single layer including a transparent conductive material, or may have a form in which a metal material layer (called a "bus bar" or a "finger electrode") is stacked on the transparent conductive material layer. .

In addition, the back surface field layer 30 including the first conductivity type dopant is formed on the back side of the semiconductor substrate 10 at a higher doping concentration than the semiconductor substrate 10. The rear electric field layer 30 may contribute to improving efficiency of the solar cell by minimizing rear recombination of electrons and holes. The back surface layer 30 may include phosphorus (P), arsenic (As), bismuth (Bi), antimony (Sb), and the like.

In addition, a passivation film 32 and a second electrode 34 may be formed on the rear surface of the semiconductor substrate 10.

The passivation film 32 may be formed substantially on the entire rear surface of the semiconductor substrate 10 except for the portion where the second electrode 34 is formed. This passivation film 32 can pass the defects present on the back surface of the semiconductor substrate 10 to remove recombination sites of minority carriers. As a result, the open voltage Voc of the solar cell 100 may be increased.

The passivation film 32 may be made of a transparent insulating material so that light can be transmitted. Therefore, light can be incident also on the rear surface of the semiconductor substrate 10 through the passivation film 32, thereby improving the efficiency of the solar cell 100. For example, the passivation film 32 may be formed of a silicon nitride film, a silicon nitride film including hydrogen, a silicon oxide film, a silicon oxynitride film, any single film selected from the group consisting of MgF ₂ , ZnS, TiO _2, and CeO ₂ or two or more films. It can have a combined multilayer structure. However, the present invention is not limited thereto, and it goes without saying that the passivation film 32 may include various materials.

The second electrode 34 may include various metals having excellent electrical conductivity. For example, the second electrode 34 may include silver (Ag) having excellent electrical conductivity and high reflectance. When silver having a high reflectance is used as the second electrode 34, light exiting to the rear surface of the semiconductor substrate 10 may be reflected and directed back into the semiconductor substrate 10, thereby increasing the amount of light used.

The second electrode 34 may be formed to have a larger width than the first electrode 24.

In the above description, the semiconductor substrate 10 has an n-type and the emitter layer 20 has a p-type, but the present invention is not limited thereto. Accordingly, the semiconductor substrate 10 may have a p-type, and the emitter layer 20 may have a n-type.

In the solar cell 100 according to the present embodiment, the first unevenness 102 is formed on the front surface of the semiconductor substrate 10, and the second unevenness different from the first unevenness 102 is formed on the rear surface 10 of the semiconductor substrate 10. 104 is formed. At this time, the first concave-convex 102 may have a shape including an angled portion, and the second concave-convex 104 may have a rounded shape.

For example, the first unevenness 102 may have a pyramid shape, and the second unevenness 104 may have a wormlike shape. However, the present invention is not limited thereto, and the first unevenness 102 and the second unevenness 104 may have various other shapes.

As such, the front surface of the semiconductor substrate 10 on which the first unevenness 102 having the angular shape is formed may have a lower average reflectance AWR than the rear surface of the semiconductor substrate 10 on which the second unevenness of the round shape is formed. Can be. For example, the front surface of the semiconductor substrate 10 may have a reflectivity of less than 20% (for example, 5-20%, more precisely 12-18%), and the rear surface of the semiconductor substrate 10 may have 25-35% ( For example, it may have an average reflectivity of 28 ~ 33%). However, these figures are only examples and specific figures may of course vary.

As such, the reflectivity of the entire surface of the semiconductor substrate 10 through which sunlight is incident can be sufficiently lowered to increase the amount of light reaching the pn junction formed at the interface between the semiconductor substrate 10 and the emitter layer 20. In addition, the back surface of the semiconductor substrate 10 may improve the passivation characteristics by reducing the area relatively by the rounded second unevenness 104. As described above, the open voltage may be improved by minimizing light loss on the front surface of the semiconductor substrate 10 and by improving passivation characteristics on the back surface. As a result, the efficiency of the solar cell 100 can be improved.

In addition, the solar cell 100 having the first unevenness 102 and the second unevenness 104 may be manufactured by a simple manufacturing process, which will be described in more detail in the manufacturing method.

A method of manufacturing the solar cell 100 according to the present embodiment will be described in detail with reference to FIGS. 2, 3A to 3G, and FIG. 4. The above-described parts will not be described in detail, and will not be described in detail.

2 is a flowchart illustrating a method of manufacturing a solar cell according to an embodiment of the present invention, and FIGS. 3A to 3G are cross-sectional views illustrating a method of manufacturing a solar cell according to an embodiment of the present invention. 4 is a cross-sectional view illustrating a step of forming second unevenness of the method of manufacturing a solar cell according to the embodiment of the present invention.

Referring to FIG. 2, the method of manufacturing a solar cell according to the present embodiment includes preparing a semiconductor substrate (ST10), forming a first unevenness (ST20), forming an emitter layer (ST30), and 2 forming the unevenness (ST40), forming the rear electric field layer (ST50), removing and cleaning impurities (ST60), forming the anti-reflection film and passivation film (ST70) and forming the electrode ( ST80).

First, as shown in FIG. 3A, in the preparing of the semiconductor substrate (ST10), the semiconductor substrate 10 having the first conductivity type dopant is prepared.

Subsequently, as shown in FIG. 3B, in the step ST20 of forming the first unevenness, the front and rear surfaces of the semiconductor substrate 10 are etched to form first unevenness 102 on each of the front and rear surfaces. The first unevenness 102 may be performed by a wet etching method to simplify the manufacturing process. For example, the first concave-convex 102 may be formed together on the front and rear surfaces of the semiconductor substrate 10 by immersing the semiconductor substrate 10 in an etching solution. According to the wet etching method, the process is simple and the process time is short, and thus the productivity is high.

At this time, in this embodiment, the first unevenness 102 having an angular shape is formed by a wet etching method using an alkali etching solution. More specifically, when the semiconductor substrate 10 is immersed in an alkaline etching solution mixed with an alkaline solution such as potassium hydroxide and an organic solvent, the semiconductor substrate 10 is regularly etched according to the crystallographic direction of the semiconductor substrate 10. The first unevenness 102 formed thereby may have a pyramid shape as an example.

Subsequently, as shown in FIG. 3C, in the step ST30 of forming the emitter layer, the emitter layer 20 is formed by doping the second conductive dopant on the front and rear surfaces of the semiconductor substrate 10. In the step ST30 of forming the emitter layer, various methods may be applied. For example, a thermal diffusion method may be applied.

Subsequently, as shown in FIG. 3D, in the step ST40 of forming the second unevenness, the back surface of the semiconductor substrate 10 is etched to remove the emitter layer 20 that is unnecessary on the semiconductor substrate 10. At this time, the angular portions of the first unevenness 102 formed on the rear surface of the semiconductor substrate 10 are etched together to form a second unevenness 104 having a rounded shape.

In this case, the step ST40 of forming the second unevenness may be performed by a wet etching method. According to the wet etching method, the process time can be shortened and productivity can be improved. More specifically, in the present embodiment, etching for isolation may be performed by an inline process between forming an emitter layer (ST30) and forming a backside field layer (ST50). This can simplify the process further.

That is, referring to FIG. 4, a frame is formed between the first device 210 in which the step of forming the emitter layer (ST30) is performed and the second device 410 in which the step of forming the back field layer (ST50) is performed. 320 is located. The auto transport member 310 is positioned on the frame 320, and the etching solution 330 may be accommodated between the auto transport members 310. The etching solution 330 may be positioned in the frame 320 such that only a part of the automatic transfer member 310 is locked.

In the present embodiment, the automatic transfer member 310 may have a variety of ways and structures, for example, it may be composed of a plurality of cylindrical rolls. As such, when the automatic transfer member 310 includes a cylindrical roll, the semiconductor substrate 10 is positioned on the automatic transfer member 310 in a state where the etching solution 330 is located in the space between the rolls.

That is, after the step ST30 of forming the emitter layer is performed, the semiconductor substrate 10 discharged from the first equipment 210 is laid down so that the rear surface of the semiconductor substrate 10 is located toward the automatic transfer member 310. In the state is transferred to the second equipment 410 by the automatic transfer member 310. Then, the rear surface and the side surface of the semiconductor substrate 10 are brought into contact with the etching solution 330 by the rotating automatic transfer member 310, and the rear surface of the semiconductor substrate 10 while being transferred by the automatic transfer member 310. This can be etched.

Then, the second unevenness 104 having a rounded shape is etched by etching the first unevenness 102 having the angular shape formed on the semiconductor substrate 10 while selectively etching the emitter layer 20 formed on the rear surface of the semiconductor substrate 10. Can be made with As a result, when the second unevenness 104 has a rounded shape, the rear surface area of the semiconductor substrate 10 may be reduced, thereby improving backside passivation characteristics.

At this time, using an acidic etching solution such as hydrofluoric acid, nitric acid, hydrochloric acid, or a mixture thereof as the etching solution 330, the angular portions of the first unevenness 102 are irregularly removed to round the second unevenness 104. To have For example, a mixed solution of hydrofluoric acid and nitric acid may be used as the acidic etching solution. Accordingly, an oxide film is formed on the semiconductor substrate 10 by nitric acid, and the oxide film formed on the semiconductor substrate 10 by the hydrofluoric acid is scraped off, so that etching is performed without damaging the semiconductor substrate 10.

In addition, since the etching solution 330 contacts the side surfaces of the semiconductor substrate 10 by surface tension, the side surfaces of the semiconductor substrate 10 may be etched together. It is preferable to etch the side surface of the semiconductor substrate 10 to a uniform thickness. As such, when the side surface of the semiconductor substrate 10 is etched in the process of etching the rear surface of the semiconductor substrate 10, it is not necessary to perform a separate isolation process. This can further simplify the process.

In this case, the etching thickness of the back surface of the semiconductor substrate 10 may be about 2 ~ 4㎛ (for example, about 3 ~ 4㎛). If the etching thickness of the back surface of the semiconductor substrate 10 exceeds 4㎛ process time for fully etching the semiconductor substrate 10 can be increased. If the etching thickness of the rear surface of the semiconductor substrate 10 is less than 2 μm, it may be difficult to sufficiently remove the emitter layer 20 formed on the rear surface of the semiconductor substrate 10.

The etching thickness of the semiconductor substrate 10 may be adjusted by adjusting the speed of transferring the semiconductor substrate 10 on the automatic transfer member 310 to adjust the time immersed in the etching solution 330.

As described above, the second unevenness 104 is formed when the semiconductor substrate 10 moves on the etching solution 330 in the inline process. Accordingly, the flow of the solution, the rising and the falling of the first unevenness 102 is irregularly etched, whereby the second unevenness 104 may be irregularly distributed on the back surface of the semiconductor substrate 10. In addition, the second unevenness 104 may have a larva shape in which the rounded portions are elongated by the flow of the solution, the up and down, etc. (see FIG. 6). However, the present invention is not limited thereto, and the second unevenness 104 may have various shapes having a rounded shape.

Subsequently, as shown in FIG. 3E, in the step ST50 of forming the backside electric field layer, the backside electric field layer 30 is formed by cross-doping the first conductivity type dopant on the backside of the semiconductor substrate 10. As the cross-sectional doping, an ion implantation method, a plasma doping method, a spin on doping method, a spray doping method, or the like may be used. For example, an ion implantation method may be used.

When an ion implantation method or the like is used, an activation heat treatment for annealing the semiconductor substrate 10 may be performed. In general, when the first and first conductivity type dopants are implanted into the semiconductor substrate 10, the implanted first and first conductivity type dopants are not activated at positions other than the lattice position. Annealing the semiconductor substrate 10 in this state causes the first conductivity type dopant to be moved to the lattice position to be activated.

Subsequently, in the step of removing and cleaning the impurities (ST60), the impurities (for example, boron silicate glass (BSG)) formed by doping in the step of forming the emitter layer 20 are removed and the semiconductor substrate 10 is cleaned. can do. As a method for removing and cleaning such impurities, various known methods can be used.

Subsequently, as shown in FIG. 3F, in the forming of the anti-reflection film and the passivation film (ST70), the anti-reflection film 22 is formed on the front surface of the semiconductor substrate 10, and the passivation film ( 32).

The antireflection film 22 and the passivation film 32 may be formed by various methods such as vacuum deposition, chemical vapor deposition, spin coating, screen printing, or spray coating.

Subsequently, as shown in FIG. 3G, in forming the electrode (ST80), the first electrode 24 and the rear electric field layer 30 (or the semiconductor substrate 10) are electrically connected to the emitter layer 20. ) To form a second electrode 34 electrically connected thereto.

In the opening formed in the anti-reflection film 22, the first electrode 24 may be formed by various methods such as a plating method and a deposition method. An opening may be formed in the rear electric field layer 30, and the second electrode 34 may be formed in the opening by various methods such as a plating method and a deposition method.

Alternatively, the first and second electrode forming pastes are applied to the anti-reflection film 22 and the passivation film 32 by screen printing or the like, and then fire through or laser firing contact or the like is applied. It is also possible to form the first and second electrodes 32, 34 of the above-described shape. In this case, it is not necessary to carry out the step of forming the opening separately.

According to the present exemplary embodiment as described above, the manufacturing method of the solar cell 100 can be simplified while improving the characteristics of the solar cell 100 by changing the process order and the process method. This will be described in more detail as follows.

The manufacturing method of the conventional solar cell (especially the solar cell using the semiconductor substrate containing an n type dopant as a 1st conductivity type dopant) was as follows. First, both surfaces of the semiconductor substrate are etched to form irregularities. Subsequently, the first conductivity type dopant is doped by a thermal diffusion method to form the rear electric field layer 30 on both sides of the semiconductor substrate 10, and the first impurities (for example, silicate glass PSG) by doping. Remove it. Subsequently, after the anti-doping layer is formed on the rear surface of the semiconductor substrate 10, the second conductive dopant is doped by a thermal diffusion method to form the emitter layer 20 on the entire surface of the semiconductor substrate 10. 1 Impurities (eg, boron silicate glass) are removed and the anti-doping layer is removed. Subsequently, an antireflection film and a passivation film are formed, and then an electrode is formed. In addition, an isolation process to prevent electrical shorts on the side of the emitter layer 20 and the rear electric field layer 30 should be further performed.

In such a conventional solar cell, the process time is increased by using a thermal diffusion method to form both the emitter layer 20 and the rear electric field layer 30, and thus productivity is lowered, and thus there is a difficulty in mass production. In addition, since the process of removing the first impurity by doping and the process of removing the second impurity and the anti-doping layer must be performed, the process may be complicated and the process time may be long. In addition, damage to the semiconductor substrate may occur in the process of removing impurities or the anti-doping layer, and the anti-doping layer may not be completely removed, thereby reducing the open voltage.

In contrast, according to the present exemplary embodiment, after etching both surfaces of the semiconductor substrate 100 to form the first unevenness 102, the emitter layer 20 is formed on both surfaces of the semiconductor substrate 10, and the semiconductor substrate 10 is formed. While removing the emitter layer 20 formed on the rear surface of the bottom), the angular portions of the first unevenness 102 are etched to form the second unevenness 104. After the back surface field layer 30 is formed on the rear surface of the semiconductor substrate 10, impurities by doping are removed, an antireflection film and a passivation film are formed, and an electrode is formed.

Accordingly, the emitter layer 20 is formed on both surfaces of the semiconductor substrate 10 before the rear electric field layer 30 is formed, and then the emitter layer 20 formed on the rear surface of the semiconductor substrate 10 is removed, and the semiconductor substrate is removed. A rear electric field layer 30 is formed on the rear of the 10. As a result, the process of forming the anti-doping layer and the process of removing the anti-doping layer may be omitted, thereby simplifying the process. In addition, the semiconductor substrate 10 may be prevented from being damaged when the anti-doping layer is removed, and a drop in the open voltage may be prevented because the anti-doping layer is not completely removed. In addition, it is possible to effectively remove impurities (eg, metal such as iron) collected by the guttering phenomenon that may occur when the emitter layer 20 is formed using boron (B) or the like. have. In addition, the process of removing the emitter layer 20 may be performed in an inline process to simplify the process.

At this time, the emitter layer 20 formed on the back surface of the semiconductor substrate 10 is removed, and the first unevenness 102 is etched to have a shape of the second unevenness 104. Passivation characteristics can be improved. That is, the second unevenness 104 may be formed to improve back passivation characteristics without adding a separate process. In addition, in the process of removing the emitter layer 20 formed on the rear surface unnecessarily, the side surface of the semiconductor substrate 10 may be etched together so that a separate isolation process may be omitted.

Therefore, according to the present exemplary embodiment, productivity may be improved by simplifying the manufacturing method of the solar cell 100 while improving the characteristics of the solar cell 100.

In the above description, the emitter layer 20 and the back surface field layer 30 have a uniform doping concentration. However, the present invention is not limited thereto, and at least one of the emitter layer 20 and the rear electric field layer 30 may have a selective structure.

That is, as shown in FIG. 5, the first layer 20a and the first electrode 20 in which the emitter layer 20 is formed adjacent to the anti-reflection film 22 at the portion where the first electrode 24 is not formed. And a second portion 20b formed in contact with 24 and having a lower doping concentration than the first portion 20a and having a lower resistance than the first portion 20a.

Then, the efficiency of the solar cell 100 may be improved by implementing a shallow emitter in the first portion 20a corresponding to the first electrode 24 to which light is incident. In addition, the contact resistance with the first electrode 24 can be reduced in the second portion 20b in contact with the first electrode 24. That is, the emitter layer 20 of the present embodiment may have a selective emitter structure to maximize the efficiency of the solar cell.

In addition, the back field layer 30 is formed in contact with the passivation film 32 at a portion where the second electrode 34 is not formed, and is formed in contact with the second electrode 34. It may include a second portion 30b that is doped to a higher doping concentration than the portion 30a and has a lower resistance than the first portion 30a.

Then, while effectively preventing the recombination of electrons and holes in the first portion 30a of the rear electric field layer 30, the second portion 30b has a relatively small resistance to provide contact resistance with the second electrode 34. Can be reduced. Therefore, the loss due to the recombination of electrons and holes is reduced, and at the same time, the ability to transfer the electrons or holes generated by the photoelectric effect to the second electrode 34 is further improved, thereby further improving the efficiency of the solar cell. .

The emitter layer 20 and the rear electric field layer 30 of this optional structure may be formed by various methods. For example, when the dopant is doped, the dopant is doped at a relatively large doping concentration with respect to the portion corresponding to the second portions 20b and 30b by using a comb-shaped mask or the like and is applied to the portion corresponding to the first portions 20a and 30a. The dopant may be doped with a relatively small doping concentration. Alternatively, when the dopant is doped, the dopant doping process may be additionally performed only on the second portions 20b and 30b to form the emitter layer 20 or the rear electric field layer 30 having a selective structure.

Hereinafter, the present invention will be described in more detail with reference to examples of the present invention. However, the following experimental examples are merely illustrative of the present invention and the present invention is not limited to the following experimental examples.

Experimental Example

An n-type semiconductor substrate was prepared. The semiconductor substrate was immersed in a mixed solution of potassium hydroxide and isopropyl alcohol to form pyramidal first unevenness on the front and rear surfaces of the semiconductor substrate. Subsequently, a thermal diffusion method was performed on the semiconductor substrate to form a emitter layer by doping boron (B) to the front and rear surfaces of the semiconductor substrate. In the in-line wet etching process, the back surface of the semiconductor substrate was etched by 3.4 μm, and the first unevenness formed on the back surface of the semiconductor substrate was etched to form second rugged irregularities. Thereafter, the back surface of the semiconductor substrate was doped with phosphorus (P) by an ion implantation method and activated heat treatment to form a back surface field layer. The boron silicate glass on the front surface was removed and the semiconductor substrate was cleaned.

An antireflection film was formed on the entire surface of the semiconductor substrate, and a passivation film was formed on the rear surface of the semiconductor substrate. The solar cell was completed by forming a first electrode electrically connected to the emitter layer and a second electrode electrically connected to the rear field layer.

An optical photomicrograph of the second unevenness of the solar cell manufactured according to the experimental example is shown in FIG. 6, and reflectances at the front and rear surfaces of the solar cell manufactured according to the experimental example are shown in FIG. 7. And the average reflectivity (AWR) in the front and rear of the solar cell manufactured according to the experimental example is shown in Table 1. 7 and Table 1 show values due to saw damage etching (SDE) as a reference.

Average reflectance [%] Front 16.3 back side 30.4 Cutting damage etching 35.6

Referring to FIG. 6, it can be seen that the second unevenness of the solar cell manufactured according to the experimental example is irregularly distributed in the shape of the larva with a long rounded portion.

Referring to FIG. 7 and Table 1, it can be seen that the reflectivity and the average reflectivity at the rear surface of the semiconductor substrate are lower than the reflectivity and average reflectivity due to general cutting damage etching. That is, it can be seen that constant irregularities are formed on the rear surface of the semiconductor substrate. Referring to FIG. 7, it can be seen that the reflectivity in the visible light region is generally lower than that of the back surface of the semiconductor substrate on which the larva-shaped second unevenness is formed on the front surface of the semiconductor substrate on which the first unevenness of the pyramid shape is formed. In addition, referring to Table 1, it can be seen that the average reflectivity at the front surface of the semiconductor substrate is very low at 16.3%, and the average reflectivity at the rear surface of the semiconductor substrate is 30.4%, which is higher than the front surface of the semiconductor substrate.

As described above, in the experimental example, the first surface of the semiconductor substrate is formed with pyramid-shaped first unevenness, and the reflectivity of the front surface is greatly reduced. It can be seen that the surface area can be reduced.

Features, structures, effects and the like according to the above-described embodiments are included in at least one embodiment of the present invention, and the present invention is not limited to only one embodiment. Further, the features, structures, effects, and the like illustrated in the embodiments may be combined or modified in other embodiments by those skilled in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

100: Solar cell
102: first unevenness
104: second unevenness
10: semiconductor substrate
20: emitter layer
30: rear electric layer
210: first equipment
310: automatic transfer member
320: frame
330: etching solution
410: second equipment

Claims (20)

Preparing a semiconductor substrate having a first surface and a second surface opposite to each other, the semiconductor substrate including a first conductive dopant;
Etching the first and second surfaces of the semiconductor substrate to form first unevenness;
Forming an emitter layer by doping a second conductive dopant to the first surface and the second surface of the semiconductor substrate;
Etching the second surface of the semiconductor substrate to form second unevenness having a shape different from the first unevenness while removing the emitter layer from the second surface; And
Doping a second conductive dopant on the second surface of the semiconductor substrate to form a backside electric field layer
Wherein the method comprises the steps of: The method of claim 1,
The second unevenness is at least partially rounded solar cell manufacturing method. The method of claim 2,
The second unevenness is a method of manufacturing a solar cell irregularly distributed on the second surface. The method of claim 2,
The first unevenness includes an angled portion,
In the forming of the second unevenness, the angular portion of the first unevenness of the second surface is etched to form the second unevenness having a rounded shape. The method of claim 2,
The first unevenness has a pyramid shape,
The second unevenness is a manufacturing method of a solar cell comprising a worm-like (wormlike) shape. The method of claim 1,
The forming of the second unevenness is a method of manufacturing a solar cell to etch the side surface of the semiconductor substrate together. The method of claim 1,
The forming of the second unevenness is a method of manufacturing a solar cell to etch the second surface of the semiconductor substrate by a thickness of 2 ~ 4㎛. The method of claim 1,
Forming the second unevenness is a method of manufacturing a solar cell is performed by a wet etching method. 9. The method of claim 8,
In the step of forming the first unevenness, it is performed by a wet etching method using an alkaline solution,
In the step of forming the second unevenness, a method of manufacturing a solar cell performed by a wet etching method using an acidic solution. The method of claim 1,
The forming of the second unevenness may be performed by an inline process between forming the emitter layer and forming the back field layer. The method of claim 1,
Between the equipment in which the step of forming the emitter layer is performed and the equipment in which the step of forming the back field layer is performed, a frame containing an etching solution and an automatic transport member is located,
The forming of the second unevenness is performed while moving on the automatic transfer member with the second surface of the semiconductor substrate located on the automatic transfer member side. 12. The method of claim 11,
The automatic transfer member includes a plurality of rolls manufacturing method of a solar cell. The method of claim 1,
Forming the emitter layer is performed by a thermal diffusion method,
Forming the back field layer is a solar cell manufacturing method performed by the ion implantation method. The method of claim 1,
The first conductivity type dopant comprises an n type dopant,
The second conductive type dopant comprises a p-type dopant. The method of claim 1,
After forming the back field layer,
Removing impurities of the first surface of the semiconductor substrate and cleaning the second surface
Wherein the method comprises the steps of: The method of claim 1,
After forming the back field layer,
Forming an anti-reflection film on the first surface of the semiconductor substrate and forming a passivation film on the second surface; And
Forming an electrode on the semiconductor substrate
Wherein the method comprises the steps of: A semiconductor substrate having a first surface and a second surface opposite to each other and including a first conductivity type dopant;
An emitter layer formed on the first surface of the semiconductor substrate and including a second conductivity type dopant;
A backside field layer formed on the second surface of the semiconductor substrate and including a first conductivity type dopant;
A first electrode electrically connected to the emitter layer; And
And a second electrode electrically connected to the rear front layer
/ RTI >
First unevenness including an angled portion is formed on the first surface of the semiconductor substrate,
And a second unevenness having a rounded shape to have a shape different from the first unevenness on the second surface of the semiconductor substrate. 18. The method of claim 17,
The first unevenness has a pyramid shape,
The second unevenness is a solar cell comprising a wormlike shape. 18. The method of claim 17,
The second unevenness is irregularly distributed on the second surface solar cell. 18. The method of claim 17,
The solar cell of which the reflectivity of the first surface is lower than that of the second surface.

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