JP5115343B2 - Audio output circuit - Google Patents

Description

  The present invention relates to an audio output circuit, and more particularly to an audio output circuit that generates an analog audio signal converted from a digital audio signal by supplying it to a speaker.

  2. Description of the Related Art Conventionally, there is an audio output circuit that generates an analog audio signal converted from a digital audio signal by supplying it to a speaker.

  FIG. 6 shows a circuit configuration diagram of an example of a conventional audio output circuit. In the figure, an analog audio signal from a DA converter (not shown) is supplied to a terminal 1. This analog audio signal is supplied to the low-pass filter 2 to remove unnecessary high frequency components.

  The analog audio signal output from the low-pass filter 2 is amplified by the amplifier circuit 3, supplied to the speaker 4 as a differential signal inverted from each other, and is produced by the speaker 4.

  Note that an amplifier circuit has been proposed in which the beep sound reference level signal is gradually changed from the power-off level to the sound signal reference level to suppress the generation of a popping sound immediately after the power is turned on (see, for example, Patent Document 1). .

  In addition, electronic devices have been proposed in which a pulse density modulation signal and a transition signal that smoothly changes between zero voltage and a reference voltage are switched and supplied to a speaker to suppress pop noise when the power is turned on or off. (For example, refer to Patent Document 2).

In addition, an audio device has been proposed that removes pop-up noise by applying a predetermined voltage to the input terminal of a driver circuit that amplifies a pulse width modulation signal when the power is turned on or off (for example, see Patent Document 3).
JP-A-2005-45546 JP 2006-109275 A JP 2007-49690 A

  The conventional apparatus shown in FIG. 6 is an inverting amplifier circuit composed of an operational amplifier OP1 and resistors R5 and R6 in the amplifier circuit 3, and is supplied from the low-pass filter 2 on the basis of the bias voltage BIAS supplied from the constant voltage circuit 5. The analog audio signal is inverted and amplified.

  When the power is turned on, the bias voltage BIAS output from the constant voltage circuit 5 rises rapidly as shown by the solid line in FIG. On the other hand, the low-pass filter 2 has large time constants for the resistor R1 and the capacitor C1, the resistor R2 and the capacitor C2, the resistor R3 and the capacitor C3, and the resistor R4 and the capacitor C4. The rise of the signal at the node n7, which is the output point of 2, becomes gentle as shown by the broken line in FIG.

  Therefore, a large potential difference is generated between the non-inverting input (bias voltage BIAS) and the inverting input (node n7 voltage) of the operational amplifier OP1, and the output of the operational amplifier OP1 is as shown by a solid line in FIG. 7B. Therefore, the output of the operational amplifier OP2 obtained by inverting this becomes as indicated by a broken line in FIG.

  The present invention has been made in view of the above points, and an object of the present invention is to provide an audio output circuit capable of suppressing the generation of a clapping sound.

An audio output circuit according to an embodiment of the present invention includes a low-pass filter (12) that has a plurality of time constant circuits of resistors and capacitors and removes unnecessary high-frequency components from an analog audio signal;
An audio output circuit having an amplifier circuit (13) for amplifying an analog audio signal supplied from the low-pass filter (12) with reference to a predetermined voltage from a constant voltage circuit (15) and supplying the amplified signal to a speaker (14);
The low-pass filter (12) is supplied with a predetermined voltage from the constant voltage circuit (15) to the connection point of the resistors and capacitors of the plurality of time constant circuits for a predetermined time after power-on. Has an equalizing circuit (23) for setting the output voltage to the predetermined voltage.

Furthermore, an audio output circuit according to another embodiment of the present invention includes a low-pass filter (12) having a plurality of time constant circuits of resistors and capacitors and removing unnecessary high frequency components from an analog audio signal;
An audio output circuit having an amplifier circuit (13) for amplifying an analog audio signal supplied from the low-pass filter (12) with reference to a predetermined voltage from a constant voltage circuit (15) and supplying the amplified signal to a speaker (14);
A predetermined voltage from the constant voltage circuit (15) is supplied to the connection point of the resistors and capacitors of the plurality of time constant circuits to the low-pass filter (12) for a predetermined time after power-on, and the output voltage of the low-pass filter An equalizing circuit (23) that sets the predetermined voltage to
A selector that selects a predetermined voltage from the constant voltage circuit for a predetermined time after power-on and supplies it to the amplifier circuit (13), and then selects an output of the low-pass filter (12) and supplies it to the amplifier circuit (25)

  Note that the reference numerals in the parentheses are given for ease of understanding, are merely examples, and are not limited to the illustrated modes.

  According to the present invention, it is possible to suppress the generation of a clapping sound.

<First Embodiment>
FIG. 1 shows a circuit configuration diagram of a first embodiment of an audio output circuit of the present invention. In the figure, an analog audio signal from a DA converter (not shown) is supplied to the terminal 11. This analog audio signal is supplied to the low-pass filter 12.

  The low-pass filter 12 includes a time constant circuit including a resistor R1 and a capacitor C1, a time constant circuit including a resistor R2 and a capacitor C2, an operational amplifier OP3, a time constant circuit including a resistor R3 and a capacitor C3, and a resistor R4. A time constant circuit with the capacitor C4 and an operational amplifier OP4 are included.

  The resistor R1 is connected to the terminal 11 via the capacitor Ci, the resistor R1 is connected in series with R2, and the resistor R2 is connected to the non-inverting input terminal of the operational amplifier OP3. The output terminal of the operational amplifier OP3 is connected to the inverting input terminal of the operational amplifier OP3 and is connected to the connection point of the resistors R1 and R2 via the capacitor C1.

  The resistor R3 is connected to the output terminal of the operational amplifier OP3, the resistor R3 is connected in series with R4, and the resistor R4 is connected to the non-inverting input terminal of the operational amplifier OP4. The output terminal of the operational amplifier OP4 is connected to the inverting input terminal of the operational amplifier OP4 and to the connection point of the resistors R3 and R4 via the capacitor C3.

  The connection point between the resistor R1 and the capacitor Ci is connected to the constant voltage circuit 15 through the resistor R9 and is applied with the bias voltage BIAS. The low-pass filter 12 has a cutoff frequency of, for example, 5 kHz, removes unnecessary high-frequency components contained in the analog audio signal, and supplies them to the amplifier circuit 13.

  The amplifier circuit 13 includes an inverting amplifier circuit including an operational amplifier OP1 and resistors R5 and R6, and an inverting amplifier circuit including an operational amplifier OP2 and resistors R7 and R8.

  The analog audio signal output from the low-pass filter 12 is supplied from the resistor R5 to the inverting input terminal of the operational amplifier OP1. A bias voltage BIAS is applied from the constant voltage circuit 15 to the non-inverting input terminal of the operational amplifier OP1.

  A signal inverted and amplified by the operational amplifier OP1 with reference to the bias voltage is input to the positive electrode of the speaker 14 and supplied from the resistor R7 to the inverting input terminal of the operational amplifier OP2. A bias voltage BIAS is applied from the constant voltage circuit 15 to the non-inverting input terminal of the operational amplifier OP2. The resistors R7 and R8 have the same resistance value. The signal inverted by the operational amplifier OP 1 is input to the negative electrode of the speaker 14.

  As a result, the speaker 14 is driven and sounded by the differential signals that are inverted with respect to each other.

  The terminal 20 is supplied with a standby signal instructing standby setting, that is, power-off at a low level, and instructing standby release, that is, power-on, at a high level, and is supplied to the delay circuit 21. The delay circuit 21 is composed of cascaded inverters 22-1 to 22-n, and a delayed standby signal output from the inverter 22-n is supplied to the equalize circuit 23.

  The equalizing circuit 23 includes switches 24a to 24d that are supplied with a delayed standby signal as a control signal. The switch 24a is connected at both ends to a node n1 that is a connection point between the resistor R1 and the capacitor Ci and a node n2 that is a connection point between the resistor R1 and the resistor R2, and is turned on when the delayed standby signal is at a low level. Short-circuit between n1 and n2.

  The switch 24b is connected at both ends to the node n1, a node n3 that is a connection point between the resistor R2 and the non-inverting input terminal of the operational amplifier OP3, and is turned on when the delayed standby signal is at a low level and is connected between the nodes n1 and n3. Short circuit.

  The switch 24c is connected at both ends to the node n1 and a node n5, which is a connection point between the resistors R3 and R4, and conducts when the delayed standby signal is at a low level to short-circuit the nodes n1 and n5.

  The switch 24d is connected at both ends to the node n1 and a node n6 which is a connection point between the resistor R4 and the non-inverting input terminal of the operational amplifier OP4. The switch 24d is turned on when the delayed standby signal is at a low level and is connected between the nodes n1 and n6. Short circuit.

  The audio output circuit is a semiconductor integrated circuit except for the speaker 14.

  Here, when the power is turned on, the bias voltage BIAS output from the constant voltage circuit 15 rapidly increases as shown by a solid line in FIG. Further, in contrast to the standby signal indicated by the one-dot chain line in FIG. 2A, the delayed standby signal is indicated by the two-dot chain line. Since the switches 24a to 24d of the equalize circuit 23 are conductive from the rising edge of the standby signal to the rising edge of the delayed standby signal, the rising edge of the analog audio signal at the node n7 is biased as indicated by a broken line in FIG. This is substantially the same as the rise of the voltage BIAS (solid line in FIG. 2A).

  Therefore, the potential difference between the non-inverting input (bias voltage BIAS) and the inverting input (node n7 voltage) of the operational amplifier OP1 of the amplifier circuit 13 becomes small, and the output of the operational amplifier OP1 is shown by a solid line in FIG. The output of the operational amplifier OP2 obtained by inverting this becomes as shown by a broken line in FIG. 2 (B), and the noise generated from the speaker 14 can be greatly reduced as compared with the conventional case. .

  Further, after the delay standby signal rises, the switches 24a to 24d of the equalize circuit 23 are cut off, the analog audio signal output from the low-pass filter 12 is supplied to the amplifier circuit 13, and the analog audio signal is generated by the speaker 14. Is done.

Second Embodiment
FIG. 3 shows a circuit configuration diagram of a second embodiment of the audio output circuit of the present invention. In the figure, the same parts as those in FIG. In FIG. 3, an analog audio signal from a DA converter (not shown) is supplied to the terminal 11. This analog audio signal is supplied to the low-pass filter 12.

  The low-pass filter 12 includes a time constant circuit including a resistor R1 and a capacitor C1, a time constant circuit including a resistor R2 and a capacitor C2, an operational amplifier OP3, a time constant circuit including a resistor R3 and a capacitor C3, and a resistor R4. A time constant circuit with the capacitor C4 and an operational amplifier OP4 are included.

  The resistor R1 is connected to the terminal 11 via the capacitor Ci, the resistor R1 is connected in series with R2, and the resistor R2 is connected to the non-inverting input terminal of the operational amplifier OP3. The output terminal of the operational amplifier OP3 is connected to the inverting input terminal of the operational amplifier OP3 and is connected to the connection point of the resistors R1 and R2 via the capacitor C1.

  The resistor R3 is connected to the output terminal of the operational amplifier OP3, the resistor R3 is connected in series with R4, and the resistor R4 is connected to the non-inverting input terminal of the operational amplifier OP4. The output terminal of the operational amplifier OP4 is connected to the inverting input terminal of the operational amplifier OP4 and to the connection point of the resistors R3 and R4 via the capacitor C3.

  The connection point between the resistor R1 and the capacitor Ci is connected to the constant voltage circuit 15 through the resistor R7 and is applied with the bias voltage BIAS. The low-pass filter 12 has a cutoff frequency of, for example, 5 kHz, removes unnecessary high-frequency components contained in the analog audio signal, and supplies them to the terminal a of the selector 25.

  The selector 25 has a terminal a connected to the output terminal of the operational amplifier OP4, a terminal b connected to the constant voltage circuit 15, a terminal c connected to the resistor R5 of the amplifier circuit 13, and a control terminal connected to the delay circuit 21. A delayed standby signal to be output is supplied as a control signal. The selector 25 connects the terminals a and c when the delayed standby signal is high level, and connects the terminals b and c when the delayed standby signal is low level.

  When the selector 25 connects the terminals a and c, the analog audio signal output from the low-pass filter 12 is supplied to the amplifier circuit 13.

  The amplifier circuit 13 includes an inverting amplifier circuit including an operational amplifier OP1 and resistors R5 and R6, and an inverting amplifier circuit including an operational amplifier OP2 and resistors R7 and R8.

  The analog audio signal output from the low-pass filter 12 is supplied from the resistor R5 to the inverting input terminal of the operational amplifier OP1. A bias voltage BIAS is applied from the constant voltage circuit 15 to the non-inverting input terminal of the operational amplifier OP1.

  A signal inverted and amplified by the operational amplifier OP1 with reference to the bias voltage is input to the positive electrode of the speaker 14 and supplied from the resistor R7 to the inverting input terminal of the operational amplifier OP2. A bias voltage BIAS is applied from the constant voltage circuit 15 to the non-inverting input terminal of the operational amplifier OP2. The resistors R7 and R8 have the same resistance value. The signal inverted by the operational amplifier OP 1 is input to the negative electrode of the speaker 14.

  As a result, the speaker 14 is driven and sounded by the differential signals that are inverted with respect to each other.

  The terminal 20 is supplied with a standby signal instructing standby setting, that is, power-off at a low level, and instructing standby release, that is, power-on, at a high level, and is supplied to the delay circuit 21. The delay circuit 21 is configured by cascaded inverters 22-1 to 22-n, and a delayed standby signal output from the inverter 22-n is supplied to a control terminal of the selector 25.

  The audio output circuit is a semiconductor integrated circuit except for the speaker 14.

  Here, when the power is turned on, the bias voltage BIAS output from the constant voltage circuit 15 rapidly increases as shown by the solid line in FIG. Further, in contrast to the standby signal indicated by the one-dot chain line in FIG. 4A, the delayed standby signal is indicated by the two-dot chain line. Since the selector 25 connects the terminals b and c between the rising edge of the standby signal and the rising edge of the delayed standby signal, the rising edge of the analog audio signal at the node n7 is bias voltage as shown by the broken line in FIG. This is substantially the same as the rise of BIAS (solid line in FIG. 4A).

  Therefore, the potential difference between the non-inverting input (bias voltage BIAS) and the inverting input (node n7 voltage) of the operational amplifier OP1 of the amplifier circuit 13 becomes small, and the output of the operational amplifier OP1 is shown by a solid line in FIG. As shown in FIG. 4B, the output of the operational amplifier OP2 obtained by inverting this becomes as shown by the broken line in FIG. 4B, so that the noise generated by the speaker 14 can be greatly reduced as compared with the conventional case. .

  After the delayed standby signal rises, the selector 25 connects the terminals a and c, the analog audio signal output from the low-pass filter 12 is supplied to the amplifier circuit 13, and the analog audio signal is output from the speaker 14. Pronounced.

<Third Embodiment>
FIG. 5 shows a circuit configuration diagram of a third embodiment of the audio output circuit of the present invention. In the figure, the same parts as those in FIGS. 1 and 3 are denoted by the same reference numerals.

  The third embodiment shown in FIG. 5 is provided with both the equalizing circuit 23 of the first embodiment and the selector 25 of the second embodiment, and its operation, action and effect are the same as those of the first and second embodiments. This is the same, and a description thereof is omitted.

It is a circuit block diagram of 1st Embodiment of the audio | voice output circuit of this invention. It is a signal timing chart of each part of FIG. It is a circuit block diagram of 2nd Embodiment of the audio | voice output circuit of this invention. It is a signal timing chart of each part of FIG. It is a circuit block diagram of 3rd Embodiment of the audio | voice output circuit of this invention. It is a circuit block diagram of an example of the conventional audio | voice output circuit. It is a signal timing chart of each part of FIG.

Explanation of symbols

12 Low-pass filter 13 Amplifying circuit 14 Speaker 15 Constant voltage circuit 21 Delay circuit 22-1 to 22-n Inverter 23 Equalizing circuit 24a to 24d Switch 25 Selector C1 to C4, Ci capacitor OP1 to OP4 Operational amplifier R1 to R8 Resistance

Claims (2)

A low-pass filter that has a plurality of time constant circuits of resistors and capacitors and removes unnecessary high-frequency components from the analog audio signal;
In an audio output circuit having an amplifier circuit that amplifies an analog audio signal supplied from the low-pass filter based on a predetermined voltage from a constant voltage circuit and supplies the amplified signal to a speaker,
The predetermined voltage from the constant voltage circuit is supplied to the connection point of the resistors and capacitors of the plurality of time constant circuits to the low-pass filter for a predetermined time after power-on, and the output voltage of the low-pass filter is used as the predetermined voltage. An audio output circuit comprising an equalize circuit. A low-pass filter that has a plurality of time constant circuits of resistors and capacitors and removes unnecessary high-frequency components from the analog audio signal;
In an audio output circuit having an amplifier circuit that amplifies an analog audio signal supplied from the low-pass filter based on a predetermined voltage from a constant voltage circuit and supplies the amplified signal to a speaker,
The predetermined voltage from the constant voltage circuit is supplied to the connection point of the resistors and capacitors of the plurality of time constant circuits to the low-pass filter for a predetermined time after power-on, and the output voltage of the low-pass filter is used as the predetermined voltage. An equalizer circuit;
It has a selector that selects a predetermined voltage from the constant voltage circuit for a predetermined time after power-on and supplies it to the amplifier circuit, and then selects an output of the low-pass filter and supplies it to the amplifier circuit. Audio output circuit.

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