JP5109683B2 - Power converter - Google Patents

Description

  The present invention relates to a power conversion device characterized by a main circuit configuration using a PWM control technique in order to supply a stable AC voltage from an input AC power supply to a load.

  FIG. 6 is a circuit configuration diagram showing a conventional example of this type of power conversion device including the circuit configuration of “Non-Patent Document 1” below.

  In this power converter 2, a first arm formed by connecting Q1 and Q2 of IGBT (insulated gate bipolar transistor) as a self-extinguishing semiconductor element having diodes connected in antiparallel in series is connected in antiparallel. A second arm formed by connecting Q3 and Q4 of the IGBTs connected in series, a third arm formed by connecting Q5 and Q6 of the IGBTs connected in reverse parallel to each other in series, and a capacitor C1 connected in parallel with each other ing. Further, one end of the reactor L1 is connected to the intermediate connection point of the first arm, and the reactor L2 side end of the output filter formed by connecting the reactor L2 and the capacitor C3 in series is connected to the intermediate connection point of the third arm. The power conversion circuit PCC1 is used. Further, one end of the input AC power source 1 to the power conversion circuit PCC1 is connected to the other end of the reactor L1, and the other end of the input AC power source 1 is an intermediate connection point of the second arm and a capacitor C3 side end of the output filter. And a control device 4 that controls the switching operation of the power conversion circuit in order to apply a stable AC voltage to the load 3 fed from both ends of the capacitor C3. Here, the capacitor C2 is a filter capacitor of the input power supply 1.

  In this power converter 2, when the capacitor C1 is considered as a power source of a converter composed of IGBTs Q3, Q4, Q5, and Q6 and its diode, this converter is connected in series between the input AC power source 1 and the load 3. Therefore, it is also called a series converter.

  Further, the IGBTs Q1, Q2, Q3, and Q4 and the diodes of the IGBTs to which the capacitor C1 is connected on the output side can be regarded as converters that are connected in parallel to the input AC power supply 1, and are also referred to as parallel converters. .

  That is, when the series converter generates an arbitrary voltage, the voltage of the input AC power supply 1 and the voltage of the series converter are added and applied to the load 3. Therefore, a constant voltage can be supplied to the load 3. At this time, the parallel converter performs a charge / discharge operation with the input AC power supply 1 to make the voltage of the capacitor C1 substantially constant.

  FIG. 7 is a waveform diagram for explaining the switching operation of the power conversion circuit PCC1 of the power conversion device 2 shown in FIG.

  The control device 4 shown in FIG. 6 synchronizes with the change in the voltage polarity of the input AC power supply 1 that is the input voltage shown in FIG. 7 as the detection value of the AC voltage detector PT1, as shown in FIG. Q3 and Q4 are turned on and off, and an on / off signal based on the PWM control result based on the DC voltage command value is given to the Q1 and Q2 of the IGBT as shown in FIG. The voltage is adjusted to a substantially constant value at a value higher than the amplitude value of the input AC power supply 1. Then, the voltage across the capacitor C1 is turned on / off based on the PWM control based on the output voltage command value corresponding to the detected value of the voltage detector PT2, while the IGBTs Q3 and Q4 are turned on / off as described above. The off signal is applied to the IGBTs Q5 and Q6 as shown in FIG. As a result, the load 3 can be supplied with an AC voltage having a desired amplitude value and a frequency equal to that of the input AC power supply 1 while compensating for the voltage fluctuation of the input AC power supply 1.

In FIG. 7, the on / off signals of the IGBTs Q1, Q2, Q5, and Q6 are shown with a constant width while corresponding to the changes in the on / off signals of the IGBTs Q3 and Q4. In practice, these widths increase or decrease in accordance with each of the PWM control results described above. As is clear from FIG. 7, the Q1 and Q2 of the IGBT are in an inverse logic relationship, and similarly, the Q3 and Q4 of the IGBT and the Q5 and Q6 of the IGBT are in an inverse logic relationship.
IEEJ Transactions Vol. 119-D, no. 3 1999 p. 412-418 JP-A-5-30661

  As a means for increasing the capacity of the power conversion device having the circuit configuration shown in FIG. 6, there is a method of operating the above-described two power conversion circuits in parallel.

  However, in parallel operation of the power conversion circuit, simply by connecting the output terminals in parallel due to variations in element characteristics within the circuit, an imbalance occurs in the output current of each power conversion circuit, and cross current flows between the circuits. generate. The above-mentioned “Patent Document 1” is an example of the solution.

  The objective of this invention is providing the power converter device which can suppress the cross current in the parallel operation of the above-mentioned power converter circuit which has the characteristics in a main circuit structure, using a PWM control technique.

According to the first aspect of the present invention, a first arm, a second arm, and a third arm formed by connecting two antiparallel connection circuits of a self-extinguishing semiconductor element and a diode in series are connected in parallel to each other. Then, one end of the first reactor is connected to the intermediate connection point of the first arm, and the reactor side end of the output filter formed by connecting the second reactor and the second capacitor in series is connected to the intermediate connection point of the third arm. 2 sets of power conversion circuits formed by connecting one end of an input AC power supply and the other end of each of the first reactors, and the other end of the input AC power supply is an intermediate connection point of each of the second arms Are connected to the capacitor side ends of the respective output filters, and the switch of the two power conversion circuits is applied to apply an AC voltage to a load fed in parallel from both ends of the second capacitors. The power converter and a control device for controlling the ring operation,
The control device includes two sets of difference current detection circuits for deriving the difference between each of the currents flowing from the two sets of power conversion circuits to the load and an average value of these currents as a difference current, Four sets of timing adjustment circuits for adjusting the on-timing of each self-extinguishing semiconductor element forming the third arm from each of the values via a low-pass filter and the difference current in the PWM pulse command to the three arms It is characterized by having .

According to a second aspect of the present invention, a first arm, a second arm, and a third arm formed by connecting two antiparallel connection circuits of a self-extinguishing semiconductor element and a diode in series are connected in parallel to each other. , One end of the first reactor is connected to the intermediate connection point of the first arm, and the reactor side end of the output filter formed by connecting the second reactor and the second capacitor in series is connected to the intermediate connection point of the third arm. Two sets of power conversion circuits to be formed are provided,
One end of the input AC power supply is connected to the other end of each of the first reactors, and the other end of the input AC power supply is connected to an intermediate connection point of each of the second arms and a capacitor side end of each of the output filters. In the power converter configured by the control device that controls the switching operation of the two power converter circuits in order to connect and apply an AC voltage to the load fed in parallel from both ends of each of the second capacitors ,
The control device includes two sets of difference current detection circuits for deriving a difference between each of the currents flowing from the two sets of power conversion circuits to the load and an average value of these currents as a difference current, Two sets of polarity inverting circuits for inverting the polarity of the difference current;
Two sets of adjusting the on-timing of each of the self-extinguishing semiconductor elements forming the third arm from each of the value via the low-pass filter and the difference current in the PWM pulse command to the one third arm A first timing adjustment circuit;
The on-timing of each self-extinguishing semiconductor element forming the third arm is adjusted based on each of the PWM pulse command to the other third arm via the low-pass filter and the difference current with the polarity reversed. And two sets of second timing adjustment circuits .

According to a third aspect of the present invention, in the power conversion device of the first or second aspect of the invention, the control device causes the third arm to perform a switching operation at a frequency higher than that of the input AC power source, and the two sets of power at this time The on-timing of each self-extinguishing semiconductor element forming the third arm is adjusted based on a difference current that is a difference between each current flowing from the conversion circuit to the load and the average value. Features .

  According to the present invention, in the power conversion device, each power conversion circuit is promptly determined by a difference current that is a difference between each of the currents flowing from the two sets of power conversion circuits to the load and an average value of the respective currents. By correcting the ON timing of the third arm, it is possible to suppress the cross current in the parallel operation of the power conversion circuit.

  FIG. 1 is a circuit configuration diagram of a power conversion device showing an embodiment of the present invention.

  In this power converter 10, a first arm formed by serially connecting IGBTs Q11 and Q12 each having a diode connected in antiparallel, and an IGBT Q13 and Q14 each having a diode connected in reverse parallel are connected in series. The second arm and the third arm formed by serially connecting the Q15 and Q16 of the IGBT having the diodes connected in antiparallel to each other and the capacitor C11 are connected in parallel to each other. Further, one end of the reactor L11 is connected to the intermediate connection point of the first arm, and the reactor L12 side end of the output filter formed by connecting the reactor L12 and the capacitor C12 in series is connected to the intermediate connection point of the third arm. The power conversion circuit PCC10 is used.

  Similarly, a first arm formed by serially connecting IGBTs Q21 and Q22 each having a diode connected in antiparallel, and a second arm formed by serially connecting IGBTs Q23 and Q24 each having a diode connected in reverse parallel. A third arm formed by connecting Q25 and Q26 of an IGBT, to which an arm and a diode are connected in antiparallel, respectively, and a capacitor C21 are connected in parallel to each other. Further, one end of the reactor L21 is connected to the intermediate connection point of the first arm, and the reactor L22 side end of the output filter formed by connecting the reactor L22 and the capacitor C22 in series is connected to the intermediate connection point of the third arm. The power conversion circuit PCC20 is used.

  Further, one end of the input AC power supply 1 to the power conversion circuits PCC10 and PCC20 is connected to the other ends of the reactors L11 and L22, and the other end of the input AC power supply 1 is connected to the second arm of the power conversion circuit PCC10 and the power conversion. In order to apply a stable AC voltage to the load 3 fed from both ends of the capacitors C12 and C22 and connected to the intermediate connection point of the second arm of the circuit PCC20 and the capacitors C12 and C22 side ends of the output filter The control device 30 or 50 controls the switching operation of each of the power conversion circuits.

  Here, the capacitor C10 is a filter capacitor of the input power supply 1, and the AC current detectors CT1 and CT2 are provided for detecting output currents from the power conversion circuits PCC10 and PCC20, respectively. The AC voltage detectors PT1 and PT2 are provided for detecting the voltage of the input AC power supply 1 and the output voltage of the power converter 10 as described above. As is clear from FIG. 1, the circuit configurations of the power conversion circuits PCC10 and PCC20 are the same as the circuit configuration of the power conversion circuit PCC1 shown in FIG.

  The cross current suppressing means in the parallel operation of the power conversion circuits PCC10 and PCC20 in the power conversion device 10 of the present invention will be described below with reference to FIGS.

  FIG. 2 is a partial detailed circuit configuration diagram of control device 30 shown in FIG. 1 as the first embodiment of the present invention. That is, this circuit configuration shows a portion related to the cross current suppressing means in the parallel operation of the power conversion circuits PCC 10 and PCC 20 in the power conversion device 10.

  In the voltage control / PWM operation circuit 31, the detected values and the DC voltage command value are turned on / off while turning on / off the IGBTs Q13, Q14, Q23, Q24 (not shown) based on the polarity change of the detected value of the AC voltage detector PT1. By giving on / off signals based on the PWM control calculation result based on the above to Q11, Q12, Q21, Q22 of the IGBT (not shown), the voltages at both ends of the capacitors C11, C21 are made higher than the amplitude value of the input AC power supply 1. Is adjusted to an almost constant value.

  Further, in this voltage control / PWM calculation circuit 31, an on / off signal based on the PWM control calculation result based on the detection value of the voltage detector PT2 and the output voltage command value is sent to LPFs (low pass filters) 34, 38, 42, 46. Are sent to the AND elements 36, 40, 44 and 48.

  The detected values of the AC current detectors CT1 and CT2 are respectively detected in the difference current detection circuit 32 including the resistors R11 to R16 and the operational amplification element OP1, and the difference current detection circuit 33 including the resistors R21 to R26 and the operational amplification element OP2. The connection point of the resistors R13 and R14 and the connection point of the resistors R23 and R24 are connected as shown in the figure. Thereby, the difference between the output current of the PCC 10 and the average value of the output current of the power conversion circuit PCC10 and the output current of the power conversion circuit PCC20 is obtained at both ends of the resistor R13. Similarly, the PCC 20 The difference between the output current and the average is obtained. Accordingly, an amplified value obtained by inverting the polarity of the difference between the output current of the PCC 10 and the average value is obtained at the output terminal of the operational amplifier OP1, and similarly, the output current of the PCC 20 is obtained at the output terminal of the operational amplifier OP2. An amplified value is obtained by inverting the polarity of the difference from the average value.

  FIG. 3 is a waveform diagram for explaining basic operations of the differential current detection circuit, LPF, comparator element, and AND element shown in FIG. 2, and this figure shows the output current of the power conversion circuit PCC10 and the output current of the PCC20. It is an operation | movement waveform diagram when these are equal.

In this figure, the waveform a in the comparator element part is an on / off signal (PWM pulse command) to each of the Q15, Q16, Q25, and Q26 of the IGBT output from the voltage control / PWM arithmetic circuit 31. -By passing the LPF through the off signal, it is converted into a waveform of b having a slope at the edge. That is, the comparator element performs a comparison operation between the voltage value of the reference level C ₀ shown in the figure and the value of the waveform b having the slope, and the AND element performs a logical operation of the calculation result and the value of the waveform a. As a result, the output of the AND element section has a waveform of d ₀ , and the value of the waveform of d ₀ is transmitted to the gate drive circuits 37, 41, 45, and 49 as on / off signals, respectively.

  The voltage value at the reference level at this time is, for example, +15 V is set to resistors R16 and R17, or resistor R26 because the voltage value at the output terminal of the operational amplifiers OP1 and OP2 of the above-described differential current detection circuit is “zero”. And the value divided by R27. Accordingly, the ON timing of each of the IGBTs Q15, Q16, Q25, and Q26, which are the outputs of the AND element, is set at a position delayed by, for example, several microseconds from the ON timing from the voltage control / PWM operation circuit 31. .

  FIG. 4 is a waveform diagram for explaining the operation when suppressing the cross current between the power conversion circuits PCC10 and PCC20 in the differential current detection circuit, LPF, comparator element, and AND element shown in FIG.

Figure 4 (a) is, when the output value of the differential current detection circuit becomes C ₁ decreases from the reference level C _0, i.e., the difference is generated between the power conversion circuit PCC 10, PCC20 respective output currents, It is a waveform showing the behavior when the polarity of the output current is positive and the amplitude is larger, or when the polarity is negative and the amplitude is smaller.

As apparent from the waveform of d ₁ in this figure, since the operation is performed so as to advance the on-timing to the IGBT, the amplitude of the output voltage increases. Therefore, the circuit configuration shown in FIG. 2 acts to increase the output current of the opposite polarity of the counterpart power conversion circuit and to increase the output current of the opposite polarity of the own power conversion circuit. .

FIG. 4B shows that when the output value of the difference current detection circuit rises from the reference level C ₀ to C ₂ , that is, a difference occurs between the output currents of the power conversion circuits PCC 10 and PCC 20. It is a waveform showing the behavior when the amplitude is smaller with the polarity of the output current, or when the polarity is negative and the amplitude is larger.

As is apparent from the waveform of d ₂ in this figure, since the operation is performed so as to delay the on-timing to the IGBT, the amplitude of the output voltage decreases. Therefore, the circuit configuration shown in FIG. 2 acts so that the output current of the same polarity of the power conversion circuit of the other party is reduced and the output current of the opposite polarity of the power conversion circuit of the other party is reduced. .

  FIG. 5 is a partial detailed circuit configuration diagram of control device 50 shown in FIG. 1 as the second embodiment of the present invention. In this figure, components having the same functions as those in the circuit configuration shown in FIG. That is, this circuit configuration is different from the circuit configuration shown in FIG. 2 in that polarity inversion circuits 51 and 52 are added.

  Therefore, in this control device 50, a difference occurs between the output currents of the power conversion circuits PCC10 and PCC20, and when the polarity of the output current is positive and the amplitude is larger, or the polarity is negative and the amplitude is smaller. In some cases, the output current with the same polarity of the power conversion circuit of the other party increases so that the output current with the same polarity of the power conversion circuit of the other party decreases due to the addition of the polarity inversion circuit.

  Further, when a difference occurs between the output currents of the power conversion circuits PCC10 and PCC20 and the polarity of the output current is positive and the amplitude is smaller, or when the polarity is negative and the amplitude is larger, the power of the other party The output current having the same polarity of the conversion circuit acts to decrease, and the addition of the polarity inversion circuit acts to increase the output current of the same polarity of the own power conversion circuit.

  As described above, in the power conversion device 10 of the present invention, the on-timing of the third arm of the power conversion circuit PCC10 and the third arm of the power conversion circuit PCC20 is determined by the voltage control / PWM operation circuit of the control device 30 or the control device 50. By quickly correcting the on / off signal for each time based on the PWM control calculation result output by the power converter 31, the cross current in the parallel operation of the power conversion circuits PCC10 and PCC20 can be suppressed.

The circuit block diagram of the power converter device which shows embodiment of this invention 1 is a partial detailed circuit diagram of FIG. 1 showing a first embodiment of the present invention. Waveform diagram explaining the operation of FIG. Waveform diagram explaining the operation of FIG. FIG. 1 is a partial detailed circuit configuration diagram of FIG. 1 showing a second embodiment of the present invention. Circuit diagram of a power conversion device showing a conventional example Waveform diagram for explaining the operation of FIG.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Input alternating current power source, 2,10 ... Power converter device, 3 ... Load, 4, 30, 50 ... Control device, 31 ... Voltage control / PWM arithmetic circuit, 32, 33 ... Difference current detection circuit, 34, 38, 42 46, LPF, 35, 39, 43, 47 ... Comparator element, 36, 40, 44, 48 ... AND element, 37, 41, 45, 49 ... Gate drive circuit, 51, 52 ... Polarity inversion circuit.

Claims (3)

A first arm, a second arm, a third arm, and a first capacitor formed by connecting two antiparallel connection circuits of a self-extinguishing semiconductor element and a diode in series are connected in parallel to each other, and one end of the first reactor Is connected to the intermediate connection point of the first arm, and the reactor side end of the output filter formed by connecting the second reactor and the second capacitor in series is connected to the intermediate connection point of the third arm. 2 sets,
One end of the input AC power supply is connected to the other end of each of the first reactors, and the other end of the input AC power supply is connected to an intermediate connection point of each of the second arms and a capacitor side end of each of the output filters. In the power converter configured by the control device that controls the switching operation of the two power converter circuits in order to connect and apply an AC voltage to the load fed in parallel from both ends of each of the second capacitors ,
The control device includes two sets of difference current detection circuits for deriving the difference between each of the currents flowing from the two sets of power conversion circuits to the load and an average value of these currents as a difference current, Four sets of timing adjustment circuits for adjusting the on-timing of each self-extinguishing semiconductor element forming the third arm from each of the values via a low-pass filter and the difference current in the PWM pulse command to the three arms A power conversion device comprising: A first arm, a second arm, a third arm, and a first capacitor formed by connecting two antiparallel connection circuits of a self-extinguishing semiconductor element and a diode in series are connected in parallel to each other, and one end of the first reactor Is connected to the intermediate connection point of the first arm, and the reactor side end of the output filter formed by connecting the second reactor and the second capacitor in series is connected to the intermediate connection point of the third arm. 2 sets,
  One end of the input AC power supply is connected to the other end of each of the first reactors, and the other end of the input AC power supply is connected to an intermediate connection point of each of the second arms and a capacitor side end of each of the output filters. In the power converter configured by the control device that controls the switching operation of the two power converter circuits in order to connect and apply an AC voltage to the load fed in parallel from both ends of each of the second capacitors ,
  The control device includes two sets of difference current detection circuits for deriving a difference between each of the currents flowing from the two sets of power conversion circuits to the load and an average value of these currents as a difference current, Two sets of polarity inverting circuits for inverting the polarity of the difference current;
  Two sets of adjusting the on-timing of each of the self-extinguishing semiconductor elements forming the third arm from each of the value via the low-pass filter and the difference current in the PWM pulse command to the one third arm A first timing adjustment circuit;
  The on-timing of each self-extinguishing semiconductor element forming the third arm is adjusted based on each of the PWM pulse command to the other third arm via the low-pass filter and the difference current with the polarity reversed. A power conversion device comprising two sets of second timing adjustment circuits. In the power converter device according to claim 1 or 2,
In the control device, the third arm is switched at a frequency higher than that of the input AC power supply, and a difference that is a difference between each of the currents flowing from the two power conversion circuits to the load and the average value at this time. An on-timing of each self-extinguishing semiconductor element forming the third arm is adjusted based on each current .

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