JP5087869B2 - 基板の両面に実装可能な集積回路装置及び電子機器 - Google Patents

基板の両面に実装可能な集積回路装置及び電子機器 Download PDF

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Publication number
JP5087869B2
JP5087869B2 JP2006187949A JP2006187949A JP5087869B2 JP 5087869 B2 JP5087869 B2 JP 5087869B2 JP 2006187949 A JP2006187949 A JP 2006187949A JP 2006187949 A JP2006187949 A JP 2006187949A JP 5087869 B2 JP5087869 B2 JP 5087869B2
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Japan
Prior art keywords
signal
terminal
terminals
output
input
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Expired - Fee Related
Application number
JP2006187949A
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English (en)
Japanese (ja)
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JP2007067377A (ja
JP2007067377A5 (enExample
Inventor
史和 小松
巨樹 井伊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
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Seiko Epson Corp
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Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP2006187949A priority Critical patent/JP5087869B2/ja
Priority to US11/462,066 priority patent/US7646381B2/en
Publication of JP2007067377A publication Critical patent/JP2007067377A/ja
Publication of JP2007067377A5 publication Critical patent/JP2007067377A5/ja
Application granted granted Critical
Publication of JP5087869B2 publication Critical patent/JP5087869B2/ja
Expired - Fee Related legal-status Critical Current
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/409—Mechanical coupling
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP2006187949A 2005-08-05 2006-07-07 基板の両面に実装可能な集積回路装置及び電子機器 Expired - Fee Related JP5087869B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2006187949A JP5087869B2 (ja) 2005-08-05 2006-07-07 基板の両面に実装可能な集積回路装置及び電子機器
US11/462,066 US7646381B2 (en) 2005-08-05 2006-08-03 Integrated circuit device mountable on both sides of a substrate and electronic apparatus

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2005228082 2005-08-05
JP2005228082 2005-08-05
JP2006187949A JP5087869B2 (ja) 2005-08-05 2006-07-07 基板の両面に実装可能な集積回路装置及び電子機器

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2007070780A Division JP5087961B2 (ja) 2005-08-05 2007-03-19 基板の両面に実装可能な集積回路装置及び電子機器

Publications (3)

Publication Number Publication Date
JP2007067377A JP2007067377A (ja) 2007-03-15
JP2007067377A5 JP2007067377A5 (enExample) 2007-05-10
JP5087869B2 true JP5087869B2 (ja) 2012-12-05

Family

ID=37831256

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006187949A Expired - Fee Related JP5087869B2 (ja) 2005-08-05 2006-07-07 基板の両面に実装可能な集積回路装置及び電子機器

Country Status (2)

Country Link
US (1) US7646381B2 (enExample)
JP (1) JP5087869B2 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007012937A (ja) * 2005-06-30 2007-01-18 Seiko Epson Corp 表示ドライバ
JP4956143B2 (ja) * 2006-11-02 2012-06-20 株式会社東芝 半導体メモリカード、ホスト装置、及びデータ転送方法
KR101034718B1 (ko) * 2009-10-13 2011-05-17 삼성모바일디스플레이주식회사 유기전계발광 표시장치
JP5866904B2 (ja) 2011-09-14 2016-02-24 株式会社リコー 回路装置および液滴吐出装置
TWI724059B (zh) * 2016-07-08 2021-04-11 日商半導體能源研究所股份有限公司 顯示裝置、顯示模組及電子機器
US11482155B2 (en) 2018-07-20 2022-10-25 Semiconductor Energy Laboratory Co., Ltd. Receiving circuit
TWI696921B (zh) * 2019-03-28 2020-06-21 威鋒電子股份有限公司 Usb積體電路
KR20250024684A (ko) * 2023-08-11 2025-02-19 삼성디스플레이 주식회사 표시 장치

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10303366A (ja) * 1997-04-30 1998-11-13 Mitsubishi Electric Corp 半導体装置
JP3484365B2 (ja) * 1999-01-19 2004-01-06 シャープ株式会社 半導体装置用パッケージ、この半導体装置用パッケージのテスト時に使用するプローブカード、および、このプローブカードを用いたパッケージのテスト方法
JP3362843B2 (ja) * 1999-12-22 2003-01-07 日本電気株式会社 液晶表示装置及びその信号送受方法並びに液晶パネル
JP2001236303A (ja) 2000-02-25 2001-08-31 Nec Microsystems Ltd ユニバーサル・シリアル・バス制御回路
TW538364B (en) 2001-12-10 2003-06-21 Via Tech Inc USB control circuit capable of automatically switching paths
GB2383137B (en) * 2001-12-17 2005-06-29 Micron Technology Inc DVI link with circuit and method for test
JP2004341101A (ja) * 2003-05-14 2004-12-02 Nec Corp 表示パネル駆動装置
JP4370913B2 (ja) * 2004-01-07 2009-11-25 セイコーエプソン株式会社 マクロセル、集積回路装置、及び電子機器
JP4809590B2 (ja) * 2004-03-31 2011-11-09 エーユー オプトロニクス コーポレイション 電子装置
TWI266477B (en) * 2005-03-29 2006-11-11 Realtek Semiconductor Corp Chip with adjustable pinout function and method thereof

Also Published As

Publication number Publication date
JP2007067377A (ja) 2007-03-15
US7646381B2 (en) 2010-01-12
US20070055812A1 (en) 2007-03-08

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