JP5082385B2 - Manufacturing method of electro-optical device - Google Patents

Description

The present invention relates to a method for forming a light shielding film, and a method for manufacturing an electro-optical device using a liquid crystal element or an organic electroluminescence element.

One driving method for liquid crystal devices is an active matrix driving method in which a thin film semiconductor switching element such as a thin transistor is provided on an element substrate.
In the case of the active matrix driving method, the thin film semiconductor formed on the element substrate is composed of an amorphous silicon or polysilicon semiconductor film. There are several methods for forming a semiconductor film made of polysilicon on an element substrate, and one of them is a method of heat-treating and recrystallizing an amorphous silicon film formed on a substrate. Specifically, a method of forming a polysilicon film by heating an amorphous silicon layer on a substrate directly in a furnace or by laser beam irradiation is known.

By the way, when light hits a normal silicon semiconductor layer, a photocurrent is generated in the semiconductor layer by photoelectric conversion. Therefore, when light is applied to a thin film transistor (TFT) using polysilicon, a photocurrent is generated in the thin film transistor, and a leakage current of the thin film transistor increases. Therefore, since external light causes a failure in the current characteristics of the thin film transistor,
It is desirable to shield the light.

In the case of a liquid crystal device, light from a backlight provided in the liquid crystal device is one of the causes for increasing the leakage current of the thin film transistor. Therefore, in order to prevent a malfunction of the thin film transistor, the thin film transistor needs to include a light shielding layer for blocking external light. In other words, in the case of a liquid crystal device, a light shielding layer must be provided between the element substrate and the thin film transistor in order to shield the thin film transistor from the light of the backlight.

However, the end face of the light shielding layer provided on the element substrate is usually a large stepped portion, and the layer formed on the light shielding layer due to the influence of the large step has a poor coverage (coverage), Breaks and cracks are likely to occur, and defects such as increased resistance occur in the conductor.

For example, in the amorphous silicon film formed on the light shielding layer, the same level difference occurs due to the level difference of the light shielding layer. If amorphous silicon is converted into polysilicon by heat treatment in this state, the heat from the heat treatment tends to concentrate on the corners of the steps, and the corners ablate due to boiling or melt evaporation, and the polysilicon film This results in a break defect.

Therefore, when a light shielding layer is formed between the element substrate and the semiconductor layer, there is a method for forming a semiconductor layer on the light shielding layer after the end surface of the light shielding layer is tapered to prevent a step. It has been proposed (Patent Document 1 and Patent Document 2 below). According to Patent Document 1, a two-layer structure in which CrNx is formed on Cr as a light-shielding film, wet etching with an etching ratio of CrNx and Cr of 2 or more is performed, and an opening is removed, whereby an edge portion (step) Is tapered.

However, in the method of Patent Document 1, CrNx and Cr are used to obtain the desired taper shape.
Subtle adjustment of the film thickness was necessary. Moreover, the angle of the formed taper is not always constant.

According to Patent Document 2, after a Cr layer used for the light shielding layer is etched in advance to form a predetermined pattern, dry etching is performed to make the step into a tapered shape. This is because, by using a mixed gas of chlorine and oxygen as the etching gas, the side wall of Cr is etched with hydrochloric acid gas and oxygen, and the resist mask is etched with oxygen, so that the upper part in contact with the resist mask is The etching rate is higher than that of the lower part in contact with the substrate, and as a result, a tapered shape is obtained.
Japanese Patent Application Laid-Open No. 07-64111 JP 09-263974 A

As described above, in the method of Patent Document 1, CrNx and CN are used to obtain a desired taper shape.
Subtle adjustment of the film thickness of r is necessary.
The method of Patent Document 2 also requires fine adjustment of the Cr and resist mask thicknesses in order to form the desired tapered shape.

The present invention provides a method for improving the shape of the end face of the light-shielding film by such a simple method that does not require film thickness adjustment and preventing defects in the film formed on the upper surface. That is, an object of the present invention is to provide a method of forming a light-shielding film of a thin film transistor, particularly a thin film transistor using a polysilicon semiconductor film, and further to form an electro-optical device having no defect in the semiconductor film formed thereon It is in providing the manufacturing method of.

The light shielding film forming method of the present invention includes a step of forming a first light shielding layer on the upper side of the substrate, a step of forming a second light shielding layer on the upper side of the first light shielding layer, and a step of forming the second light shielding layer. Forming a resist mask for forming a light-shielding film with the first light-shielding layer and the second light-shielding layer on the upper side; and removing the second light-shielding layer by isotropic etching using the resist mask And a step of removing the first light shielding layer by anisotropic etching using the resist mask.

According to the method for forming a light-shielding film of the present invention, after forming a light-shielding layer having a two-layer film structure having different etching characteristics, the second resist layer is first isotropically etched using the same resist mask. Then, anisotropic etching of the first light shielding layer is performed. Therefore, the end surfaces of the first light shielding layer and the second light shielding layer can be formed in a stepped shape with a small step. As a result, the step difference of the light shielding layer having the two-layer structure of the first light shielding layer and the second light shielding layer is small, so that the covering property is deteriorated in the layer formed on the first light shielding layer and the second light shielding layer. When the upper layer is a conductor, defects such as an increase in resistance are reduced. Further, the end surfaces of the first light-shielding layer and the second light-shielding layer can be formed in a stepped shape with a small step without increasing the steps of resist coating and stripping of the resist used for the mask.

In the method for forming a light shielding film of the present invention, it is desirable that an etching material used for isotropic etching of the second light shielding layer has an etching rate for the second light shielding layer higher than an etching rate for the first light shielding layer. .

According to the method for forming a light shielding film of the present invention, when the second light shielding layer is etched, the first light shielding layer is not etched or the etching rate is low. Therefore, only the second light-shielding layer can be selectively etched, and the end faces of the first light-shielding layer and the second light-shielding layer have a suitable step width that does not cause defects in the upper layer. Can be configured in steps.

The method for forming a light-shielding film according to the present invention is the method for forming a light-shielding film according to claim 1 or 2, wherein the first light-shielding layer is anisotropically etched, and the first light-shielding layer is anisotropic. It is desirable that the etching material used for etching has a higher etching rate for the first light-shielding layer than for the second light-shielding layer.

According to the method for forming a light shielding film of the present invention, the etching of the first light shielding layer is anisotropic etching. Furthermore, when the first light shielding layer was etched, the second light shielding layer was not etched or a material having a low etching rate was used. Therefore, only the first light shielding layer can be selectively etched, and the end surfaces of the first light shielding layer and the second light shielding layer can be easily formed in a suitable step shape.

The electro-optical device manufacturing method of the present invention is a method of manufacturing an electro-optical device having a light-shielding film on a thin film semiconductor element, the step of forming a first light-shielding layer on the element substrate, and the upper side of the first light-shielding layer. A step of forming a second light shielding layer, a step of forming a resist mask on the second light shielding layer, and a step of removing the second light shielding layer by isotropic etching using the resist mask. And removing the first light shielding layer by anisotropic etching using the resist mask.

According to the method for manufacturing an electro-optical device of the present invention, using a single resist mask, the second light shielding layer is removed by isotropic etching, and the first light shielding layer is removed by anisotropic etching. Therefore, the end surfaces of the first light-shielding layer and the second light-shielding layer can be formed stepwise without increasing the steps of resist coating and resist mask peeling. As a result, the level difference between the first light shielding layer and the second light shielding layer is reduced, and deterioration of coverage of the layers formed on the first light shielding layer and the second light shielding layer, disconnection, and generation of cracks are eliminated. No defects such as increased resistance of the conductor formed in the upper layer occur.

In the method of manufacturing an electro-optical device according to the aspect of the invention, the etching material used for the isotropic etching of the second light shielding layer has a higher etching rate for the second light shielding layer than the etching rate for the first light shielding layer. desirable.

According to the method for manufacturing an electro-optical device of the present invention, when the second light shielding layer is etched, the first light shielding layer is not etched or the etching rate is low. Therefore, only the second light shielding layer can be selectively etched, and the end surfaces of the first light shielding layer and the second light shielding layer can be easily formed in a suitable step shape.

The electro-optical device manufacturing method of the present invention is the electro-optical device manufacturing method according to claim 4 or 5, wherein the etching of the first light shielding layer is anisotropic etching, and the first light shielding layer is different. The etching material used for the isotropic etching preferably has a higher etching rate for the first light-shielding layer than the etching rate for the second light-shielding layer.

According to the method for manufacturing an electro-optical device of the present invention, the etching of the first light shielding layer is anisotropic etching. Furthermore, when the first light shielding layer was etched, the second light shielding layer was not etched or a material having a low etching rate was used. Therefore, only the first light shielding layer can be selectively etched, and the end surfaces of the first light shielding layer and the second light shielding layer can be easily formed in a suitable step shape.

In the method of manufacturing an electro-optical device according to the aspect of the invention, it is preferable that the first light shielding layer is a titanium-based material.
According to the method for manufacturing an electro-optical device of the present invention, the first light shielding layer is made of a titanium-based material. Therefore, since the first light shielding layer exhibits strong chemical resistance against strong acid or the like, the degree of freedom in selecting an etching material can be increased when the second light shielding layer is isotropically etched.

In the method of manufacturing the electro-optical device according to the aspect of the invention, it is preferable that the first light shielding layer has a thickness of 50 nanometers or less, and the second light shielding layer has a thickness of 50 nanometers or less.
According to the method for manufacturing an electro-optical device of the present invention, the thicknesses of the first light shielding layer and the second light shielding layer are each about 50 nanometers or less. Therefore, the end surfaces of the first light shielding layer and the second light shielding layer can be configured in a stepped shape having a suitable height that does not cause defects in the layer formed as an upper layer.

The electro-optical device manufacturing method of the present invention is a method of manufacturing an electro-optical device including a thin film transistor and a light-shielding film, the step of forming a first light-shielding layer on the element substrate, and the upper side of the first light-shielding layer. Forming a second light shielding layer; forming a resist mask for forming a light shielding film with the first light shielding layer and the second light shielding layer on the second light shielding layer; and the resist. Isotropic wet etching of a part of the second light shielding layer using a mask using a phosphoric acid-nitric acid-based etchant having a higher etching rate for the second light shielding layer than the etching rate for the first light shielding layer. And removing a part of the first light-shielding layer using the resist mask with a higher etching rate for the first light-shielding layer than for the second light-shielding layer. Removing by anisotropic dry etching using an etching gas to form a light shielding film composed of the first light shielding layer and the second light shielding layer; and removing the resist mask, and then exposing the light shielding film and a step of forming an insulating layer on the upper surface of the element substrate, the upper surface of the without flattening the insulating layer, the insulating layer portion is raised corresponding to the light shielding film, a silicon layer constituting the thin film transistor And then heat-treating the silicon layer, and a silicon layer located above the light shielding film and above the step of the insulating layer and outside the light shielding film and below the step. A thin film transistor having a semiconductor layer integrated with a silicon layer located on the side and having a source region and a contact hole disposed in the silicon layer on the lower side of the step Characterized in that it comprises the steps of, a.

According to the method for manufacturing an electro-optical device of the present invention, the first light-shielding layer, the second light-shielding layer whose end faces are processed stepwise.
An insulating layer and a polysilicon layer are formed on the light shielding layer and the upper surface of the element substrate. Accordingly, the insulating layer and the polysilicon layer formed at suitable steps have good coverage, are free from breaks and cracks, and can suppress defects such as an increase in resistance value.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments embodying the present invention will be described below with reference to the drawings.
FIG. 1 is a block diagram showing a circuit configuration of an active matrix liquid crystal display device 1.

As shown in FIG. 1, the liquid crystal display device 1 includes a large number of pixels 2 arranged and formed in a matrix, and includes a display panel unit 3 that displays an image or the like by being driven. Further, the liquid crystal display device 1 includes a scanning line driving circuit 4 for specifying the pixels 2 to be driven in the row direction.
And a data line driving circuit 5 for supplying a data signal to the pixels 2 driven in the column direction.

The display panel unit 3 includes m data lines X1, X2,..., Xm formed to extend in the column direction.
(M is a natural number) and n scanning lines Y1, Y formed to extend in the row direction
2,..., Yn (n is a natural number). Each data line X1 to Xm is electrically connected to the data line driving circuit 5, and each scanning line Y1 to Yn is electrically connected to the scanning line driving circuit 4. The display panel unit 3 has rectangular pixels 2 corresponding to the positions where the data lines X1 to Xm and the scanning lines Y1 to Yn intersect, and each pixel 2 corresponds to the corresponding data line X1. ~
Xm and corresponding scanning lines Y1 to Yn are connected.

FIG. 2 is an equivalent circuit diagram of the pixel 2 arranged corresponding to each intersection of the mth data line Xm and the nth scanning line Yn. The pixel 2 includes one transistor, one storage capacitor, and a liquid crystal capacitor as one electro-optic element. More specifically, the pixel 2 includes a thin film transistor (hereinafter referred to as TFT) 6, a storage capacitor CS, and a liquid crystal capacitor LC. The TFT 6 is a transistor that functions as a switching element, and is composed of an N-type TFT.

The gate of the TFT 6 is connected to the nth scanning line Yn. The drain of the TFT 6 is connected to the mth data line Xm. The source of the TFT 6 is connected to the pixel electrode E1 of the liquid crystal capacitor LC. A counter electrode E2 is formed through a liquid crystal at a position facing the pixel electrode E1. The counter electrode E2 is connected to the common terminal COM. TFT
The source 6 is connected to the first electrode P1 of the storage capacitor CS. The second electrode P2 of the storage capacitor CS is connected to the common terminal COM of the counter electrode E2. In the present embodiment, the pixel 2 includes the TFT 6, the storage capacitor CS, and the liquid crystal capacitor LC. However, the present invention is not limited to this and may be changed as appropriate.

As shown in FIG. 1, the scanning line driving circuit 4 is configured to display one scanning line among the n scanning lines Yn provided in the display panel unit 3 based on a vertical synchronization signal from a control circuit (not shown). Are selected in the order of Y1, Y2,..., Yn−1, Yn from the top to the bottom of the screen in this embodiment. Then, the scanning line driving circuit 4 scans the scanning signals SC1 to SC1 corresponding to the selected scanning line.
SCn (n is a natural number) is output. The timing at which the data signals VD1 to VDm output from the data line driving circuit 5 are supplied to the liquid crystal capacitance LC and the holding capacitance CS of the pixel 2 on the selected scanning line is controlled by these scanning signals SC1 to SCn. Is done.

The data line driving circuit 5 creates data signals VD1 to VDm that are analog voltage signals having a level corresponding to the size of the image digital data. These data signals VD1 to VDm
Is a voltage signal whose polarity is inverted every frame.

Then, in each pixel 2 on the scanning lines Y1 to Yn selected by the scanning signals SC1 to SCn sequentially output from the scanning line driving circuit 4, the TFT 6 is set to the ON state. Thus, the data signals VD1 to VDm output from the data line driving circuit 5 to the respective pixels 2 via the data lines X1 to Xm are supplied to the liquid crystal capacitor LC and the holding capacitor CS via the TFT 6. That is, the voltages of the data signals VD1 to VDm are
By changing the molecular orientation state of the liquid crystal element, the state of transmitted light or reflected light of the liquid crystal element of each pixel 2 is controlled, and a predetermined image or the like is displayed on the display panel unit 3.

Next, details of each pixel 2 will be described with reference to FIGS. FIG. 3 is a cross-sectional view of the pixel 2, and FIG. 4 is a plan view of the periphery of the pixel 2. As shown in FIG. 3, each pixel 2 has the element substrate 10 and the counter substrate 11 bonded together with a sealing material (not shown) in the periphery thereof, and further a gap surrounded by the element substrate 10, the counter substrate 11 and the sealing material. That is, it is formed by enclosing a liquid crystal in the cell gap and providing a liquid crystal capacitor LC.

The element substrate 10 is formed of a transparent substrate such as glass, and a TFT is disposed on the element substrate 10.
6 and the pixel electrode E1 formed in the upper layer of the TFT 6 with the organic insulating films 12 and 13 interposed therebetween. An alignment film 14 is formed on the pixel electrode E1, and the alignment film 14 is rubbed. The pixel electrode E1 is made of, for example, ITO (Indium Tin O 2) which is a transparent conductive film.
xide) or the like.

As shown in FIG. 3, the TFT 6 includes a lower light-shielding film S that prevents light leakage on the element substrate 10, and an insulating protective film 15 that is formed on the lower light-shielding film S over the entire area of the element substrate 10. Have Furthermore, a semiconductor layer 16 on the protective film 15, a gate insulating film 17 formed on the semiconductor layer 16,
A gate electrode EG formed above the semiconductor layer 16 with the gate insulating film 17 interposed therebetween.

The TFT 6 includes a drain electrode ED formed on the drain side of the semiconductor layer 16, and
Furthermore, the semiconductor layer 16 has a source region ES on the source side.
As shown in FIG. 4, the scanning line Yn-2 extends from the gate electrode EG. A data line Xm-1 extends from the drain electrode ED. A plurality of scanning lines Yn-2 extend in the horizontal direction of the element substrate 10 and are formed in parallel in the vertical direction at equal intervals. The data lines Xm-1 extend in the vertical direction so as to cross the scanning line Yn-2 with the organic insulating film 12 interposed therebetween, and a plurality of data lines Xm-1 are formed in parallel in the horizontal direction at equal intervals.

The scanning line Yn and the gate electrode EG are formed of, for example, chromium, tantalum or the like. The gate insulating film 17 is formed of, for example, silicon nitride, silicon oxide, or the like. The semiconductor layer 16 is formed of, for example, doped a-Si, polycrystalline silicon, CdSe, or the like. The drain electrode ED and the data line Xm integrated therewith are formed of, for example, titanium, molybdenum, aluminum or the like.

The organic insulating film 12 shown in FIG. 3 is formed over the entire area of the element substrate 10 so as to cover the scanning lines (not shown), the TFTs 6 and the protective film 15. Further, the organic insulating film 13 is formed over the entire area of the element substrate 10 so as to cover the organic insulating film 12 and the data line (not shown). However, a contact hole CH is formed in a portion corresponding to the source region ES of the organic insulating films 12 and 13.
The contact between the pixel electrode E1 and the source region ES of the TFT 6 is established at the contact hole CH.

The counter substrate 11 facing the element substrate 10 is formed of a transparent substrate such as glass. The counter substrate 11 includes a counter electrode E2 and an alignment film 18 formed on the counter electrode E2. The counter electrode E2 is a planar electrode formed over the entire surface of the counter substrate 11 by using ITO or the like, for example.

A black matrix BM serving as an upper light-shielding film that prevents light leakage between the pixels 2 is provided between the counter substrate 11 and the counter electrode E2 and not in opposition to the pixel electrode E1, and is formed in the same layer. The same mask is formed at the same time as other elements to be formed. Further, as shown in FIG. 4, the black matrix BM covers the TFT 6 from above.

FIG. 5 is a cross-sectional view showing only the structure portion of the lower light-shielding film S that shields the backlight light L irradiated from the lower side of the element substrate 10 with respect to the TFT 6 formed on the element substrate 10.
In FIG. 5, a first light shielding layer 21 is formed at a position where the TFT 6 is formed on the upper surface of the element substrate 10, and a second light shielding layer 22 is formed on the upper surface of the first light shielding layer 21. That is, the lower light shielding film S is composed of the first light shielding layer 21 and the second light shielding layer 22. Also, the lower light shielding film S
A protective film 15 is formed on the upper and other portions of the element substrate 10, and a semiconductor layer 16 is further formed on the protective film 15. The semiconductor layer 16 serves as a base material for manufacturing the TFT 6.

Next, a manufacturing method of the lower light-shielding film S composed of the first light-shielding layer 21 and the second light-shielding layer 22 is shown in FIG.
) To (c).
A first light shielding layer 21 is formed on the upper surface 10a of the element substrate 10 by sputtering or the like. The first light shielding layer 21 is a film made of, for example, a titanium-based material, and is formed to a thickness of about 50 nanometers. By the way, the first made of titanium-based material
In order for the light shielding layer 21 alone to have a light shielding function, a thickness of about 100 nanometers is necessary, and a thickness of about 50 nanometers is insufficient.

A second light shielding layer 22 is formed on the upper surface of the first light shielding layer 21 by sputtering or the like. The second light shielding layer 22 is, for example, a film made of molybdenum and has a thickness of 50.
The film is formed to a nanometer level. Incidentally, in order for the second light shielding layer 22 made of a molybdenum-based material to have a light shielding function alone, a thickness of about 100 nanometers is necessary, and a thickness of about 50 nanometers is insufficient.

Therefore, in the present invention, the first light-shielding layer 21 having a thickness of 50 nm and the second light-shielding layer 22 having a thickness of 50 nanometers are stacked, so that light such as the backlight light L can be shielded. The first light-shielding layer 11 and the second light-shielding layer can be appropriately changed within a range of 30 to 60 nm, and the light-shielding function can be completed by stacking the first light-shielding layer and the second light-shielding layer. It is essential.

Next, a resist mask 23 is formed on the upper surface of the second light shielding layer 22. The size of the resist mask 23 is set to leave the desired first light shielding layer 21.
When the resist mask 23 is formed, first, the second light shielding layer 22 made of a molybdenum-based material is wet-etched with a phosphoric acid-nitric acid-based etchant having a high etching rate.
E. The wet etching WE at this time is an isotropic etching.

This phosphoric acid-nitric acid-based etching solution has a lower etching rate than the titanium-based material (first light shielding layer 21). Accordingly, the first light shielding layer 21 made of a titanium material is hardly etched. As a result, the portion of the second light shielding layer 22 without the resist mask 23 is gradually etched away from the upper surface.

When the portion of the second light shielding layer 22 where the resist mask 23 is not present is removed, the etching with the phosphoric acid-nitric acid based etching solution is terminated. At this time, as shown in FIG.
2 is over-etched into a shape dug horizontally from below the resist mask 23.

Next, anisotropic dry etching is performed on the first light-shielding layer 21 made of a titanium-based material with a gas such as fluorine-based CF 4 having a high etching rate from the upper surface direction DE. Dry etching using fluorine-based etching gas allows selective etching of materials,
The resist mask 23, the element substrate 10, and the second light shielding layer 22 hidden under the resist mask 23 are not etched.

Then, anisotropic etching is continued until the portion of the first light shielding layer 21 not covered with the resist mask 23 is removed. As a result, as shown in FIG.
The end surfaces of the first and second light-shielding layers 22 (end surfaces of the lower light-shielding film S) are stepped.

Next, the resist mask 23 is removed, and the protective film 15 is formed on the entire surface of the element substrate 10 without the light shielding film and on the lower light shielding film S (the first light shielding layer 21 and the second light shielding layer 22). An amorphous silicon layer (semiconductor layer 16) is sequentially formed.

The amorphous silicon layer is then subjected to a heat treatment for conversion into polycrystalline polysilicon as described in the section of the background art to be converted into a desired semiconductor layer 16, and the process continues to a normal thin film TFT manufacturing process. In the specification of the present application, the subsequent steps are the same as a general thin film TFT manufacturing step, and thus the description of the manufacturing step is omitted.

As described above, according to the present invention, the following effects can be obtained.
(1) According to the present embodiment, the lower light shielding film S composed of the first light shielding layer 21 and the second light shielding layer 22.
The end surfaces of the slabs were stepped to reduce individual steps. Therefore, the upper protective film 15 and the semiconductor layer 16 have good coverage and do not cause defects.

(2) According to the present embodiment, the second light shielding layer 22 is etched by isotropic etching, and the first light shielding layer 21 is etched by anisotropic etching. Therefore, the two layers, that is, the first light shielding layer 21 and the second light shielding layer 22 can be suitably etched with only one resist mask 23. As a result, although the two layers are etched, the resist application and the resist used for the mask are removed only once, and the number of processes can be minimized. Further, as compared with the case where the end face is inclined, delicate film thickness adjustment is not required, and variations after formation can be greatly reduced.

In addition, you may change the said embodiment as follows.
In the above embodiment, the first light shielding layer 21 is made of a titanium material, and the second light shielding layer 22 is made of a molybdenum material. However, the present invention is not limited to this, and if the etching rate of the first light shielding layer 21 is sufficiently small during the wet etching of the second light shielding layer 22, the first light shielding layer 21 and the second light shielding layer 22 are made of other low reflection materials. It is good also as a combination.

For example, the first light shielding layer 21 may be a titanium-based material, and the second light shielding layer 22 may be a combination of a chromium-based material or a tungsten-based material.
In the above embodiment, the titanium-based material of the first light-shielding layer 21 is subjected to anisotropic dry etching with a fluorine-based etching gas, and the molybdenum-based material of the second light-shielding layer 22 is wet-etched with a phosphoric acid-nitric acid-based etching solution. Went. However, the first light shielding layer 2 is not limited to this.
The first and second light shielding layers 22 may be etched by wet etching. In this case, the wet etching rate of the first light-shielding layer 21 and the wet etching rate of the second light-shielding layer 22 are suitable as long as the etching rate is a difference of two digits (10) or more.

In the above-described embodiment, the first light-shielding layer 21 and the second light-shielding layer 22 have a two-layer structure as a layer that shields external light. However, the present invention is not limited to this, and the light shielding layer may be composed of three or more layers. In that case, the etching method and the etching rate of each light shielding layer may be optimized so that the end faces of the light shielding layer have a suitable stepped shape.

In the above embodiment, the electro-optical device is a liquid crystal display device. However, the present invention is not limited thereto, and the manufacturing method of the present invention can be used even for an electro-optical device having a thin film semiconductor element such as a thin transistor on an element substrate. Examples of the electro-optical device other than the liquid crystal display device include an organic electroluminescence device and an electrophoretic display device.

In the above embodiment, the TFT 6 is provided on the element substrate 10. However, the element substrate 10 is not limited to the electro-optical device, and may be a substrate for another semiconductor device. In that case, a TFT having a stepped light shielding layer can be provided on the substrate for a semiconductor device. Further, the element used in the semiconductor device is not limited to the TFT, but may be a diode, for example.

1 is a block diagram of a liquid crystal device according to an embodiment. Similarly, a circuit diagram of a pixel circuit. Similarly, sectional drawing which shows the cross-sectional structure for 2 pixels of a display panel part. Similarly, the top view which expands and shows 1 pixel part of a display panel part. Similarly, sectional drawing of a light shielding film. (A) (b) (c), Similarly, sectional drawing which showed the procedure of the manufacturing method of an electro-optical apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS S ... Lower side light shielding film, 1 ... Liquid crystal display device, 2 ... Pixel, 3 ... Display panel part, 4 ... Scanning line drive circuit, 5 ... Data line drive circuit, 6 ... TFT, 10 ... Element substrate, 15 ... Protective film 16, semiconductor layers, 21: first light shielding layer, 22: second light shielding layer, 23: resist mask.

Claims (3)

In a method for manufacturing an electro-optical device including a thin film transistor and a light shielding film,
Forming a first light-shielding layer on the upper side of the element substrate;
Forming a second light shielding layer above the first light shielding layer;
Forming a resist mask for forming a light-shielding film with the first light-shielding layer and the second light-shielding layer on the second light-shielding layer;
Isotropic using a phosphoric acid nitric acid-based etching solution having a higher etching rate for the second light-shielding layer than a part of the second light-shielding layer using the resist mask. Removing by wet etching;
Using the resist mask, anisotropic dry etching of a part of the first light shielding layer using a fluorine-based etching gas having an etching rate for the first light shielding layer larger than that for the second light shielding layer Forming a light-shielding film comprising the first light-shielding layer and the second light-shielding layer;
After removing the resist mask, forming an insulating layer on the light shielding film and the exposed upper surface of the element substrate;
Without flattening the insulating layer, the upper surface of the insulating layer portion is raised corresponding to the light shielding film, a step of forming a silicon layer constituting the thin film transistor, a heat treatment thereafter the silicon layer,
A semiconductor layer formed by integrating a silicon layer located above the light shielding film and above the step of the insulating layer and a silicon layer located outside the light shielding film and located below the step. Forming a thin film transistor in which a source region and a contact hole are disposed in a silicon layer corresponding to the lower side of the step;
A method for manufacturing an electro-optical device.   The method of manufacturing an electro-optical device according to claim 1, wherein the first light shielding layer is made of a titanium-based material having a thickness of 30 to 60 nm.   The method of manufacturing an electro-optical device according to claim 1, wherein the second light shielding layer is made of a molybdenum-based material having a thickness of 30 to 60 nm.

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