JP5046142B2 - 再構成可能集積回路 - Google Patents
再構成可能集積回路 Download PDFInfo
- Publication number
- JP5046142B2 JP5046142B2 JP2010505888A JP2010505888A JP5046142B2 JP 5046142 B2 JP5046142 B2 JP 5046142B2 JP 2010505888 A JP2010505888 A JP 2010505888A JP 2010505888 A JP2010505888 A JP 2010505888A JP 5046142 B2 JP5046142 B2 JP 5046142B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- reconfigurable integrated
- integrated circuit
- signal
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/1778—Structural details for adapting physical parameters
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/1778—Structural details for adapting physical parameters
- H03K19/17784—Structural details for adapting physical parameters for supply voltage
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/1778—Structural details for adapting physical parameters
- H03K19/17792—Structural details for adapting physical parameters for operating speed
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Logic Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010505888A JP5046142B2 (ja) | 2008-03-31 | 2009-03-30 | 再構成可能集積回路 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008090315 | 2008-03-31 | ||
JP2008090315 | 2008-03-31 | ||
PCT/JP2009/056451 WO2009123090A1 (fr) | 2008-03-31 | 2009-03-30 | Circuit intégré reconfigurable |
JP2010505888A JP5046142B2 (ja) | 2008-03-31 | 2009-03-30 | 再構成可能集積回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2009123090A1 JPWO2009123090A1 (ja) | 2011-07-28 |
JP5046142B2 true JP5046142B2 (ja) | 2012-10-10 |
Family
ID=41135466
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010505888A Expired - Fee Related JP5046142B2 (ja) | 2008-03-31 | 2009-03-30 | 再構成可能集積回路 |
Country Status (2)
Country | Link |
---|---|
JP (1) | JP5046142B2 (fr) |
WO (1) | WO2009123090A1 (fr) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9166598B1 (en) * | 2012-05-08 | 2015-10-20 | Altera Corporation | Routing and programming for resistive switch arrays |
JP6750353B2 (ja) * | 2016-07-07 | 2020-09-02 | 日本電気株式会社 | スイッチ回路およびこれを用いた半導体装置 |
CN117236254B (zh) * | 2023-11-13 | 2024-03-15 | 中科芯磁科技(珠海)有限责任公司 | 可配置逻辑块控制方法、可配置逻辑块及存储介质 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0945785A (ja) * | 1995-07-24 | 1997-02-14 | Motorola Inc | 高速・低電力用しきい電圧選択方法 |
JP2001156261A (ja) * | 1999-09-13 | 2001-06-08 | Hitachi Ltd | 半導体集積回路装置 |
JP2004335686A (ja) * | 2003-05-07 | 2004-11-25 | National Institute Of Advanced Industrial & Technology | 高速低消費電力論理装置 |
JP2005109179A (ja) * | 2003-09-30 | 2005-04-21 | National Institute Of Advanced Industrial & Technology | 高速低消費電力論理装置 |
-
2009
- 2009-03-30 WO PCT/JP2009/056451 patent/WO2009123090A1/fr active Application Filing
- 2009-03-30 JP JP2010505888A patent/JP5046142B2/ja not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0945785A (ja) * | 1995-07-24 | 1997-02-14 | Motorola Inc | 高速・低電力用しきい電圧選択方法 |
JP2001156261A (ja) * | 1999-09-13 | 2001-06-08 | Hitachi Ltd | 半導体集積回路装置 |
JP2004335686A (ja) * | 2003-05-07 | 2004-11-25 | National Institute Of Advanced Industrial & Technology | 高速低消費電力論理装置 |
JP2005109179A (ja) * | 2003-09-30 | 2005-04-21 | National Institute Of Advanced Industrial & Technology | 高速低消費電力論理装置 |
Also Published As
Publication number | Publication date |
---|---|
JPWO2009123090A1 (ja) | 2011-07-28 |
WO2009123090A1 (fr) | 2009-10-08 |
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