JP5046142B2 - 再構成可能集積回路 - Google Patents

再構成可能集積回路 Download PDF

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Publication number
JP5046142B2
JP5046142B2 JP2010505888A JP2010505888A JP5046142B2 JP 5046142 B2 JP5046142 B2 JP 5046142B2 JP 2010505888 A JP2010505888 A JP 2010505888A JP 2010505888 A JP2010505888 A JP 2010505888A JP 5046142 B2 JP5046142 B2 JP 5046142B2
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JP
Japan
Prior art keywords
circuit
reconfigurable integrated
integrated circuit
signal
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2010505888A
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English (en)
Japanese (ja)
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JPWO2009123090A1 (ja
Inventor
崇 河並
帆平 小池
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
National Institute of Advanced Industrial Science and Technology AIST
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Priority to JP2010505888A priority Critical patent/JP5046142B2/ja
Publication of JPWO2009123090A1 publication Critical patent/JPWO2009123090A1/ja
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Publication of JP5046142B2 publication Critical patent/JP5046142B2/ja
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778Structural details for adapting physical parameters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778Structural details for adapting physical parameters
    • H03K19/17784Structural details for adapting physical parameters for supply voltage
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778Structural details for adapting physical parameters
    • H03K19/17792Structural details for adapting physical parameters for operating speed

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  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2010505888A 2008-03-31 2009-03-30 再構成可能集積回路 Expired - Fee Related JP5046142B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2010505888A JP5046142B2 (ja) 2008-03-31 2009-03-30 再構成可能集積回路

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2008090315 2008-03-31
JP2008090315 2008-03-31
PCT/JP2009/056451 WO2009123090A1 (fr) 2008-03-31 2009-03-30 Circuit intégré reconfigurable
JP2010505888A JP5046142B2 (ja) 2008-03-31 2009-03-30 再構成可能集積回路

Publications (2)

Publication Number Publication Date
JPWO2009123090A1 JPWO2009123090A1 (ja) 2011-07-28
JP5046142B2 true JP5046142B2 (ja) 2012-10-10

Family

ID=41135466

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010505888A Expired - Fee Related JP5046142B2 (ja) 2008-03-31 2009-03-30 再構成可能集積回路

Country Status (2)

Country Link
JP (1) JP5046142B2 (fr)
WO (1) WO2009123090A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9166598B1 (en) * 2012-05-08 2015-10-20 Altera Corporation Routing and programming for resistive switch arrays
JP6750353B2 (ja) * 2016-07-07 2020-09-02 日本電気株式会社 スイッチ回路およびこれを用いた半導体装置
CN117236254B (zh) * 2023-11-13 2024-03-15 中科芯磁科技(珠海)有限责任公司 可配置逻辑块控制方法、可配置逻辑块及存储介质

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0945785A (ja) * 1995-07-24 1997-02-14 Motorola Inc 高速・低電力用しきい電圧選択方法
JP2001156261A (ja) * 1999-09-13 2001-06-08 Hitachi Ltd 半導体集積回路装置
JP2004335686A (ja) * 2003-05-07 2004-11-25 National Institute Of Advanced Industrial & Technology 高速低消費電力論理装置
JP2005109179A (ja) * 2003-09-30 2005-04-21 National Institute Of Advanced Industrial & Technology 高速低消費電力論理装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0945785A (ja) * 1995-07-24 1997-02-14 Motorola Inc 高速・低電力用しきい電圧選択方法
JP2001156261A (ja) * 1999-09-13 2001-06-08 Hitachi Ltd 半導体集積回路装置
JP2004335686A (ja) * 2003-05-07 2004-11-25 National Institute Of Advanced Industrial & Technology 高速低消費電力論理装置
JP2005109179A (ja) * 2003-09-30 2005-04-21 National Institute Of Advanced Industrial & Technology 高速低消費電力論理装置

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Publication number Publication date
JPWO2009123090A1 (ja) 2011-07-28
WO2009123090A1 (fr) 2009-10-08

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