JP5046083B2 - Method for manufacturing silicon carbide semiconductor device - Google Patents

Method for manufacturing silicon carbide semiconductor device Download PDF

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JP5046083B2
JP5046083B2 JP2006227650A JP2006227650A JP5046083B2 JP 5046083 B2 JP5046083 B2 JP 5046083B2 JP 2006227650 A JP2006227650 A JP 2006227650A JP 2006227650 A JP2006227650 A JP 2006227650A JP 5046083 B2 JP5046083 B2 JP 5046083B2
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silicon carbide
semiconductor device
formed
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JP2008053418A (en
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勉 八尾
光央 岡本
明将 木下
憲司 福田
孝 西
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独立行政法人産業技術総合研究所
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/872Schottky diodes
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66053Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
    • H01L29/6606Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
    • H01L29/1608Silicon carbide

Description

  The present invention relates to a method for manufacturing a silicon carbide semiconductor device, and more particularly to a method for manufacturing a Schottky barrier diode (hereinafter abbreviated as SBD) formed on a silicon carbide substrate.

  Silicon carbide (SiC) is compared to silicon (Si) as follows: 1. Wide band gap. 2. High breakdown strength. Excellent physical properties such as high electron saturation drift velocity. Therefore, by using silicon carbide (SiC) as the substrate material, a high-performance, high-voltage semiconductor element for power that exceeds the limit of silicon (Si) can be manufactured.

  Moreover, SBD with a rectification | straightening characteristic can be manufactured by depositing a metal on the surface similarly to semiconductors, such as silicon (Si), in silicon carbide (SiC). For these reasons, it is considered that a high breakdown voltage and low on-resistance SBD using silicon carbide (SiC) as a substrate material can be realized, and many researches and developments have been conducted.

As a method for increasing the breakdown voltage of silicon carbide SBD, a structure in which a guard ring is formed by ion implantation in the termination region of the Schottky electrode is used (Non-Patent Document 1).
FIG. 1 is a cross-sectional view of a general structure. In this structure, a low concentration n-type drift layer 2 is deposited on a high concentration n-type substrate 1. Thereafter, a p-type region 3 is formed by ion implantation using p-type impurities. Since the ion-implanted p-type impurity remains between the lattices, carriers are not emitted and the p-type region does not operate. Therefore, by performing a high temperature treatment called activation, the p-type impurity is replaced (activated) by lattice sites and operates as a p-type region. Thereafter, an ohmic electrode (metal or silicide) 5 is formed on the high-concentration n-type substrate 1, and a metal is deposited on the low-concentration n-type drift layer 2 as the Schottky electrode 4. The end of Schottky electrode 4 is formed so as to overlap p-type region 3 formed by ion implantation and activation. As a result, the electric field concentration at the Schottky electrode termination when a high voltage is applied in the reverse direction is alleviated, and the device operates as a high breakdown voltage SBD having a predetermined blocking characteristic.

  In order to activate the ion-implanted p-type impurity, high-temperature treatment is performed in an argon atmosphere at a temperature of 1600 ° C. or higher, but the SiC surface is contaminated or damaged by the activation. When the Schottky electrode 4 is deposited on the surface of the silicon carbide 2, the electrical characteristics deteriorate. The deterioration of the electrical characteristics appears remarkably in the leakage current and does not operate as a high breakdown voltage SBD. For this reason, there is a problem that an SBD with a small leakage current cannot be manufactured with a high yield in the process of activation at a high temperature.

  Silicon carbide (SiC) forms a silicon dioxide layer on the surface of silicon carbide (SiC) by thermal oxidation. This silicon dioxide layer can be removed by treatment with hydrofluoric acid. This method can remove the silicon carbide (SiC) surface without new damage. This method is known as a method for removing a contaminated or damaged layer on the surface of silicon carbide (SiC), and is called sacrificial oxidation. Furthermore, since the thickness of silicon dioxide can be controlled by the oxidation time and temperature, it is possible to control the grinding thickness of the silicon carbide surface.

  In the SBD manufacturing process, a manufacturing process is known in which this sacrificial oxidation is performed before the Schottky electrode is formed after high temperature activation (Patent Document 1).

However, the inventors' experiments have shown that if the amount removed from the surface by sacrificial oxidation after activation is small, a dramatic reduction in leakage current is not observed.
US Pat. No. 6,905,916 IEEE Electron Device Lett., Vol.17 (1996) 139

  The present invention provides a process for efficiently manufacturing a high breakdown voltage SBD by solving a problem of leakage current due to Schottky electrode formation on a silicon carbide surface deteriorated due to contamination or damage generated after activation in a silicon carbide semiconductor device. The task is to do.

The present invention relates to a method of removing a silicon carbide (SiC) surface deteriorated by activation, removing a silicon dioxide layer formed by oxidation with hydrofluoric acid or the like, and removing the silicon dioxide layer formed by oxidation. The layer is 40 nm or more.
More specifically, the problem is solved by the following means.
(1) A silicon carbide semiconductor device including a step of forming a second conductivity type region by ion implantation in a first conductivity type low-concentration silicon carbide film under a termination region of a Schottky electrode and performing a high temperature activation process In the manufacturing method, prior to the formation of the Schottky electrode on the low-concentration silicon carbide film of the first conductivity type, the silicon carbide film surface is formed by sacrificial oxidation and the sacrificial oxidation after the high-temperature activation process. A method for producing a silicon carbide semiconductor device comprising a step of removing the silicon dioxide layer having a thickness of 40 nm or more.
(2) The method for producing a silicon carbide semiconductor device according to (1), wherein the silicon dioxide layer of less than 140 nm formed by sacrificial oxidation is removed.
(3) The method for producing a silicon carbide semiconductor device according to (1), wherein the silicon dioxide layer of 140 nm or more formed by sacrificial oxidation is removed.
(4) The method for manufacturing a silicon carbide semiconductor device according to (1), wherein the step of sacrificing the surface and the step of removing the silicon dioxide layer of 40 nm or more formed by the sacrificial oxidation are repeated a plurality of times.
(5) The first conductivity type low-concentration silicon carbide film is deposited on a first conductivity type silicon carbide substrate having a crystallographic plane index of (0001) plane or (000-1) plane. A method for manufacturing a silicon carbide semiconductor device according to any one of (1) to (4).

  According to the present invention, in a silicon carbide semiconductor device, the problem of leakage current due to formation of a Schottky electrode on a silicon carbide surface deteriorated due to contamination or damage generated after activation is solved, and a high breakdown voltage SBD is efficiently manufactured. Can do.

FIG. 2 is an explanatory view of a manufacturing process of silicon carbide SBD which is an embodiment according to the present invention. In FIG. 2A, on the surface of the high-concentration n-type substrate 1 having a (0001) plane of 300 μm thickness doped with 1 × 10 18 cm −3 of nitrogen, for example, 5 × 10 15 cm −3 of A low concentration n-type drift layer 2 having a thickness of 6 μm doped with nitrogen is deposited.

In order to form a p-type region for a termination structure in the silicon carbide substrate, for example, aluminum (Al) is implanted in FIG. 2B. Injection amount and the incident energy of the implantation of aluminum ions, for example, 4 × 10 16 / cm 2 , 2 × 10 16 / cm 2, 1 × with 1.6 × 10 16 / cm 2, 30keV at 70keV with 120keV at 200keV The region 3 having a thickness of 0.3 μm is formed at an Al concentration of 3 × 10 20 / cm 3 in four steps of 10 16 / cm 2 .

  In order to activate the aluminum implanted to form the p-type region 3 for the termination structure on the silicon carbide substrate, in FIG. 2C, for example, activation is performed at 1800 ° C. for 30 seconds in an Ar atmosphere. . After activation, a layer 6 such as contamination or damage occurs.

  In order to remove the layer 6 such as contamination or damage generated after activation in FIG. 2D from the silicon carbide substrate, for example, oxidation is performed for 180 minutes in an oxygen atmosphere at 1200 ° C. to form a 50 nm silicon dioxide layer 7. To do. As a result, the layer 4 such as contamination or damage caused by the activation is taken into the silicon dioxide layer 7. Thereafter, for example, the silicon dioxide layer 7 formed on the silicon carbide substrate is removed by exposure to 5% hydrofluoric acid for 10 minutes (FIG. 2E). By repeating this oxidation and hydrofluoric acid treatment three times, for example, the silicon dioxide layer 7 having a total thickness of 150 nm is simultaneously removed from the layer 6 such as contamination or damage caused by activation.

In FIG. 2F, the Schottky electrode 4 is formed on the silicon carbide substrate by, for example, depositing nickel at 9.0 × 10 −8 Torr. In order to operate the SBD as a high breakdown voltage element, for example, the end portion of the Schottky electrode 4 is overlapped with the end of the Schottky electrode 4 by 4 μm. For example, when forming the ohmic electrode 5 on the back surface, for example, before forming the Schottky electrode 4, nickel is deposited to a thickness of 50 nm and a treatment is performed at 1000 ° C. for 2 minutes in an argon atmosphere.

FIG. 3 shows reverse current-voltage characteristics of an SBD in which a high-temperature-treated silicon carbide (SiC) shown in the best mode for carrying out the invention is not oxidized after activation and a Schottky electrode is formed. is there.
FIG. 4 shows a Schottky electrode after silicon dioxide having a total thickness of 140 nm is formed after activation and removed by hydrofluoric acid treatment for high-temperature-treated silicon carbide (SiC) shown in the best mode for carrying out the invention. It is the reverse direction current-voltage characteristic of SBD which formed. It can be confirmed that the SBD with less leakage current was improved from 1 in 9 to 9 out of 9 by forming a total of 140 nm of silicon dioxide after activation. An SBD having a small leakage current is an SBD having a current value of 10 −6 A / cm 2 or less when a reverse voltage of 100 V is applied.

  FIG. 5 shows the SBD of the silicon dioxide film formed after activation and the low leakage current in the manufactured SBD for the high-temperature-treated silicon carbide (SiC) shown in the best mode for carrying out the invention. It is a relationship of proportions. When SBD is manufactured on silicon carbide (SiC) having a total of 40 nm of silicon dioxide film after activation, it can be said that SBD with less leakage current is greater than 0%. Further, when SBD is manufactured on silicon carbide (SiC) in which a silicon dioxide film is formed in a total of 40 nm or more and less than 140 nm after activation, it can be said that SBD with little leakage current approaches 100%. In particular, when an SBD is manufactured on silicon carbide (SiC) in which a silicon dioxide film is formed in total 140 nm or more after activation, it can be said that the SBD with a small leakage current is 100%.

  In addition, although the present Example demonstrated the process for reducing the leakage current of SBD manufactured to the silicon carbide on a (0001) plane board | substrate, oxidation conditions differ also slightly for a (000-1) plane board | substrate. But is equally applicable.

As mentioned above, although the Example of this invention was explained in full detail, this invention is not limited to the said Example. Various design changes can be made without departing from the spirit of the present invention.
In the best mode for carrying out the invention, the silicon carbide SBD having a certain termination structure has been described in accordance with a cross-sectional view. However, if the structure of the SBD is accompanied by ion implantation, the structure within the scope of the invention is not deviated. Needless to say, the SBD can be handled.
For example, as shown in FIG. 6, a field limiting ring (FLR) that relaxes the electric field around the Schottky junction and realizes a high breakdown voltage by surrounding the Schottky junction with a number of second conductivity type rings. As shown in FIG. 7, the present invention can also be applied to an SBD having a structure and a junction barrier Schottky (JBS) diode that attempts to suppress a reverse current by mixing a pn junction on a Schottky junction surface.

It is sectional drawing of silicon carbide SBD which concerns on this invention. It is sectional drawing for demonstrating the manufacturing process of silicon carbide SBD. FIG. 5 is a current-voltage characteristic diagram of silicon carbide SBD in which a Schottky electrode is formed without performing an oxidation treatment after activation. It is a current-voltage characteristic view of silicon carbide SBD in which a total of 140 nm of silicon dioxide is formed after activation and removed by hydrofluoric acid treatment and then a Schottky electrode is formed. It is the relationship between the silicon dioxide film thickness formed after activation and the ratio of SBD with less leakage current in the manufactured SBD. It is sectional drawing of silicon carbide SBD which has a FLR structure based on this invention. 1 is a cross-sectional view of a silicon carbide SBD having a JBS structure according to the present invention.

Explanation of symbols

1 High-concentration n-type substrate 2 Low-concentration n-type drift layer 3 p-type impurity ion implantation region 4 Schottky electrode 5 Ohmic electrode (metal or silicide)
6 Degraded layer caused by activation 7 Silicon dioxide layer produced by thermal oxidation 8 Field limiting ring structure 9 Junction barrier Schottky structure

Claims (4)

  1. In a method for manufacturing a silicon carbide semiconductor device including a step of forming a second conductivity type region in a first conductivity type low-concentration silicon carbide film under a termination region of a Schottky electrode by ion implantation and performing a high temperature activation process ,
    The first conductivity type low-concentration silicon carbide film is deposited on a first conductivity type silicon carbide substrate having a crystallographic plane index of (0001) or (000-1) .
    Prior to the Schottky electrode formed on said first conductivity type low-concentration silicon carbide film, after the step of treating the hot activation, 40 nm formed by the process and sacrificial oxidation to sacrificial oxidation of the silicon carbide film surface A method for manufacturing a silicon carbide semiconductor device, comprising the step of removing the silicon dioxide layer as described above (excluding less than 50 nm).
  2.   2. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein the silicon dioxide layer of less than 140 nm formed by sacrificial oxidation is removed.
  3.   2. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein a silicon dioxide layer having a thickness of 140 nm or more formed by sacrificial oxidation is removed.
  4.   2. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein the step of sacrificing the surface and the step of removing the silicon dioxide layer of 40 nm or more formed by the sacrificial oxidation are repeated a plurality of times.
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WO2009116444A1 (en) * 2008-03-17 2009-09-24 三菱電機株式会社 Semiconductor device
US8232558B2 (en) * 2008-05-21 2012-07-31 Cree, Inc. Junction barrier Schottky diodes with current surge capability
JP5207939B2 (en) * 2008-12-09 2013-06-12 三菱電機株式会社 Method for manufacturing silicon carbide semiconductor device
KR101327657B1 (en) 2009-04-16 2013-11-12 미쓰비시덴키 가부시키가이샤 Method for manufacturing silicon carbide schottky diode
JP2010262952A (en) * 2009-04-29 2010-11-18 Mitsubishi Electric Corp Method for manufacturing silicon carbide semiconductor device
JP5443908B2 (en) * 2009-09-09 2014-03-19 株式会社東芝 Manufacturing method of semiconductor device
US9117739B2 (en) 2010-03-08 2015-08-25 Cree, Inc. Semiconductor devices with heterojunction barrier regions and methods of fabricating same
JP5406171B2 (en) 2010-12-08 2014-02-05 ローム株式会社 SiC semiconductor device
JP5455973B2 (en) 2011-05-27 2014-03-26 三菱電機株式会社 Method for manufacturing silicon carbide semiconductor device
US8680587B2 (en) 2011-09-11 2014-03-25 Cree, Inc. Schottky diode
US20150044840A1 (en) * 2012-03-30 2015-02-12 Hitachi, Ltd. Method for producing silicon carbide semiconductor device
WO2017168736A1 (en) * 2016-03-31 2017-10-05 新電元工業株式会社 Semiconductor device and production method for semiconductor device

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JP3544123B2 (en) 1997-07-04 2004-07-21 富士電機デバイステクノロジー株式会社 Thermal oxide film forming method of the silicon carbide semiconductor device
JP4100652B2 (en) * 1999-08-10 2008-06-11 富士電機デバイステクノロジー株式会社 SiC Schottky diode
JP4326762B2 (en) * 2002-07-17 2009-09-09 日本インター株式会社 Schottky barrier diode having lateral trench structure and manufacturing method thereof
JP4175157B2 (en) 2003-03-25 2008-11-05 日産自動車株式会社 Silicon carbide semiconductor device and manufacturing method thereof
JP2006210569A (en) * 2005-01-27 2006-08-10 Shindengen Electric Mfg Co Ltd Semiconductor device and manufacturing method thereof
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