JP5046083B2 - Method for manufacturing silicon carbide semiconductor device - Google Patents
Method for manufacturing silicon carbide semiconductor device Download PDFInfo
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- JP5046083B2 JP5046083B2 JP2006227650A JP2006227650A JP5046083B2 JP 5046083 B2 JP5046083 B2 JP 5046083B2 JP 2006227650 A JP2006227650 A JP 2006227650A JP 2006227650 A JP2006227650 A JP 2006227650A JP 5046083 B2 JP5046083 B2 JP 5046083B2
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims description 61
- 229910010271 silicon carbide Inorganic materials 0.000 title claims description 46
- 238000004519 manufacturing process Methods 0.000 title claims description 19
- 238000000034 method Methods 0.000 title claims description 19
- 239000004065 semiconductor Substances 0.000 title claims description 17
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 52
- 238000001994 activation Methods 0.000 claims description 29
- 230000004913 activation Effects 0.000 claims description 26
- 235000012239 silicon dioxide Nutrition 0.000 claims description 26
- 239000000377 silicon dioxide Substances 0.000 claims description 26
- 230000003647 oxidation Effects 0.000 claims description 22
- 238000007254 oxidation reaction Methods 0.000 claims description 22
- 239000000758 substrate Substances 0.000 claims description 16
- 238000005468 ion implantation Methods 0.000 claims description 7
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 12
- 230000015556 catabolic process Effects 0.000 description 9
- 238000011109 contamination Methods 0.000 description 6
- 239000012535 impurity Substances 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000010306 acid treatment Methods 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- 230000004888 barrier function Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 239000012300 argon atmosphere Substances 0.000 description 2
- 239000012298 atmosphere Substances 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- -1 aluminum ions Chemical class 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/6606—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
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- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
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- H01—ELECTRIC ELEMENTS
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/1608—Silicon carbide
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Description
本発明は、炭化珪素半導体装置の製造方法に関し、特に炭化珪素基板上に形成したショットキーバリアダイオード（以下ＳＢＤと略称する）の製造方法に関するものである。 The present invention relates to a method for manufacturing a silicon carbide semiconductor device, and more particularly to a method for manufacturing a Schottky barrier diode (hereinafter abbreviated as SBD) formed on a silicon carbide substrate.
炭化珪素（ＳｉＣ）は、シリコン（Ｓｉ）と比較して、１．バンドギャップが広い、２．絶縁破壊強度が大きい、３．電子の飽和ドリフト速度が大きいなどの優れた物性を有する。したがって、炭化珪素（ＳｉＣ）を基板材料として用いることにより、シリコン（Ｓｉ）の限界を超えた高性能の高耐圧な電力用半導体素子が製造できる。 Silicon carbide (SiC) is compared to silicon (Si) as follows: 1. Wide band gap. 2. High breakdown strength. Excellent physical properties such as high electron saturation drift velocity. Therefore, by using silicon carbide (SiC) as the substrate material, a high-performance, high-voltage semiconductor element for power that exceeds the limit of silicon (Si) can be manufactured.
また、炭化珪素（ＳｉＣ）には、シリコン（Ｓｉ）等の半導体と同様に、金属を表面に堆積させることにより整流特性のあるＳＢＤを製造できる。これらの理由から、炭化珪素（ＳｉＣ）を基板材料とした高耐圧で低オン抵抗のＳＢＤが実現できると考えられ、数多くの研究開発が行われている。 Moreover, SBD with a rectification | straightening characteristic can be manufactured by depositing a metal on the surface similarly to semiconductors, such as silicon (Si), in silicon carbide (SiC). For these reasons, it is considered that a high breakdown voltage and low on-resistance SBD using silicon carbide (SiC) as a substrate material can be realized, and many researches and developments have been conducted.
炭化珪素ＳＢＤの耐圧を上げる方法として、ショットキー電極の終端領域にイオン注入でガードリングを形成した構造が使われている（非特許文献１）。
図１は、一般的な構造の断面図である。この構造では、高濃度ｎ型基板１上に低濃度ｎ型ドリフト層２が堆積されている。その後、ｐ型不純物をイオン注入法によってｐ型領域３が形成される。イオン注入されたｐ型不純物は格子間に留まったままであるためキャリアを放出せずｐ型領域として動作しない。そのため、活性化と呼ばれる高温処理を行うことによって、ｐ型不純物は格子サイトに置換（活性化）されｐ型領域として動作する。その後、高濃度ｎ型基板１上にオーミック電極（金属又はシリサイド）５を形成し、低濃度ｎ型ドリフト層２上にショットキー電極４として２上に金属を堆積させる。ショットキー電極４の終端はイオン注入と活性化によって形成したｐ型領域３と重なるように形成される。その結果、逆方向に高電圧をかけたときのショットキー電極終端部での電界集中が緩和され、所定の阻止特性を有する高耐圧ＳＢＤとして動作する。
As a method for increasing the breakdown voltage of silicon carbide SBD, a structure in which a guard ring is formed by ion implantation in the termination region of the Schottky electrode is used (Non-Patent Document 1).
FIG. 1 is a cross-sectional view of a general structure. In this structure, a low concentration n-type drift layer 2 is deposited on a high concentration n-type substrate 1. Thereafter, a p-type region 3 is formed by ion implantation using p-type impurities. Since the ion-implanted p-type impurity remains between the lattices, carriers are not emitted and the p-type region does not operate. Therefore, by performing a high temperature treatment called activation, the p-type impurity is replaced (activated) by lattice sites and operates as a p-type region. Thereafter, an ohmic electrode (metal or silicide) 5 is formed on the high-concentration n-type substrate 1, and a metal is deposited on the low-concentration n-type drift layer 2 as the Schottky electrode 4. The end of Schottky electrode 4 is formed so as to overlap p-type region 3 formed by ion implantation and activation. As a result, the electric field concentration at the Schottky electrode termination when a high voltage is applied in the reverse direction is alleviated, and the device operates as a high breakdown voltage SBD having a predetermined blocking characteristic.
イオン注入されたｐ型不純物の活性化を行うために１６００℃以上の温度でアルゴン雰囲気中で高温処理されるが、活性化によりＳｉＣの表面が汚染又は損傷等を受けているため、活性化後の炭化珪素２表面上にショットキー電極４を堆積させると電気特性が劣化する。電気特性の劣化は漏洩電流に顕著に現れ、高耐圧ＳＢＤとして動作しない。このため、高温の活性化を行うプロセスで漏洩電流の少ないＳＢＤを歩留まりよく製造はできない問題がある。 In order to activate the ion-implanted p-type impurity, high-temperature treatment is performed in an argon atmosphere at a temperature of 1600 ° C. or higher, but the SiC surface is contaminated or damaged by the activation. When the Schottky electrode 4 is deposited on the surface of the silicon carbide 2, the electrical characteristics deteriorate. The deterioration of the electrical characteristics appears remarkably in the leakage current and does not operate as a high breakdown voltage SBD. For this reason, there is a problem that an SBD with a small leakage current cannot be manufactured with a high yield in the process of activation at a high temperature.
炭化珪素（ＳｉＣ）は、熱酸化によって二酸化珪素層を炭化珪素（ＳｉＣ）表面上に形成する。この二酸化珪素層をフッ化水素酸によって処理することにより取り除くことができる。この方法は炭化珪素（ＳｉＣ）表面を新たな損傷を与えることなく取り除くことができる。炭化珪素（ＳｉＣ）表面の汚染又は損傷等した層を取り除く方法として知られており、犠牲酸化と呼ばれている。さらに、二酸化珪素の厚さは酸化時間と温度により制御できるため、炭化珪素表面の研削厚さを制御することが可能である。 Silicon carbide (SiC) forms a silicon dioxide layer on the surface of silicon carbide (SiC) by thermal oxidation. This silicon dioxide layer can be removed by treatment with hydrofluoric acid. This method can remove the silicon carbide (SiC) surface without new damage. This method is known as a method for removing a contaminated or damaged layer on the surface of silicon carbide (SiC), and is called sacrificial oxidation. Furthermore, since the thickness of silicon dioxide can be controlled by the oxidation time and temperature, it is possible to control the grinding thickness of the silicon carbide surface.
ＳＢＤ製造工程において、高温活性化の後ショットキー電極を形成する前に、この犠牲酸化を行う製造工程は知られている(特許文献１)。 In the SBD manufacturing process, a manufacturing process is known in which this sacrificial oxidation is performed before the Schottky electrode is formed after high temperature activation (Patent Document 1).
しかしながら、活性化後に行う犠牲酸化で表面から取り除く量が少なければ漏洩電流の劇的な減少が見られないことが発明者らの実験によって明らかになった。
本発明は、炭化珪素半導体装置において、活性化後に生じる汚染又は損傷等により劣化した炭化珪素表面上のショットキー電極形成による漏洩電流の問題を解決し、高耐圧ＳＢＤを効率良く製造するプロセスを提供することを課題とする。 The present invention provides a process for efficiently manufacturing a high breakdown voltage SBD by solving a problem of leakage current due to Schottky electrode formation on a silicon carbide surface deteriorated due to contamination or damage generated after activation in a silicon carbide semiconductor device. The task is to do.
本発明は、活性化により劣化した炭化珪素（ＳｉＣ）表面を除去する方法を、酸化により形成された二酸化珪素層をフッ化水素酸等により除去し、除去する量を酸化により形成された二酸化珪素層を４０ｎｍ以上とすることを特徴とする。
より詳細には次のような手段により解決される。
（１）ショットキー電極の終端領域の下の第１導電型の低濃度の炭化珪素膜に、イオン注入により第２導電型の領域を形成し高温活性化処理する工程を含む炭化珪素半導体装置の製造方法において、第１導電型の低濃度の炭化珪素膜上へのショットキー電極形成に先立って、上記高温活性化処理する工程後に、上記炭化珪素膜表面を犠牲酸化する工程及び犠牲酸化により形成された４０ｎｍ以上の二酸化珪素層を除去する工程を備えたことを特徴とする炭化珪素半導体装置の製造方法。
（２）犠牲酸化によって形成された１４０ｎｍ未満の二酸化珪素層を除去することを特徴とする（１）の炭化珪素半導体装置の製造方法。
（３）犠牲酸化によって形成した１４０ｎｍ以上の二酸化珪素層を除去することを特徴とする（１）の炭化珪素半導体装置の製造方法。
（４）表面を犠牲酸化する工程及び犠牲酸化により形成された４０ｎｍ以上の二酸化珪素層を除去する工程を、複数回繰り返して行うことを特徴とする（１）の炭化珪素半導体装置の製造方法。
（５）第１導電型の低濃度の炭化珪素膜は、結晶学的面指数が（０００１）面又は（０００−１）面を有する第１導電型の炭化珪素基板上に堆積されていることを特徴とする（１）ないし（４）のいずれかに記載の炭化珪素半導体装置の製造方法。
The present invention relates to a method of removing a silicon carbide (SiC) surface deteriorated by activation, removing a silicon dioxide layer formed by oxidation with hydrofluoric acid or the like, and removing the silicon dioxide layer formed by oxidation. The layer is 40 nm or more.
More specifically, the problem is solved by the following means.
(1) A silicon carbide semiconductor device including a step of forming a second conductivity type region by ion implantation in a first conductivity type low-concentration silicon carbide film under a termination region of a Schottky electrode and performing a high temperature activation process In the manufacturing method, prior to the formation of the Schottky electrode on the low-concentration silicon carbide film of the first conductivity type, the silicon carbide film surface is formed by sacrificial oxidation and the sacrificial oxidation after the high-temperature activation process. A method for producing a silicon carbide semiconductor device comprising a step of removing the silicon dioxide layer having a thickness of 40 nm or more.
(2) The method for producing a silicon carbide semiconductor device according to (1), wherein the silicon dioxide layer of less than 140 nm formed by sacrificial oxidation is removed.
(3) The method for producing a silicon carbide semiconductor device according to (1), wherein the silicon dioxide layer of 140 nm or more formed by sacrificial oxidation is removed.
(4) The method for manufacturing a silicon carbide semiconductor device according to (1), wherein the step of sacrificing the surface and the step of removing the silicon dioxide layer of 40 nm or more formed by the sacrificial oxidation are repeated a plurality of times.
(5) The first conductivity type low-concentration silicon carbide film is deposited on a first conductivity type silicon carbide substrate having a crystallographic plane index of (0001) plane or (000-1) plane. A method for manufacturing a silicon carbide semiconductor device according to any one of (1) to (4).
本発明によれば、炭化珪素半導体装置において、活性化後に生じる汚染又は損傷等により劣化した炭化珪素表面上のショットキー電極形成による漏洩電流の問題を解決し、高耐圧ＳＢＤを効率良く製造することができる。 According to the present invention, in a silicon carbide semiconductor device, the problem of leakage current due to formation of a Schottky electrode on a silicon carbide surface deteriorated due to contamination or damage generated after activation is solved, and a high breakdown voltage SBD is efficiently manufactured. Can do.
図２は、本発明に係る実施例である炭化珪素ＳＢＤの製造工程説明図である。図２Ａにおいて、たとえば、１×１０１８ｃｍ−３の窒素がドーピングされた厚さ３００μｍの（０００１）面を有する高濃度ｎ型基板１表面上には、たとえば、５×１０１５ｃｍ−３の窒素がドーピングされた厚さ６μｍの低濃度ｎ型ドリフト層２が堆積される。 FIG. 2 is an explanatory view of a manufacturing process of silicon carbide SBD which is an embodiment according to the present invention. In FIG. 2A, on the surface of the high-concentration n-type substrate 1 having a (0001) plane of 300 μm thickness doped with 1 × 10 18 cm −3 of nitrogen, for example, 5 × 10 15 cm −3 of A low concentration n-type drift layer 2 having a thickness of 6 μm doped with nitrogen is deposited.
前記炭化珪素基板に、終端構造用のｐ型領域を形成するために図２Ｂにおいて、たとえば、アルミニウム（Ａｌ）を注入する。注入するアルミニウムイオンの入射エネルギーと注入量は、たとえば、２００ｋｅＶで４×１０１６／ｃｍ２、１２０ｋｅＶで２×１０１６／ｃｍ２、７０ｋｅＶで１．６×１０１６／ｃｍ２、３０ｋｅＶで１×１０１６／ｃｍ２の４段階で行い、Ａｌ濃度３×１０２０／ｃｍ３で厚さ０．３μｍの領域３を形成する。 In order to form a p-type region for a termination structure in the silicon carbide substrate, for example, aluminum (Al) is implanted in FIG. 2B. Injection amount and the incident energy of the implantation of aluminum ions, for example, 4 × 10 16 / cm 2 , 2 × 10 16 / cm 2, 1 × with 1.6 × 10 16 / cm 2, 30keV at 70keV with 120keV at 200keV The region 3 having a thickness of 0.3 μm is formed at an Al concentration of 3 × 10 20 / cm 3 in four steps of 10 16 / cm 2 .
前記炭化珪素基板で、終端構造用のｐ型領域３を形成するために注入されたアルミニウムを活性化するために、図２Ｃにおいて、たとえば、Ａｒ雰囲気中において１８００℃で３０秒間の活性化を行う。活性化後汚染又は損傷等の層６が生じる。 In order to activate the aluminum implanted to form the p-type region 3 for the termination structure on the silicon carbide substrate, in FIG. 2C, for example, activation is performed at 1800 ° C. for 30 seconds in an Ar atmosphere. . After activation, a layer 6 such as contamination or damage occurs.
前記炭化珪素基板から、図２Ｄにおいて、活性化後に生じた汚染又は損傷等の層６を除去するため、たとえば、１２００℃の酸素雰囲気中で１８０分の酸化を行い５０ｎｍの二酸化珪素層７を形成する。その結果、活性化で生じた汚染又は損傷等の層４を二酸化珪素層７の中に取り込まれる。その後、たとえば、５％フッ化水素酸に１０分間さらすことにより炭化珪素基板上に形成された二酸化珪素層７を除去する（図２Ｅ）。この酸化、フッ化水素酸処理を、たとえば、３回繰り返すことにより合計１５０ｎｍの二酸化珪素層７と同時に活性化で生じた汚染又は損傷等の層６が除去される。 In order to remove the layer 6 such as contamination or damage generated after activation in FIG. 2D from the silicon carbide substrate, for example, oxidation is performed for 180 minutes in an oxygen atmosphere at 1200 ° C. to form a 50 nm silicon dioxide layer 7. To do. As a result, the layer 4 such as contamination or damage caused by the activation is taken into the silicon dioxide layer 7. Thereafter, for example, the silicon dioxide layer 7 formed on the silicon carbide substrate is removed by exposure to 5% hydrofluoric acid for 10 minutes (FIG. 2E). By repeating this oxidation and hydrofluoric acid treatment three times, for example, the silicon dioxide layer 7 having a total thickness of 150 nm is simultaneously removed from the layer 6 such as contamination or damage caused by activation.
図２Ｆにおいて、前記炭化珪素基板上に、たとえば、ニッケルを９．０×１０−８Ｔｏｒｒで蒸着することによりショットキー電極４を形成する。ショットキー電極４の終端部分は、ＳＢＤを高耐圧素子として動作させるために、たとえば、ショットキー電極４の端とｐ型領域３が４μｍ重なるようにする。たとえば、裏面にオーミック電極５を形成する場合は、たとえば、ショットキー電極４の形成前にニッケルを５０ｎｍ蒸着してアルゴン雰囲気中において１０００℃で２分の処理を行う。 In FIG. 2F, the Schottky electrode 4 is formed on the silicon carbide substrate by, for example, depositing nickel at 9.0 × 10 −8 Torr. In order to operate the SBD as a high breakdown voltage element, for example, the end portion of the Schottky electrode 4 is overlapped with the end of the Schottky electrode 4 by 4 μm. For example, when forming the ohmic electrode 5 on the back surface, for example, before forming the Schottky electrode 4, nickel is deposited to a thickness of 50 nm and a treatment is performed at 1000 ° C. for 2 minutes in an argon atmosphere.
図３は、発明を実施するための最良の形態に示した高温処理された炭化珪素（ＳｉＣ）について、活性化後に酸化処理を行わずショットキー電極を形成したＳＢＤの逆方向電流−電圧特性である。
図４は、発明を実施するための最良の形態に示した高温処理された炭化珪素（ＳｉＣ）について、活性化後に二酸化珪素を合計１４０ｎｍ形成し、フッ化水素酸処理で除去した後ショットキー電極を形成したＳＢＤの逆方向電流−電圧特性である。活性化後に二酸化珪素を合計１４０ｎｍ形成することにより漏洩電流の少ないＳＢＤが９個中１個から９個中９個に改善されたことが確認できる。漏洩電流の少ないＳＢＤは、逆方向電圧を１００Ｖ印加した時に流れる電流値が１０−６Ａ／ｃｍ２以下のＳＢＤとする。
FIG. 3 shows reverse current-voltage characteristics of an SBD in which a high-temperature-treated silicon carbide (SiC) shown in the best mode for carrying out the invention is not oxidized after activation and a Schottky electrode is formed. is there.
FIG. 4 shows a Schottky electrode after silicon dioxide having a total thickness of 140 nm is formed after activation and removed by hydrofluoric acid treatment for high-temperature-treated silicon carbide (SiC) shown in the best mode for carrying out the invention. It is the reverse direction current-voltage characteristic of SBD which formed. It can be confirmed that the SBD with less leakage current was improved from 1 in 9 to 9 out of 9 by forming a total of 140 nm of silicon dioxide after activation. An SBD having a small leakage current is an SBD having a current value of 10 −6 A / cm 2 or less when a reverse voltage of 100 V is applied.
図５は、発明を実施するための最良の形態に示した高温処理された炭化珪素（ＳｉＣ）について、活性化後に形成された二酸化珪素膜厚と製造されたＳＢＤ中の漏洩電流の少ないＳＢＤの割合の関係である。活性化後に二酸化珪素膜を合計４０ｎｍ形成した炭化珪素（ＳｉＣ）にＳＢＤを製造すると漏洩電流の少ないＳＢＤは０％より大きくなるといえる。さらに、活性化後に二酸化珪素膜を合計４０ｎｍ以上、且つ１４０ｎｍ未満形成した炭化珪素（ＳｉＣ）にＳＢＤを製造すると漏洩電流の少ないＳＢＤは１００％に近づくといえる。特に活性化後に二酸化珪素膜を合計１４０ｎｍ以上形成した炭化珪素（ＳｉＣ）にＳＢＤを製造すると漏洩電流の少ないＳＢＤは１００％になるといえる。 FIG. 5 shows the SBD of the silicon dioxide film formed after activation and the low leakage current in the manufactured SBD for the high-temperature-treated silicon carbide (SiC) shown in the best mode for carrying out the invention. It is a relationship of proportions. When SBD is manufactured on silicon carbide (SiC) having a total of 40 nm of silicon dioxide film after activation, it can be said that SBD with less leakage current is greater than 0%. Further, when SBD is manufactured on silicon carbide (SiC) in which a silicon dioxide film is formed in a total of 40 nm or more and less than 140 nm after activation, it can be said that SBD with little leakage current approaches 100%. In particular, when an SBD is manufactured on silicon carbide (SiC) in which a silicon dioxide film is formed in total 140 nm or more after activation, it can be said that the SBD with a small leakage current is 100%.
なお、本実施例では、（０００１）面基板上の炭化珪素に製造されたＳＢＤの漏洩電流を減少させるための工程について説明したが、（０００−１）面基板にも、酸化条件は若干異なるが、同様に適用できる。 In addition, although the present Example demonstrated the process for reducing the leakage current of SBD manufactured to the silicon carbide on a (0001) plane board | substrate, oxidation conditions differ also slightly for a (000-1) plane board | substrate. But is equally applicable.
以上、本発明の実施例を詳述したが、本発明は前記実施例に限定されるものではない。そして、本発明の趣旨を逸脱することがなければ、種々の設計変更を行うことが可能である。
前記発明を実施するための最良の形態において、ある終端構造を持つ炭化珪素ＳＢＤにおける断面図に従って説明したが、イオン注入を伴うＳＢＤの構造であれば、本発明の趣旨を逸脱しない範囲の構造を持つＳＢＤに対応させることができることはいうまでもないことである。
例えば、図６に示すように、幾つもの第２導電型のリングでショットキー接合部を取り囲むことにより、ショットキー接合部の周囲の電界を緩和し高耐圧を実現するフィールドリミッティングリング（ＦＬＲ）構造を持つＳＢＤや、図７に示すように、ショットキー接合面にｐｎ接合を混在させることにより逆電流を抑えようとするジャンクションバリアショットキー（ＪＢＳ）ダイオードにも適用できる。
As mentioned above, although the Example of this invention was explained in full detail, this invention is not limited to the said Example. Various design changes can be made without departing from the spirit of the present invention.
In the best mode for carrying out the invention, the silicon carbide SBD having a certain termination structure has been described in accordance with a cross-sectional view. However, if the structure of the SBD is accompanied by ion implantation, the structure within the scope of the invention is not deviated. Needless to say, the SBD can be handled.
For example, as shown in FIG. 6, a field limiting ring (FLR) that relaxes the electric field around the Schottky junction and realizes a high breakdown voltage by surrounding the Schottky junction with a number of second conductivity type rings. As shown in FIG. 7, the present invention can also be applied to an SBD having a structure and a junction barrier Schottky (JBS) diode that attempts to suppress a reverse current by mixing a pn junction on a Schottky junction surface.
１ 高濃度ｎ型基板
２ 低濃度ｎ型ドリフト層
３ ｐ型不純物イオン注入領域
４ ショットキー電極
５ オーミック電極（金属又はシリサイド）
６ 活性化により生じる劣化層
７ 熱酸化によって生成される二酸化珪素層
８ フィールドリミッティングリング構造
９ ジャンクションバリアショットキー構造
1 High-concentration n-type substrate 2 Low-concentration n-type drift layer 3 p-type impurity ion implantation region 4 Schottky electrode 5 Ohmic electrode (metal or silicide)
6 Degraded layer caused by activation 7 Silicon dioxide layer produced by thermal oxidation 8 Field limiting ring structure 9 Junction barrier Schottky structure
Claims (4)
上記第１導電型の低濃度の炭化珪素膜は、結晶学的面指数が（０００１）面又は（０００−１）面を有する第１導電型の炭化珪素基板上に堆積されており、
上記第１導電型の低濃度の炭化珪素膜上へのショットキー電極形成に先立って、上記高温活性化処理する工程後に、上記炭化珪素膜表面を犠牲酸化する工程及び犠牲酸化により形成された４０ｎｍ以上（ただし、５０ｎｍ未満を除く）の二酸化珪素層を除去する工程を備えたことを特徴とする炭化珪素半導体装置の製造方法。 In a method for manufacturing a silicon carbide semiconductor device including a step of forming a second conductivity type region in a first conductivity type low-concentration silicon carbide film under a termination region of a Schottky electrode by ion implantation and performing a high temperature activation process ,
The first conductivity type low-concentration silicon carbide film is deposited on a first conductivity type silicon carbide substrate having a crystallographic plane index of (0001) or (000-1) .
Prior to the Schottky electrode formed on said first conductivity type low-concentration silicon carbide film, after the step of treating the hot activation, 40 nm formed by the process and sacrificial oxidation to sacrificial oxidation of the silicon carbide film surface A method for manufacturing a silicon carbide semiconductor device, comprising the step of removing the silicon dioxide layer as described above (excluding less than 50 nm).
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