JP5038360B2 - Manufacturing method of multilayer wiring board with built-in capacitor element - Google Patents

Manufacturing method of multilayer wiring board with built-in capacitor element Download PDF

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JP5038360B2
JP5038360B2 JP2009147627A JP2009147627A JP5038360B2 JP 5038360 B2 JP5038360 B2 JP 5038360B2 JP 2009147627 A JP2009147627 A JP 2009147627A JP 2009147627 A JP2009147627 A JP 2009147627A JP 5038360 B2 JP5038360 B2 JP 5038360B2
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capacitor element
hole
precursor sheet
wiring board
conductor
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JP2009212536A (en
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忠 長澤
桂 林
伊藤  隆
恒 佐藤
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Kyocera Corp
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Description

本発明は、各種AV機器や家電機器・通信機器・コンピュータやその周辺機器等の電子機器に使用されるコンデンサ素子内蔵多層配線基板の製造方法に関する。   The present invention relates to a method for manufacturing a multilayer wiring board with a built-in capacitor element used in various AV devices, home appliances, communication devices, computers, and electronic devices such as peripheral devices.

従来、配線基板は、アルミナ等のセラミック材料から成る絶縁層あるいはガラスエポキシ樹脂等の有機樹脂材料から成る絶縁層の内部および表面に複数の配線導体を形成し、上下に位置する配線導体間を絶縁層に形成した貫通導体を介して電気的に接続して成り、この配線基板の表面に半導体素子やコンデンサ・抵抗素子等の電子素子を搭載取着するとともにこれらの電極を各配線導体に接続することによって電子機器に使用される電子装置が形成されている。   Conventionally, a wiring board has a plurality of wiring conductors formed inside and on the surface of an insulating layer made of a ceramic material such as alumina or an organic resin material such as glass epoxy resin, and the wiring conductors located above and below are insulated from each other. Electrical connections are made through through conductors formed in the layers, and electronic elements such as semiconductor elements, capacitors and resistance elements are mounted on the surface of the wiring board, and these electrodes are connected to the respective wiring conductors. Thus, an electronic device used for an electronic device is formed.

しかしながら、近年、電子機器は、移動体通信機器に代表されるように小型・薄型・軽量化が要求されてきており、このような電子機器に搭載される配線基板も小型・高密度化が要求されるようになってきている。   However, in recent years, electronic devices have been required to be small, thin, and lightweight as represented by mobile communication devices, and wiring boards mounted on such electronic devices are also required to be small and high in density. It has come to be.

このような要求に対応するために、特開平11-220262号公報には、配線基板の
表面に搭載される電子素子の数を減らして配線基板を小型化する目的で、配線基板の内部にチップ状コンデンサ素子を実装することが提案されている。
In order to meet such demands, Japanese Patent Application Laid-Open No. 11-220262 discloses a chip inside the wiring board for the purpose of reducing the number of electronic elements mounted on the surface of the wiring board and reducing the size of the wiring board. It has been proposed to mount a capacitor element.

特開平11-220262号公報JP-A-11-220262

近年、電子機器のさらなる小型化が要求される中で、配線基板の小型化とともに配線基板に内蔵されるコンデンサ素子もより小型化が要求されるようになってきている。   In recent years, a further miniaturization of electronic devices has been demanded, and along with the miniaturization of the wiring board, the capacitor element incorporated in the wiring board has also been demanded to be miniaturized.

しかしながら、特開平11-220262号公報に示されるようなチップ状コンデンサ
素子を配線基板に内蔵して配線基板内部の配線導体あるいは貫通導体と電気的な接続を行うためには、コンデンサ素子の上面および/または下面に半田や導電性ペーストから成る表面電極をスクリーン印刷法等の方法によって形成する必要があるが、コンデンサ素子の小型化にともない微細な表面電極を形成することが困難と成り、配線基板内蔵用のコンデンサ素子の小型化が困難であるという問題点を有していた。
However, in order to incorporate a chip-like capacitor element as disclosed in JP-A-11-220262 in a wiring board and make an electrical connection with a wiring conductor or a through conductor inside the wiring board, It is necessary to form a surface electrode made of solder or conductive paste on the lower surface by a method such as a screen printing method. However, it is difficult to form a fine surface electrode as the capacitor element is downsized. There is a problem that it is difficult to reduce the size of the built-in capacitor element.

さらに、近年、通信速度の高速化に伴い通信機器等の電子機器類は周波数が数100MH
z以上の高周波領域で使用されるようになってきており、このような高周波領域においてはコンデンサ素子の電極と半導体素子等の電子部品とをつなぐ配線導体の長さに起因するインダクタンス成分が無視できなくなってきている。このため、配線基板にチップ状コンデンサ素子を内蔵した場合、コンデンサ素子の各電極層からコンデンサ素子側面の端面電極への電極引き出し、さらにはコンデンサ素子の上面および/あるいは下面への電極引き出しといった電極の引き回しがあるため、引き回し電極の長さに起因するインダクタンス成分が大きなものとなり、△V=L・dI/dt(△Vは電源ノイズ、Lはインダクタンス、Iは電流値、tは時間)で定義されるインダクタンス成分により発生する電源ノイズ△Vが無視できないほど大きくなってしまい、通信機器等の電子機器類に誤動作を発生させてしまう等の問題点を有していた。
Furthermore, in recent years, with the increase in communication speed, electronic devices such as communication devices have a frequency of several hundred MHz.
It has come to be used in the high frequency region above z, and in such a high frequency region, the inductance component due to the length of the wiring conductor connecting the electrode of the capacitor element and the electronic component such as the semiconductor element can be ignored. It is gone. For this reason, when a chip-like capacitor element is built in the wiring board, electrode lead-out from each electrode layer of the capacitor element to the end face electrode on the side surface of the capacitor element, and electrode lead-out to the upper surface and / or the lower surface of the capacitor element is performed. Since there is routing, the inductance component due to the length of the routing electrode becomes large, and is defined by ΔV = L · dI / dt (ΔV is power supply noise, L is inductance, I is current value, and t is time) As a result, the power supply noise ΔV generated by the generated inductance component becomes so large that it cannot be ignored, causing malfunctions in electronic devices such as communication devices.

本発明は、かかる従来技術の問題点に鑑み案出されたものであり、その目的は、ノイズの発生が少なく、通信機器等の電子機器類に誤動作を発生させてしまうことのない小型の
コンデンサ素子を提供することにある。
The present invention has been devised in view of the problems of the prior art, and its purpose is a small capacitor that generates less noise and does not cause malfunction in electronic devices such as communication devices. It is to provide an element.

本発明の一形態に係るコンデンサ素子内蔵多層配線基板の製造方法は、 樹脂から成る複数の絶縁層該絶縁層を貫通する第1貫通孔、および該第1貫通孔に充填された貫通導体有する多層配線基板と、多数の電極層およびセラミック誘電体層を交互に積層して成るとともに、前記電極層および前記セラミック誘電体層を貫通する第2貫通孔を有する積層体、および前記第2貫通孔に充填された引き出し電極部有するコンデンサ素子と、を備えたコンデンサ素子内蔵多層配線基板の製造方法において、樹脂から成る複数の第1前駆体シートに前記第1貫通孔を形成し、前記第1前駆体シートの前記第1貫通孔に導電性ペーストを充填する工程と、樹脂から成る第2前駆体シートに空洞部を穿設する工程と、前記引き出し電極部に、前記積層体の主面から突出するとともに前記第1貫通孔の径よりも径が大きい突出部を有する前記コンデンサ素子を前記空洞部に収容する工程と、前記第2前駆体シートおよび前記空洞部に収容した前記コンデンサ素子の上下に、前記引き出し電極部の前記突出部と前記第1前駆体シートの前記第1貫通孔に充填された前記導電性ペーストとを重ね合わせて前記第1前駆体シートを配置する工程と、前記第1前駆体シートと前記第2前駆体シートとを上下方向から加熱加圧し、前記第1前駆体シート、前記導電性ペーストおよび前記第2前駆体シートを硬化させて前記絶縁層および前記貫通導体を形成するとともに、前記引き出し電極部の前記突出部を前記貫通導体と電気的に接続させる工程含むことを特徴とする。 Method of manufacturing the capacitor element built multilayer wiring board according to an embodiment of the present invention, a plurality of insulating layers made of resin, the first through-hole penetrating the insulating layer, and a through conductor filled in the first through hole A multilayer wiring board having a plurality of electrode layers and ceramic dielectric layers alternately laminated , and a laminate having a second through-hole penetrating the electrode layers and the ceramic dielectric layers , and the second penetrations. a capacitor element having a lead electrode portion filled in the hole, the method of manufacturing the capacitor element built multilayer wiring board having a to form the first through-hole into a plurality of first precursor sheet made of resin, the first A step of filling the first through hole of one precursor sheet with a conductive paste, a step of drilling a cavity in a second precursor sheet made of resin, and the lamination on the lead electrode portion A step of accommodating the capacitor element that protrudes from the main surface of the body and has a protruding portion having a diameter larger than the diameter of the first through-hole in the cavity, and the second precursor sheet and the cavity. The first precursor sheet is disposed above and below the capacitor element by superimposing the protruding portion of the lead electrode portion and the conductive paste filled in the first through hole of the first precursor sheet. A step of heating and pressurizing the first precursor sheet and the second precursor sheet from above and below to cure the first precursor sheet, the conductive paste, and the second precursor sheet; and thereby forming said through conductor, characterized in that it comprises a step of connecting the protruding portion of the lead electrode portions in the through conductor electrically.

本発明の一形態に係るコンデンサ素子内蔵多層配線基板の製造方法によれば、コンデンサ素子の上下に前駆体シートを重ねて上下方向に加熱加圧することにより、前駆体シートを硬化させて絶縁層を形成するとともに、引き出し電極部の突出部を導体と電気的に接続させたことから、ノイズの発生が少なく、通信機器等の電子機器類に誤動作を発生させてしまうことのない小型のコンデンサ素子内蔵多層配線基板を作製することができる。   According to the method for manufacturing a multilayer wiring board with a built-in capacitor element according to an aspect of the present invention, the precursor sheet is stacked on the top and bottom of the capacitor element and heated and pressed in the vertical direction to cure the precursor sheet and form the insulating layer. Built-in small capacitor element that generates noise and generates no malfunction in electronic equipment such as communication equipment because the protruding part of the lead electrode part is electrically connected to the conductor. A multilayer wiring board can be produced.

本発明のコンデンサ素子の実施の形態の一例を示す断面図である。It is sectional drawing which shows an example of embodiment of the capacitor | condenser element of this invention. 図1のコンデンサ素子を内蔵した本発明のコンデンサ素子内蔵多層配線基板の断面図である。It is sectional drawing of the multilayer wiring board with a built-in capacitor | condenser element of this invention which incorporated the capacitor | condenser element of FIG. (a)〜(g)は、それぞれ本発明のコンデンサ素子内蔵多層配線基板の製造方法を説明するための工程毎の断面図である。(A)-(g) is sectional drawing for every process for demonstrating the manufacturing method of the multilayer wiring board with a built-in capacitor | condenser element of this invention, respectively.

次に本発明のコンデンサ素子およびコンデンサ素子内蔵多層配線基板を添付の図面に基づいて詳細に説明する。   Next, a capacitor element and a multilayer wiring board with a built-in capacitor element according to the present invention will be described in detail with reference to the accompanying drawings.

図1は、本発明のコンデンサ素子の実施の形態の一例を示す断面図である。また、図2は、図1のコンデンサ素子を内蔵した本発明のコンデンサ素子内蔵多層配線基板の断面図であり、本例では、コンデンサ素子を1個内蔵した場合を示している。これらの図において、1は電極層、2はセラミック誘電体層、3は貫通孔、4は引き出し電極部で、主にこれらで本発明のコンデンサ素子5が構成されている。また、6は絶縁層、7は配線導体、8は貫通導体、9は接続パッドで、主にこれらとコンデンサ素子5とで本発明のコンデンサ素子内蔵多層配線基板11が構成されている。なお、図2には、絶縁層6を3層積層して成るコンデンサ素子内蔵多層配線基板11を示している。また、コンデンサ素子内蔵多層配線基板11は内部に位置する絶縁層6の少なくとも1層には空洞部10が形成されており、その空洞部10にはコンデンサ素子5が埋設されている。   FIG. 1 is a sectional view showing an example of an embodiment of a capacitor element of the present invention. 2 is a cross-sectional view of the multilayer wiring board with a built-in capacitor element of the present invention incorporating the capacitor element of FIG. 1. In this example, a case where one capacitor element is built is shown. In these figures, 1 is an electrode layer, 2 is a ceramic dielectric layer, 3 is a through hole, 4 is a lead electrode portion, and these mainly constitute the capacitor element 5 of the present invention. In addition, 6 is an insulating layer, 7 is a wiring conductor, 8 is a through conductor, 9 is a connection pad, and these and the capacitor element 5 mainly constitute the multilayer wiring board 11 with a built-in capacitor element of the present invention. FIG. 2 shows a multilayer wiring board 11 with a built-in capacitor element formed by laminating three insulating layers 6. The capacitor element built-in multilayer wiring substrate 11 has a cavity 10 formed in at least one of the insulating layers 6 located inside, and the capacitor element 5 is embedded in the cavity 10.

コンデンサ素子5は、縦・横・高さがそれぞれ0.3〜5mmの直方体であり、図1に断面図で示すように、セラミック誘電体層2と電極層1とを交互に積層することにより形成されている。   The capacitor element 5 is a rectangular parallelepiped having a length, width, and height of 0.3 to 5 mm, respectively, and by alternately laminating ceramic dielectric layers 2 and electrode layers 1 as shown in a sectional view in FIG. Is formed.

このようなセラミック誘電体層2の材料としては、種々の誘電体セラミック材料を用いることができ、例えば、BaTiO3やLaTiO3・CaTiO3・SrTiO3等のセラミック組成物、あるいは、BaTiO3の構成元素であるBaをCaで、TiをZrやS
nで部分的に置換した固溶体等のチタン酸バリウム系材料や、鉛系ペロブスカイト型構造化合物等が挙げられる。
As the material of the ceramic dielectric layer 2, various dielectric ceramic materials can be used. For example, a ceramic composition such as BaTiO 3 , LaTiO 3 · CaTiO 3 · SrTiO 3 , or a composition of BaTiO 3 . The element Ba is Ca and Ti is Zr or S.
Examples thereof include barium titanate-based materials such as solid solutions partially substituted with n, lead-based perovskite-type structural compounds, and the like.

また、電極層1を形成する材料としては、例えばPdやAg・Pt・Ni・Cu・Pb等の金属やそれらの合金が用いられる。   Moreover, as a material which forms the electrode layer 1, metals, such as Pd, Ag * Pt * Ni * Cu * Pb, and those alloys are used, for example.

さらに、コンデンサ素子5は、多数の電極層1に対して垂直方向に貫通する貫通孔3に導体が充填されて成る引き出し電極部4を有している。   Further, the capacitor element 5 has a lead electrode portion 4 formed by filling a through hole 3 penetrating in the vertical direction with respect to a large number of electrode layers 1.

本発明のコンデンサ素子5によれば、コンデンサ素子5を、多数の電極層1に対して垂直方向に貫通する貫通孔3に導体が充填されて成る引き出し電極部4を有するものとしたことから、コンデンサ素子5に端面電極や表面電極を印刷することなく直径が数10μmという微細な引き出し電極部4を容易に形成することができるためコンデンサ素子5を小型化することができるとともに、コンデンサ素子5に端面電極や表面電極を配設して電極を引き回しする必要もなく、電極層1の直上に最短距離で引き出し電極部4を形成することができるので、引き回し電極の長さに起因するインダクタンス成分を小さくすることが可能で、高周波領域においても電源ノイズの小さい電気特性に優れたものとすることができる。   According to the capacitor element 5 of the present invention, the capacitor element 5 has the extraction electrode portion 4 in which the conductor is filled in the through hole 3 penetrating in the vertical direction with respect to the multiple electrode layers 1. The fine lead electrode portion 4 having a diameter of several tens of μm can be easily formed without printing the end face electrode or the surface electrode on the capacitor element 5, so that the capacitor element 5 can be miniaturized and the capacitor element 5 It is not necessary to arrange the end face electrode or the surface electrode and route the electrode, and the lead electrode portion 4 can be formed at the shortest distance immediately above the electrode layer 1, so that the inductance component due to the length of the lead electrode can be reduced. It can be made small, and can have excellent electrical characteristics with low power supply noise even in a high frequency region.

なお、引き出し電極部4の数は4〜50個であり、これらは第1引き出し電極部と第2引き出し部とに分類される。そして、コンデンサ素子5を構成する電極層1も、第1電極層と第2電極層とに分類され、第1電極層は第1引き出し電極によって電気的に接続されている。また、第2電極層は第2引き出し電極によって電気的に接続されており、セラミック誘電体層2を介して第1電極層と対向するように配置される。   The number of extraction electrode portions 4 is 4 to 50, and these are classified into a first extraction electrode portion and a second extraction portion. The electrode layer 1 constituting the capacitor element 5 is also classified into a first electrode layer and a second electrode layer, and the first electrode layer is electrically connected by the first lead electrode. The second electrode layer is electrically connected by the second lead electrode, and is disposed so as to face the first electrode layer with the ceramic dielectric layer 2 interposed therebetween.

このような、引き出し電極部4は、その個数が4個未満であるとインダクタンスを低減する効果が小さくなる傾向があり、50個を超えると電極層1の面積が小さくなってコンデンサ素子5の容量が小さくなってしまう傾向がある。   When the number of the extraction electrode portions 4 is less than 4, the effect of reducing the inductance tends to be reduced. When the number of the extraction electrode portions 4 exceeds 50, the area of the electrode layer 1 is reduced and the capacitance of the capacitor element 5 is reduced. Tend to be smaller.

また、引き出し電極部4の配置は、第1引き出し電極部と第2引き出し電極部が隣り合うようにすることがインダクタンスを低減するために重要であり、第1引き出し電極部と第2引き出し電極部が、格子状の配列の隣接する格子点にそれぞれ位置するように配置すると、よりインダクタンスを低減することができ好ましい。   In addition, it is important for the arrangement of the extraction electrode portion 4 that the first extraction electrode portion and the second extraction electrode portion are adjacent to each other in order to reduce the inductance, and the first extraction electrode portion and the second extraction electrode portion. However, it is preferable to arrange them so as to be positioned at adjacent lattice points of the lattice-like arrangement, since the inductance can be further reduced.

さらに、隣接する引き出し電極部4同士の間隔は50〜400μmである。50μmよりも小さいと導電ペーストを充填する際にショートする危険性があり、400μmよりも大きいとインダクタンス低減の効果が小さくなる傾向がある。   Furthermore, the interval between adjacent extraction electrode portions 4 is 50 to 400 μm. If it is smaller than 50 μm, there is a risk of short-circuiting when the conductive paste is filled, and if it is larger than 400 μm, the effect of reducing inductance tends to be small.

このようなコンデンサ素子5に形成される貫通孔3は、電極層1とセラミック誘電体層2とから成る積層体に、パンチングによる打ち抜き加工やUV−YAGレーザやエキシマレーザ・炭酸ガスレーザ等によるレーザ穿設加工等の方法により形成され、特に微細な貫通孔3とするためには、レーザによる穿設加工により形成されることが好ましい。また、貫通孔3の径は数10μm〜数mmであり、コンデンサ素子5の大きさにあわせて適宜決めればよい。   The through-hole 3 formed in such a capacitor element 5 is formed by punching a laminated body including the electrode layer 1 and the ceramic dielectric layer 2 or performing laser punching by UV-YAG laser, excimer laser, carbon dioxide gas laser, or the like. It is preferably formed by a laser drilling process in order to form the fine through-hole 3 by a method such as an installation process. Further, the diameter of the through hole 3 is several tens of μm to several mm, and may be appropriately determined according to the size of the capacitor element 5.

なお、貫通孔3は、内部に充填される導体と電極層1との電気的接続を良好にするために、打ち抜き加工やレーザ穿設加工後に超音波洗浄処理やデスミア処理等を施しても良い。   The through hole 3 may be subjected to an ultrasonic cleaning process, a desmear process, or the like after the punching process or the laser drilling process in order to improve the electrical connection between the conductor filled inside and the electrode layer 1. .

また、貫通孔3に充填される導体としては、PdやAg・Pt・Ni・Cu・Pb等の金属やそれらの合金が用いられ、特に電極層1との電気的接続を良好にするという観点からは、電極層1と同じ材質のものを含有することが好ましい。   The conductor filled in the through hole 3 is made of a metal such as Pd, Ag, Pt, Ni, Cu, or Pb, or an alloy thereof. In particular, the electrical connection with the electrode layer 1 is improved. From the above, it is preferable to contain the same material as the electrode layer 1.

このような貫通孔3に充填される導体は、有機溶剤に有機バインダ樹脂を溶解させた有機ビヒクル中に金属粉末を分散させて成る導電ペーストを貫通孔3にスクリーン印刷法等の方法で充填することにより形成される。なお、ビヒクル中には、これらの他、各種分散剤・活性剤・可塑剤などが必要に応じて添加されても良い。   The conductor filled in the through hole 3 is filled with a conductive paste in which metal powder is dispersed in an organic vehicle in which an organic binder resin is dissolved in an organic solvent by a method such as screen printing. Is formed. In addition to these, various dispersants, activators, plasticizers and the like may be added to the vehicle as necessary.

また、導電ペーストに用いられる有機バインダ樹脂は、金属粉末を均質に分散させるとともに貫通孔3への埋め込みに適正な粘度とレオロジーを与える役割をもっており、例えば、アクリル樹脂やフェノール樹脂・アルキッド樹脂・ロジンエステル・エチルセルロース・メチルセルロース・PVA(ポリビニルアルコール)・ポリビニルブチラート等が挙げられる。特に、金属粉末の分散性を良くするという観点からは、アクリル樹脂を用いることが好ましい。   Further, the organic binder resin used for the conductive paste has a role of uniformly dispersing the metal powder and imparting an appropriate viscosity and rheology for embedding in the through hole 3. For example, acrylic resin, phenol resin, alkyd resin, rosin Examples include ester, ethyl cellulose, methyl cellulose, PVA (polyvinyl alcohol), and polyvinyl butyrate. In particular, it is preferable to use an acrylic resin from the viewpoint of improving the dispersibility of the metal powder.

さらに、導電ペーストに用いられる有機溶剤は、有機バインダ樹脂を溶解して金属粉末粒子を分散させ、このような混合系全体をペースト状にする役割をなし、例えば、α-テ
ルピネオールやベンジルアルコール等のアルコール系や炭化水素系・エーテル系・BCA(ブチルカルビトールアセテート)等のエステル系・ナフサ等が用いられ、特に、金属粉末の分散性を良くするという観点からは、α-テルピネオール等のアルコール系溶剤を用
いることが好ましい。
Further, the organic solvent used in the conductive paste has a role of dissolving the organic binder resin to disperse the metal powder particles and making the entire mixed system into a paste, such as α-terpineol or benzyl alcohol. Alcohol-based, hydrocarbon-based, ether-based, ester-based such as BCA (butyl carbitol acetate), naphtha, etc. are used. Especially from the viewpoint of improving the dispersibility of metal powder, alcohol-based such as α-terpineol It is preferable to use a solvent.

さらにまた、導電ペーストは、埋め込み・焼成後のコンデンサ磁器への接着強度を上げるために、ガラスフリットやセラミックフリットを加えたペーストとすることができる。この場合のガラスフリットやセラミックフリットとしては特に限定されるものではなく、例えば、ホウ珪酸塩系やホウ珪酸亜鉛系のガラス、あるいは、チタニア・チタン酸バリウムなどのチタン系酸化物などを適宜用いることができる。   Furthermore, the conductive paste can be a paste to which glass frit or ceramic frit is added in order to increase the adhesive strength to the capacitor ceramic after embedding and firing. The glass frit or ceramic frit in this case is not particularly limited. For example, a borosilicate or zinc borosilicate glass or a titanium oxide such as titania / barium titanate is appropriately used. Can do.

このようなコンデンサ素子5は、次の方法により製作される。   Such a capacitor element 5 is manufactured by the following method.

まず、周知のシート成形法により作成されたセラミック誘電体層2と成る、例えばBaTiO3誘電体セラミックグリーンシート表面に、周知のペースト作成法により作成した
Ni金属ペーストをスクリーン印刷法により所定形状と成るように印刷して未焼成電極層を形成し、続いてこれらを所定順序に積層し、圧着して積層体を得る。そして、この積層体にレーザにより所定の位置に複数の貫通孔3を形成後、超音波洗浄により貫通孔3を水洗し、この貫通孔3に例えばNi金属粉末とアクリル樹脂とα-テルピネオールとから成
る導電ペーストをスクリーン印刷法により充填する。しかる後、これらを800〜1600℃の温度で焼成することにより製作される。
First, a Ni metal paste prepared by a known paste forming method is formed into a predetermined shape by a screen printing method on the surface of, for example, a BaTiO 3 dielectric ceramic green sheet to be a ceramic dielectric layer 2 prepared by a known sheet forming method. To form an unsintered electrode layer, which are subsequently laminated in a predetermined order, and are pressed to obtain a laminate. Then, after forming a plurality of through holes 3 at predetermined positions by laser in this laminated body, the through holes 3 are washed with water by ultrasonic cleaning. The through holes 3 are made of, for example, Ni metal powder, acrylic resin, and α-terpineol. The conductive paste is filled by screen printing. Thereafter, these are manufactured by firing at a temperature of 800 to 1600 ° C.

なお、貫通孔3に充填された導体は、焼成後有機バインダ樹脂や溶剤が除去され、引き出し電極部4と成る。   The conductor filled in the through hole 3 is removed from the organic binder resin and the solvent after firing to form the lead electrode portion 4.

また、本発明では、この引き出し電極部4はコンデンサ素子5の主面の外側に突出していることを特徴とするものであり、本発明においてはこのことが重要である。   In the present invention, the lead electrode portion 4 is characterized by protruding outside the main surface of the capacitor element 5, and this is important in the present invention.

本発明のコンデンサ素子5によれば、コンデンサ素子5主面に引き出し電極部4を突出させたことから、コンデンサ素子5を多層配線基板に内蔵してコンデンサ素子内蔵多層配線基板11を製作した場合、コンデンサ素子内蔵多層配線基板11作製時の加圧工程において絶縁層6に形成された貫通導体8に均一に圧力がかることにより、貫通導体8の導体充填密度を上げることが可能となり、電気抵抗を減少させることができ、その結果、貫通導体8のインダクタンス成分を小さくすることができ、ノイズの発生が少なく、通信機器等の電子機器類に誤動作を発生させてしまうことがない。   According to the capacitor element 5 of the present invention, since the lead electrode portion 4 protrudes from the main surface of the capacitor element 5, when the capacitor element 5 is built in the multilayer wiring board and the capacitor element built-in multilayer wiring board 11 is manufactured, By uniformly applying pressure to the through conductor 8 formed in the insulating layer 6 in the pressurizing step when the capacitor element built-in multilayer wiring substrate 11 is produced, it is possible to increase the conductor filling density of the through conductor 8 and reduce the electric resistance. As a result, the inductance component of the through conductor 8 can be reduced, noise is less generated, and no malfunction occurs in electronic devices such as communication devices.

このような引き出し電極部4は、コンデンサ素子5の主面の外側に突出した部分の高さTが、絶縁層6の厚さをtとした時に0.1t〜0.5tの範囲とすることが好ましい。突出した引き出し電極部4の高さTが0.1t未満であると、貫通導体8に十分な圧力がかからないため導体充填密度を上げる効果が小さくなり、貫通導体8のインダクタンスが大きくなる傾向にある。また、0.5tを超えると、絶縁層6を積層して加圧する際に、貫通導体8に圧力がかかりすぎて、コンデンサ内蔵多層基板11に反りが発生する傾向がある。従って、コンデンサ素子5の主面の外側に突出させた引き出し電極部4の突出部の高さTは、絶縁層6の厚さをtとした時に0.1t〜0.5tの範囲が好ましい。   In such an extraction electrode portion 4, the height T of the portion protruding to the outside of the main surface of the capacitor element 5 is in the range of 0.1 t to 0.5 t when the thickness of the insulating layer 6 is t. Is preferred. When the height T of the protruding lead electrode portion 4 is less than 0.1 t, sufficient effect is not exerted on the through conductor 8, so that the effect of increasing the conductor filling density is reduced, and the inductance of the through conductor 8 tends to increase. . On the other hand, if it exceeds 0.5 t, when the insulating layer 6 is laminated and pressed, the through conductor 8 is excessively pressurized, and the capacitor built-in multilayer substrate 11 tends to be warped. Therefore, the height T of the protruding portion of the extraction electrode portion 4 protruding outside the main surface of the capacitor element 5 is preferably in the range of 0.1 t to 0.5 t, where t is the thickness of the insulating layer 6.

また、コンデンサ素子5主面の外側に突出した引き出し電極部4の絶縁層6に平行な方向の断面の直径は、絶縁層6に形成した貫通導体8の直径よりも大きいことが好ましい。貫通導体8の直径よりも大きくすることにより、絶縁層6を積層して加圧した際に貫通導体8に均一に圧力がかかるため、貫通導体8の密度が上がり電気抵抗を減少させることができる。   Further, the diameter of the cross section in the direction parallel to the insulating layer 6 of the extraction electrode portion 4 protruding outside the main surface of the capacitor element 5 is preferably larger than the diameter of the through conductor 8 formed in the insulating layer 6. By making the diameter larger than the diameter of the through conductor 8, when the insulating layer 6 is laminated and pressed, the through conductor 8 is uniformly pressurized, so that the density of the through conductor 8 is increased and the electrical resistance can be reduced. .

このようなコンデンサ素子5の主面の外側に引き出し電極部4を突出させる方法として、セラミック誘電体層2と成る焼成前のセラミックグリーンシート積層体に貫通孔3を形成し、この貫通孔3内に金属導体を充填して引き出し電極部4を形成した後、これらを焼成する前に、引き出し電極部4以外のセラミックグリーンシート積層体の表面部分をブラシ研磨による粗化処理を施すことにより、あるいは、セラミックグリーンシート積層体表面にレーザを照射してセラミックグリーンシート表面の一部を除去することにより引き出し電極部4を突出させることができる。あるいは、セラミックグリーンシート積層体に貫通孔3を形成した後、セラミックグリーンシート表面に貫通孔3の部分が開口された所望の厚みを有するマスクを置いてその上からスキージ等を用いて貫通孔3に金属導体を充填することにより、マスクの厚みに相当する引き出し電極部4を突出させ、これらを最終的に焼成することにより形成してもよい。さらに、セラミックグリーンシート積層体表面に樹脂フィルム等の保護膜を貼り付けた後、貫通孔3を形成し、この貫通孔3に保護膜上から金属導体を充填し、しかる後、保護膜を剥ぎ取り、あるいは、保護膜を付けたまま焼成することにより形成することもできる。さらにまた、焼成後のコンデンサ素子5の表面のセラミック誘電体層2部分をエッチングなどの化学的手法により取り除き、引き出し電気極部4を突出させてもよい。   As a method for projecting the lead electrode portion 4 outside the main surface of the capacitor element 5, the through hole 3 is formed in the ceramic green sheet laminate before firing, which becomes the ceramic dielectric layer 2, and the inside of the through hole 3 After the metal electrode is filled with the lead electrode portion 4 and before firing, the surface portion of the ceramic green sheet laminate other than the lead electrode portion 4 is subjected to a roughening treatment by brush polishing, or The lead electrode portion 4 can be protruded by irradiating the surface of the ceramic green sheet laminate with a laser to remove a part of the surface of the ceramic green sheet. Alternatively, after the through-hole 3 is formed in the ceramic green sheet laminate, a mask having a desired thickness in which the portion of the through-hole 3 is opened is placed on the surface of the ceramic green sheet, and the through-hole 3 is used from above by using a squeegee or the like. It is also possible to form the lead electrode portion 4 corresponding to the thickness of the mask by filling it with a metal conductor, and finally firing them. Furthermore, after attaching a protective film such as a resin film on the surface of the ceramic green sheet laminate, a through hole 3 is formed, a metal conductor is filled into the through hole 3 from above the protective film, and then the protective film is peeled off. Alternatively, it may be formed by baking with a protective film attached. Further, the ceramic dielectric layer 2 portion on the surface of the capacitor element 5 after firing may be removed by a chemical method such as etching, and the lead-out electric electrode portion 4 may be projected.

なお、引き出し電極部4の突出部の形状は、絶縁層6に垂直な方向の断面が半円形や多角形、または先端部が尖った三角形でも良いが、引き出し電極部4の先端部と貫通導体8の接触面積を増加させて、絶縁層6とコンデンサ素子5との密着を強固なものとするという観点からは、引き出し電極部4の断面形状は半円形であることが望ましい。このような半円形とすることにより、突出した引き出し電極部4と貫通導体8との接触面積が増加し、その結果、コンデンサ素子5が貫通導体8に拘束されることにより、引き出し電極部4と貫通導体8との間で剥離して断線してしまうこともない。   The shape of the protruding portion of the extraction electrode portion 4 may be a semicircular or polygonal cross section in a direction perpendicular to the insulating layer 6, or a triangular shape with a sharp tip. From the viewpoint of increasing the contact area of 8 and strengthening the close contact between the insulating layer 6 and the capacitor element 5, the cross-sectional shape of the extraction electrode portion 4 is preferably a semicircular shape. By making such a semicircular shape, the contact area between the protruding lead electrode portion 4 and the through conductor 8 is increased. As a result, the capacitor element 5 is constrained by the through conductor 8, There is no possibility of disconnection and disconnection from the through conductor 8.

このような引き出し電極部4の突出部の形をコントロールする方法としては、セラミックグリーンシート積層体に貫通孔3を形成し、貫通孔3に金属導体を充填する際のマスクの形状を調整したり、あるいは、焼成後の引き出し電極部4の突出部表面を研磨することで調整することができる。   As a method for controlling the shape of the protruding portion of the lead electrode portion 4, the through hole 3 is formed in the ceramic green sheet laminate, and the shape of the mask when the through hole 3 is filled with the metal conductor is adjusted. Or it can adjust by grind | polishing the protrusion part surface of the extraction electrode part 4 after baking.

次に、本発明のコンデンサ素子内蔵多層配線基板11を、図2および図3に基づいて詳細に説明する。なお、図3(a)〜(g)は、図2のコンデンサ素子内蔵多層配線基板11を製作するための工程毎の断面図である。   Next, the multilayer wiring board 11 with a built-in capacitor element according to the present invention will be described in detail with reference to FIGS. 3A to 3G are cross-sectional views for each process for manufacturing the capacitor element built-in multilayer wiring substrate 11 of FIG.

まず、図3(a)に断面図で示すように、絶縁層6と成る未硬化の前駆体シート6aを準備し、この前駆体シート6aにレーザ加工により所望の個所に直径が17〜150μm程度の貫通孔12を穿設する。   First, as shown in a cross-sectional view in FIG. 3A, an uncured precursor sheet 6a to be an insulating layer 6 is prepared, and the precursor sheet 6a has a diameter of about 17 to 150 μm at a desired location by laser processing. The through hole 12 is drilled.

未硬化の前駆体シート6aは、エポキシ樹脂やビスマレイミドトリアジン樹脂・熱硬化性ポリフェニレンエーテル樹脂・液晶ポリマー樹脂等の有機樹脂材料から成り、機械的強度を向上させるためのシラン系やチタネート系等のカップリング剤、熱安定性を改善するための酸化防止剤や耐光性を改善するための紫外線吸収剤等の光安定剤、難燃性を改善するためのハロゲン系もしくはリン酸系の難燃性剤、アンチモン系化合物やホウ酸亜鉛・メタホウ酸バリウム・酸化ジルコニウム等の難燃助剤、潤滑性を改善するための高級脂肪酸や高級脂肪酸エステル・高級脂肪酸金属塩・フルオロカーボン系界面活性剤等の滑剤、熱膨張係数を調整するためおよび/または機械的強度を向上させるための酸化アルミニウム・酸化珪素・酸化チタン・酸化バリウム・酸化ストロンチウム・酸化ジルコニウム・酸化カルシウム・ゼオライト・窒化珪素・窒化アルミニウム・炭化珪素・ホウ酸アルミニウム・スズ酸バリウム・ジルコン酸バリウム・ジルコン酸ストロンチウム等の充填材、あるいは、繊維状ガラスを布状に織り込んだガラスクロス等や耐熱性有機樹脂繊維から成る不織布等の基材を含有させてもよい。   The uncured precursor sheet 6a is made of an organic resin material such as an epoxy resin, a bismaleimide triazine resin, a thermosetting polyphenylene ether resin, or a liquid crystal polymer resin, such as silane or titanate for improving mechanical strength. Coupling agents, antioxidants to improve thermal stability, light stabilizers such as UV absorbers to improve light resistance, halogen-based or phosphoric acid-based flame retardant to improve flame retardancy Agents, flame retardant aids such as antimony compounds, zinc borate, barium metaborate, zirconium oxide, and lubricants such as higher fatty acids, higher fatty acid esters, higher fatty acid metal salts, fluorocarbon surfactants to improve lubricity Aluminum oxide / silicon oxide / titanium oxide / oxidation for adjusting thermal expansion coefficient and / or improving mechanical strength Filler such as strontium oxide, zirconium oxide, zirconium oxide, calcium oxide, zeolite, silicon nitride, aluminum nitride, silicon carbide, aluminum borate, barium stannate, barium zirconate, strontium zirconate, or fibrous glass A base material such as a glass cloth woven in or a nonwoven fabric made of a heat-resistant organic resin fiber may be contained.

このような前駆体シート6aは、例えば、絶縁材料として熱硬化性樹脂と無機絶縁粉末との複合材料を用いる場合、以下の方法によって製作される。まず、前述した無機絶縁粉末に熱硬化性樹脂を無機絶縁粉末量が17〜80体積%となるように溶媒とともに加えた混合物を得、この混合物を混練機(ニーダ)や3本ロール等の手段によって混合してペーストを製作する。そして、このペーストを圧延法や押し出し法・射出法・ドクターブレード法などのシート成形法を採用してシート状に成形した後、熱硬化性樹脂が完全硬化しない温度に加熱して乾燥することにより絶縁層6となる前駆体シート6aが製作される。なお、ペーストは、好適には、熱硬化性樹脂と無機絶縁粉末との複合材料に、トルエン・酢
酸ブチル・メチルエチルケトン・メタノール・メチルセロソルブアセテート・イソプロピルアルコール・メチルイソブチルケトン・ジメチルホルムアミド等の溶媒を添加してなる所定の粘度を有する流動体であり、その粘度は、シート成形法にもよるが100〜3000ポイズが好ましい。
Such a precursor sheet 6a is manufactured by the following method, for example, when using a composite material of a thermosetting resin and an inorganic insulating powder as an insulating material. First, a mixture in which a thermosetting resin is added to the inorganic insulating powder described above together with a solvent so that the amount of the inorganic insulating powder is 17 to 80% by volume is obtained, and this mixture is used as a kneader (kneader) or a means such as three rolls. To make a paste. Then, this paste is formed into a sheet by using a sheet forming method such as a rolling method, an extrusion method, an injection method, or a doctor blade method, and then dried by heating to a temperature at which the thermosetting resin is not completely cured. A precursor sheet 6a to be the insulating layer 6 is manufactured. The paste is preferably added with a solvent such as toluene, butyl acetate, methyl ethyl ketone, methanol, methyl cellosolve acetate, isopropyl alcohol, methyl isobutyl ketone, dimethylformamide, etc. to a composite material of thermosetting resin and inorganic insulating powder. The fluid having a predetermined viscosity is preferably 100 to 3000 poise, although it depends on the sheet molding method.

次に、図3(b)に断面図で示すように、貫通孔12内に銅・銀・金・半田等から成る導電性ペーストを従来周知のスクリーン印刷法等を採用して充填し、貫通導体8を形成する。   Next, as shown in a cross-sectional view in FIG. 3B, the through-hole 12 is filled with a conductive paste made of copper, silver, gold, solder, or the like by using a well-known screen printing method or the like. A conductor 8 is formed.

次に、図3(c)に断面図で示すように、前駆体シートの表面と裏面とに被着する配線導体7を準備する。そして、図3(d)に断面図で示すように、配線導体7を前駆体シートの表面および裏面に、必要な配線導体7と貫通導体8とが電気的に接続するように重ね合わせて転写する。   Next, as shown in a cross-sectional view in FIG. 3C, a wiring conductor 7 to be attached to the front and back surfaces of the precursor sheet is prepared. Then, as shown in a sectional view in FIG. 3D, the wiring conductor 7 is superimposed and transferred onto the front and back surfaces of the precursor sheet so that the necessary wiring conductor 7 and the through conductor 8 are electrically connected. To do.

なお、本実施例では、配線導体7の形成を転写法によって行っており、このような配線導体7は、次に述べる方法により形成される。まず、離型シート等の支持体13の表面に銅・金・銀・アルミニウム等から選ばれる1種または2種以上の合金からなる厚さ1〜35μmの金属箔を接着し、その表面に所望の配線パターンの鏡像パターンとなるようにレジスト層を形成した後、エッチング・レジスト除去によって所定の配線パターンの鏡像の配線導体7を形成する。次に、配線導体7の前駆体シート6aの表面および裏面への被着は、配線導体7が形成された支持体13を前駆体シート6aの表面および裏面へ重ね合わせ、しかる後、圧力が0.5〜10MPa、温度が60〜150℃の条件で加圧加熱した後、支持体13を剥がすことにより、図3(e)に断面図に示すように配線導体7が前駆体シートに被着される。なお、この時、貫通導体8は、完全に硬化していない未硬化状態としておくことが重要である。   In this embodiment, the wiring conductor 7 is formed by a transfer method. Such a wiring conductor 7 is formed by the method described below. First, a metal foil having a thickness of 1 to 35 μm made of one or two or more alloys selected from copper, gold, silver, aluminum and the like is bonded to the surface of the support 13 such as a release sheet, and the desired surface is adhered to the surface. After forming a resist layer so as to be a mirror image pattern of the wiring pattern, a wiring conductor 7 having a mirror image of a predetermined wiring pattern is formed by etching and resist removal. Next, the deposition of the wiring conductor 7 on the front surface and the back surface of the precursor sheet 6a is performed by superimposing the support 13 on which the wiring conductor 7 is formed on the front surface and the back surface of the precursor sheet 6a. After pressurizing and heating under conditions of 5 to 10 MPa and a temperature of 60 to 150 ° C., the support 13 is peeled off so that the wiring conductor 7 is attached to the precursor sheet as shown in the sectional view of FIG. Is done. At this time, it is important that the through conductor 8 is in an uncured state that is not completely cured.

また、支持体13としては、ポリエチレンテレフタレートやポリエチレンナフタレート・ポリイミド・ポリフェニレンサルファイド・塩化ビニル・ポリプロピレン等公知のものが使用できる。支持体13の厚みは10〜100μmが適当であり、望ましくは25〜50μmが良い。支持体13の厚みが10μm未満であると支持体13の変形や折れ曲がりにより形成した配線導体7が断線し易くなり、厚みが100μmを超えると支持体13の柔軟性がなくなって、前駆体シートからの支持体13の剥離が困難となる傾向がある。また、支持体13表面に電解金属箔を形成するために、アクリル系やゴム系・シリコン系・エポキシ系等公知の接着剤を使用してもよい。   As the support 13, known materials such as polyethylene terephthalate, polyethylene naphthalate, polyimide, polyphenylene sulfide, vinyl chloride, and polypropylene can be used. The thickness of the support 13 is suitably 10 to 100 μm, preferably 25 to 50 μm. If the thickness of the support 13 is less than 10 μm, the wiring conductor 7 formed by deformation or bending of the support 13 is likely to break, and if the thickness exceeds 100 μm, the flexibility of the support 13 is lost. There is a tendency that peeling of the support 13 becomes difficult. In order to form the electrolytic metal foil on the surface of the support 13, a known adhesive such as acrylic, rubber, silicon, or epoxy may be used.

そして、図3(f)に断面図で示すように、上記(a)〜(f)の工程を経て製作した複数の前駆体シート6aと、コンデンサ素子5とを準備し、次に、引き出し電極部4の先端部と貫通導体8との位置合わせを行い載置するとともに前駆体シートを積層し、温度が150〜300℃、圧力が0.5〜10MPaの条件で30分〜24時間ホットプレスして前駆体シートおよび導電性ペーストを完全硬化させることによって、図3(g)に断面図で示す本発明のコンデンサ素子内蔵多層配線基板11が完成する。   3 (f), a plurality of precursor sheets 6a manufactured through the steps (a) to (f) and the capacitor element 5 are prepared. The tip of the portion 4 and the through conductor 8 are aligned and placed, and a precursor sheet is laminated, and hot pressing is performed for 30 minutes to 24 hours under conditions of a temperature of 150 to 300 ° C. and a pressure of 0.5 to 10 MPa. Then, the precursor sheet and the conductive paste are completely cured to complete the capacitor element built-in multilayer wiring board 11 of the present invention shown in a sectional view in FIG.

なお、コンデンサ素子5を収容する空洞部10は、前駆体シート6aを積層する前に、前駆体シート6aのコンデンサ素子5が収容される個所にレーザ法やパンチング法により穿設しておけばよい。   Note that the cavity 10 that accommodates the capacitor element 5 may be formed by a laser method or a punching method at a location where the capacitor element 5 of the precursor sheet 6a is accommodated before the precursor sheet 6a is laminated. .

かくして本発明のコンデンサ素子内蔵多層配線基板11によれば、絶縁層6の少なくとも一層に設けられた空洞部10の内部に上記のコンデンサ素子5を内蔵したことから、従来の端面に電極が印刷されたコンデンサ素子を内蔵した多層配線基板よりも低インダクタンス化を実現することが可能となり、ノイズの発生が少なく、通信機器等の電子機器類に
誤動作を発生させてしまうことのないコンデンサ素子内蔵多層配線基板11とすることができる。
Thus, according to the multilayer wiring board 11 with a built-in capacitor element of the present invention, since the capacitor element 5 is built in the cavity 10 provided in at least one layer of the insulating layer 6, electrodes are printed on the conventional end face. Capacitor element built-in multilayer wiring that can achieve lower inductance than multilayer circuit boards with built-in capacitor elements, generates less noise, and does not cause malfunction in electronic devices such as communication devices The substrate 11 can be obtained.

また、本発明のコンデンサ素子内蔵多層配線基板11によれば、上下の最外層に位置する配線導体7の一部を外部電気回路と接続される接続パッド9とし、コンデンサ素子5の上下両主面において引き出し電極部4を貫通導体8を介して接続パッド9に電気的に接続させたことから、最短距離でコンデンサ素子5と外部電気回路を電気的に接続することが可能となるため、配線の長さに起因するインダクタンスを低減でき、ノイズ低減の効果が大きいコンデンサ素子内蔵多層配線基板11とすることができる。   Further, according to the multilayer wiring board 11 with a built-in capacitor element of the present invention, a part of the wiring conductor 7 located in the upper and lower outermost layers is used as the connection pad 9 connected to the external electric circuit, and the upper and lower main surfaces of the capacitor element 5 Since the lead electrode portion 4 is electrically connected to the connection pad 9 through the through conductor 8, the capacitor element 5 and the external electric circuit can be electrically connected at the shortest distance. The inductance due to the length can be reduced, and the multilayer wiring board 11 with a built-in capacitor element can be obtained that has a large noise reduction effect.

なお、本発明のコンデンサ素子内蔵多層配線基板11は上述の実施例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更は可能であり、例えば、上述の実施例では4層の絶縁層6を積層することによってコンデンサ素子内蔵多層配線基板11を製作したが、2層や3層あるいは5層以上の絶縁層6を積層してコンデンサ内蔵多層配線基板11を製作してもよい。また、上述の実施例ではコンデンサ素子5を含む絶縁層6を1層としたが、2層(連続層を含む)以上としてもよい。さらに、コンデンサ素子5に形成した引き出し電極部4の数は一つの電極につき2個以上形成してもよい。   The multilayer wiring board 11 with a built-in capacitor element according to the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention. For example, the above-described embodiment Then, the multilayer wiring board 11 with a built-in capacitor element is manufactured by laminating four insulating layers 6. However, the multilayer wiring board 11 with a built-in capacitor is fabricated by laminating two, three, or five or more insulating layers 6. May be. In the above-described embodiment, the insulating layer 6 including the capacitor element 5 is one layer, but may be two layers (including a continuous layer) or more. Furthermore, two or more lead electrode portions 4 formed on the capacitor element 5 may be formed per electrode.

1・・・・・・・・・電極層
2・・・・・・・・・セラミック誘電体層
3・・・・・・・・・貫通孔
4・・・・・・・・・引き出し電極部
5・・・・・・・・・コンデンサ素子
6・・・・・・・・・絶縁層
7・・・・・・・・・配線導体
8・・・・・・・・・貫通導体
9・・・・・・・・・接続パッド
10・・・・・・・・空洞部
11・・・・・・・・コンデンサ素子内蔵多層配線基板
DESCRIPTION OF SYMBOLS 1 ...... Electrode layer 2 ... Ceramic dielectric layer 3 ... Through-hole 4 ... Extraction electrode Part 5... Capacitor element 6... Insulating layer 7... Wiring conductor 8. ······································································································

Claims (1)

樹脂から成る複数の絶縁層該絶縁層を貫通する第1貫通孔、および該第1貫通孔に充填された貫通導体有する多層配線基板と、
多数の電極層およびセラミック誘電体層を交互に積層して成るとともに、前記電極層および前記セラミック誘電体層を貫通する第2貫通孔を有する積層体、および前記第2貫通孔に充填された引き出し電極部有するコンデンサ素子と、を備えたコンデンサ素子内蔵多層配線基板の製造方法において、
樹脂から成る複数の第1前駆体シートに前記第1貫通孔を形成し、前記第1前駆体シートの前記第1貫通孔に導電性ペーストを充填する工程と、
樹脂から成る第2前駆体シートに空洞部を穿設する工程と、
前記引き出し電極部に、前記積層体の主面から突出するとともに前記第1貫通孔の径よりも径が大きい突出部を有する前記コンデンサ素子を前記空洞部に収容する工程と、
前記第2前駆体シートおよび前記空洞部に収容した前記コンデンサ素子の上下に、前記引き出し電極部の前記突出部と前記第1前駆体シートの前記第1貫通孔に充填された前記導電性ペーストとを重ね合わせて前記第1前駆体シートを配置する工程と、
前記第1前駆体シートと前記第2前駆体シートとを上下方向から加熱加圧し、前記第1前駆体シート、前記導電性ペーストおよび前記第2前駆体シートを硬化させて前記絶縁層および前記貫通導体を形成するとともに、前記引き出し電極部の前記突出部を前記貫通導体と電気的に接続させる工程含むことを特徴とするコンデンサ素子内蔵多層配線基板の製造方法。
And the multilayer wiring board having a plurality of insulating layers, a first through hole passing through the insulating layer, and a through conductor filled in the first through-hole made of a resin,
A multi-layered structure having a plurality of electrode layers and ceramic dielectric layers alternately stacked and having a second through-hole penetrating the electrode layer and the ceramic dielectric layer , and a lead filled in the second through-hole In a method of manufacturing a capacitor element built-in multilayer wiring board comprising a capacitor element having an electrode portion,
Forming the first through hole in a plurality of first precursor sheets made of resin, and filling the first through hole of the first precursor sheet with a conductive paste;
Forming a cavity in a second precursor sheet made of resin;
A step of accommodating the capacitor element in the cavity portion having a protruding portion protruding from the main surface of the multilayer body and having a diameter larger than the diameter of the first through hole in the extraction electrode portion;
The conductive paste filled in the first through hole of the first precursor sheet and the protruding portion of the lead electrode part above and below the capacitor element accommodated in the second precursor sheet and the cavity part, And arranging the first precursor sheet by superimposing,
The first precursor sheet and the second precursor sheet are heated and pressed from above and below to cure the first precursor sheet, the conductive paste, and the second precursor sheet, and the insulating layer and the penetration to form a conductive, capacitor element built multilayer wiring board manufacturing method of which comprises a step of connecting the protruding portion of the lead electrode portions in the through conductor electrically.
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