JP5034008B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine, and more particularly to a gaming machine provided with display means for displaying a result of jackpot determination.

  2. Description of the Related Art Conventionally, there is known a gaming machine that displays whether or not a gaming machine state shifts to a jackpot gaming state in which a player can acquire a large number of gaming media using a display screen such as a liquid crystal display. This gaming machine is configured to notify the player of the determination result of “big hit” and “out of place” by changing the design of the display screen and then making it stand still and confirming the display. In such a gaming machine, a command for instructing the display control content of the display screen is transmitted from the main control board that controls the progress of the game to the sub control board. Then, based on the received command, the sub control board transmits a command for controlling the display screen to the effect control board. The effect control board stores image data including still images and moving images, and the effect control board that receives the command has various notifications such as notification of the result of determining whether or not it is a big hit, and effects for enhancing game play. The contents are displayed on the display screen based on the received command.

  The display of images using such a display screen occupies a very important position in the game. Therefore, efforts will be made on how to make the displayed content interesting and varied, and how beautiful it will be displayed, and in order to realize powerful display, the display screen will be enlarged. It has been planned. For this reason, the data capacity of the production control board has greatly increased compared to the conventional case. On the other hand, in addition to restrictions on the capacity of the main control board, by reducing the control burden on the main control board, it is certified based on laws related to customs business operations and business optimization (wind management law) The period required for is shortened. In view of this, a gaming machine has been proposed in which the number of commands transmitted from the main control board is reduced and control for diversifying display contents is performed on the sub control board and the effect control board (for example, see Patent Document 1).

In addition, a gaming machine has been proposed that uses a normal symbol display device to notify a communication error when a command communication failure occurs between the main control board and the sub control board (see, for example, Patent Document 2). ). In this gaming machine, since the communication failure of the command is notified by the normal symbol display device composed of 7 segments, the gaming property is not impaired as compared with the case where the notification is made by the display screen composed of the LCD or the like.
Japanese Patent Laid-Open No. 2001-286631 JP 2003-79917 A

  However, such a conventional gaming machine cannot solve the problem related to command communication failure when the power is restored. In other words, when the power supply is turned off and then returns, it takes time to perform various initial processes (hereinafter referred to as “start-up time”) until the CPU of each board is brought into an operable state. An effect control board having a larger capacity than the main control board requires a longer startup time than the main control board. Therefore, a command for instructing the display control content of the display screen may be transmitted to the effect control board during the start time of the effect control board, and in this case, a disordered image is displayed on the display screen. There was a problem. In addition, in a gaming machine that notifies a command communication error, there is a problem that an unpleasant feeling is given to the player because a disordered image is displayed and an error is also notified at the same time.

  The present invention has been made to solve the above problems, and even when the effect control board receives a signal instructing the display control content of the display screen during the startup time, the image displayed on the display screen is disturbed. An object is to provide a gaming machine that never happens.

  In order to achieve the above object, a gaming machine according to claim 1 of the present invention is a symbol display means for displaying a game state, a main control board that controls main control of the gaming machine, and a transmission from the main control board. A sub-control board for receiving a signal to be transmitted and transmitting a signal for controlling the display mode of the symbol display means, and an effect control board for controlling the display mode of the symbol display means by a signal transmitted from the sub-control board The production control board has a predetermined specific signal for controlling the display mode of the symbol display means transmitted from the sub-control board before the start-up is completed. Is received as a waiting signal.

  According to a second aspect of the present invention, in addition to the configuration of the first aspect, the effect control board receives a signal transmitted from the sub-control board as the standby signal. In this case, the symbol display means displays a specific standby screen indicating that it is on standby.

  In addition, the gaming machine according to claim 3 of the present invention is characterized in that, in addition to the configuration of the invention according to claim 2, the standby screen is a screen that is stopped or pseudo-determined.

  According to a fourth aspect of the present invention, in addition to the configuration of the first aspect of the present invention, the presentation control board measures the time from the start of power supply. It is characterized in that it is determined whether or not the start-up of the production control board is completed depending on whether or not the passage of a predetermined time is measured by the time measuring means.

  According to the gaming machine of the first aspect of the present invention, when the production control board receives a signal for controlling the display mode of the symbol display means from the sub-control board before the rise is completed, the rise is completed. Unlike the case where a similar signal is transmitted later, it is received as a waiting signal which is a predetermined specific signal. Therefore, the effect control board before the start-up is completed does not receive various signals for controlling the display mode of the symbol display means as they are, so that the image displayed on the symbol display means is not disturbed. In addition, in a gaming machine equipped with an effect control board that does not receive a signal until the start-up is completed, the control performed during the start time of the effect control board is the same regardless of whether the game is in progress, It is impossible to notify the player whether or not the game is in progress. However, according to the gaming machine of the first aspect, it is possible to notify the player whether or not the game is in progress by performing a specific control when the effect control board receives a signal as a standby signal. Can do.

  Further, in the gaming machine according to claim 2 of the present invention, in addition to the effect of the invention according to claim 1, the effect control board that has received the waiting signal from the sub-control board indicates that it is waiting. Can be displayed on the symbol display means. Therefore, not only does not display a distorted image, it also displays that it is waiting until the production control board stands up, and informs the player to wait without starting the game until the predetermined time is over Can do.

  In addition, in the gaming machine according to claim 3 of the present invention, in addition to the effect of the invention according to claim 2, the standby screen is a screen on which stop display or pseudo-determined display is performed. Here, the pseudo-deterministic display is a mode of display in which the design is changed slightly so that the player has an illusion that the design that has not stopped is stopped, and the effect control board outputs a plurality of signals. Even when the signal is received as a waiting signal, it appears that the same still image is continuously displayed on the symbol display means. Therefore, a disturbed image is not displayed on the symbol display means. In addition, since the amount of data of still screen data is smaller than that of moving image data, the control burden on the gaming machine at the start of power supply can be reduced.

  In addition to the effect of the invention according to any one of claims 1 to 3, the effect control board measures the time from the start of power supply. It is possible to determine whether or not the start-up of the production control board has been completed based on whether or not the elapsed time is measured by the time measuring means. Accordingly, by setting the predetermined time measured by the time measuring means to a time that continues until the end of the start time of the production control board, even if the operation is unstable when the production control board starts up, the production control board Receives various signals transmitted from the sub-control board as specific standby signals. Therefore, the image displayed on the symbol display means is not disturbed.

  Hereinafter, a pachinko machine 1 which is an embodiment of a gaming machine according to the present invention will be described with reference to the drawings. First, the mechanical configuration of the pachinko machine 1 will be described with reference to FIGS. 1 to 3. FIG. 1 is a front view of the pachinko machine 1, FIG. 2 is a front view of the game board 2, and FIG. 3 is an enlarged view of the symbol display device 8.

  As shown in FIG. 1, in the upper half of the front surface of the pachinko machine 1, a game board 2 is provided in which a game ball as a game medium launched from a launcher (not shown) flows by operating the launch handle 7. ing. The game board 2 is substantially square (see FIG. 2) and is protected by a glass frame 13 holding a transparent glass plate. In the lower part of the game board 2, an upper plate 5 is provided for supplying game balls to the launcher and receiving prize balls. A lower plate 6 for receiving a prize ball is provided immediately below the upper plate 5, and a launch handle 7 for adjusting the launch of the game ball is provided on the right side of the lower plate 6. Further, speakers 48 are respectively provided at the left and right corners above the glass frame 13. In addition, a large number of lighting lamps for production are provided on the front surface of the glass frame 13.

  As shown in FIG. 2, a substantially circular game area 4 surrounded by a guide rail 3 is provided on the front surface of the game board 2. In the approximate center of the game area 4, there is provided a symbol display device 8 having a display screen 28 composed of an LCD, various lamps, LEDs and the like. A normal symbol start gate 12 is provided on the left side of the symbol display device 8. Further, a special symbol starting electric accessory 15 is provided below the symbol display device 8, and a big prize opening 16 is provided below the special symbol starting electric accessory 15. Then, the normal winning ports 17 and 19 are provided on the left side of the big winning port 16, and the normal winning ports 18 and 20 are provided on the right side.

  A warp inlet 22 is provided on the left shoulder of the symbol display device 8. Further, a warp outlet 21 is provided in the lower part of the symbol display device 8 so that the game ball that has passed through the warp inlet 22 appears to the warp outlet 21 through the inside of the symbol display device 8 (warp zone). Yes. The game ball that has appeared at the warp outlet 21 falls toward the special symbol starter electric accessory 15 provided immediately below the warp outlet 21, so that it is easy to win the special symbol starter electric accessory 15. In addition to the above, the game board 2 is provided with various illumination lamps, other illumination LEDs, windmills, and many obstacle nails.

  Next, the symbol display device 8 will be described with reference to FIG. As shown in FIG. 3, the symbol display device 8 includes a display screen 28 formed of an LCD at the center. Various images such as moving images and messages are displayed on the display screen 28. In order to particularly notify the result of the jackpot determination, the demo symbol display unit d1, in the order of horizontal, left, right, and center on the display screen 28. Three display areas, a demo symbol display part d2 and a demo symbol display part d3, are provided. And the demonstration symbol display parts d1-d3 occupy the area wider than the below-mentioned special symbol display part 25 so that a player's eyes may be attracted.

  In addition, the symbol display device 8 is provided with a special symbol display unit 25 composed of 11 segment LEDs and a normal symbol display unit 24 composed of one LED at the lower right of the display screen 28. The special symbol display unit 25 is composed of two 11-segment LEDs and displays a special symbol of a two-letter alphabet. Here, in the present embodiment, since a combination of alphabets is used as a special symbol, the special symbol display unit 25 includes 11 segments that can display all alphabets, but is not limited thereto. For example, when using alphabets and numbers that can be displayed in 7 segments, or a combination thereof as a special symbol, 7 segments can be used. Further, the special symbol display unit 25 may be provided in a part of the display screen 28. On the other hand, the normal symbol display unit 24 is composed of one LED, the lighting state indicates normal winning, the unlit indicates normal winning, and the blinking state indicates that the normal winning determination result will be notified from now on. The fluctuation state shown is shown.

  In addition, a special symbol memory number display LED 60 composed of two LEDs is provided at the lower right of the special symbol display unit 25, and the special symbol display electric component 15 (see FIG. 2) wins the special symbol display unit 25. The number of game balls for which the result of the jackpot determination is not yet displayed, that is, the number of so-called special symbol actuated balls is shown. The two lower LEDs are the normal symbol memory number display LED 59, and the normal symbol start gate 12 (see FIG. 2) wins, and the normal symbol display unit 24 does not yet display the result of the normal hit determination. The number of spheres, the so-called number of normal symbol actuated spheres is shown. Both the special symbol memory number display LED 60 and the normal symbol memory number display LED 59 are turned on only for the lower LED, the number of reserved balls is “1”, both LEDs are turned on for the number of reserved balls “2”, and only the lower LED is blinking. The number of balls is “3”, and both LED flashes indicate the number of balls held is “4”.

  Here, the game and effects of the pachinko machine 1 of the present embodiment will be described. In the pachinko machine 1, when a game ball wins the special symbol start electric accessory 15, it is determined whether or not to win. If it is determined that the game is a big win, a “hit game” is performed in which the special winning opening 16 is opened a predetermined number of times. The result of the jackpot determination is displayed on the special symbol display unit 25 and the demo symbol display units d1 to d3. In the special symbol display unit 25, first, after the symbols displayed in the respective 11 segments are changed, new symbols are sequentially displayed in the respective 11 segments. While the symbols displayed on the special symbol display unit 25 are fluctuating, the demo symbol display units d1 to d3 are variably displayed on the display screen 28, and the demo symbol display unit d1 is stopped and displayed. The demo symbol display part d2 is stopped and displayed, and then the demo symbol display part d3 is stopped and displayed, and the demo symbol is confirmed and displayed. The final stop display of the demo symbol display units d1 to d3 is always controlled to be performed after the stop display of the special symbol display unit 25, and the special symbol is displayed rather than the notification by the demo symbol display units d1 to d3. Control is performed so that notification on the display unit 25 is always performed first.

  Next, the result of the jackpot determination displayed on the special symbol display unit 25 will be described. In the present embodiment, 676 kinds of combinations of special symbols displayed on the special symbol display unit 25 are provided. As shown in FIG. 3, the special symbol display unit 25 can display a two-digit symbol, and 26 kinds of alphabet combinations from A to Z are displayed. And in this embodiment, 100 kinds of combinations of 10 alphabets of A, C, E, F, H, J, L, P, U, and Y are regarded as “special symbols”, and other combinations 576 types are designated as “offset special symbols”. The “hit special symbol” is provided with a “probability variation symbol” and a “non-probability variation symbol” for each combination. In the present embodiment, out of 100 types, “C, J”, “E, L”, “E, Y”, “F, E”, “H, U”, “J, C”, “J, L "," L, H "," P, C "," P, J "," U, P "," Y, H "," Y, A "," A, E "," A, F " , “A, A” are 16 types of “probability variation symbols”. The other combinations of “winning special symbols” are “non-stochastic variation symbols”.

  Next, the electrical configuration of the pachinko machine 1 according to the present embodiment will be described with reference to FIG. FIG. 4 is a block diagram showing an electrical configuration of the pachinko machine 1. As shown in FIG. 4, the control unit 40 includes a main board 41, a power supply board 42, a symbol display board 43, an effect control board 44, a payout control board 45, an electrical decoration board 46, a relay board 47, and a sub-integrated board 58. Has been. This control part 40 is provided in the back side (back side) of the pachinko machine 1 (refer FIG. 1).

  The main board 41 that performs main control of the pachinko machine 1 is provided with a main board CPU unit 50 that performs various processes according to a program. The main board CPU unit 50 includes a main board CPU 51 that performs various arithmetic processes, a main board RAM 52 that temporarily stores data values generated during arithmetic processes such as flags and counters, a control program, A main board ROM 53 that stores initial values of data, commands for instructing other boards, and the like are provided, and these are integrally molded as one LSI. Further, an interrupt signal generating circuit 57 is connected to the main board CPU unit 50, and this interrupt signal generating circuit 57 is connected to the main board CPU 51 every 0.002 seconds (hereinafter abbreviated as “2 ms”), for example. An interrupt signal is given. The main board CPU 51 executes a control program stored in the main board ROM 53 every time this interrupt signal is input, and controls the pachinko machine 1 according to the control program.

  Further, the main board 41 is provided with an I / O interface 54, and sub-boards such as a sub-integrated board 58, a symbol display board 43, a payout control board 45, an electric decoration board 46, a relay board 47, and a special symbol start. It is connected to a start port switch 72 that detects a game ball won in the electric accessory 15. Furthermore, the effect control board 44 and the electrical decoration board 46 are connected to the sub-integrated board 58. Further, the sub integrated board 58 is provided with a sub CPU 581, a sub RAM 582, and a sub ROM 583, and a speaker 48 is connected thereto. The effect control board 44 is provided with an effect CPU unit 440 (see FIG. 5) provided with a CPU, a RAM, and a ROM. Similarly, a CPU, RAM, and ROM are provided to control transmission / reception of signals and store data. An I / O controller 80 (see FIG. 5) for performing the above is provided. The symbol display board 43 incorporates a CPU 43a, an input interface (not shown), RAM and ROM. Further, the payout control board 45 incorporates a CPU 45a, an unillustrated input interface, RAM and ROM, and the illumination board 46 incorporates a CPU 46a, an unillustrated input interface, RAM and ROM. Further, the I / O interface 54 of the main board 41 is connected to an output port 55 for outputting information of the pachinko machine 1 to a game hall management computer (not shown).

  An electrical lamp 63 is connected to the electrical board 46, and a display screen 28 is connected to the effect control board 44. A special symbol display unit 25 is connected to the symbol display board 43, and a prize ball payout device 49 is connected to the payout control board 45. Further, the relay board 47 has a large winning opening opening solenoid 70 for opening / closing the opening / closing member of the special winning opening 16, an electric accessory opening solenoid 71 for opening / closing the opening / closing member of the special symbol starting electric combination 15, Normal symbol operation switch 73 for detecting a game ball won in the symbol start gate 11, a count switch 75 for counting the number of game balls won in the big prize opening 16, and a normal symbol memory number display composed of two LEDs. An LED 59, a special symbol memory number display LED 60 composed of two LEDs, and a normal symbol display unit 24 composed of one LED are connected.

  The payout control board 45 controls the prize ball payout device 49, and the relay board 47 relays switches and solenoid wires, and the normal symbol memory number display LED 59 and the special symbol memory number display LED 60 which are directly controlled from the main board 41. The relay to the normal symbol display unit 24 is performed. The sub-integrated board 58 performs comprehensive control of the effect control board 44, the illumination board 46, and the speaker 48. The effect control board 44 receives various commands from the sub-integrated board 58 and displays them on the display screen 28. Control of the displayed image and the demo symbol display parts d1 to d3 is performed. Further, the symbol display board 43 receives various commands from the main board 41 and controls the special symbols displayed on the special symbol display unit 25.

  Further, the power supply board 42 supplies a stabilized DC power to the pachinko machine 1. A power supply circuit 65, a backup battery 66, and a power supply monitoring circuit 67 are provided on the power supply board 42. The power supply circuit 65 is supplied with AC 24V, and is provided with a rectifier including a silicon diode bridge (not shown), a smoothing circuit including an electrolytic capacitor, a stabilization circuit including a regulator IC, and the like. 12V, 5V, etc. can be generated and supplied to each substrate. The backup battery 66 is composed of a capacitor. When the backup battery 66 is charged with 5V of direct current generated by the power supply circuit 65 and no power is supplied to the pachinko machine 1, the backup battery 66 (main board RAM 52 of the main board 41) is used. Etc.) to supply backup power. Thereby, the pachinko machine 1 can store various contents at the time of power-off. The power supply monitoring circuit 67 outputs a power-off signal to the main board 41 and the sub-integrated board 58 when the voltage of the power supplied to the power supply circuit 65 drops below a predetermined voltage (12 V or less in the present embodiment). To do. Then, supply of backup power (5 V) from the backup battery 66 to the backup target is started. On the other hand, when the voltage rises above a predetermined voltage, the output of the power-off signal is stopped. 4, the main board 41, the power supply board 42, the symbol display board 43, the effect control board 44, the payout control board 45, the illumination board 46, the relay board 47, and the sub integrated board 58 are all grounded. Connected by line.

  Next, the storage area of the main board ROM 53 of the main board 41 will be described. The main board ROM 53 has an initial setting storage area for storing initial values stored in the respective storage areas when the pachinko machine 1 is reset, and various control programs for the main board CPU 51 to control the pachinko machine 1. Control program storage area to be stored, control command table storage area to store a table of control commands output from the main board 41 to the sub-integrated board 58, and a special symbol combination storing a special symbol combination to be displayed on the special symbol display unit 25 A pattern storage area, a special symbol variation pattern storage area that stores a variation pattern of the special symbol display unit 25, and the like are provided. Further, the main substrate ROM 53 is provided with various storage areas not shown.

  Next, the storage area of the main board RAM 52 of the main board 41 will be described. The main board RAM 52 has a counter storage area for storing various counters, a winning ball flag storage area for storing a flag indicating whether or not a game ball has won at each gate and each winning opening, and a normal symbol starting gate 12 A normal winning relation information storage area for storing random numbers acquired when winning a game ball, a normal symbol operation holding ball number storage area for storing the number of normal symbol operation holding balls, and a winning of a game ball to the special symbol starting electric accessory 15 Jackpot related information storage area for storing random numbers acquired at times, special symbol operation reserved ball number storage area for storing special symbol operation reserved balls, main board 41 to sub-integrated board 58, symbol display board 43, payout control board 45 , A command-related storage area for storing control commands output to the illumination board 46, the relay board 47, etc., a flag-related storage area for storing various flags, etc. It is provided.

  As described above, even when the supply of power to the pachinko machine 1 is interrupted, the backup battery 66 of the power supply board 42 is supplied with power to hold the stored contents from the backup battery 66, so these memories are stored. The contents stored in the area are saved. Therefore, when the power supplied to the pachinko machine 1 is interrupted during a game due to a power failure or the like, and then the power supply is started again, the continuation of the game that was being performed at the time of power interruption is continued.

  Next, with reference to FIG. 5, the connection relationship among the main board 41, the sub integrated board 58, the effect control board 44, and the display screen 28 will be described. FIG. 5 is a block diagram showing a connection relationship among the main board 41, the sub-integrated board 58, the effect control board 44, and the display screen 28. As shown in FIG. 5, the sub integrated substrate 58 is provided with a sub CPU 581. An address / data signal 201 for transmitting each command data such as variation pattern designation command data, symbol designation command data, symbol stop command data from the main board CPU 51 of the main board 41 to the sub CPU 581 via the I / O interface 54. Alternatively, a strobe signal 200 (see FIG. 6) or the like is transmitted in one direction. The sub CPU 581 is connected to a sub RAM 582 that temporarily stores the received address / data signal 201 as data, and a sub ROM 583 that stores a control program and various data. In this embodiment, the sub CPU 581, the sub RAM 582, and the sub ROM 583 are integrally molded as a sub CPU unit 580 that is one LSI, but each has an independent configuration. Also good.

  Since the main board CPU 51 and the sub CPU 581 do not perform processing such as image data development, a CPU having a smaller number of bits than the effect CPU 441 of the effect CPU unit 440 described later is used. The main board CPU 51 and the sub CPU 581 Is smaller than the program that controls the effect CPU 441. Further, by reducing the control burden on the main board 41, the time required for the examination based on the laws on customs business and the law on the optimization of business (the customs law) is shortened. It is smaller than the control program of the CPU 581. Therefore, the time required to become operable after power supply is started (hereinafter referred to as “start-up time”) is the shortest for the main board CPU51 and the longest for the effect CPU441.

  The effect control board 44 is provided with an I / O controller 80 including a control CPU 801, a control RAM 802, and a control ROM 803. Since the I / O controller 80 does not need to develop a large amount of image data, the number of bits of the control CPU 801 is smaller than the number of bits of the effect CPU 441. The activation time of the control CPU 801 is shorter than the activation time of the sub CPU 581. The sub CPU unit 580 and the I / O controller 80 can bidirectionally transmit and receive via the bus 77. The I / O controller 80 is connected to the effect CPU unit 440 via the bus 78 and can transmit and receive bidirectionally. The effect CPU unit 440 includes an effect CPU 441, an effect RAM 442, and an effect ROM 443. Further, the effect control board 44 is provided with a graphic engine 85 and an LCD controller 86.

  Here, the rendering CPU 441 in the present embodiment has to perform processing such as development of a large amount of image data, and thus needs to process the data at a high speed and in a large amount. Therefore, as described above, the rendering CPU 441 uses a CPU having a larger number of bits than the main board CPU 51, the sub CPU 581 and the control CPU 801, and displays a color high-definition moving image on the screen of the display screen 28 composed of an LCD. Can be performed. However, in order to operate this effect CPU 441, a predetermined operating software (OS) capable of performing complicated processing is required. At the time of activation, it is necessary to read the OS stored in the effect ROM 443 and load it into the effect RAM 442. There is. Since this OS is complex and has a large amount of data, the activation time of the effect CPU 441 is longer than the activation time of the main board CPU 51, sub CPU 581, and control CPU 801. Even if the effect CPU 441 receives a command for controlling the operation of the display screen 28 during the activation time, the effect CPU 441 cannot perform the processing based on this command in the same manner as outside the activation time. The image may be disturbed.

  In order for the effect CPU 441 to execute processing, a relatively large RAM storage capacity is required, so an external memory is required. In particular, an external memory is indispensable for processing image data, and in this embodiment, a relatively large capacity effect RAM 442 is provided. The effect CPU 441, the effect RAM 442, and the effect ROM 443 are only required to be able to transmit and receive signals, and are not necessarily configured in one place. For example, the effect RAM 442 may be connected to the graphic engine 85.

  In addition, an interrupt connection line is connected between the I / O controller 80 and the graphic engine 85 without going through a bus. The I / O controller 80 monitors the rise of the effect CPU 441 and controls transmission / reception of signals among the sub CPU unit 580, the effect CPU unit 440, and the graphic engine 85. In addition, the I / O controller 80 stores image data for displaying a standby screen and an initial screen, which are still images, on the display screen 28, and the I / O controller 80 is on standby to the graphic engine 85. The screen, the standby initial screen, and the image data of the initial screen are transmitted. Since the activation time of the I / O controller 80 is shorter than the activation time of the sub CPU unit 580, the I / O controller 80 is operable when a signal is transmitted from the sub CPU 581.

  The effect CPU unit 440 is connected to the graphic engine 85 and transmits predetermined image data to the graphic engine 85 based on the command data received from the main board 41. The graphic engine 85 is connected to the LCD controller 86, and the LCD controller 86 is connected to the display screen 28. The graphic engine 85 transmits a control signal to the LCD controller 86 as a driver based on the received image data. The LCD controller 86 transmits a drive signal to the display screen 28, and the display screen 28 displays a symbol based on the drive signal.

  Next, control of the display screen 28 will be described. In the pachinko machine 1 according to the present embodiment, drawing data for controlling the graphic engine 85 is not transmitted from the main board CPU 51 of the main board 41. First, the main board CPU 51 receives each command data related to symbol display such as variation pattern designation command data, symbol variation start command data, symbol designation command data, symbol stop command data, jackpot screen start command data, jackpot screen end command data, and the like. The address / data signal 201 (see FIG. 6) is transmitted to the sub CPU 581 of the sub integrated board 58. Each of these command data is temporarily stored in the sub RAM 582 of the sub integrated board 58.

  Next, the sub CPU 581 analyzes each command data related to symbol display such as variation pattern designation command data, symbol designation command data, symbol stop command data, etc. stored in the sub RAM 582. Then, each command data related to the symbols displayed on the demo symbol display portions d1 to d3 is transmitted to the effect CPU 441 of the effect control board 44 via the I / O controller 80, and the effect CPU 441, based on the data, the effect ROM 443. Necessary image data is transmitted to the graphic engine 85. The graphic engine 85 that has received the data generates specific drawing data and transmits it as a control signal to the LCD controller 86, and the LCD controller 86 sends a drive signal based on the control signal, whereby the display screen 28 is displayed. A predetermined symbol is displayed. If a signal related to the change display of symbols other than the symbol stop command data is transmitted from the sub CPU 581 to the I / O controller 80 before the start time of the effect CPU 441 ends, the I / O of the effect control board 44 is displayed. The O controller 80 receives the transmitted signal as a standby signal which is a predetermined specific signal, and the standby screen image data stored in the control ROM 803 is directly transmitted to the graphic engine 85. In addition, when the symbol stop command data is received before the activation time ends, the image data of the standby initial screen is transmitted to the graphic engine 85, which will be described in detail later.

  Next, with reference to FIG. 6, the exchange of signals among the I / O interface 54, the sub CPU unit 580, the I / O controller 80, and the effect CPU unit 440 will be described. FIG. 6 is a diagram schematically showing the exchange of signals among the I / O interface 54, the sub CPU unit 580, the I / O controller 80, and the effect CPU unit 440.

  First, the I / O interface 54 of the main board 41 is connected to the sub CPU unit 580 of the sub-integrated board 58, and the address / data signal 201 and the one-way pass from the main board 41 side to the sub-integrated board 58 side. A strobe signal 200 is transmitted. Specifically, the address / data signal 201 is a signal for alternately transmitting an address and data. In the present embodiment, the address / data signal 201 is composed of a two-digit hexadecimal number and a character “H” representing the hexadecimal number. ~ FFH ". The type of processing is specified by the preceding command data corresponding to the address, and the specific processing contents are specified by the table data stored in the sub ROM 583 by the subsequent command data corresponding to the data. The strobe signal 200 is a synchronization signal for synchronizing the signal transmission timing. The strobe signal 200 transmits the timing for transmitting the address / data signal 201 transmitted from the main board 41 side to the sub CPU unit 580, and is transmitted by the sub CPU 581. Control the timing of signal reception. That is, the main board 41 and the sub-integrated board 58 cannot communicate bidirectionally, and only one-way communication from the main board 41 to the sub-integrated board 58 is possible. I don't get it. Therefore, the reception timing of the address / data signal 201 by the sub CPU 581 is controlled by the strobe signal 200.

  Thus, from the sub CPU unit 580 that has received the address / data signal 201 while the reception timing is controlled by the strobe signal 200, the address / data signal 301, the address / data are sent to the I / O controller 80 of the effect control board 44. A switching signal 302 (denoted as an A / D switching signal in FIG. 6) 302 and an enable signal 303 are transmitted. On the other hand, an ACK (acknowledge) signal 304 is transmitted from the I / O controller 80 to the sub CPU unit 580.

  Also, an address / data signal 401, an address / data switching signal (indicated as A / D switching signal in FIG. 6) 402, and an enable signal 403 are transmitted from the I / O controller 80 to the effect CPU unit 440. The ACK signal 404 and the activation signal 405 are transmitted from the effect CPU unit 440 to the I / O controller 80.

  Address / data signals 201, 301, and 401 are basically common signals, and are signal waveforms representing data specifying an address and data specifying a command to be executed. This signal is sent from the I / O interface 54 of the main board 41 to the effect CPU unit 440 of the effect control board 44 via the sub CPU unit 580 of the sub integrated board 58 and the I / O controller 80 of the effect control board 44. Sent to.

  Next, the contents of each command data transmitted by the address / data signals 201, 301, 401 will be described in detail. Each command data is composed of preceding command data and subsequent command data. In the preceding command data, one command is composed of one byte. Specifically, 1-byte information is divided into 4 bits, each 4 bits is represented by a hexadecimal number, and the hexadecimal number is a combination of a two-digit number or alphabet in the hexadecimal notation. “H” is added to indicate this. Therefore, 256 commands from “00H” to “FFH” can be configured. Further, the subsequent command data has the same configuration as the preceding command data. Therefore, one set of signals is composed of 2 bytes. Each command data may be composed of one byte consisting of preceding command data from “0H” to “FH” and subsequent command data from “0H” to “FH”. . In this case, there is an advantage that the time for transmitting and receiving command data can be shortened.

  Here, an example of the address / data signals 201, 301, and 401 will be described. In this embodiment, there are 25 types of variation pattern designation command data from “variation pattern 1 designation” to “variation pattern 25 designation”, and this variation pattern designation command data is stored in the main substrate ROM 53 of the main substrate 41. ing. When the variation pattern designation command data is transmitted from the main board 41 to the sub integrated board 58, the command data is temporarily stored in the sub RAM 582 of the sub integrated board 58. Specifically, when the variation pattern 1 is designated, the preceding command data “80H” and the subsequent command data “01H” are specified. When the variation pattern 15 is designated, the preceding command data “80H” and the subsequent command data “ When the variation pattern 25 is designated, the preceding command data is “80H” and the subsequent command data is “19H”. Thus, the preceding command data designates the type of data such as the variation pattern designation command data and the first stop symbol designation command data, and the subsequent command data identifies the specific contents of the processing. Therefore, if the data is in the format of “00H to FFH”, the sub CPU 581 recognizes it as the address / data signal 201, the I / O controller 80 recognizes it as the address / data signal 301, and the rendering CPU 441 recognizes it as the address / data signal 401. The

  Next, the address / data switching signals 302 and 402 will be described. As shown in FIG. 6, the address / data switching signal 302 is transmitted from the sub CPU unit 580 of the sub integrated board 58 to the I / O controller 80. The address / data switching signal 402 is transmitted from the I / O controller 80 to the effect CPU unit 440 of the effect control board 44. These address / data switching signals 302 and 402 are transmitted together with the address / data signals 301 and 401. The currently transmitted address / data signals 301 and 401 are signals indicating that the preceding command data of the preceding command data and the succeeding command data is being transmitted. As shown in FIG. 10, while the address / data switching signal 302 is HIGH, the preceding command data corresponding to the address in the address / data signal 301 is transmitted. After the preceding command data is transmitted, the address / data switching signal 302 becomes LOW, and the transmission of the preceding command data is stopped. The relationship between the address / data switching signal 402 and the address / data signal 401 is the same.

  Next, the enable signals 303 and 403 will be described. As shown in FIG. 6, the enable signal 303 is transmitted from the sub CPU unit 580 of the sub integrated board 58 to the I / O controller 80. The enable signal 403 is transmitted from the I / O controller 80 to the effect CPU unit 440 of the effect control board 44. These enable signals 303 and 403 are transmitted together with the address / data signals 301 and 401. The currently transmitted address / data signals 301 and 401 are signals indicating that the subsequent command data of the previous command data and the subsequent command data is being transmitted. As shown in FIG. 10, while the enable signal 303 is HIGH, subsequent command data corresponding to the data in the address / data signal 301 is transmitted. Then, when the transmission of the subsequent command data is completed, the enable signal 303 becomes LOW, and the transmission of the subsequent command data is stopped. The relationship between the enable signal 403 and the address / data signal 401 is the same.

  Next, ACK (acknowledge) signals 304 and 404 will be described. As shown in FIG. 6, the ACK signal 304 is generated when an address / data signal 301 composed of preceding command data and subsequent command data is transmitted from the sub CPU unit 580 of the sub-integrated board 58 to the I / O controller 80. This is a signal transmitted from the / O controller 80 to the sub CPU unit 580 and indicates reception of a command for the address / data signal 301. The ACK signal 404 is a signal transmitted from the effect CPU unit 440 to the I / O controller 80 when the address / data signal 401 is transmitted from the I / O controller 80 to the effect CPU unit 440 of the effect control board 44. This is a signal indicating receipt of a command for the address / data signal 401. The timing at which the ACK signals 304 and 404 are transmitted is when the I / O controller 80 or the effect CPU 441 completes the reading of the subsequent command data. When the I / O controller 80 or the effect CPU 441 receives the subsequent command data, the ACK signal 304 or 404 is transmitted. Set 304 and 404 to HIGH. The ACK signals 304 and 404 are configured to remain high for a predetermined time and continue to be transmitted to the sub CPU 581 or the I / O controller 80.

  Next, the activation signal 405 will be described. As shown in FIG. 6, the activation signal 405 is a signal transmitted from the effect CPU unit 440 of the effect control board 44 to the I / O controller 80. The effect CPU 441 performs various initial processes when the supply of power is started, and transmits an activation signal 405 to the I / O controller 80 when the operation CPU 441 is activated. The I / O controller 80 determines whether or not the start-up time of the effect CPU 441 has ended depending on whether or not the start signal 405 has been received, and controls transmission and reception of signals when the power to the pachinko machine 1 is turned on. The details will be described later.

  Next, the operation of the pachinko machine 1 that triggers generation of a signal transmitted from the main board 41 to the effect control board 44 via the sub integrated board 58 will be briefly described. In the pachinko machine 1, various operations including image display on the display screen 28 are mostly started by the generation of signals from the main board 41. First, when the launch handle 7 is operated by the player and the game ball is launched into the game area 4, the game ball flows down the game area 4. When the game ball wins the special symbol starting electric combination 15, the winning of the game ball is detected by the start port switch 72 provided in the special symbol starting electric combination 15. Then, after determining whether or not the main board CPU 51 is a big hit or determining the pattern variation pattern based on the control program stored in the main board ROM 53, the main board CPU 51 responds to the result of the determination and the determination. The signal is transmitted to the sub CPU 581 of the sub integrated board 58, and the sub CPU 581 transmits a signal of the same format as the signal received from the main board CPU 51 to the I / O controller 80.

  Next, with reference to FIG. 7 to FIG. 9, control when the power is turned on to the pachinko machine 1 configured as described above will be described. 7 is a flowchart of power-on processing performed by the I / O controller 80 of the effect control board 44, and FIG. 8 is a diagram showing a display form of the initial screen displayed on the display screen 28. These are figures which show the display form of the standby screen displayed on the display screen 28. FIG. When the supply of power to the pachinko machine 1 is started, the I / O controller 80 monitors whether or not the effect CPU 441 of the effect control board 44 has started up. When each command data related to the variable display of symbols other than the symbol stop command is received from the sub CPU unit 580 before the effect CPU 441 starts up, the command CPU 440 is not sent to the effect CPU unit 440 and is on standby. Control is performed to display a specific standby screen indicating this on the display screen 28. When the symbol stop command data is received, control is performed to display the initial screen of “7, 5, 7” on the display screen 28. Hereinafter, each step of the flowchart is abbreviated as “S”.

  Control performed by the I / O controller 80 is performed by a control program stored in the control ROM 803. When it is determined by the power supply monitoring circuit 67 of the power supply board 42 that the voltage supplied to the pachinko machine 1 has risen above a predetermined voltage and the supply of power to the I / O controller 80 is started, the I / O controller 80 In the control CPU 801, a power-on process is executed. As shown in FIG. 7, a pattern check of the control RAM 802 is first performed (S1). In this pattern check, checksum calculation and password generation are performed, and it is checked whether or not these values are the same as the values generated when the power is turned off. If the pattern check is not OK (S1: NO), after the contents of the control RAM 802 are once cleared (S2), an initial screen (see FIG. 8) is displayed on the display screen 28 (S3). On the other hand, if the pattern check is OK (S1: YES), the initial screen is displayed without clearing the contents of the control RAM 802 (S3).

  Here, the initial screen is a screen displayed on the display screen 28 when the power is turned on. As shown in FIG. 8, in the present embodiment, the demo symbol display units d1 to d3 are sequentially displayed as “ The numbers “7, 5, 7” are displayed. By displaying this initial screen, it is possible to notify the player that the pachinko machine 1 is after the start of power supply. The image data for displaying the initial screen on the display screen 28 is stored in the control ROM 803 of the I / O controller 80, and this image data does not go through the effect CPU unit 440 but through the interrupt connection line. To the graphic engine 85 directly.

  Next, it is determined whether an activation signal 405 has been received from the effect CPU unit 440 (S4). As described above, when the supply of power to the pachinko machine 1 is started and the effect CPU 441 of the effect CPU unit 440 is brought into an operable state, an activation signal 405 (see FIG. 6) is transmitted to the I / O controller 80. The The I / O controller 80 determines whether or not the effect CPU 441 has started up based on whether or not the activation signal 405 has been received. If the activation signal 405 has not been received (S4: NO), it is determined whether the address / data signal 301 has been received from the sub CPU unit 580 (S5). If the address / data signal 301 has not been received (S5: NO), the process returns to the determination of S4, and these determinations are repeated until the activation signal 405 is received from the effect CPU 441.

  When the address / data signal 301 is received from the sub CPU unit 580 during the activation time of the effect CPU 441 (S4: NO, S5: YES), what is the case where the address / data signal 301 is received after the activation time is over? In contrast, the address / data signal 401 having the same format as the received signal is not transmitted to the effect CPU unit 44, and the standby screen is displayed on the display screen 28. Therefore, first, it is determined whether or not the type of data received by the address / data signal 301 is symbol stop command data (S6). As described above, the data type of the address / data signal 301 is specified by the preceding command data, and this determination is determined by the received preceding command data. If it is symbol stop command data (S6: YES), the standby initial screen is displayed on the display screen 28 (S7), and the process returns to the determination of S4. This standby initial screen is a screen for displaying the numbers “7, 5, 7” in the same manner as the initial screen shown in FIG. 8, and informs the player that the pachinko machine 1 has started power supply. Can do. Further, the image data of the standby initial screen 28 is directly transmitted to the graphic engine 85 without going through the effect CPU unit 440.

  On the other hand, when the type of data received by the address / data signal 301 is a command for controlling the variable display of symbols other than the symbol stop command (S6: NO), the standby screen is displayed on the display screen 28. Once done (S6), the process returns to S4. Here, as shown in FIG. 9, the standby screen is a screen that displays a still screen of “please wait as it is”. By displaying this standby screen, the pachinko machine 1 is ready to display an image. The player can be urged to wait until completion of the game. The standby image data for displaying the standby screen on the display screen 28 is stored in the control ROM 803 of the I / O controller 80 in the same manner as the image data related to the initial screen, and this standby image data is the effect CPU unit 440. Without being routed to the graphic engine 85 via the interrupt connection line. Then, the graphic engine 85 sends a control signal to the LCD controller 86 based on the received standby image data, and the standby screen which is a message “Please wait” is displayed on the display screen 28. Accordingly, since the address / data signal 401 is not transmitted to the effect CPU unit 440 during the activation time, the image displayed on the display screen 28 is not disturbed. Further, since the standby screen is a still image, even when a plurality of command data is transmitted to the I / O controller 80, the standby image data transmitted to the graphic engine 85 is the same image data. The image displayed on the display screen 28 is not disturbed.

  The “standby screen” and the “standby initial screen” in the present embodiment correspond to the “standby screen” in the present invention. Further, in this embodiment, when displaying the initial screen, the standby screen, and the standby initial screen, the still image is stopped and displayed. However, in addition to the stop display, a display method such as pseudo-determined display may be used. . Pseudo-deterministic display is a mode of display that causes the player to make an illusion that the design is not stopped by changing the design very slightly, and the display method is either stop display or pseudo-fixed display. If so, the image displayed on the display screen 28 is not disturbed.

  Further, when the activation signal is received from the effect CPU 441 (S4: YES), the effect CPU 441 of the effect control board 44 stands up in an operable state. Therefore, when the standby screen is displayed on the display screen 28, this image is deleted and the initial screen is displayed (S9), based on the command by the address / data signal 301 transmitted from the sub CPU unit 580. The screen can be displayed, the power-on process is terminated, and the normal process in the I / O controller 80 is shifted to.

  Next, a specific example of the timing of the operation of the pachinko machine 1 based on the above control will be described with reference to FIG. FIG. 10 is a time chart showing an example of the operation timing of the control signal. In the specific example described below, when the power supply monitoring circuit 67 (see FIG. 4) of the power supply board 42 determines that the supply of power to the pachinko machine 1 has been cut off, This is a specific example when data is stored in a relation storage area or the like. In this case, since backup power is supplied to the main board RAM 52 by the backup battery 66 (see FIG. 4), the contents stored in the main board RAM 52 even while the power supply to the pachinko machine 1 is cut off. Will not disappear. When the supply of power to the pachinko machine 1 is started again, the continuation of the processing performed at the time of power-off is performed based on the contents stored in the main board RAM 52, and the main board CPU 51 receives the I / A command signal is transmitted to the sub CPU 581 or the like via the O interface 54.

  First, when the supply of power to the pachinko machine 1 is started, the main board CPU 51 and the control CPU 801 in the I / O controller 80 of the effect control board 44 start up almost simultaneously (timing t0 in FIG. 10). As described above, since the control program of the main board CPU unit 50 and the I / O controller 80 is smaller than the control program of the sub CPU unit 580, the startup time until the CPU is brought into an operable state is The main board CPU 51 and the control CPU 801 are shorter than the sub CPU 581. And since the effect CPU unit 440 has to perform processing such as image data expansion at the start of power supply, the effect CPU 441 has the longest startup time among all the CPUs. Further, since signals can be transmitted from the main board CPU 51 to the sub CPU 581 only in one direction, the main board 41 cannot recognize the state of the sub integrated board 58 and the effect control board 44. Therefore, when the main board CPU 51 starts up, the address / data signal composed of the preceding command data A1, A2 and the succeeding command data D1, D2 is timed by the strobe signal 200 regardless of the state of the sub integrated board 58 and the effect control board 44. Is transmitted to the sub CPU 581 while being controlled. However, until the sub CPU 581 starts up (t0 to t1 in FIG. 10), the sub CPU 581 cannot perform processing on the received signal, so the preceding command data A1 transmitted from the main board CPU 51 is ignored. . When the control CPU 801 of the I / O controller 80 starts up, an initial screen of “7, 5, 7” is displayed on the display screen 28 (S3, see FIG. 7).

  Next, the sub CPU 581 starts up at the timing t1. When the sub CPU 581 receives the address / data signal 201 from the main board CPU 51 after the activation time is over, the sub CPU 581 sends an address / data signal 301, an address / data switching signal 302 (see FIG. 6), and enable to the control CPU 801 of the I / O controller 80. A signal 303 (see FIG. 6) is transmitted.

  When the control CPU 801 of the I / O controller 80 receives the address / data signal 301 from the sub CPU 581 from the time when the sub CPU 581 starts up to the time when the effect CPU 441 starts up (t1 to t2 in FIG. 10), the control CPU 801 executes Regardless of the content of the processing to be performed, all address / data signals 301 are received as standby signals, and an ACK signal 304 (see FIG. 6) indicating reception of the address / data signal 301 is transmitted to the sub CPU 581. When the received data is the symbol stop command data from the control CPU 801 that has received the signal as the standby signal, the image data 305 of the standby initial screen is the data other than the symbol stop command data. If it is, the image data 305 of the standby screen is directly transmitted to the graphic engine 85 (S5 to S8, see FIG. 7). Therefore, as shown in FIG. 10, from the control CPU 801 that has received the address / data signal 301 composed of the preceding command data A2 and the succeeding command data D1, D2 from the sub CPU 581 between the timing t1 and the timing t2, the address / data None of the signal 401, the address / data switching signal 402, and the enable signal 403 is transmitted to the effect CPU 441, and only the waiting image data 305 a to 305 c stored in the control ROM 803 of the I / O controller 80 is the graphic engine 85. Sent to. Accordingly, the ACK signal 404 indicating receipt of the command for the address / data signal 401 is not transmitted to the I / O controller 80 during the activation time of the effect CPU 441.

  The graphic engine 85 that has received the standby image data transmits a control signal to the LCD controller 86. Then, the display screen 28 has a standby initial screen that is a number "7, 5, 7" (see FIG. 8). ) Or a “Waiting Please Wait” message is displayed (see FIG. 9).

  Next, the effect CPU 441 of the effect control board 44 starts up at the timing t2. The effect CPU 441 transmits an activation signal 405 a to the I / O controller 80 when various initial processes are completed and the operation CPU 441 is activated. Then, the I / O controller 80 determines that the effect CPU 441 is in the activation time until the activation signal 405a is received. On the other hand, after receiving the activation signal 405a (S4: YES, see FIG. 7), it is determined that the effect CPU 441 has started up, and when the standby screen is displayed on the display screen 28, it is deleted. An initial screen is displayed (S9, see FIG. 7), and normal processing is performed. At this stage, the rendering CPU 441 has already finished rising and is in a stable state, so that no malfunction occurs.

  Next, normal processing performed between the control CPU 801 of the I / O controller 80 and the effect CPU 441 of the effect CPU unit 440 will be described. In normal processing (after t2 in FIG. 10), the preceding command data A3 of the same format is transmitted from the main board CPU51 to the sub CPU 581 and from the sub CPU 581 to the control CPU 801. Then, the preceding command data A3 and the address / data switching signal 402a based on the address / data signal 401 are transmitted from the control CPU 801 to the effect CPU 441.

  Next, the control CPU 801 receives the subsequent command data D3 from the sub CPU 581 when the transmission of the preceding command data A3 is completed. Then, the subsequent command data D3 and the enable signal 403a based on the address / data signal 401 are transmitted from the control CPU 801 to the effect CPU 441. The effect CPU 441 that has received the subsequent command data D3 transmits an ACK signal 404a to the control CPU 801 when the pair of preceding command data A3 and subsequent command data D3 are normally received. Thus, the signal transmitted from the main board CPU 51 to the sub CPU 581 is reliably transmitted to the effect CPU 441 by the shake hand transfer method.

  Next, the control CPU 801 recognizes that the pair of preceding command data A3 and subsequent command data D3 has been normally transmitted by receiving the ACK signal 404a. When the address / data signal 301 is received from the sub CPU 581, the next preceding command data A 4 and address / data switching signal 402 b, and the next succeeding command data D 4 and enable signal 403 b are transmitted to the effect CPU 441. Since the operations related to these signals and the ACK signal 404b are the same as the operations related to the preceding command data A3 and the subsequent command data D3 described above, description thereof will be omitted. Note that the signal transmission / reception operation between the sub CPU 581 and the control CPU 801 performed in the normal process is the same as the operation described above, and thus the description thereof is also omitted.

  As described above, when the signal transmitted from the main board CPU 51 is transmitted to the effect CPU 441, the effect CPU 441 reads out the image data of the designated address from the effect ROM 443 and sends it to the graphic engine 85. Since a control signal is sent to the LCD controller 86 based on the data, a predetermined image is displayed on the display screen 28.

  As described above, in the pachinko machine 1 according to the present embodiment, the I / O controller 80 in the effect control board 44 monitors whether or not the effect CPU 441 of the effect control board 44 is running. . And when the signal which controls the display mode of a symbol is transmitted from the sub integrated board 58 to the production control board 44 during the activation time of the production CPU 441, the case where the same signal is transmitted outside the activation time. In contrast, the I / O controller 80 of the effect control board 44 receives a signal as a predetermined standby signal. In addition, the I / O controller 80 that has received the standby signal does not transmit a signal to the effect CPU 441, and the image data 305 of the standby screen or the initial standby screen stored in the control ROM 803 is directly stored in the graphic engine 85. Sent to. Accordingly, since various control command signals are not transmitted to the effect CPU 441 during the activation time, the screen displayed on the display screen 28 is not disturbed by malfunction.

  The waiting image data 305 is image data for displaying “Please wait as it is” or “7, 5, 7”. Therefore, it is possible to notify the player not to start the game but to wait until the start-up time of the effect CPU 441 ends while performing control not to display the distorted image. Thereby, since the amount of images that cannot be displayed on the display screen 28 during the activation time of the effect CPU 441 can be reduced, the player's interest is not impaired.

  Further, the standby screen displayed on the display screen 28 is a still image, and is stopped or pseudo-determined. Accordingly, even when a plurality of command data related to symbol display such as variation pattern designation command data and symbol designation command data are transmitted to the control CPU 801 and a plurality of waiting image data 305 are transmitted to the graphic engine 85, this waiting image data Since 305 is image data for displaying the same still image, a distorted image is not displayed on the display screen 28 and the same still image is continuously displayed. Furthermore, the initial screen image data and standby image data 305 transmitted to the graphic engine 85 are still image data signals having a smaller data amount than the image data stored in the effect ROM 443 of the effect CPU unit 440. The burden of control in the pachinko machine 1 at the start of power supply is reduced.

  The initial screen image data and the standby image data 305 are stored in the control ROM 803 of the I / O controller 80. Therefore, even during the start-up time of the effect CPU 441, the image data is directly transmitted from the I / O controller 80 to the graphic engine 85 without the effect CPU unit 440, and the standby screen is displayed on the display screen 28. Can do. That is, the initial screen, the standby screen, and the standby initial screen can be easily displayed even when the power supply is started.

  In the present invention, even when the production control board 44 is in the startup time, the production control board 44 does not “receive” the signal for controlling the display mode of the symbol, Can be controlled ". That is, the effect control board 44 can display a specific standby screen on the display screen 28 only when a signal is received during the activation time. Here, for example, in a gaming machine that displays a screen such as “Please wait as it is” at the start of power supply, during the start-up time of the effect control board 44, when the game is progressing and when it is not progressing Since the screens displayed in and are the same, it is not possible to notify the player of whether or not the game is in progress using the display screen 28. However, according to the pachinko machine 1 according to the present invention, a normal initial screen can be displayed on the display screen 28 if no signal is transmitted to the effect control board 44 when power supply is started. On the other hand, when the power is turned off after the power is cut off during the game, or when the game ball wins the special symbol starting electric accessory 15 immediately after the power supply starts, a specific standby screen different from normal Can be displayed. Therefore, it is possible to notify the player that the game is proceeding normally using the display screen 28.

  In the pachinko machine 1 according to the present embodiment, the control CPU 801 of the I / O controller 80 transmits the ACK signal 304 to the sub CPU 581 even when the signal transmitted from the sub CPU 581 is received as a standby signal. Accordingly, since the sub CPU 581 recognizes that signal transmission / reception has been normally performed, error notification regarding signal transmission / reception is not performed. Therefore, the player does not feel uncomfortable by performing unnecessary error notification.

  The display screen 28 corresponds to the “symbol display means” in the present invention, the main board 41 corresponds to the “main control board”, and the sub integrated board 58 corresponds to the “sub control board”.

  It should be noted that the present invention is not limited to the embodiment described in detail above, and various modifications can be made without departing from the scope of the present invention.

  First, a pachinko machine 100 that is a modification of the present embodiment will be described. In the pachinko machine 100, the I / O controller 80 includes a counter that measures a predetermined time after the control CPU is started up, and whether or not the start-up time of the effect CPU 441 is completed depending on whether or not the predetermined time is measured by this counter. It differs from the pachinko machine 1 in that it is determined whether or not. In the pachinko machine 100, the predetermined time measured by the counter is set to a length that continues until the time point when the effect CPU 441 of the effect control board 44 is brought into an operable state. That is, the length of the predetermined time is set so that the effect CPU 441 starts up before the measurement of the predetermined time is completed. Then, a process of “store a counter for measuring the set predetermined time in the control RAM 802” is performed between the processes of S2 and S3 in FIG. It is judged whether or not it has been measured. With such a configuration, even when the operation of the effect CPU 441 is unstable when the effect CPU 441 starts up, an erroneous signal is not transmitted to the graphic engine 85, and thus the display is performed on the display screen 28. The image is not disturbed. In the pachinko machine 100, the control CPU 801 of the I / O controller 80 that measures a predetermined time corresponds to the “timer” of the present invention. Further, the measurement of the predetermined time is not limited to the I / O controller 80, and the main substrate CPU 51, the sub CPU 581, and the like may be used.

  In this embodiment, an I / O controller 80 is provided between the sub CPU unit 580 and the effect CPU unit 440, and relaying of signal exchange among the effect CPU unit 440, the graphic engine 85, and the sub CPU unit 580 is performed. However, the I / O controller 80 is not necessarily provided. In this case, the image data of the initial screen and the standby image data 305 are stored in the sub ROM 583 of the sub integrated board 58, and the sub CPU 581 determines whether or not the start-up time of the effect CPU 441 has ended. Then, a signal and image data are directly transmitted from the sub CPU 581 to the effect CPU 441 and the graphic engine 85. Such a configuration can be applied when the processing capacity of the sub CPU 581 is sufficient, and the number of parts can be reduced. Alternatively, even when the I / O controller 80 is provided, the control of the I / O controller 80 can be simplified. In the present embodiment, the effect control board 44 for controlling the display screen 28 and the symbol display board 43 for controlling the special symbol display unit 25 are provided separately, but the display screen 28 and the special symbol are provided on one board. It is good also as a structure which controls the display part 25, and you may provide the special symbol display part 25 in a part of display screen 28. FIG.

  In addition, in order to reduce the frequency of malfunction of the sub integrated board 58 and the effect control board 44, the time for starting the supply of power to the main board 41 is set to the time when the power is supplied to the sub integrated board 58 and the effect control board 44. It is good also as a structure delayed rather than the time to be started. For example, a reset delay circuit capable of measuring time and controlling the power supply is provided on the power supply board 42, and after a predetermined time after the power supply monitoring circuit determines that the power supplied to the pachinko machine 1 has risen above a predetermined voltage, A power source that can drive the substrate CPU 51 may be supplied to the main substrate 41 by a reset driving circuit. Further, when the sub CPU 581 detects the rise of the effect CPU 441 by the above-described activation signal or the like, a predetermined signal is transmitted from the sub CPU 581 to the power supply board 42 and triggered by reception of the predetermined signal to the main board 41. A configuration may be adopted in which supply of power is started. With such a configuration, the exchange of signals between the substrates during the startup time of each substrate is reduced, so that the possibility that the image displayed on the display screen 28 is disturbed can be reduced. Even when the production CPU 441 and the sub CPU 581 start up later than the main board CPU 51 due to inconvenience such as a power failure, both are displayed on the display screen 28 even when the power supply to the pachinko machine 1 is started normally. The image will not be disturbed.

  In the present embodiment, the initial screen of “7, 5, 7” is always displayed when the power is restored, but the present invention is not limited to this. The combination of the demo symbols is not limited to “7, 5, 7”, and can be arbitrarily changed. The demo symbol combination at the time of power-off may be stored by a backup power source and displayed when the power is restored. .

  In the present embodiment, when the I / O controller 80 receives a signal transmitted from the sub-integrated board 58 as a waiting signal, a message “Please wait” is displayed on the display screen 28. However, it is not limited to this. For example, the content of the message can be arbitrarily changed, and a symbol other than the message may be displayed, or the message and the symbol may be displayed in combination. In this embodiment, the message “Please wait as it is” and the standby initial screen “7, 5, 7” are properly used as the standby screen. However, one type of standby screen may be used. Three or more types of standby screens may be used properly. Further, in a gaming machine provided with a probability variation state, a short time state, and the like, a standby screen and an initial screen can be used properly according to the state of the gaming machine. In this embodiment, the standby image data is still image data. However, if the data amount is small, the standby image data may be moving image data.

  The gaming machine of the present invention is not limited to a pachinko machine and can be applied to various gaming machines such as a pachikon machine and a pachislot machine.

1 is a front view of a pachinko machine 1. FIG. 2 is a front view of the game board 2. FIG. 3 is an enlarged view of the symbol display device 8. FIG. 2 is a block diagram showing an electrical configuration of the pachinko machine 1. FIG. 4 is a block diagram showing a connection relationship among a main board 41, a sub-integrated board 58, an effect control board 44, and a display screen 28. FIG. 4 is a diagram schematically showing signal exchange among an I / O interface 54, a sub CPU unit 580, an I / O controller 80, and an effect CPU unit 440. FIG. 10 is a flowchart of power-on processing performed by the I / O controller 80 of the effect control board 44. 4 is a diagram showing a display form of an initial screen displayed on a display screen 28. FIG. It is a figure which shows the display form of the standby screen displayed on the display screen. It is a time chart which shows an example of the operation timing of a control signal.

Explanation of symbols

1 pachinko machine 8 design display device 28 display screen 41 main board 42 power supply board 44 production control board 50 main board CPU unit 51 main board CPU
52 Main board RAM
53 Main board ROM
54 I / O interface 58 Sub-integrated board 80 I / O controller 85 Graphic engine 86 LCD controller 440 Production CPU unit 441 Production CPU
442 Production RAM
443 Production ROM
580 Sub CPU unit 581 Sub CPU
582 Sub RAM
583 Sub ROM
801 Control CPU
802 Control RAM
803 Control ROM

Claims (4)

A symbol display means for displaying a game state;
A main control board that controls the main control of the gaming machine;
A sub-control board that receives a signal transmitted from the main control board and transmits a signal for controlling a display mode of the symbol display means;
A gaming machine comprising an effect control board that controls a display mode of the symbol display means by a signal transmitted from the sub-control board,
The effect control board receives a signal for controlling the display mode of the symbol display means transmitted from the sub-control board before the start-up is completed as a standby signal that is a predetermined specific signal. A featured gaming machine.   The effect control board causes the symbol display means to display a specific standby screen indicating that it is on standby when the signal transmitted from the sub-control board is received as the standby signal. The gaming machine according to claim 1.   The gaming machine according to claim 2, wherein the standby screen is a screen that is stopped or pseudo-determined. The production control board is:
It has time measuring means to measure the time since the start of power supply,
The gaming machine according to any one of claims 1 to 3, wherein it is determined whether or not the start-up of the production control board is completed based on whether or not the elapsed time is measured by the time measuring means. .

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