JP5023999B2 - Thin film capacitor and manufacturing method thereof - Google Patents

Description

  The present invention relates to a thin film capacitor and a manufacturing method thereof, and more particularly to a trench type thin film capacitor and a manufacturing method thereof.

  Various electronic components of surface mounting type are mounted on internal circuits of electronic devices such as computers and portable terminals. Recently, in order to meet the demand for higher performance and miniaturization of electronic devices, there is an urgent need for further miniaturization and thinning (thin film) of various electronic components regardless of active elements and passive elements. Examples of such a thin film type electronic component include a thin film capacitor, a thin film inductor, a thin film LC composite component, a thin film lumped constant device, a thin film distributed device, and a thin film multilayer composite component using a thin film formation process.

Among these, as one of methods for achieving miniaturization and thinning while increasing the capacitance per unit volume (volume) of the thin film capacitor, a trench (underlying step structure) is formed in the base, and the trench is formed in the trench. A method of forming a thin film capacitor has been proposed (see Patent Document 1).
JP-A-6-325970

  In such a trench-type thin film capacitor, the number of trenches and the aspect ratio (depth / width) are increased, and an electrode covering the inner wall of the trench, a dielectric film, and a laminated film of electrodes are formed. The contact electrode surface area can be further increased, and thereby the capacitance of the capacitor can be further increased.

  However, since the electrode current path becomes longer due to the base step, the resistance of the electrode increases. Furthermore, in order to form a laminated film so as to cover the inner wall of the trench, it is necessary to reduce the film thickness of the laminated film, so that the resistance of the electrode is increased, and as a result, the equivalent series resistance (ESR) is reduced. The problem of increasing arises. In addition, in order to further increase the capacitance, in the case where a laminated film covering the inner wall of the trench is provided in multiple stages (for example, two or more sets), a further thin film with a thickness of each electrode and dielectric film is provided. The above-mentioned problem becomes even more apparent.

  Therefore, the present invention has been made in view of the above circumstances, and an object thereof is to provide a thin film capacitor capable of reducing ESR while maintaining a high capacitance and a method for manufacturing the same.

  In order to achieve the above object, a thin film capacitor of the present invention includes an insulating layer provided on a substrate and formed with a plurality of trenches, a lower electrode formed on the inner wall and the insulating layer of the trench, A dielectric film formed following the lower electrode, an upper electrode formed following the dielectric film, parts of the lower electrode spaced apart via an insulating layer between the two trenches, and / or Or the auxiliary conductor which connects the site | parts of the upper electrode spaced apart through the trench is provided.

  In the above configuration, the auxiliary conductors that connect the portions of the lower electrode spaced apart via the insulating layer between the two trenches and / or the portions of the upper electrode spaced apart via the trench are formed. This auxiliary conductor secures another current path in addition to the current path of the electrode itself. Further, not only the effect of simply increasing the current path, but also a short current path is ensured compared to the current path of the electrode itself. With this auxiliary conductor, it is also possible to secure a current path as short as the current path without the trench. As described above, according to the present invention, it is possible to reduce the resistance of the lower electrode or the upper electrode while maintaining a high capacitance by forming the trench, and to reduce the ESR of the thin film capacitor.

  In one embodiment of the present invention, the auxiliary conductor has an opening in at least a part of a region overlapping with the lower electrode via the insulating layer and / or a region overlapping with the upper electrode via the protective layer. When the auxiliary conductor is formed on the entire surface of such a region, stray capacitance is generated between the lower electrode / upper electrode and the auxiliary conductor, but an opening is formed in a part of the auxiliary conductor in such a region. By providing, stray capacitance can be reduced.

  Furthermore, in order to achieve the above object, a method of manufacturing a thin film capacitor according to the present invention includes a step of forming an insulating layer having a plurality of trenches formed on a substrate, and a lower portion on the inner wall and the insulating layer of the trench. A step of forming an electrode, a step of forming a dielectric film following the lower electrode, and a step of forming an upper electrode following the dielectric film. Before and / or after the step of forming the upper electrode, the portions of the lower electrode spaced apart via the insulating layer between the two trenches and / or the portions of the upper electrode spaced apart via the trench are connected. Forming an auxiliary conductor.

  In the present invention configured as described above, by forming auxiliary conductors that connect the portions of the lower electrode that are spaced apart from each other and / or the portions of the upper electrode that are spaced apart from each other, another current path separate from the current path of the electrode itself. Two current paths are secured. Further, not only the effect of simply increasing the current path, but also a short current path is ensured compared to the current path of the electrode itself. As a result, it is possible to reduce the resistance of the lower electrode or the upper electrode while maintaining a high capacitance by forming the trench, and thus it is possible to reduce the ESR of the thin film capacitor.

  In one embodiment of the present invention, before the step of forming the insulating layer, an auxiliary conductor covering at least a portion where the trench is formed is formed on the base, and the step of forming the insulating layer is performed on the base and the auxiliary conductor. And depositing an insulating layer, and forming a trench reaching the auxiliary conductor in the insulating layer. In this way, by forming the auxiliary conductor covering at least the portion where the trench is formed on the base, the auxiliary conductor acts as an etch stopper when forming the trench, so that the depth of the trench becomes uniform, As a result, the capacitance variation of the capacitor is reduced.

  According to the present invention, by providing an auxiliary conductor that connects the portions of the lower electrode spaced apart via the insulating layer between the two trenches and / or the portions of the upper electrode spaced apart via the trench, the electrode itself In addition to this current path, a shorter current path can be ensured, leading to a reduction in the resistance of the electrode and, in turn, the ESR of the thin film capacitor.

  Embodiments of the present invention will be described below with reference to the drawings. In the drawings, the same elements are denoted by the same reference numerals, and redundant description is omitted. Further, positional relationships such as up, down, left and right are based on the positional relationships shown in the drawings unless otherwise specified. Furthermore, the dimensional ratios in the drawings are not limited to the illustrated ratios. Further, the following embodiments are exemplifications for explaining the present invention, and are not intended to limit the present invention only to the embodiments. Furthermore, the present invention can be variously modified without departing from the gist thereof.

<First Embodiment>
FIG. 1 is a perspective view showing a schematic configuration of a preferred embodiment of a thin film capacitor according to the present invention, and FIG. 2 is a sectional view taken along line II-II in FIG.

As shown in FIGS. 1 and 2, an insulating layer 3 is formed on the base 2, and a trench 3 a is formed in the insulating layer 3. The thickness of the insulating layer 3 can be appropriately set according to the depth of the trench 3a to be formed. The material of the substrate 2 is not particularly limited, and examples thereof include silicon substrates, ceramic substrates such as alumina, glass ceramic substrates, glass substrates, single crystal substrates such as sapphire, MgO, and SrTiO _3. It is preferable to use a material that is stable and generates little stress and can easily maintain the smoothness of the surface. Furthermore, the material of the insulating layer 3 is not particularly limited, and examples thereof include Al ₂ O ₃ , SiO ₂ , Si, and the like.

  On the inner wall of the trench 3 a and the insulating layer 3, a laminated film including the lower electrode 4, the dielectric film 5, and the upper electrode 6 is formed following the underlying step structure. The dielectric film 5 has an opening 5 a at a connection site between the pad electrode 8 and the lower electrode 4.

Examples of the lower electrode 4 and the upper electrode 6 include a metal containing Cu, Au, Pt, Ag, Sn, Cr, Co, Ni, or a composite metal containing these metals. The material of the dielectric film 5 is not particularly limited. For example, Al ₂ O ₃ , PbTiO ₃ (PZT), BaTiO ₃ , BaTiO ₃ , ZrO ₂ , HfO ₂ , Bi ₄ Ti ₃ O 1 ₂ , SrBi ₂ Ta ₂ O ₉ , SiO ₂ or the like.

  A protective film 7 is formed on the laminated film. Two openings 7a and 7a are formed in the protective film 7, and the lower electrode 4 and the upper electrode 6 are exposed in the opening 7a. is doing. Then, two pad electrodes 8 are formed on the protective film 7 so as to fill the opening 7a.

The protective film 7 is not particularly limited as long as it is an insulating material. For example, the protective film 7 is made of an inorganic material such as Al ₂ O ₃ , SiO ₂ , or SiN and a resin such as polyimide or epoxy. Examples of the pad electrode 8 include a metal containing Cu, Au, Pt, Ag, Sn, Cr, Co, Ni, or a composite metal containing these metals.

  In the present embodiment, an auxiliary conductor 10 is formed between the base 2 and the insulating layer 3. The auxiliary conductor 10 connects the parts of the lower electrode 4 separated from each other via the protrusion 3b of the insulating layer 3 between the two trenches 3a, that is, the parts of the lower electrode 4 at the bottom of the two trenches 3a. Yes. Thereby, the parts of the lower electrode 4 at the bottoms of the two trenches 3a can be connected by a shorter current path than the lower electrode itself formed following the convex part 3b of the insulating layer 3.

  FIG. 3 is a diagram illustrating a planar shape of the auxiliary conductor 10. FIG. 3 also illustrates the shapes of the substrate 2 and the trench 3a. As shown in FIG. 3, in the present embodiment, the auxiliary conductor 10 has a planar shape that covers the base 2 with the regions of the plurality of trenches 3 a and the regions of the protrusions 3 b between the trenches 3 a.

In the present embodiment, as will be described later, the auxiliary conductor 10 also functions as an etch stopper. For this reason, as the material of the auxiliary conductor 10, it is preferable to use a material having a lower etching rate or milling rate than the material of the insulating layer 3 among the conductive materials. Here, when Al ₂ O ₃ , SiO ₂ , Si, for example, is used as the insulating layer 3, Ru, Pt, Ir, Au is preferable as the auxiliary conductor 10, and an oxide such as RuO ₂ , SrRuO ₃ , IrO ₂ is preferable. Is used.

  Next, a method for manufacturing the thin film transistor according to the present embodiment having the above-described configuration will be described with reference to FIGS.

  FIG. 4 is a cross-sectional view (process drawing) showing a state in which the thin film capacitor 1 is manufactured. As shown in FIG. 4, first, the auxiliary conductor 10 is patterned on the base 2. In this step, for example, after a Ru film is deposited on the substrate 2 made of Si by a sputtering method, a resist pattern is formed on the Ru film, and the Ru film is formed by dry etching or wet etching using the resist pattern as a mask. The auxiliary conductor 10 is formed by patterning (subtractive method). Alternatively, after forming a resist pattern on the substrate 2, a Ru film is deposited on the entire surface by sputtering, and the unnecessary Ru film on the resist pattern is removed together with the resist pattern, thereby forming the auxiliary conductor 10 (additive). Law). The film thickness of the Ru film can be adjusted as appropriate, for example, 300 nm.

Next, as shown in FIG. 5, the insulating layer 3 is formed on the entire surface of the base 2 and the auxiliary conductor 10. In forming the insulating layer 3, an Al ₂ O ₃ film is deposited by, eg, sputtering. The thickness of the insulating layer 3 is set according to the trench to be formed, and is, for example, 5 μm to 50 μm.

  Next, as shown in FIG. 6, a mask layer 20 having an opening 20 a is formed on the insulating layer 3 at a site where a trench is to be formed. In this embodiment, a metal mask made of, for example, Ru or NiFe is patterned as the mask layer 20. A sputtering method can be used for depositing the Ru or NiFe film, and a subtractive method or an additive method can be used for patterning the film.

  Then, as shown in FIG. 7, the insulating layer 3 exposed in the opening 20 a is removed by reactive ion etching (RIE), and a trench 3 a reaching the auxiliary conductor 10 is formed in the insulating layer 3. Layer 20 is removed. Here, FIG. 8 shows a plan view of the trench 3a formed in one thin film capacitor. FIG. 8 shows an example in which three rectangular trenches 3a are formed.

In the formation of the trench 3a, the auxiliary conductor 10 functions as an etch stopper. Thereby, a plurality of trenches 3 a having a uniform depth can be formed in the insulating layer 3. Here, in the present embodiment, an example in which Si with SiO ₂ oxide film is used as the material of the substrate 2 and Al ₂ O ₃ is used as the material of the insulating layer 3 is shown, but the difference in etching rate between these materials is small. Therefore, when the auxiliary conductor 10 is not provided, the upper surface of the base 2 is etched without functioning as an etch stopper. Note that ion milling may be used as a method of forming the trench 3a. As the auxiliary conductor 10, it is preferable to use a material having a lower etching rate or milling rate than the material of the insulating layer 3.

  After the trench 3a is formed, the lower electrode 4 is patterned on the inner wall of the trench 3a and on the insulating layer 3 as shown in FIG. In this process, a Cu film is formed as the lower electrode 4 by sputtering or a CVD method, and the above-described subtractive method or additive method is used for patterning the lower electrode 4.

Next, as shown in FIG. 10, the dielectric film 5 is patterned on the lower electrode 4 and the insulating layer 3. In this step, after depositing an Al ₂ O ₃ film by ALD (Atomic Layer Deposition) method, by etching using a resist pattern and ion milling, the Al ₂ O ₃ film is removed at the connecting portion between the pad electrode 8 Opening 5a is formed.

  Further, as shown in FIG. 11, the upper electrode 6 is patterned on the dielectric film 5. In this step, a Cu film is sputtered as the upper electrode 6, and the above-described subtractive method or additive method is used for patterning the upper electrode 6.

Next, as shown in FIG. 12, a protective film 7 having openings 7 a and 7 a where the lower electrode 4 and the upper electrode 6 are exposed is formed on the lower electrode 4, the dielectric film 5, and the upper electrode 6. In the formation of the protective film 7, for example, an Al ₂ O ₃ film is deposited on the entire surface of the base 2 by, for example, sputtering, and then openings 7 a and 7 a are formed by etching using a resist pattern.

  In the subsequent steps, the back surface of the substrate 2 is ground to form a thin film as necessary, and then divided into individual thin film capacitors 1 by dicing to obtain the thin film capacitor 1.

  According to the thin film capacitor 1 thus configured, the auxiliary conductor 10 that connects the portions of the lower electrode 4 at the bottom of the two trenches 3a is formed, whereby the lower electrode 4 at the bottom of the two trenches 3a is formed. Can be connected by a shorter current path than the lower electrode itself formed following the convex portion 3b of the insulating layer 3. Thereby, in addition to the current path of the electrode itself, a current path shorter than this is ensured, so that the resistance of the electrode part 11 can be reduced.

  Here, FIG. 13 shows an equivalent circuit of the trench portion of the thin film capacitor 1. In FIG. 13, the reference numerals of members constituting the resistors R0, R1, R2 and the capacitor C are shown in parentheses. As apparent from the equivalent circuit diagram of FIG. 13, the resistance R0 of the auxiliary conductor 10 is connected in parallel to the resistance R1 of the lower electrode 4. It is represented by (1).

R = 1 / (1 / R1 + 1 / R2) (1)

  Therefore, R <R1, and the resistance R of the electrode part 11 is smaller than the resistance R1 of the lower electrode 4 itself. In order to demonstrate the effect of the auxiliary conductor 10, the present inventors have determined a loss factor for a thin film capacitor having the auxiliary conductor 10 (A: this embodiment) and a thin film capacitor not having the auxiliary conductor 10 (B: comparative example). (DF) was measured. The loss factor (DF) is expressed as Tanδ, which is a measured value of the energy loss of the capacitor, and applies a sine wave of a specific frequency (f) at a specific temperature. It is an index showing the power loss of the capacitor in the case of.

  FIG. 14 is a graph showing measurement results of the loss factor (DF) of the thin film capacitors according to the present embodiment (A) and the comparative example (B). The loss factor (DF) was measured with an impedance analyzer (4194A manufactured by YHP) by applying a 200 mVrms sine wave signal of 1 kHz to the thin film capacitor 1 at room temperature. Patterns 1 and 2 in the figure show capacitors manufactured with the width and distance (L / S) of the trench 3a being 1.5 μm / 1.5 μm and 2.0 μm / 2.0 μm, respectively. In addition, the height of the trench in the embodiment (A) and the comparative example (B) was 10 μm.

  14 that the loss factor of the thin film capacitor 1 is reduced by providing the auxiliary conductor 10 as compared with the case where the auxiliary conductor 10 is not provided. Here, the equivalent series resistance (ESR) corresponds to the total of the effects of resistance loss such as the internal resistance of the capacitor, the connection resistance, the viscosity inside the dielectric, and the bypass current due to the defect. It is represented by The ESR can vary depending on the temperature and frequency.

ESR = Tanδ / 2πfC (2)
In the above formula, f indicates frequency (Hz), and C indicates capacity.

  From the above formula (2), it is clear that the smaller the Tan δ, the lower the ESR, and as described above, the Tan δ can be reduced in the thin film capacitor 1 of the present invention, so that the ESR can be reliably reduced. . That is, according to the thin film capacitor 1 of the present invention, it was confirmed that the ESR can be reduced while maintaining a high capacitance by providing the trench 3a to increase the surface area.

  Further, according to the thin film capacitor 1 of the present invention, since the auxiliary conductor 10 functions as an etch stopper, the depth of the trench 3a can be made uniform, thereby reducing the variation in capacitance. In order to demonstrate this effect, the present inventors formed the trench 3a without providing the auxiliary conductor 10 and the thin film capacitor 1 (A: this embodiment) in which the auxiliary conductor 10 was provided and the trench 3a was formed. The variation (3σ) in capacitance of the thin film capacitor (B: comparative example) was measured.

  FIG. 15 is a graph showing measurement results of capacitance variation (3σ) for the thin film capacitors according to the present embodiment (A) and the comparative example (B). In addition, the film thickness of the auxiliary conductor 10 was all set to 300 nm. In FIG. 15, patterns 1 and 2 in the figure indicate capacitors manufactured with the width and distance (L / S) of the trench 3 a being 1.5 μm / 1.5 μm and 2.0 μm / 2.0 μm, respectively. In addition, the height of the trench in the embodiment (A) and the comparative example (B) was 10 μm.

  As shown in FIG. 15, it was found that the variation in the capacitance of the thin film capacitor could be reduced from 12 to 17.5% to 5 to 8% by using the auxiliary conductor 10 as an etch stopper when forming the trench 3a. did.

  As described above, according to the thin film capacitor 1 according to the present embodiment, the auxiliary conductor 10 that connects the portions of the lower electrode 4 at the bottom of the two trenches 3a is formed, so that the two trenches 3a The parts of the lower electrode 4 at the bottom can be connected by a shorter current path than the lower electrode itself formed following the convex part 3 b of the insulating layer 3. Thereby, in addition to the current path of the electrode itself, a shorter current path is ensured, so that the resistance of the electrode portion 11 can be reduced, and as a result, the ESR of the thin film capacitor can be reduced. It becomes.

  Furthermore, when the trench 3a is formed in the insulating layer 3, the in-plane uniformity of the depth of the trench 3a can be improved and the capacitance variation can be reduced by using the auxiliary conductor 10 as an etch stopper.

Second Embodiment
FIG. 16 is a cross-sectional view of the thin film capacitor 1 according to the second embodiment, and FIG. 17 is a diagram showing a planar shape of the auxiliary conductor 10. In addition, in FIG. 17, the planar shape of the board | substrate 2 and the trench 3a is also illustrated.

  As shown in FIGS. 16 and 17, in this embodiment, the auxiliary conductor 10 has an opening 10 a in at least a part of a region overlapping with the lower electrode 4 through the convex portion 3 b of the insulating layer 3. In other words, the opening 10a is formed in at least a part of the auxiliary conductor 10 in the lower region of the insulating layer 3b. The shape of the opening 10a is not limited. For example, a plurality of openings 10a may be provided in the lower region of the insulating layer 3b.

  When the auxiliary conductor is formed on the entire surface of the lower region of the insulating layer 3, stray capacitance is generated between the lower electrode and the auxiliary conductor via the insulating layer 3. By providing the opening 10a in a part of the floating capacitance, the stray capacitance can be reduced.

<Third Embodiment>
FIG. 18 is a cross-sectional view of the thin film capacitor 1 according to the third embodiment.
As shown in FIG. 18, in the present embodiment, the upper electrode portions separated via the trench 3 a, more specifically, the auxiliary electrode connecting the portions of the upper electrode 6 on the insulating layer 3 on both sides of the trench 3 a are connected. A conductor 12 is formed.

FIG. 19 is a diagram illustrating an example of a planar shape of the auxiliary conductor 10. FIG. 19 also illustrates the planar shapes of the substrate 2 and the upper electrode 6.
As shown in FIG. 19, the auxiliary conductor 12 has a planar shape that covers the recess 6 a of the upper electrode 6 and the region of the upper electrode 6. Thereby, the parts of the upper electrode 6 on both sides of the recess 6 a are connected by the auxiliary conductor 12. The auxiliary conductor 12 may be separated for each recess 6a.

FIG. 20 is a diagram illustrating another example of the planar shape of the auxiliary conductor 12. In FIG. 20, the planar shapes of the substrate 2 and the upper electrode 6 are also illustrated.
In the example shown in FIG. 20, the auxiliary conductor 12 has an opening 12 a in at least a part of a region overlapping with the upper electrode 6 through the protective film 7. In other words, the opening 12a is formed in at least a part of the auxiliary conductor 12 in the recess 6a. The number and shape of the openings 12a are not limited. When the auxiliary conductor 12 is formed on the entire surface of the concave portion 6a via the protective film 7, a stray capacitance is generated between the upper electrode 6 and the auxiliary conductor 12 via the protective film 7. By providing the opening 12a in a part of the auxiliary conductor 12 in such a region, stray capacitance can be reduced.

  According to the thin film capacitor 1 according to the third embodiment, the portions of the upper electrodes 6 separated by the auxiliary conductor 12 via the trench 3a are made to be closer to the inner wall of the trench 3a than the upper electrode 6 itself formed. It can be connected with a short current path. Thereby, in addition to the current path of the electrode itself, a current path shorter than this is secured, so that the resistance of the electrode part including the upper electrode 6 and the auxiliary conductor 12 can be reduced. As a result, the thin film The ESR of the capacitor can be reduced.

<Fourth embodiment>
FIG. 21 is a cross-sectional view of the thin film capacitor 1 according to the fourth embodiment.
As shown in FIG. 21, in this embodiment, an auxiliary conductor 13 is formed in the middle of the trench 3a, and is formed on the side wall of the trench 3a and connects the upper electrodes 6 arranged opposite to each other across the trench 3a. ing.

  Even with such an auxiliary conductor 13, it is possible to reduce the resistance of the electrode portion including the upper electrode 6 and the auxiliary conductor 13 for the same reason as in the third embodiment. As a result, the ESR of the thin film capacitor is reduced. It becomes possible to do.

In addition, as above-mentioned, this invention is not limited to said each embodiment, A various deformation | transformation is possible in the limit which does not change the summary.
For example, a set of stacked films including the lower electrode 4, the dielectric film 5, and the upper electrode 6 may be formed in multiple stages (for example, two or more sets) on the inner wall of the trench 3a and the insulating layer 3. Furthermore, if necessary, an adhesion layer made of silicon nitride may be formed on the thin film capacitor 1, and the auxiliary conductor 10 and the insulating layer 3 may be formed on the adhesion layer.

  Moreover, there is no restriction | limiting in the number and shape of the trench 3a formed in the insulating layer 3, For example, a trench may have the cross-section of the round shape like an ellipse, ie, the shape which is not closed, ie One end of the trench 3a may extend to the outer edge of the thin film capacitor. Further, in the laminated film composed of the lower electrode 4, the dielectric film 5, and the upper electrode 6, another functional layer may be formed at an appropriate position. In addition, a capacitor structure may be formed on both surfaces of the substrate. In this case, the trench 3a, the insulating layer 3, and the laminated film including the lower electrode 4, the dielectric film 5, and the upper electrode 6 are formed on both surfaces of the substrate. Formed.

  As described above, according to the thin film capacitor and the manufacturing method thereof of the present invention, it is possible to realize a thin film capacitor with reduced ESR while maintaining a high capacitance, and thus a device incorporating a thin film type electronic component. , Apparatuses, systems, various devices, etc., especially those that require miniaturization and high performance, can be widely and effectively used for manufacturing applications.

1 is a perspective view of a thin film capacitor 1 according to a first embodiment. It is sectional drawing which follows the II-II line in FIG. 2 is a diagram showing a planar shape of an auxiliary conductor 10. FIG. It is sectional drawing which shows the state which manufactures the thin film capacitor. It is sectional drawing which shows the state which manufactures the thin film capacitor. It is sectional drawing which shows the state which manufactures the thin film capacitor. It is sectional drawing which shows the state which manufactures the thin film capacitor. It is a top view which shows the state which manufactures the thin film capacitor. It is sectional drawing which shows the state which manufactures the thin film capacitor. It is sectional drawing which shows the state which manufactures the thin film capacitor. It is sectional drawing which shows the state which manufactures the thin film capacitor. It is sectional drawing which shows the state which manufactures the thin film capacitor. It is an equivalent circuit schematic of the trench part of a thin film capacitor. It is a figure which shows the measurement result of the loss factor (DF) of the thin film capacitor which concerns on this embodiment (A) and a comparative example (B). It is a figure which shows the measurement result of the capacitance dispersion | variation (3 (sigma)) about the thin film capacitor which concerns on this embodiment (A) and a comparative example (B). It is sectional drawing of the thin film capacitor 1 which concerns on 2nd Embodiment. 2 is a diagram showing a planar shape of an auxiliary conductor 10. FIG. It is sectional drawing of the thin film capacitor 1 which concerns on 3rd Embodiment. It is a figure which shows an example of the planar shape of the auxiliary conductor. It is a figure which shows the other example of the planar shape of the auxiliary conductor. It is sectional drawing of the thin film capacitor 1 which concerns on 4th Embodiment.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Thin film capacitor, 2 ... Base | substrate, 3 ... Insulating layer, 3a ... Trench, 3b ... Convex part, 4 ... Lower electrode, 5 ... Dielectric film, 5a ... Opening part, 6 ... Upper electrode, 6a ... Concave part, 7 ... Protective film, 7a ... opening, 8 ... pad electrode, 10 ... auxiliary conductor, 10a ... opening, 11 ... electrode, 12, 13 ... auxiliary conductor, 12a ... opening, 20 ... mask layer, 20a ... opening.

Claims (5)

An auxiliary conductor formed on the substrate;
An insulating layer provided on the substrate and the auxiliary conductor , and having a plurality of trenches formed thereon;
A lower electrode formed on the inner wall of the trench and on the insulating layer;
A dielectric film formed following the lower electrode;
An upper electrode formed following the dielectric film;
Have
The auxiliary conductor, a portion between the lower electrode spaced through the insulating layer between two of said trenches connected, and, at least in part on the opening in the region overlapping with the lower electrode through the insulating layer Having a part,
Thin film capacitor. An insulating layer provided on the substrate and having a plurality of trenches formed thereon;
A lower electrode formed on the inner wall of the trench and on the insulating layer;
A dielectric film formed following the lower electrode;
An upper electrode formed following the dielectric film;
A protective layer covering the upper electrode at least in the region of the trench;
Connecting the portion between the upper electrode spaced through the trench, and an auxiliary conductor having an opening on at least a part of the area overlapping with the upper electrode through the protective layer,
A thin film capacitor. Forming an auxiliary conductor on the substrate;
On the substrate and the auxiliary conductor, forming an insulating layer in which a plurality of trenches are formed,
Forming a lower electrode on the inner wall of the trench and on the insulating layer;
Forming a dielectric film following the lower electrode;
Forming an upper electrode following the dielectric film;
Have
In the step of forming the auxiliary conductor, at least one of the regions overlapping the lower electrode via the insulating layer and connecting the portions of the lower electrode spaced apart via the insulating layer between the two trenches Forming the auxiliary conductor having an opening in a part thereof;
Manufacturing method of thin film capacitor. The step of forming the insulating layer includes a step of depositing an insulating layer on the base body and the auxiliary conductor, and a step of forming a trench reaching the auxiliary conductor in the insulating layer.
A method of manufacturing a thin film capacitor according to claim 3 . Forming an insulating layer having a plurality of trenches formed on a substrate;
Forming a lower electrode on the inner wall of the trench and on the insulating layer;
Forming a dielectric film following the lower electrode;
Forming an upper electrode following the dielectric film;
Forming a protective layer covering the upper electrode at least in the trench portion;
Connecting the portions of the upper electrodes spaced apart via the trench, and forming an auxiliary conductor having an opening in at least part of the region overlapping the upper electrode via the protective layer;
The manufacturing method of the thin film capacitor which has this .

Images