JP5007490B2 - Pixel circuit, driving method thereof, light emitting device, and electronic apparatus - Google Patents

Description

The present invention relates to a pixel circuit including a light emitting element such as an organic light emitting diode element, a driving method thereof, a light emitting device, and an electronic apparatus.

In recent years, organic light emitting diodes (Organic Light Emitting), called organic electroluminescent elements and light emitting polymer elements, are the next generation of light emitting devices that can replace liquid crystal elements.
Diodes (hereinafter referred to as “OLED elements” where appropriate) are drawing attention. This OLED element is self-luminous and has little viewing angle dependency. Also, it does not require a backlight or reflected light, making it suitable for low power consumption and thinning. It has the characteristics.
Here, the OLED element does not have voltage holding property like the liquid crystal element, and when the current is interrupted,
This is a current-type driven element that cannot maintain the light emission state. Therefore, when an OLED element is driven by an active matrix method, a voltage corresponding to the gradation of the pixel is written to the gate of the driving transistor in the writing period (selection period), and the voltage is held by a gate capacitance or the like. In general, the drive transistor keeps a current corresponding to the gate voltage flowing through the OLED element.

In this configuration, it has been pointed out that the threshold voltage characteristics of the driving transistor vary, and therefore the brightness of the OLED element is different for each pixel and the display quality is lowered.
Patent Document 1 discloses a pixel circuit shown in FIG. 15 in order to improve variation in threshold voltage. In this pixel circuit, the threshold voltage of the driving transistor Tr1 is compensated by diode-connecting the driving transistor Tr1 while fixing the left node of the capacitive element C1 to a certain reference voltage. More specifically, as shown in FIG. 16, in the reset period, the transistors Tr2 and Tr3 are turned on to lower the drain voltage of the drive transistor Tr1 to a sufficiently low voltage. Next, in the compensation period, the transistor Tr3 is turned on to connect the drain and gate of the drive transistor Tr1 so that the gate voltage of the drive transistor Tr3 becomes Vdd− | Vth |. Here, Vth is a threshold voltage of the drive transistor Tr1. At this time, the reference voltage is input to the left node of the capacitive element C1. In the writing period, the transistor Tr3 is turned off to release the diode connection of the driving transistor Tr1, and a data voltage is input to the data line. As a result, the gate potential of the driving transistor Tr1 is lowered from Vdd− | Vth | according to the data voltage. More specifically,
The difference between the reference voltage and the data voltage is divided by the capacitance ratio of the coupling capacitor C1 and the holding capacitor C2, and supplied to the gate of the drive transistor Tr1. During the light emission period, the transistor Tr2 is turned on to form a current path to the OLED element, and the OLED element emits light.
US Pat. No. 6,229,506 (see FIG. 2)

Incidentally, since the threshold voltage compensation operation is performed in the vicinity of the threshold voltage of the drive transistor Tr1, it generally takes a long time. In the pixel circuit described above, both the reference voltage and the data voltage are taken from the data line. In such a configuration, it is necessary to divide one horizontal scanning period 1H into two and alternately input two voltages. For this reason, there is a problem that a sufficient time cannot be secured for compensation of the threshold voltage.

The present invention has been made in view of the above-described circumstances, and it is an object of the present invention to provide a pixel circuit, a driving method thereof, a light emitting device, and an electronic device that can secure a sufficient time for compensation of a threshold voltage. To do.

In order to solve the above problems, a pixel circuit according to the present invention includes a light-emitting element that emits light according to a drive current, a drive transistor that controls a current amount of the drive current that flows through the light-emitting element, and the drive for the light-emitting element. A first switching means provided in a path for supplying current; a second switching means provided between a gate and a drain of the driving transistor; and a first capacitance element having one end connected to the gate of the driving transistor. A data signal in which the reference voltage is time-division multiplexed in the second period and the data voltage corresponding to the driving current is supplied in a first period, and the data signal is sampled and held in part or all of the first period. And a sample-and-hold circuit that samples and holds the sample during part or all of the second period and supplies the sample to the other end of the first capacitor element. That.

According to this invention, the sample hold circuit is provided inside the pixel circuit. The sample and hold circuit captures and holds the data signal in a first period in which the data signal is a reference voltage and a second period in which the data signal is a data voltage. Therefore, the reference voltage can be supplied to the other end of the first capacitive element for a long time even if the period for taking in the reference voltage is short. In order to compensate the threshold voltage of the driving transistor, it is necessary to turn on the second switching means and fix the voltage at the other end of the first capacitive element. In the conventional pixel circuit, since the sample hold circuit is not provided, the threshold voltage of the driving transistor cannot be compensated for a long time. In contrast, according to the present invention, since the reference voltage of the data signal can be sampled and held by the sample and hold circuit, a period for compensating the threshold voltage can be taken for a long time. As a result, the threshold voltage can be accurately compensated.

The drive current is determined by the gate-source voltage of the drive transistor.
According to the configuration of the present invention, since the data voltage is held in the sample and hold circuit, it is not necessary to provide a holding capacitor at the gate of the driving transistor. Therefore, unlike the conventional pixel circuit, the voltage applied to the gate of the driving transistor is not divided according to the capacitance ratio between the storage capacitor and the coupling capacitor, so that the amplitude of the data voltage is reduced. Can do. As a result, the pixel circuit can be driven with low power consumption.

Here, as a specific aspect of the sample and hold circuit, an impedance conversion circuit in which an output terminal is connected to the other end of the first capacitive element, an input impedance is high impedance, and an output impedance is low impedance, and the impedance conversion is performed. A second capacitive element provided between an input terminal of the circuit and a fixed potential; and the data signal is supplied to one end;
It is preferable that the other end is connected to an input terminal of the impedance conversion circuit and includes a third switching unit that is turned on at a timing of sampling the data signal. In this case, when the third switching means is turned on, the voltage of the data signal is taken into the second capacitor element. Since the input impedance of the impedance conversion circuit is high impedance, the sampled voltage is held in the second capacitive element even when the third switching means is turned off.

Moreover, it is preferable that the said impedance conversion circuit is comprised with a source follower. When the source follower is used, the voltage level is shifted by the threshold voltage of the transistor, so that the first
It is supplied to the capacitive element. However, since the drive current is given according to the difference between the reference voltage and the data voltage supplied to the first capacitive element, the threshold voltage of the source follower is canceled and does not affect the magnitude of the drive current.

The impedance conversion circuit includes a first capacitor and a third capacitor having one end connected thereto,
A transistor provided between the other end of the third capacitive element and the second power supply and having a gate connected to the input terminal of the impedance conversion circuit; and a reset means for discharging the charge accumulated in the third capacitive element And may be provided. In this case, since a DC bias current does not flow unlike a source follower, power consumption can be reduced.
Here, the reset means generates a reset signal in synchronization with a sample operation of the sample hold circuit and a reset transistor provided between one end and the other end of the third capacitor element, It is preferable to include a reset pulse generation circuit that supplies the gate. In this case, the electric charge accumulated in the third capacitor element can be discharged in synchronization with the sample operation.

Next, a light emitting device according to the present invention is provided corresponding to a plurality of scanning lines, a plurality of first control lines, a plurality of second control lines, a plurality of data lines, and an intersection of the scanning lines and the data lines. And driving the plurality of pixel circuits by dividing a vertical scanning period composed of a plurality of horizontal scanning periods into a reset period, a compensation period, a writing period, and a light emitting period. There,
Each of the plurality of pixel circuits includes a light emitting element that emits light according to a driving current, a driving transistor that controls a current amount of the driving current that flows through the light emitting element, and a path that supplies the driving current to the light emitting element. Provided between a gate and a drain of the driving transistor, and a first switching means which is controlled to be turned on / off based on a first control signal supplied via the first control line, A second switching unit that is controlled to be turned on / off based on a second control signal supplied via the two control lines, a first capacitor element having one end connected to the gate of the driving transistor, and the scanning line. The data signal supplied via the data line is sampled on the other end of the first capacitor element based on the scan signal supplied via the data line. A sample-and-hold circuit for supplying, and turning on the first switching means in the reset period, turning off the first switching means in the compensation period, and turning off the first switching means in the writing period And first driving means for generating the first control signal for turning on the first switching means during the light emission period and supplying the first control signal to the first control line; and turning on the second switching means during the reset period. The second control for turning on the second switching means in the compensation period, turning off the second switching means in the writing period, and turning off the second switching means in the light emission period. Second driving means for generating and supplying a signal to the second control line; and the compensation The reference voltage of the data signal is sampled in a starting sample period in between and the reference voltage is held until the compensation period ends, and the data voltage of the data signal is sampled in the writing period And third driving means for generating the scanning signal for controlling the sample-and-hold circuit so as to hold it until the light emission period ends and supplying the scanning signal to the scanning line.
According to the present invention, since the sample hold circuit is provided inside the pixel circuit, the compensation period can be increased. As a result, the threshold voltage can be accurately compensated for, and luminance unevenness can be greatly improved.

Here, one horizontal scanning period includes a first period to which the reference voltage is allocated and a second period to which the data voltage is allocated, and the writing period is a second period among predetermined horizontal scanning periods. Preferably, the sampling period is set to a part or the whole, and the sampling period is set to a part or the whole of the first period of the horizontal scanning period preceding the predetermined horizontal scanning period. In this case, since the compensation period can be set across a plurality of horizontal scanning periods, the threshold voltage of the driving transistor can be compensated accurately.

Next, an electronic apparatus according to the present invention includes the above-described light emitting device. Examples of the electronic device include a mobile phone, a personal computer, a display, and a printer.

Next, a driving method of a pixel circuit according to the present invention includes a light emitting element that emits light according to a driving current, a driving transistor that controls a current amount of the driving current that flows through the light emitting element, and a driving current that flows through the light emitting element. A first switching means provided in a path for supplying a voltage, a second switching means provided between a gate and a drain of the driving transistor, a first capacitance element having one end connected to the gate of the driving transistor, When a data signal in which a data voltage corresponding to the driving current and a reference voltage are time-division multiplexed is supplied via a data line, the data signal is sampled and held at a predetermined timing, and the first capacitor element A pixel circuit that includes a sample-and-hold circuit that is supplied to the other end and that is driven in a reset period, a compensation period, a writing period, and a light emission period. The first switching means and the second switching means are turned on in the reset period, the reference voltage of the data signal is sampled in the sample period of the start of the compensation period, Controlling the sample and hold circuit to hold the reference voltage until the end of the compensation period;
The sample-and-hold circuit is configured to turn off the first switching unit and turn on the second switching unit in the compensation period, and sample and hold the data voltage of the data signal in the writing period. And the first switching means and the second switching means are turned off, and the first switching means is turned on and the second switching means is turned off during the light emission period. And

According to the present invention, since the reference voltage is sampled and held using the sample and hold circuit in the pixel circuit, the compensation period can be increased. As a result, the threshold voltage of the driving transistor can be accurately compensated, and luminance unevenness can be greatly improved.
In this driving method, one horizontal scanning period includes a first period in which the reference voltage is assigned,
A second period to which the data voltage is assigned, the writing period is set to a part or all of the second period in a predetermined horizontal scanning period, and the sample period is set to the predetermined horizontal scanning period It is preferable to set a part or all of the first period of the horizontal scanning period preceding the first. In this case, since the compensation period can be set across a plurality of horizontal scanning periods, the threshold voltage of the driving transistor can be compensated accurately. Note that the light-emitting element may be any element that emits light when supplied with a driving current, and examples thereof include organic light-emitting diodes and inorganic light-emitting diodes.

<Configuration of light emitting device>
FIG. 1 is a block diagram showing a configuration of a light emitting device according to an embodiment of the present invention, and FIG. 2 is a circuit diagram of a pixel circuit. As shown in FIG. 1, the light emitting device 10 includes a display region Z in which a plurality of pixel circuits 200 are arranged in a matrix. The display area Z includes a plurality of scanning lines 102.
Is extended in the horizontal direction (X direction), while a plurality of data lines 112 are arranged in the vertical direction (Y
Direction). Pixel circuits 200 are provided so as to correspond to the intersections of the scanning lines 102 and the data lines 112, respectively.
For convenience of explanation, in the present embodiment, the number of scanning lines 102 (number of rows) of each display panel Z1 to Z4 is “360”, the number of data lines (number of columns) is “480”, and the pixel circuit 200 is
Assume a configuration in which the pixels are arranged in a matrix of 360 rows × 480 columns. However, the present invention is not intended to be limited to this arrangement. The display area Z includes a high-side voltage Vdd from a power supply circuit (not shown).
And the lower voltage GND is supplied. Note that the low-side voltage GND is a reference potential when expressing a voltage in the present embodiment. The pixel circuit 200 includes an OLED element 230, which will be described later. By controlling the current to the OLED element 230 for each pixel circuit 200, a predetermined image is displayed in gradation.
In FIG. 1, only the scanning line 102 extends in the X direction. However, in this embodiment, in addition to the scanning line 102, as shown in FIG. Are extended in the X direction for each row. Therefore, the scanning line 102, the control lines 104 and 1
06 becomes one set and is also used as the pixel circuit 200 for one row.

The Y driver 14 selects the scanning line 102 row by row for each horizontal scanning period, and
Various control signals synchronized with this selection are supplied to the control lines 104 and 106, respectively. That is, the Y driver 14 performs the scanning line 102 and the control lines 104 and 106 for each row.
A scanning signal and a control signal are supplied. For convenience of explanation, the i-th row (i is 1 ≦ i ≦ 360
The scanning signal supplied to the scanning line 102 is an integer that satisfies the above and is used for generalizing and explaining the row). Similarly, control signals supplied to the i-th control lines 104 and 106 are denoted as G1-i and G2-i, respectively.

On the other hand, the X driver 16 applies the pixel circuit for one row corresponding to the scanning line 102 selected by the Y driver 14, that is, to each of the pixel circuits 200 of 1 to 480 columns located in the selected row. A data signal having a voltage corresponding to the current to be passed through the OLED element 230 of the circuit 200 (that is, the gradation of the pixel) is supplied via the data lines 112 in the 1st to 480th columns. Here, the data signal (data voltage) is specified such that the lower the voltage is, the brighter the pixel is. On the contrary, the higher the voltage is, the darker the pixel is specified. For convenience of explanation,
A data signal supplied to the data line 112 in the j-th column (j is an integer satisfying 1 ≦ j ≦ 480 and generalizing the column) will be expressed as Xj.

All the pixel circuits 200 are supplied with the high voltage Vdd serving as the power source of the OLED element 230 via the power supply line 114, respectively. In addition, all the pixel circuits 200 have a lower voltage G
Grounded to ND. Note that the voltage of the data signal Xj that specifies black, which is the lowest gradation of the pixel, is lower than Vdd, and the voltage of the data signal Xj that specifies white, which is the highest gradation of the pixel, is set higher than GND. Is done. In other words, the voltage range of the data signal Xj is set to be within the power supply voltage.
The control circuit 12 supplies the Y driver 14 and the X driver 16 with clock signals (not shown), respectively, to control both drivers, and supplies the X driver 16 with image data that defines the gradation for each pixel. To do.

As shown in FIG. 2, the pixel circuit 200 includes a sample and hold circuit 300, a p-channel driving transistor 210, and p-channel transistors 211 (first switching means) and 212 (second switching function) that function as switching elements. Switching means), a capacitive element 221 that functions as a coupling capacitor, and an OLED element 230 that is an electro-optic element.
Among these, one end (source) of the transistor 211 is connected to the drain of the driving transistor 210 and one end (source) of the transistor 212, while the other end (drain) of the transistor 211 is connected to the anode of the OLED element 230. . The cathode of the OLED element 230 is grounded. Here, the gate of the transistor 211 is connected to the control line 106 in the i-th row. Therefore, the transistor 211 is turned on when the control signal G2 _-i is at the L level, and is turned off when the control signal G2 _-i is at the H level. The OLED element 230 is configured to be electrically inserted together with the drive transistor 210 and the transistor 211 in a path between the high voltage Vdd and the low voltage GND of the power supply.

The gate of the driving transistor 210 is one end of the capacitor 221 and the transistor 212.
Are respectively connected to the drains. Note that for convenience of description, one end of the capacitor 221 (the gate of the driving transistor 210) is a node A.
The transistor 212 is electrically inserted between the drain and gate of the driving transistor 210, and the gate of the transistor 212 is connected to the control line 104 in the i-th row. Therefore, the transistor 212 is turned on when the control signal G _1-i becomes the L level, and causes the driving transistor 210 to function as a diode.

Next, the sample hold circuit 300 includes a p-channel transistor 301, a capacitor 302 that functions as a storage capacitor, and a buffer 303. Note that the input impedance of the buffer 303 is high and its output impedance is low. Therefore, the buffer 303 functions as impedance conversion means for converting impedance.
FIG. 3 shows a specific configuration example of the buffer 303. As shown in FIGS. 3A to 3C, the buffer 303 is preferably composed of a source follower. FIG. 3A shows a combination of an n-channel transistor and a resistor, and FIG. 3B shows a combination of a p-channel transistor and a resistor. Further, FIG. 2C shows a combination of two n-channel transistors, and the low potential side transistor constitutes a constant current source and functions as an active load. The output of the source follower is lowered from the input by the threshold voltage Vth of the transistor (a constant voltage when the load of the source follower is used as a current source) (in the case of the n-channel type). However, since the emission luminance of the OLED element 230 is determined by the difference between the reference voltage Vref and the data voltage Vdata as will be described later, the influence of the threshold voltage Vth of the source follower is cancelled. In the present embodiment, a source follower having a gain of 1 is exemplified as the buffer 303, but an amplifier having a gain exceeding 1 may be used. In short, any circuit format may be used as long as the input is high impedance and the output is low impedance.

Next, one end (source) of the transistor 301 is connected to the data line 112, and the other end (drain) is connected to the input terminal of the buffer 303 and one end of the capacitor 302. The gate of the transistor 301 is connected to the i-th scanning line 102. Therefore, the transistor 301 is turned on when the scanning signal _GSEL-i becomes L level, and the data signal Xj (voltage) supplied to the data line 112 in the j-th column is supplied to one end of the capacitor 302. Apply to. The high potential side voltage Vdd is applied to the other end of the capacitive element 302 via the feeder line 114. Note that the other end of the capacitor 302 may be connected at any fixed potential. Therefore, it may be connected to the low potential side voltage GND.
The output terminal of the buffer 303 is connected to the other end of the capacitive element 221. In the sample and hold circuit 300, the transistor 301 functions as a sample switch, and the capacitor 302 functions as a hold capacitor. Since the input impedance of the buffer 303 is extremely high, the charge accumulated in the capacitor 302 is held when the transistor 301 is turned off, and the output signal of the buffer 303 becomes a constant potential. For convenience of explanation, the other end of the capacitor 221 (the output terminal of the buffer 303) is a node B.

Note that the pixel circuits 200 arranged in a matrix type are formed on a transparent substrate such as glass on the scanning line 10.
2 and the data line 112 are formed. For this reason, the drive transistor 210 and the transistors 211, 212, and 303 are configured by TFTs (thin film transistors) using a polysilicon process. Further, the OLED element 230 is formed on the substrate by the IT
A transparent electrode film such as O (indium tin oxide) is used as an anode (individual electrode), and a single metal film such as aluminum or lithium or a laminated film thereof is used as a cathode (common electrode) to sandwich a light emitting layer. .

<Operation of light emitting device>
FIG. 4 shows a timing chart for explaining the operation of the light emitting device 10. First, as shown in FIG. 4, the Y driver 14 starts the first row from the start of one vertical scanning period (1F).
The second, third,..., 360th scanning line 102 is selected. In this example, Y driver 1
4 selects each scanning line 102 twice in one vertical scanning period. The selection timing is shifted by the time of one horizontal scanning period until the first row, the second row,..., The 360th row.
Here, focusing on the scanning signal _GSEL-i supplied to the _i-th scanning line 102, the operation will be described with reference to FIGS. 5 to 9 together with FIG.

As shown in FIG. 4, the data signal X-j is 1 reference voltage Vref becomes in the period T _A of the first half of the horizontal scanning period 1H, the data voltage Vdata to the second half of the period T _B. The data voltage Vdata is a voltage that indicates the gradation to be displayed by each pixel.
In this example, the pixel circuit 200 is driven by being divided into a reset period T _RSET , a compensation period T _SET , a writing period T _WRT , and a light emission period T _EL .

The period from time t0 to time t1 is the reset period _TRSET . Reset period T _RSET
The Y driver 14 sets the scanning signal GSEL-i and the control signals G1-i and G2-i to the L level. Therefore, in the pixel circuit 200, as shown in FIG. 5, the transistor 212 is turned on by the control signal _{G 1-i} of the L level, the transistor 211 is turned on by the control signal G2-i of the L level. As a result, the drain voltage of the driving transistor 210 is sufficiently reduced. At this time, the voltage Vg of the node A is sufficiently lowered together with the drain of the driving transistor 210. In the reset period _{T RSET,} although the OLED element 230 and the transistor 211 is turned on to emit light, since the period it is sufficient to reduce the voltage of the drain of the driving transistor 210 to a predetermined level, the light emission period _{T EL} which will be described later It is extremely short when compared. Therefore, there is almost no influence on the luminance of the OLED element 230.

The period from time t1 to time t3 is the compensation period T _SET . At time t1, the Y driver 14 sets the control signal G2-i to the H level. For this reason, as shown in FIG.
11 turns off. Therefore, the OLED element 230 does not emit light during the compensation period T _SET . Further, the scanning signal _GSEL- i becomes L level during a period S1 from time t0 to time t2. Period S1 is set to a part or the whole of the first half period T _A of one horizontal scanning period. At this time, the reference voltage Vref is taken into the capacitive element 302 as the data signal Xj as shown in FIG. The capacitance value of the capacitor 302 is sufficiently smaller than the capacitance value of the data line 112. Therefore, period S
Even when 1 is less than one horizontal scanning period 1H, the reference voltage Vref can be accurately taken into the capacitive element 302. Thereby, the voltage Vb at the node B becomes the reference voltage Vref at time t2.

In the compensation period T _SET , the Y driver 14 sets the control signal G1-i to the L level, so that the transistor 212 is turned on and the driving transistor 210 functions as a diode as shown in FIG. At this time, the voltage Vg at the node A rises and converges to the voltage given by equation (1).
Vg = Vdd- | Vth | (1)
Note that the description of the transistor voltage is generally based on the source potential. Since the drive transistor 210 is a p-channel type, the threshold voltage Vth has a negative value. This is why the voltage Vg is expressed using the absolute value in the equation (1).

Since the threshold voltage Vth is at the boundary between the ON state and the OFF state of the driving transistor 210, when the voltage Vg asymptotically approaches Vdd− | Vth |, the current flowing through the driving transistor 210 gradually approaches zero. For this reason, the waveform of the voltage Vg becomes gentle as it approaches Vdd- | Vth |. Therefore, it is necessary to lengthen the compensation period T _SET so that the voltage Vg becomes sufficiently asymptotic to Vdd− | Vth |. In this example, since about 2H is assigned to the compensation period T _SET , it is possible to accurately perform threshold voltage compensation. In the period from time t3 to time t4, the Y driver 14 sets the scanning signal GSEL-i and the control signals G1-i and G2-i to the H level. Therefore, in the pixel circuit 200, as shown in FIG. 7, the transistors 211, 212, and 301 and the drive transistor 210 are all turned off, and the voltage of the node B is maintained at the reference voltage Vref, while the voltage of the node A The voltage Vg is maintained at Vdd- | Vth |.

The writing period _TWRT is from time t4 to time t5. In the writing period T _WRT , Y
The driver 14 sets the scanning signal GSEL-i to L level and controls signals G1-i and G
2-i is set to H level. Therefore, in the pixel circuit 200, as shown in FIG. 8, the transistor 301 is turned on, while the transistors 211 and 212 are turned off. Write period _TW
RT is set to be a part or all of the second half period T _B of one horizontal scanning period 1H.
In the writing period _TWRT , the X driver 16 supplies the data voltage Vdata corresponding to the gradation of the pixel in the i row and the j column to the data line 112 in the j column as the data signal Xj. As a result, the data voltage Vdata is taken into the capacitive element 302. At this time, the voltage Vb at the node B changes from the reference voltage Vref to the data voltage Vdata. Focusing on node A, transistor 212
Is off, and the input impedance of the gate of the driving transistor 210 is extremely high. Therefore, when the voltage Vb at the node B changes by ΔV, the voltage Vg at the node A changes by an amount corresponding to the voltage change ΔV at the node B distributed by the capacitance ratio between the capacitor 221 and other parasitic capacitances. The parasitic capacitance is configured by the gate input capacitance of the driving transistor 210 or the like. Specifically, when the capacitance value of the capacitor 221 is Cc and the capacitance value of the parasitic capacitance is Cx, the node A changes from the voltage Vdd− | Vth | by {ΔV · Cc / (Cc + Cx)}. Therefore, as a result, the voltage Vg of the node A can be expressed as in Expression (2).
Vg = Vdd- | Vth | -k (Vref-Vdata) (2)
However, k is a constant and k = Cc / (Cc + Cx)

After time t6 is a light emitting period _{T EL.} In the light emission period _TEL , the Y driver 14
The scanning signal GSEL-i and the control signal G1-i are set to the H level, and the control signal G2-i is set to the L level. In the pixel circuit 200, as shown in FIG. 9, since the transistors 301 and 212 are turned off, the voltage holding state in the capacitor 221 does not change. For this reason,
The voltage Vg at node A is maintained at the value given by equation (2). And the OLED element 23
At 0, a current I _EL corresponding to the voltage between the gate and the source of the drive transistor 210 flows through a path such as the feed line 114 → the drive transistor 210 → the transistor 211 → the OLED element 230 → the ground GND. Thus, the OLED element 230 causes the current I _EL
Continues to emit light at a brightness appropriate for.

In the light-emitting period _{T EL,} a current _{I EL} flowing to the OLED element 230 is determined by the voltage Vgs between the gate and source of the driving transistor 210 is given by the following equation (3).
I _EL = (β / 2) (Vgs−Vth) ²
= (Β / 2) (Vg−Vdd−Vth) ²
= (Β / 2) [{Vdd + Vth−k (Vref−Vdata)} − Vdd−Vth] ²
= (Β / 2) [k (Vref−Vdata)] ² (3)
Here, in the expressions (1) and (2), it is expressed as | Vth |. However, in the expression (3), the absolute value is removed and the driving current _IEL is described using “+ Vth”. In the description of the transistor voltage, the source potential is generally used as a reference. In this example, since the driving transistor 210 and the p-channel type are used, the threshold voltage Vth is a negative value. In Formula (3), “Vdd + V
The reason for “th” is that “+ Vth” is a negative value. As shown in Equation (3), OL
The current I _EL flowing through the ED element 230 is determined only by the difference between the data voltage Vdata and the reference voltage Vref without depending on the threshold voltage Vth of the drive transistor 210. As a result, luminance unevenness due to variations in threshold voltage Vth can be improved.

As described above, since the sample hold circuit 300 is provided on the input side of the pixel circuit 200, the voltage taken from the data line 112 can be held. For this reason, data line 1
12, even when the data signal Xj is generated by multiplexing the reference voltage Vref and the data voltage Vdata in one horizontal scanning period 1H and supplied to the data line 112, the compensation period T _SET is set to an arbitrary length. It becomes possible to do.

Furthermore, the voltage Vg at the node A changes during the writing period _TWRT by the amount corresponding to the voltage change ΔV at the node B distributed by the capacitance ratio between the capacitive element 221 and other parasitic capacitances. The distribution ratio k was “Cc / (Cc + Cx)”. On the other hand, in the conventional pixel circuit, a storage capacitor is connected to the gate of the driving transistor, and the differential voltage is stored in the storage capacitor. Also in this case, the voltage is distributed according to the capacity ratio. However, if the capacity value of the storage capacitor is Ca, the distribution ratio k is “Cc / (Ca + Cc + Cx)”. Therefore, it is necessary to increase the voltage change ΔV. On the other hand, in this embodiment, since it is not necessary to connect a storage capacitor to the gate of the drive transistor 210, the distribution ratio k can be increased. As a result, the power consumption of the X driver 14 can be reduced and the dynamic range can be narrowed. Furthermore, although the capacitive element 221 of this embodiment has a function of holding a voltage, the capacitance value Cc only needs to be approximately the same as the capacitance value Ca of the holding capacitor in the conventional pixel circuit.
As described above, in the pixel circuit of the present invention, the light emission luminance is determined by the difference between the reference voltage Vref and the data data voltage Vdata. Therefore, the input order of the reference voltage Vref and the data data voltage Vdata may be the reverse of the above description.

<Modification>
The present invention is not limited to the above-described embodiments, and various modifications can be made. Examples of these will be described below.
(1) Although the source follower is illustrated as an example of the buffer 303 in the above-described embodiment, the circuit configuration illustrated in FIG. Scan signal G _{SEL− is} stored in buffer 303.
_{When i} is supplied, the waveform of the scanning signal _GSEL-i is differentiated by a high-pass filter including a capacitor 314 and a resistor 315. Then, the transistor 312 is instantaneously turned on by the pulse P having a negative peak, and the charge accumulated in the capacitor 312 is discharged. As a result, the source potential of the transistor 311 is grounded. Thereafter, the source potential of the transistor 311 rises, and the reference voltage Vre taken in via the data line 112.
A voltage obtained by subtracting the threshold voltage of the transistor 311 from f or the data voltage Vdata is output. In such a configuration, the transistor 312 functions as a means for discharging the charge accumulated in the capacitor 312, and the capacitor 314 and the resistor 315 include the sample hold circuit 3.
It functions as means for generating a reset signal in synchronization with the 00 sample operation and supplying it to the gate of the transistor 312. In the source follower described above, it is necessary to pass a DC bias current, but this circuit configuration is not necessary. Therefore, power consumption can be reduced.

(2) In the above-described embodiment, the transistors 211, 212, and 301 and the drive transistor 210 are configured as a p-channel type, but may be configured as an n-channel type.
FIG. 11 shows a configuration of a pixel circuit 200 according to a modification. In this configuration example, the transistors 211n, 212n, and 301n, and the driving transistor 210n correspond to the transistors 211, 212, and 301, and the driving transistor 210, respectively. The Y driver 14 scan signals G _{SEL-1 to} G _SEL-3 that become active at the H level.
₆₀ , control signals G _{1-1 to} G _1-360 , and control signals G _{2-1 to} G _2-360 are generated and supplied to the pixel circuits 200.

<Electronic equipment>
Next, an electronic apparatus to which the light emitting device 10 according to the above-described embodiment is applied will be described. FIG. 12 shows a configuration of a mobile personal computer to which the light emitting device 10 is applied. The personal computer 2000 includes a light emitting device 10 as a display unit and a main body 2010.
Is provided. The main body 2010 is provided with a power switch 2001 and a keyboard 2002. Since the light emitting device 10 uses the OLED element 230, it is possible to display an easy-to-see screen with a wide viewing angle.
FIG. 13 shows a configuration of a mobile phone to which the light emitting device 10 is applied. A cellular phone 3000, a plurality of operation buttons 3001, scroll buttons 3002, and a light emitting device 10 as a display unit are provided. By operating the scroll button 3002, the light emitting device 10 is operated.
The screen displayed on is scrolled.
FIG. 14 shows a portable information terminal (PDA: Personal Digital Assista) to which the light emitting device 10 is applied.
nts). The portable information terminal 4000 includes a plurality of operation buttons 4001, a power switch 4002, and the light emitting device 10 as a display unit. Power switch 400
When 2 is operated, various types of information such as an address book and a schedule book are displayed on the light emitting device 10.
In addition, as an electronic device to which the light-emitting device 10 is applied, in addition to those shown in FIGS.
Digital still cameras, LCD TVs, viewfinder type, monitor direct-view type video tape recorders, car navigation devices, pagers, electronic notebooks, calculators, word processors, workstations, videophones, POS terminals, touch panel devices, etc. It is done. And the light-emitting device 10 mentioned above is applicable as a display part of these various electronic devices. In addition, it is not limited to the display unit of an electronic device that directly displays an image or a character, but is applied to an optical line head of a printing device that is used to indirectly form an image or a character by irradiating light to the photosensitive member. May be. Further, it may be a micro display formed on bulk silicon. In this case, since the high-definition pixel circuit 200 can be formed on bulk silicon, it can be applied to a viewfinder or the like in combination with an optical system.

It is a block diagram which shows the structure of the light-emitting device which concerns on embodiment of this invention. It is a circuit diagram which shows the structure of the pixel circuit of the light-emitting device. It is a circuit diagram which shows the structure of the buffer of the light-emitting device. It is a timing chart which shows operation | movement of the light-emitting device. It is operation | movement explanatory drawing of the pixel circuit. It is operation | movement explanatory drawing of the pixel circuit. It is operation | movement explanatory drawing of the pixel circuit. It is operation | movement explanatory drawing of the pixel circuit. It is operation | movement explanatory drawing of the pixel circuit. It is a circuit diagram which shows the structural example of the buffer which concerns on a modification. It is a circuit diagram which shows the structure of the pixel circuit which concerns on a modification. It is a figure which shows the personal computer using the light-emitting device. It is a figure which shows the mobile phone using the light-emitting device. It is a figure which shows the portable information terminal using the light-emitting device. It is a circuit diagram which shows the structure of the conventional pixel circuit. It is a timing chart which shows operation | movement of the conventional pixel circuit.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Light-emitting device, 12 ... Control circuit, 14 ... Y driver, 16 ... X driver, 102 ... Scan line, 104, 106 ... Control line, 112 ... Data line, 114 ... Feed line, 200 ... Pixel circuit, 210 ... Drive Transistor, 211, 212, 301 ... Transistor, 221 and 302
... capacitor element, 230 ... OLED element, 300 ... sample hold circuit, 303 ... buffer.

Claims (10)

A light emitting element that emits light according to a drive current;
A drive transistor for controlling the amount of the drive current flowing in the light emitting element;
First switching means provided in a path for supplying the drive current to the light emitting element;
Second switching means provided between the gate and drain of the driving transistor;
A first capacitive element having one end connected to the gate of the driving transistor;
A data signal in which the reference voltage is time-division multiplexed in the second period and the data voltage corresponding to the driving current is supplied in the first period, and the data signal is sampled and held in part or all of the first period. A sample and hold circuit that samples and holds part or all of the second period and supplies the sample to the other end of the first capacitor;
A pixel circuit comprising: The sample and hold circuit includes:
An impedance conversion circuit having an output terminal connected to the other end of the first capacitive element, an input impedance of high impedance, and an output impedance of low impedance;
A second capacitive element provided between an input terminal of the impedance conversion circuit and a fixed potential;
A third switching unit which is supplied with the data signal at one end and connected to the input terminal of the impedance conversion circuit at the other end and is turned on at a timing of sampling the data signal;
The pixel circuit according to claim 1, further comprising: The pixel circuit according to claim 2, wherein the impedance conversion circuit includes a source follower. The impedance conversion circuit is
A third capacitive element having one end connected to the first power source;
A transistor provided between the other end of the third capacitive element and the second power supply, the gate of which is connected to the input terminal of the impedance conversion circuit;
Resetting means for discharging the charge accumulated in the third capacitive element;
The pixel circuit according to claim 2, further comprising: The reset means includes
A resetting transistor provided between one end and the other end of the third capacitive element;
A reset pulse generation circuit that generates a reset signal in synchronization with the sample operation of the sample hold circuit and supplies the reset signal to the gate of the transistor;
The pixel circuit according to claim 4, further comprising: A plurality of scanning lines, a plurality of first control lines, a plurality of second control lines, a plurality of data lines, and a plurality of pixel circuits provided corresponding to intersections of the scanning lines and the data lines. A vertical scanning period composed of the horizontal scanning period is divided into a reset period, a compensation period, a writing period, and a light emitting period, and drives the plurality of pixel circuits,
Each of the plurality of pixel circuits is
A light emitting element that emits light according to a drive current;
A drive transistor for controlling the amount of the drive current flowing in the light emitting element;
A first switching means provided in a path for supplying the driving current to the light emitting element and controlled to be turned on / off based on a first control signal supplied via the first control line;
Second switching means provided between a gate and a drain of the driving transistor and controlled to be turned on and off based on a second control signal supplied via the second control line;
A first capacitive element having one end connected to the gate of the driving transistor;
Based on the scanning signal supplied through the scanning line, the data signal supplied through the data line is sampled and supplied to the other end of the first capacitor element during a period when the scanning signal is active. With a sample and hold circuit,
The first switching means is turned on in the reset period, the first switching means is turned off in the compensation period, the first switching means is turned off in the writing period, and the first switching means is turned on in the light emission period. First driving means for generating and supplying the first control signal for turning on the switching means to the first control line;
The second switching means is turned on in the reset period, the second switching means is turned on in the compensation period, the second switching means is turned off in the writing period, and the second switching means is turned on in the light emission period. Second driving means for generating the second control signal for turning off the switching means and supplying the second control signal to the second control line;
The reference voltage constituting the data signal is sampled in the sample period at the start of the compensation period, the reference voltage is held until the compensation period ends, and the data voltage constituting the data signal in the write period is Third driving means for generating and supplying the scanning signal for controlling the sample and hold circuit to sample and hold until the light emission period ends; and
With
The light emitting device according to claim 1, wherein the data signal is a signal configured by supplying the reference voltage and the data voltage in a time division manner.
One horizontal scanning period includes a first period in which the reference voltage is allocated and a second period in which the data voltage is allocated, and the writing period is a part of the second period in a predetermined horizontal scanning period or The light emitting device according to claim 6, wherein the light emitting device is set to all, and the sampling period is set to a part or all of the first period of a horizontal scanning period preceding the predetermined horizontal scanning period.   An electronic apparatus comprising the light-emitting device according to claim 6. A light-emitting element that emits light according to a drive current; a drive transistor that controls a current amount of the drive current that flows through the light-emitting element; and a first switching unit that is provided in a path for supplying the drive current to the light-emitting element; A second switching unit provided between a gate and a drain of the driving transistor; a first capacitance element having one end connected to the gate of the driving transistor; and a data voltage and a reference voltage corresponding to the driving current. A pixel circuit including a sample and hold circuit that, when a time-division multiplexed data signal is supplied via a data line, samples and holds the data signal at a predetermined timing and supplies the data signal to the other end of the first capacitor element A driving method of a pixel circuit that is divided into a reset period, a compensation period, a writing period, and a light emission period,
In the reset period, the first switching means and the second switching means are turned on,
Controlling the sample and hold circuit to sample the reference voltage of the data signal in a sample period at the start of the compensation period and hold the reference voltage until the end of the compensation period;
In the compensation period, the first switching means is turned off, the second switching means is turned on,
In the writing period, the sample and hold circuit is controlled so as to sample and hold the data voltage of the data signal, and the first switching means and the second switching means
Turn off the switching means,
In the light emission period, the first switching means is turned on and the second switching means is turned off.
A driving method of a pixel circuit. One horizontal scanning period includes a first period in which the reference voltage is assigned and a second period in which the data voltage is assigned,
The writing period is set to a part or all of the second period in a predetermined horizontal scanning period,
Setting the sample period to a part or all of the first period of a horizontal scanning period preceding the predetermined horizontal scanning period;
The pixel circuit driving method according to claim 9.

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