CN112164375B - Pixel compensation circuit, driving method thereof and display device - Google Patents

Pixel compensation circuit, driving method thereof and display device Download PDF

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Publication number
CN112164375B
CN112164375B CN202011084177.6A CN202011084177A CN112164375B CN 112164375 B CN112164375 B CN 112164375B CN 202011084177 A CN202011084177 A CN 202011084177A CN 112164375 B CN112164375 B CN 112164375B
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signal line
node
electrically connected
voltage
reset
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CN112164375A (en
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翁祖伟
翁彬
黄宇鹏
刘葆
黄巧红
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BOE Technology Group Co Ltd
Fuzhou BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Fuzhou BOE Optoelectronics Technology Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0233Improving the luminance or brightness uniformity across the screen

Abstract

The invention provides a pixel compensation circuit, a driving method thereof and a display device, and relates to the technical field of display. The circuit includes: a light emitting element; the driving module is electrically connected with the first node, the second node and the third node; the first reset module is electrically connected with the reset signal line, the first node and the initial signal line, and the second reset module is electrically connected with the reset signal line, the second node and the third node; the input control module is electrically connected with the scanning signal line, the data signal line and the fourth node; and the first light-emitting control module is electrically connected with the light-emitting control signal line, the second power signal line and the third node, the second light-emitting control module is electrically connected with the light-emitting control signal line, the first node and the fourth node, and the first node is electrically connected with the anode. The invention is suitable for manufacturing the pixel compensation circuit.

Description

Pixel compensation circuit, driving method thereof and display device
Technical Field
The invention relates to the technical field of display, in particular to a pixel compensation circuit, a driving method thereof and a display device.
Background
The OLED (Organic Light Emitting Diode) display device has the advantages of wide color gamut, high contrast, energy saving, foldability, etc., and has strong competitiveness in various display devices. Among them, the AMOLED (Active-Matrix Organic Light Emitting Diode) display device is one of the major development directions in the OLED display device.
Fig. 1 illustrates a pixel compensation circuit of an AMOLED display device in the related art, which includes a switching transistor T1, a driving transistor T2, a storage capacitor C1, and a light emitting element OLED. The driving current of the light emitting element OLED is controlled by the driving transistor T2, and the current magnitude is: i is OLED =k(Vgs-Vth) 2 Where the constant k is the current amplification factor of the driving transistor T2, vgs is the voltage difference between the gate and the source of the driving transistor T2, and Vth is the threshold voltage of the driving transistor T2. Since the threshold voltage Vth of the driving transistor T2 is easily shifted and cannot compensate for the power IR drop (IR drop), the driving current I of the light emitting element is caused OLED Unstable, thereby reducing the brightness uniformity of the light emitting device and further reducing the display effect.
At present, it is necessary to design a pixel compensation circuit to solve the above problems.
Disclosure of Invention
Embodiments of the present invention provide a pixel compensation circuit, a driving method thereof, and a display device, wherein the pixel compensation circuit can eliminate the luminance non-uniformity of a light emitting element caused by Vth shift, thereby improving the display effect.
In order to achieve the above purpose, the embodiment of the invention adopts the following technical scheme:
in one aspect, a pixel compensation circuit is provided, the circuit comprising:
and a light emitting element having an anode electrically connected to the first node and a cathode electrically connected to the first power signal line.
And the driving module is electrically connected with the first node, the second node and the third node, and is configured to conduct a path between the first node and the third node under the control of the voltage of the second node and enable the path to generate a current for enabling the light-emitting element to emit light.
The reset module comprises a first reset module and a second reset module, the first reset module is electrically connected with a reset signal line, the first node and an initial signal line, and the second reset module is electrically connected with the reset signal line, the second node and the third node; the first reset module is configured to write an initial signal of the initial signal line to the first node under control of a reset signal of the reset signal line; the second reset module is configured to write a voltage of the third node to the second node under control of a reset signal of the reset signal line.
The input control module is electrically connected with a scanning signal line, a data signal line and a fourth node and is configured to write a data signal of the data signal line into the fourth node under the control of a scanning signal of the scanning signal line.
A light emission control module including a first light emission control module and a second light emission control module, the first light emission control module being electrically connected to a light emission control signal line, a second power signal line, and the third node, the second light emission control module being electrically connected to the light emission control signal line, the first node, and the fourth node, the first node being electrically connected to the anode; the first and second light emission control modules are respectively configured to transmit a current for causing the light emitting element to emit light to the anode under control of a light emission control signal of the light emission control signal line.
Optionally, the driving module includes a driving transistor and a storage capacitor; the grid electrode of the driving transistor is electrically connected with the second node, the first pole of the driving transistor is electrically connected with the third node, and the second pole of the driving transistor is electrically connected with the first node; the first end of the storage capacitor is electrically connected with the fourth node, and the second end of the storage capacitor is electrically connected with the second node.
Optionally, the first reset module includes a first switching transistor, and the second reset module includes a second switching transistor; the grid electrode of the first switching transistor is electrically connected with the reset signal line, the first pole of the first switching transistor is electrically connected with the first node, and the second pole of the first switching transistor is electrically connected with the initial signal line; the gate of the second switching transistor is electrically connected to the reset signal line, the first pole is electrically connected to the second node, and the second pole is electrically connected to the third node.
Optionally, the first light-emitting control module includes a third switching transistor, and the second light-emitting control module includes a fourth switching transistor; a gate of the third switching transistor is electrically connected to the light emission control signal line, a first pole is electrically connected to the second power signal line, and a second pole is electrically connected to the third node; the grid electrode of the fourth switching transistor is electrically connected with the light-emitting control signal line, the first electrode of the fourth switching transistor is electrically connected with the fourth node, and the second electrode of the fourth switching transistor is electrically connected with the first node.
Optionally, the input control module includes a fifth switching transistor, a gate of the fifth switching transistor is electrically connected to the scan signal line, a first pole of the fifth switching transistor is electrically connected to the data signal line, and a second pole of the fifth switching transistor is electrically connected to the fourth node.
Optionally, the first reset module includes a first switching transistor, and the second reset module includes a second switching transistor; the first light emitting control module comprises a third switching transistor, and the second light emitting control module comprises a fourth switching transistor; the driving module comprises a driving transistor; the input control module includes a fifth switching transistor.
The first switch transistor, the second switch transistor, the third switch transistor, the fourth switch transistor, the fifth switch transistor and the driving transistor are all N-type transistors.
The voltage of the initial signal line is greater than the voltage of the data signal line; the voltage difference between the voltage of the second power supply signal line and the initial signal line is greater than the threshold voltage of the driving transistor.
Optionally, a voltage of the first power signal line is a negative voltage, and a voltage of the second power signal line is a positive voltage; the voltage of the initial signal line is a positive voltage, and the voltage of the data signal line is a positive voltage.
An embodiment of the present invention provides a pixel compensation circuit, including: and a light emitting element having an anode electrically connected to the first node and a cathode electrically connected to the first power signal line. And the driving module is electrically connected with the first node, the second node and the third node, and is configured to conduct a path between the first node and the third node under the control of the voltage of the second node and enable the path to generate a current for enabling the light-emitting element to emit light. The reset module comprises a first reset module and a second reset module, the first reset module is electrically connected with a reset signal line, the first node and an initial signal line, and the second reset module is electrically connected with the reset signal line, the second node and the third node; the first reset module is configured to write an initial signal of the initial signal line to the first node under control of a reset signal of the reset signal line; the second reset module is configured to write a voltage of the third node to the second node under control of a reset signal of the reset signal line. The input control module is electrically connected with a scanning signal line, a data signal line and a fourth node and is configured to write a data signal of the data signal line into the fourth node under the control of a scanning signal of the scanning signal line. A light emission control module including a first light emission control module and a second light emission control module, the first light emission control module being electrically connected to a light emission control signal line, a second power signal line, and the third node, the second light emission control module being electrically connected to the light emission control signal line, the first node, and the fourth node, the first node being electrically connected to the anode; the first and second light emission control modules are respectively configured to transmit a current for causing the light emitting element to emit light to the anode under control of a light emission control signal of the light emission control signal line.
When the light-emitting element emits light, the driving current for driving the light-emitting element to emit light is not influenced by the threshold voltage of the driving transistor through the mutual matching of the driving module, the resetting module, the light-emitting control module and the input module, so that the phenomenon of uneven brightness of the light-emitting element caused by Vth drift can be eliminated, and the display effect is improved. Furthermore, when the light-emitting element emits light, the modules are matched with the light-emitting element, so that the IR voltage drop of the initial signal line is small, the influence of the IR voltage drop of the initial signal line on the light-emitting brightness of the light-emitting element is improved, and the display effect is improved.
In another aspect, there is provided a display device including: a pixel compensation circuit as described above. The display device has the characteristics of good uniformity of picture brightness, good display effect and high product quality.
In still another aspect, a driving method of a pixel compensation circuit is provided, the method including:
in the first stage, an initial signal is input to the initial signal line, a first reset signal is input to the reset signal line, a first scan signal is input to the scan signal line, a data signal is input to the data signal line, a first power supply signal is input to the first power supply signal line, a second power supply signal is input to the second power supply signal line, and a first light emission control signal is input to the light emission control signal line.
In a second stage, the initialization signal is input to the initialization signal line, the first reset signal is input to the reset signal line, the second scan signal is input to the scan signal line, the data signal is input to the data signal line, the first power supply signal is input to the first power supply signal line, the second power supply signal is input to the second power supply signal line, and the second emission control signal is input to the emission control signal line.
A third stage of inputting the initial signal to the initial signal line, inputting the second reset signal to the reset signal line, inputting the first scan signal to the scan signal line, inputting the data signal to the data signal line, inputting the first power supply signal to the first power supply signal line, inputting the second power supply signal to the second power supply signal line, and inputting the first light emission control signal to the light emission control signal line.
Optionally, the first reset module includes a first switch transistor, the second reset module includes a second switch transistor, the first lighting control module includes a third switch transistor, the second lighting control module includes a fourth switch transistor, the drive module includes a drive transistor, the input control module includes a fifth switch transistor, just the first switch transistor, the second switch transistor, the third switch transistor, the fourth switch transistor, the fifth switch transistor and the drive transistor are N-type transistors.
The voltage of the initial signal line is greater than the voltage of the data signal line; the voltage difference between the voltage of the second power supply signal line and the initial signal line is greater than the threshold voltage of the driving transistor.
The voltage of the first reset signal is greater than the voltage of the second reset signal; the voltage of the first scanning signal is less than that of the second scanning signal; the voltage of the first light emission control signal is greater than the voltage of the second light emission control signal.
The embodiment of the invention provides a driving method, by which a pixel compensation circuit can drive a light emitting diode to emit light; the driving method has simple driving time sequence and is easy to realize.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a schematic diagram of a pixel compensation circuit according to a related art embodiment of the present invention;
FIG. 2 is a schematic diagram of a pixel compensation circuit according to an embodiment of the present invention;
FIG. 3 is a driving timing diagram of the pixel compensation circuit of FIG. 2;
FIGS. 4 to 6 are schematic driving diagrams of the pixel compensation circuit of FIG. 2 at the driving timing of FIG. 3;
fig. 7 is a flowchart illustrating a driving method of a pixel compensation circuit according to an embodiment of the invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the embodiments of the present invention, the terms "first", "second", "third", "fourth", "fifth", and the like are used for distinguishing the same or similar items with substantially the same functions and actions, and are used only for clearly describing technical solutions of the embodiments of the present invention, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features.
In the embodiment of the present invention, since the source and the drain of the switching transistor are symmetrical, the source and the drain thereof may be interchanged. In the embodiments of the present disclosure, one of the source and the drain of the switching transistor is referred to as a first pole, and the other of the source and the drain is referred to as a second pole.
In embodiments of the present invention, the term "electrically connected" may mean that two components are directly electrically connected, or may mean that two components are electrically connected via one or more other components.
An embodiment of the present invention provides a pixel compensation circuit, referring to fig. 2, including:
in the light emitting element 1, the anode of the light emitting element 1 is electrically connected to the first node n1, and the cathode of the light emitting element 1 is electrically connected to the first power signal line ELVSS. The light-emitting element may be any light-emitting element driven with a current; for example: organic Light Emitting Diodes (OLEDs).
And a driving module 2 electrically connected to the first node n1, the second node n2 and the third node n3, and configured to turn on a path between the first node n1 and the third node n3 under the control of the voltage of the second node n2, and generate a current for causing the light emitting element 1 to emit light in the path.
The Reset module comprises a first Reset module 3 and a second Reset module 4, the first Reset module 3 is electrically connected with a Reset signal line Reset line, a first node n1 and an initial signal line Vinit line, and the second Reset module 4 is electrically connected with the Reset signal line Reset line, a second node n2 and a third node n3; the first Reset module 3 is configured to write an initial signal of an initial signal line Vinit into the first node n1 under the control of a Reset signal line Reset line; the second Reset module 4 is configured to write the voltage of the third node n3 into the second node n2 under the control of a Reset signal line Reset line.
And the input control module 5 is electrically connected with the scanning signal line Scan line, the Data signal line Data line and the fourth node n4, and is configured to write the Data signal of the Data signal line Data line into the fourth node n4 under the control of the scanning signal line Scan line.
A light emission control module 6 including a first light emission control module 61 and a second light emission control module 62, the first light emission control module 61 being electrically connected to the light emission control signal line EM, the second power signal line ELVDD, and the third node n3, the second light emission control module 62 being electrically connected to the light emission control signal line EM, the first node n1, and the fourth node n4, the first node n1 being electrically connected to the anode of the light emitting element 1; the first light emission control module and the second light emission control module are respectively configured to transmit a current for causing the light emitting element 1 to emit light to an anode of the light emitting element under the control of a light emission control signal of the light emission control signal line EM.
The specific circuit structure of the driving module, the reset module, the input control module and the light-emitting control module is not limited, and the driving module, the reset module, the input control module and the light-emitting control module can meet corresponding functions.
The first node, the second node, the third node, and the fourth node are defined only for convenience of describing a circuit configuration, and the first node, the second node, the third node, and the fourth node are not an actual circuit unit.
Through the mutual cooperation of the driving module, the reset module, the light-emitting control module and the input module, the driving current for driving the light-emitting element to emit light is not influenced by the threshold voltage of the driving transistor, so that the problem of uneven light-emitting brightness caused by unstable threshold voltage is solved, and the display effect is improved. Furthermore, when the light-emitting element emits light, the modules are matched with the light-emitting element, so that the IR voltage drop of the initial signal line is small, the influence of the IR voltage drop of the initial signal line on the light-emitting brightness of the light-emitting element is improved, and the display effect is improved.
Optionally, referring to fig. 2, the driving module 2 includes a driving transistor DTFT, a gate (g) of the driving transistor DTFT is electrically connected to the second node n2, the first pole is electrically connected to the third node n3, and the second pole is electrically connected to the first node n1; the driving module further comprises a storage capacitor C1; a first end of the storage capacitor is electrically connected to the fourth node n4, and a second end of the storage capacitor C1 is electrically connected to the second node n2.
The first electrode of the driving transistor DTFT is a drain electrode (d), and the second electrode is a source electrode(s). A second terminal of the storage capacitor is electrically connected to a gate (g) of the driving transistor DTFT through a second node n2.
Alternatively, referring to fig. 2, the first reset module includes a first switching transistor T1, and the second reset module includes a second switching transistor T2; the grid electrode of the first switching transistor T1 is electrically connected with a Reset signal line Reset, the first pole is electrically connected with a first node n1, and the second pole is electrically connected with an initial signal line Vinit; the gate of the second switching transistor T2 is electrically connected to the Reset signal line Reset line, the first pole is electrically connected to the second node n2, and the second pole is electrically connected to the third node n3.
Alternatively, referring to fig. 2, the first lighting control module 61 includes a third switching transistor T3, and the second lighting control module 62 includes a fourth switching transistor T4; a gate of the third switching transistor T3 is electrically connected to the emission control signal line EM, the first pole is electrically connected to the second power signal line ELVDD, and the second pole is electrically connected to the third node n3; the gate of the fourth switching transistor T4 is electrically connected to the emission control signal line EM, the first pole is electrically connected to the fourth node n4, and the second pole is electrically connected to the first node n1.
Optionally, referring to fig. 2, the input control module 5 includes a fifth switching transistor T5, a gate of the fifth switching transistor T5 is electrically connected to the Scan signal line Scan line, the first pole is electrically connected to the Data signal line Data line, and the second pole is electrically connected to the fourth node n4.
Alternatively, referring to fig. 2, the first reset module 3 includes a first switching transistor T1, and the second reset module 4 includes a second switching transistor T2; the first light-emitting control module comprises a third switching transistor T3, and the second light-emitting control module comprises a fourth switching transistor T4; the driving module comprises a driving transistor DTFT; the input control module comprises a fifth switching transistor T5.
Preferably, in order to make the manufacturing process uniform and facilitate a driving method of a subsequent circuit to be simpler, the first switching transistor, the second switching transistor, the third switching transistor, the fourth switching transistor, the fifth switching transistor and the driving transistor are all N-type transistors.
Of course, all the transistors may be P-type transistors, and the design principle of the transistors in the case of P-type transistors is similar to that of the present invention, and also falls within the protection scope of the present invention.
The transistors may be thin film transistors or metal oxide semiconductor field effect transistors, and are not limited thereto.
In the case where all the transistors are N-type transistors, the voltage supplied from the initial signal line is greater than the voltage supplied from the data signal line; the voltage difference between the voltage provided by the second power supply signal line and the voltage provided by the initial signal line is greater than the threshold voltage of the driving transistor.
Further optionally, in the case that all the transistors are N-type transistors, the first power supply signal line is a negative power supply line, the supplied voltage is a negative voltage, the second power supply signal line is a positive power supply line, and the supplied voltage is a positive voltage; the voltage of the initial signal line is a positive voltage, the voltage of the data signal line is a positive voltage, and the voltage provided by the initial signal line is greater than the voltage provided by the data signal line.
If the pixel driving circuit is applied to an OLED display panel, the light emitting element is an organic light emitting diode. If the pixel driving circuit is applied to a Mini LED display panel or a Micro LED display panel, the light emitting element tube is a Mini LED or a Micro LED.
Taking the first switching transistor, the second switching transistor, the third switching transistor, the fourth switching transistor, the fifth switching transistor and the driving transistor as an example, the process and the principle of the pixel compensation circuit provided by this embodiment for driving the light emitting element in the OLED pixel to emit light will be described in detail with reference to the timing sequence of the input of each signal line in this case. In fig. 4 to 6, the transistor is off and the light-emitting element emits no light, which are marked by "x".
Fig. 3 shows a timing chart of each signal line in one light-emitting period.
In the initialization stage, i.e., the t1 stage in fig. 3, high level signals are input to the second power supply signal line ELVDD, the initialization signal line Vinit line, the Data signal line Data line, the Reset signal line Reset line, and the emission control signal line EM, and low level signals are input to the first power supply signal line ELVSS line and the Scan signal line Scan line. At this time, referring to fig. 4, the first, second, third and fourth switching transistors T1, T2, T3 and T4 are all turned on, the fifth switching transistor T5 is turned off, and the driving transistor DTFT is turned off. Since the first switching transistor T1 and the fourth switching transistor T4 are turned on, a signal of the initial signal line Vinit can be written into the first node and the fourth node, both voltages of which are Vvinit; since the second and third switching transistors T2 and T3 are turned on, the signal of the second power signal line ELVDD may be written in the third and second nodes n3 and n2, and the voltages of the third and second nodes n3 and n2 are both V ELVDD
In the Data input and compensation stage, i.e., the t2 stage in fig. 3, a high level signal is input to the second power signal line ELVDD line, the initial signal line Vinit line, the Data signal line Data line Reset signal line Reset line, and the Scan signal line Scan line, and a low level signal is input to the first power signal line ELVSS line and the emission control signal line EM line. At this time, referring to fig. 5, the first, second and fifth switching transistors T1, T2 and T5 are all turned on, and the third and fourth switching transistors T3 and T4 are all turned off. Since the fourth switching transistor T4 is turned off, the first switching transistor T1 and the fifth switching transistor T5 are turned on, the voltage of the first node n1 is still Vvinit, the voltage of the fourth node n4 becomes Vdata, and the voltages of the third node n3 and the second node n2 are maintained at V at the T1 stage first ELVDD (ii) a At this time, vgs of the driving transistor DTFT (between the gate and the source of the driving transistor DTFT)Voltage difference) of the second node n2 and the first node n1, i.e., vgs = V ELVDD -Vvinit. Since the voltage difference of the second power supply signal line and the initial signal line is set to be greater than the threshold voltage (Vth) of the driving transistor, i.e., vgs = V ELVDD Vvinit > Vth, so the drive transistor DTFT is turned on. After the driving transistor DTFT is turned on, the charges stored in the storage capacitor C1 start to be discharged onto the initial signal line Vinit along a path of the second node n2, the driving transistor DTFT and the first node n1 until Vgs = Vvinit + Vth and the driving transistor DTFT is turned off when the voltages of the second node n2 and the third node n3 are both Vvinit + Vth.
In a light emitting phase, i.e., a t3 phase in fig. 3, a high level signal is input to the second power signal line ELVDD line initial signal line Vinit line, the Data signal line Data line, and the light emission control signal line EM line, and a low level signal is input to the first power signal line ELVSS line, the Reset signal line Reset line, and the Scan signal line Scan line. At this time, referring to fig. 6, the first, second, and fifth switching transistors T1, T2, and T5 are all turned off, and the third, fourth, and driving transistors T3, T4, and DTFT are all turned on. The voltages of the first node n1 and the fourth node n4 are both the voltage Vanode of the anode of the light emitting element; the voltage of the third node n3 is V ELVDD . Because the voltage difference between the two ends of the storage capacitor can not change suddenly, in the stage t2, the voltage of the second node n2 is Vvinit + Vth, the voltage of the fourth node n4 becomes Vdata, in the stage t2, the voltage difference between the two ends of the storage capacitor is Vvinit + Vth-Vdata, and in the stage t3, the voltage difference between the two ends of the storage capacitor is Vvinit + Vth-Vdata. Since the voltage of the fourth node n4 is Vanode, the voltage of the second node n2 is Vvinit + Vth-Vdata + Vanode. At this time, vgs = Vvinit + Vth-Vdata + Vanode-Vanode = Vvinit + Vth-Vdata of the driving transistor DTFT. Since the voltage of the initial signal line is set to be higher than the voltage of the data signal line, vgs = Vvinit + Vth-Vdata > Vth, the driving transistor DTFT is turned on, the second electrode of the driving transistor DTFT is turned on with the anode of the light emitting element, and the driving transistor DTFT outputs a driving current to cause the light emitting element to emit light.
The driving current of the driving transistor can be expressed by the following formula (1):
Figure BDA0002719763340000101
where Cox is the channel capacitance per unit area of the drive transistor DTFT; u is the channel mobility; w is the channel width; l is the channel length.
As is clear from the analysis of the driving principle of the light-emitting phase, vgs = Vvinit + Vth-Vdata, and by substituting this formula into formula (1), a formula of a current passing through the light-emitting element can be obtained as shown in the following formula (2):
Figure BDA0002719763340000102
as can be seen from the above equation (2), the driving current for driving the light emitting element to emit light is independent of the threshold voltage Vth of the driving transistor DTFT, so that the luminance unevenness of the light emitting element due to the shift of the threshold voltage Vth can be eliminated by using this circuit, and the display effect can be improved. Further, in the light emitting stage of the light emitting element, the first switching transistor T1 is turned off, the current passing through the Vinit line is almost zero, and the IR Drop of the Vinit line is small, so that the problem of non-uniform light emission caused by the IR Drop can be avoided, and the uniformity of the luminance of the light emitting element can be further improved. Still further, the pixel compensation circuit provided by the embodiment uses fewer transistors, and the driving timing sequence is simple and easy to implement.
It should be noted that, in order to simplify the driving timing, the driving timing signals of the first power signal line ELVSS, the second power signal line ELVDD, the initial signal line Vinit, and the Data signal line Data provided in this embodiment are only one of the driving timing signals, and in practical application, the driving timing signals may be driving signals at other timings. For example: at the T1 and T3 stages as shown in fig. 3, since the fifth switching transistor T5 is turned off, the signal of the Data signal line Data line may be at a high level or a low level; at the T2 stage as shown in fig. 3, since the third switching transistor T3 is turned off, the second power signal line ELVDD line may be at a high level or a low level; in the T3 stage shown in fig. 3, since the first switching transistor T1 is turned off, the initial signal line Vinit may be at a high level or a low level.
It should be further noted that, each transistor provided in this embodiment is not limited to an N-type transistor, and in practical application, each transistor may also be a P-type transistor.
The embodiment of the invention also provides a display device which comprises the pixel compensation circuit of the first embodiment.
The display device may be a flexible display device (also referred to as a flexible screen) or a rigid display device (i.e., a display screen that cannot be bent), which is not limited herein.
The display device may be an OLED (Organic Light-Emitting Diode) display device, a Micro LED display device or a Mini LED display device, and any product or component having a display function, such as a television, a digital camera, a mobile phone, and a tablet computer, including the display devices.
The display device has the characteristics of good uniformity of picture brightness, good display effect and high product quality.
An embodiment of the present invention further provides a driving method of a pixel compensation circuit, which refers to a flowchart shown in fig. 7, and the method includes:
s901, a first stage t1 (i.e., an initialization stage) of inputting an initial signal to an initial signal line Vinit, inputting a first Reset signal to a Reset signal line Reset, inputting a first Scan signal to a Scan signal line Scan, inputting a Data signal to a Data signal line Data, inputting a first power supply signal to a first power supply signal line ELVSS, inputting a second power supply signal to a second power supply signal line ELVDD, and inputting a first emission control signal to an emission control signal line EM.
Referring to fig. 4, the first, second, third and fourth switching transistors T1, T2, T3 and T4 are all turned on, the fifth switching transistor T5 is turned off, and the driving transistor DTFT is turned off. The voltages of the first node and the fourth node are both Vvinit; the voltages of the third node n3 and the second node n2 are both V ELVDD
S902, a second stage t2 (i.e., a Data input and compensation stage), an initial signal is input to the initial signal line Vinit, a first Reset signal is input to the Reset signal line Reset, a second Scan signal is input to the Scan signal line Scan, a Data signal is input to the Data signal line Data, a first power supply signal is input to the first power supply signal line ELVSS, a second power supply signal is input to the second power supply signal line ELVDD, and a second emission control signal is input to the emission control signal line EM.
Referring to fig. 5, the first, second, and fifth switching transistors T1, T2, and T5 are all turned on, and the third and fourth switching transistors T3 and T4 are all turned off. The voltage of the first node n1 is still Vvinit, the voltage of the fourth node n4 is Vdata, and the voltages of the third node n3 and the second node n2 are maintained at V in the t1 phase ELVDD (ii) a Vgs = V of drive transistor DTFT ELVDD -Vvinit. Since the voltage difference of the second power supply signal line and the initial signal line is set to be greater than the threshold voltage (Vth) of the driving transistor, i.e., vgs = V ELVDD Vvinit > Vth, so the drive transistor DTFT is turned on. After the driving transistor DTFT is turned on, the charges stored in the storage capacitor C1 start to be discharged onto the initial signal line Vinit along a path of the second node n2, the driving transistor DTFT and the first node n1 until Vgs = Vvinit + Vth and the driving transistor DTFT is turned off when the voltages of the second node n2 and the third node n3 are both Vvinit + Vth.
In S903 and the third stage t3 (i.e., the light emission stage), an initial signal is input to the initial signal line Vinit, a second Reset signal is input to the Reset signal line Reset, a first Scan signal is input to the Scan signal line Scan, a Data signal is input to the Data signal line Data, a first power supply signal is input to the first power supply signal line ELVSS, a second power supply signal is input to the second power supply signal line ELVDD, and a first light emission control signal is input to the light emission control signal line EM.
Referring to fig. 6, the first, second and fifth switching transistors T1, T2 and T5 are all turned off, and the third, fourth and driving transistors T3 and T4 and T5 are all turned offDTFTs are all on. The voltages of the first node n1 and the fourth node n4 are both the voltage Vanode of the anode of the light emitting element; the voltage of the third node n3 is V ELVDD . Because the voltage difference between the two ends of the storage capacitor cannot change suddenly, in the stage t2, the voltage difference between the two ends of the storage capacitor is Vvinit + Vth-Vdata, and according to the voltage difference, the voltage of the second node n2 is Vvinit + Vth-Vdata + Vanode, and Vgs = Vvinit + Vth-Vdata + Vanode = Vvinit + Vth-Vdata of the driving transistor DTFT. Since the voltage of the initial signal line is set to be higher than the voltage of the data signal line, vgs = Vvinit + Vth-Vdata > Vth, the driving transistor DTFT is turned on, the second electrode of the driving transistor DTFT is turned on with the anode of the light emitting element, and the driving transistor DTFT outputs a driving current to cause the light emitting element to emit light.
The driving current of the driving transistor can be expressed by the following formula (1):
Figure BDA0002719763340000131
where Cox is the channel capacitance per unit area of the drive transistor DTFT; u is the channel mobility; w is the channel width; l is the channel length.
As is clear from the analysis of the driving principle of the emission phase, vgs = Vvinit + Vth-Vdata, and by substituting this equation into equation (1), a current equation passing through the light emitting element can be obtained as the following equation (2):
Figure BDA0002719763340000132
as can be seen from the above equation (2), the driving current for driving the light emitting element to emit light is independent of the threshold voltage Vth of the driving transistor DTFT, so that the luminance unevenness of the light emitting element due to the shift of the threshold voltage Vth can be eliminated by using this circuit, and the display effect can be improved. Furthermore, since the first switching transistor T1 is turned off during the light emitting period of the light emitting element, the current passing through the Vinit line is almost zero, and the IR Drop of the Vinit line is small, the problem of non-uniform light emission caused by the IR Drop can be avoided, and the uniformity of the luminance of the light emitting element can be further improved. Still further, the driving method of the pixel compensation circuit provided by the embodiment has a simple driving time sequence and is easy to implement.
In an implementation manner of this embodiment, the first reset module includes a first switch transistor, the second reset module includes a second switch transistor, the first light-emitting control module includes a third switch transistor, the second light-emitting control module includes a fourth switch transistor, the driving module includes a driving transistor, the input control module includes a fifth switch transistor, and the first switch transistor, the second switch transistor, the third switch transistor, the fourth switch transistor, the fifth switch transistor and the driving transistor are all N-type transistors.
The voltage of the initial signal line is greater than that of the data signal line; the voltage difference between the voltage of the second power supply signal line and the initial signal line is greater than the threshold voltage of the driving transistor;
the voltage of the first reset signal is greater than that of the second reset signal; the voltage of the first scanning signal is less than that of the second scanning signal; the voltage of the first light emission control signal is greater than the voltage of the second light emission control signal.
Specifically, the specific working process and principle of the driving method of the pixel compensation circuit provided in this example may refer to the description of the foregoing embodiments, and details are not repeated here.
The embodiment of the invention provides a driving method, by which the pixel compensation circuit in the first embodiment can drive the light emitting diode to emit light; the driving method has simple driving time sequence and is easy to realize.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily think of the changes or substitutions within the technical scope of the present invention, and shall cover the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.

Claims (9)

1. A pixel compensation circuit, comprising:
a light emitting element having an anode electrically connected to the first node and a cathode electrically connected to the first power signal line;
a driving module including a driving transistor and a storage capacitor, wherein a gate of the driving transistor is electrically connected to a second node, a first pole of the driving transistor is electrically connected to a third node, a second pole of the driving transistor is electrically connected to the first node, a first end of the storage capacitor is electrically connected to a fourth node, a second end of the storage capacitor is electrically connected to the second node, the driving transistor is configured to be turned on in a second phase to write a threshold voltage of the driving transistor and a voltage of the first node into the second node, and a path between the first node and the third node is turned on under control of the voltage of the second node in a third phase, and a current for causing the light emitting element to emit light is generated in the path;
the reset module comprises a first reset module and a second reset module, the first reset module is electrically connected with a reset signal line, the first node and an initial signal line, and the second reset module is electrically connected with the reset signal line, the second node and the third node; the first reset module is configured to write an initial signal of the initial signal line to the first node and a fourth node under control of a reset signal of the reset signal line in a first phase; the second reset module is configured to write a voltage of the third node to the second node under control of a reset signal of the reset signal line in the first phase;
an input control module electrically connected to a scan signal line, a data signal line, and a fourth node, and configured to write a data signal of the data signal line into the fourth node under control of a scan signal of the scan signal line in the second stage;
a light emission control module including a first light emission control module and a second light emission control module, the first light emission control module being electrically connected to a light emission control signal line, a second power signal line, and the third node, the second light emission control module being electrically connected to the light emission control signal line, the first node, and the fourth node, the first node being electrically connected to the anode; the first light emission control module is configured to write a voltage of the fourth node to the first node under control of a light emission control signal of the light emission control signal line in the third stage, and the second light emission control module is configured to transmit a current for causing the light emitting element to emit light to the anode under control of the light emission control signal line in the third stage;
the first stage, the second stage and the third stage are three stages which are sequentially arranged according to time sequence.
2. The pixel compensation circuit of claim 1, wherein the first reset module comprises a first switching transistor and the second reset module comprises a second switching transistor; the grid electrode of the first switch transistor is electrically connected with the reset signal line, the first pole of the first switch transistor is electrically connected with the first node, and the second pole of the first switch transistor is electrically connected with the initial signal line; the gate of the second switching transistor is electrically connected to the reset signal line, the first pole is electrically connected to the second node, and the second pole is electrically connected to the third node.
3. The pixel compensation circuit of claim 1, wherein the first light emission control module comprises a third switching transistor and the second light emission control module comprises a fourth switching transistor; a gate of the third switching transistor is electrically connected to the light emission control signal line, a first pole is electrically connected to the second power signal line, and a second pole is electrically connected to the third node; the grid electrode of the fourth switching transistor is electrically connected with the light-emitting control signal line, the first electrode of the fourth switching transistor is electrically connected with the fourth node, and the second electrode of the fourth switching transistor is electrically connected with the first node.
4. The pixel compensation circuit of claim 1, wherein the input control module comprises a fifth switching transistor, a gate of the fifth switching transistor is electrically connected to the scan signal line, a first pole of the fifth switching transistor is electrically connected to the data signal line, and a second pole of the fifth switching transistor is electrically connected to the fourth node.
5. The pixel compensation circuit of any of claims 1-4, wherein the first reset block comprises a first switching transistor and the second reset block comprises a second switching transistor; the first light emitting control module comprises a third switching transistor, and the second light emitting control module comprises a fourth switching transistor; the driving module comprises a driving transistor; the input control module comprises a fifth switching transistor;
the first switch transistor, the second switch transistor, the third switch transistor, the fourth switch transistor, the fifth switch transistor and the driving transistor are all N-type transistors;
the voltage of the initial signal line is greater than the voltage of the data signal line; the voltage difference between the voltage of the second power supply signal line and the initial signal line is greater than the threshold voltage of the driving transistor.
6. The pixel compensation circuit according to claim 5, wherein a voltage of the first power supply signal line is a negative voltage, and a voltage of the second power supply signal line is a positive voltage; the voltage of the initial signal line is a positive voltage, and the voltage of the data signal line is a positive voltage.
7. A display device comprising a pixel compensation circuit as claimed in any one of claims 1 to 6.
8. A driving method for driving the pixel compensation circuit according to any one of claims 1 to 6, the method comprising:
a first stage of inputting an initial signal to the initial signal line, inputting a first reset signal to the reset signal line, inputting a first scan signal to the scan signal line, inputting a data signal to the data signal line, inputting a first power supply signal to the first power supply signal line, inputting a second power supply signal to the second power supply signal line, and inputting a first emission control signal to the emission control signal line;
a second stage of inputting the initialization signal to the initialization signal line, the first reset signal to the reset signal line, the second scan signal to the scan signal line, the data signal to the data signal line, the first power supply signal to the first power supply signal line, the second power supply signal to the second power supply signal line, and the second emission control signal to the emission control signal line;
a third stage of inputting the initial signal to the initial signal line, inputting the second reset signal to the reset signal line, inputting the first scan signal to the scan signal line, inputting the data signal to the data signal line, inputting the first power supply signal to the first power supply signal line, inputting the second power supply signal to the second power supply signal line, and inputting the first light emission control signal to the light emission control signal line.
9. The method of claim 8, wherein the first reset module comprises a first switch transistor, the second reset module comprises a second switch transistor, the first lighting control module comprises a third switch transistor, the second lighting control module comprises a fourth switch transistor, the drive module comprises a drive transistor, the input control module comprises a fifth switch transistor, and the first switch transistor, the second switch transistor, the third switch transistor, the fourth switch transistor, the fifth switch transistor, and the drive transistor are all N-type transistors;
the voltage of the initial signal line is greater than the voltage of the data signal line; a voltage difference between the voltage of the second power supply signal line and the initial signal line is greater than a threshold voltage of the driving transistor;
the voltage of the first reset signal is greater than the voltage of the second reset signal; the voltage of the first scanning signal is less than that of the second scanning signal; the voltage of the first light emission control signal is greater than the voltage of the second light emission control signal.
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