CN103943060B - The driving method of organic light emitting display and image element circuit thereof, image element circuit - Google Patents
The driving method of organic light emitting display and image element circuit thereof, image element circuit Download PDFInfo
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Abstract
A driving method for organic light emitting display and image element circuit thereof, image element circuit, described image element circuit comprises the first transistor, transistor seconds, third transistor, the 4th transistor, the 5th transistor, the 6th transistor, electric capacity and Organic Light Emitting Diode; Wherein, the second electrode of the first transistor described in the first Electrode connection of described third transistor.Image element circuit provided by the invention can compensate the pressure drop that threshold drift because technique causes and load circuit cause, eliminate the problem of display device non-uniform light, and, improve the integrated level of image element circuit, simplify peripheral drive circuit, reduce circuit power consumption.
Description
Technical field
The present invention relates to organic light emitting display technical field, particularly the driving method of a kind of organic light emitting display and image element circuit thereof, image element circuit.
Background technology
Compared with traditional liquid crystal panel, active matrix organic light-emitting diode (AMOLED, ActiveMatrixOrganicLightEmittingDiode) panel has the plurality of advantages such as reaction velocity is fast, contrast is high, visual angle is wide.
Usually thin film transistor (TFT) is adopted to build image element circuit, for organic light emitting display diode (OLED, OrganicLightEmittingDiode) provides corresponding drive current in AMOLED display panel.But due to the limitation of manufacturing process, the thin film transistor (TFT) in image element circuit usually has heterogeneity on the such as electrical parameter such as threshold voltage, mobility, this heterogeneity can cause drive current difference and the luminance difference of OLED.
In addition, in large scale display application, because backboard power lead exists certain resistance, and the drive current of all pixel cells is all provided by same power lead, therefore higher compared with the supply voltage of far region for electric position than distance near the supply voltage of the Power supply band of position in backboard, this phenomenon is called as pressure drop (IRDrop).Because the drive current of pixel cell is relevant to supply voltage, IRDrop can cause the drive current difference of zones of different, and then makes the OLED of zones of different occur the phenomenon of brightness disproportionation.
In order to solve the problem of display device non-uniform light, the image element circuit of existing organic light emitting display needs to receive reference voltage signal, when layout design, needs two reference voltage signal lines to provide, the integrated level of circuit is lower, can not meet the demand of image high-resolution.
Summary of the invention
The lower problem of image element circuit integrated level of what the present invention solved is organic light emitting display non-uniform light, organic light emitting display.
For solving the problem, the invention provides a kind of image element circuit of organic light emitting display, described image element circuit comprises: the first transistor, transistor seconds, third transistor, 4th transistor, 5th transistor, 6th transistor, electric capacity and Organic Light Emitting Diode, wherein, the grid of described the first transistor connects the grid of described 6th transistor, first electrode of described the first transistor is suitable for connecting reference voltage signal line, the first end of electric capacity described in second Electrode connection of described the first transistor, second electrode of described transistor seconds and the first electrode of described third transistor, the grid of described transistor seconds connects the grid of described 5th transistor, and the first electrode of described transistor seconds is suitable for connection data line, first electrode of the second end of electric capacity described in the second Electrode connection of described third transistor, the grid of described 4th transistor and described 5th transistor, first electrode of described 4th transistor is suitable for connection first power lead, the second electrode of the 5th transistor described in the second Electrode connection of described 4th transistor and the first electrode of described 6th transistor, the anode of Organic Light Emitting Diode described in second Electrode connection of described 6th transistor, the negative electrode of described Organic Light Emitting Diode is suitable for connecting second source line, the voltage that the voltage that described second source line provides provides lower than described first power lead.
Optionally, described the first transistor, transistor seconds, third transistor, the 4th transistor, the 5th transistor and the 6th transistor are PMOS.
Optionally, described the first transistor, transistor seconds, third transistor, the 4th transistor, the 5th transistor and the 6th transistor are NMOS tube.
Based on the image element circuit of above-mentioned organic light emitting display, the invention provides a kind of driving method of image element circuit, comprise: at initial phase, apply that there is the grid controlling signal to described the first transistor of the first voltage magnitude and the grid of described 6th transistor, described in there is the first voltage magnitude control signal make described the first transistor and described 6th transistor turns; The first sweep signal applying there is the first voltage magnitude to the grid of described third transistor, described in there is the first voltage magnitude the first sweep signal make described third transistor conducting; The second sweep signal applying there is the second voltage magnitude to the grid of described transistor seconds and the grid of described 5th transistor, described in there is the second voltage magnitude the second sweep signal make described transistor seconds and described 5th transistor cutoff;
In data write phase, apply that there is the grid controlling signal to described the first transistor of the second voltage magnitude and the grid of described 6th transistor, described in there is the second voltage magnitude control signal make described the first transistor and described 6th transistor cutoff; The first sweep signal applying there is the second voltage magnitude to the grid of described third transistor, described in there is the second voltage magnitude the first sweep signal described third transistor is ended; The second sweep signal applying there is the first voltage magnitude to the grid of described transistor seconds and the grid of described 5th transistor, described in there is the first voltage magnitude the second sweep signal make described transistor seconds and described 5th transistor turns;
In glow phase, there is described in applying the grid controlling signal to described the first transistor of the first voltage magnitude and the grid of described 6th transistor, there is described in applying the grid of the first sweep signal to described third transistor of the second voltage magnitude, there is the second sweep signal of the second voltage magnitude to the grid of described transistor seconds and the grid of described 5th transistor described in applying.
Optionally, the first sweep signal is stated and described second sweep signal is separate in sequential.
Optionally, described driving method also comprises: the first time period between described initial phase and described data write phase, there is described in applying the grid controlling signal to described the first transistor of the second voltage magnitude and the grid of described 6th transistor, there is described in applying the grid of the first sweep signal to described third transistor of the first voltage magnitude, there is the second sweep signal of the second voltage magnitude to the grid of described transistor seconds and the grid of described 5th transistor described in applying;
The second time period between described first time period and described data write phase, there is described in applying the grid controlling signal to described the first transistor of the second voltage magnitude and the grid of described 6th transistor, there is described in applying the grid of the first sweep signal to described third transistor of the second voltage magnitude, there is the second sweep signal of the second voltage magnitude to the grid of described transistor seconds and the grid of described 5th transistor described in applying;
The 3rd time period between described data write phase and described glow phase, there is described in applying the grid controlling signal to described the first transistor of the second voltage magnitude and the grid of described 6th transistor, there is described in applying the grid of the first sweep signal to described third transistor of the second voltage magnitude, there is the second sweep signal of the second voltage magnitude to the grid of described transistor seconds and the grid of described 5th transistor described in applying.
Optionally, described driving method also comprises: the 4th time period between described initial phase and described data write phase, there is described in applying the grid controlling signal to described the first transistor of the first voltage magnitude and the grid of described 6th transistor, there is described in applying the grid of the first sweep signal to described third transistor of the second voltage magnitude, there is the second sweep signal of the second voltage magnitude to the grid of described transistor seconds and the grid of described 5th transistor described in applying;
The 5th time period between described 4th time period and described data write phase, there is described in applying the grid controlling signal to described the first transistor of the second voltage magnitude and the grid of described 6th transistor, there is described in applying the grid of the first sweep signal to described third transistor of the second voltage magnitude, there is the second sweep signal of the second voltage magnitude to the grid of described transistor seconds and the grid of described 5th transistor described in applying;
The 6th time period between described data write phase and described glow phase, there is described in applying the grid controlling signal to described the first transistor of the second voltage magnitude and the grid of described 6th transistor, there is described in applying the grid of the first sweep signal to described third transistor of the second voltage magnitude, there is the second sweep signal of the second voltage magnitude to the grid of described transistor seconds and the grid of described 5th transistor described in applying.
Optionally, in described data write phase, provide data-signal to the data line of the first Electrode connection of described transistor seconds; In described initial phase and described glow phase, do not provide described data-signal to the data line of the first Electrode connection of described transistor seconds.
Based on the image element circuit of above-mentioned organic light emitting display, the invention provides a kind of organic light emitting display, comprising: scan drive cell, data drive unit, N+1 bar sweep trace, M bar data line and multiple above-mentioned image element circuit; Wherein, described multiple image element circuit lays respectively in the pixel region that described N+1 bar sweep trace and M bar data line intersect to form, the grid of the third transistor of n-th line image element circuit is connected to n-th sweep trace, the grid of the transistor seconds of n-th line image element circuit and the grid of the 5th transistor are all connected to (n+1)th article of sweep trace, first Electrode connection of the transistor seconds of m row image element circuit is to m article of data line, 1≤n≤N, 1≤m≤M; Described scan drive cell is suitable for providing corresponding sweep signal to each bar sweep trace, and described data drive unit is suitable for providing data-signal to pieces of data line.
Compared with prior art, technical scheme of the present invention has the following advantages: by cooperatively interacting between each transistor and electric capacity, the electric current of the driving organic light-emitting diode that the 4th transistor is produced has nothing to do with the threshold voltage of the supply voltage of powering to image element circuit and transistor, compensate the pressure drop that the threshold drift that causes because of technique and load circuit cause, the problem of display device non-uniform light can be eliminated, and, the source electrode of third transistor is connected with the first end of electric capacity, when layout design, a reference voltage signal line is only needed to provide reference voltage signal to the first transistor, improve the integrated level of image element circuit, add the number of pixels that organic light emitting display per inch has, the demand of image high-resolution can be adapted to.
Further, technical solution of the present invention provides the method for the described image element circuit of multiple driving, the first sweep signal in often kind of driving method and the second sweep signal separate in sequential, simplify the structure of peripheral drive circuit, further improve the integrated level of circuit.
Further, the image element circuit in technical solution of the present invention does not all need to provide data-signal at initial phase and glow phase, reduces the power attenuation of circuit.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of the image element circuit of the organic light emitting display of the embodiment of the present invention;
Fig. 2 is the drive singal sequential chart of the image element circuit of the embodiment of the present invention 1;
Fig. 3 is the drive singal sequential chart of the image element circuit of the embodiment of the present invention 2;
Fig. 4 is the drive singal sequential chart of the image element circuit of the embodiment of the present invention 3;
The electrical block diagram of Fig. 5 embodiment of the present invention organic light emitting display.
Embodiment
Just as described in the background art, in order to solve the problem of the non-uniform light that organic light emitting display causes because of transistor threshold voltage and IRdrop, existing image element circuit needs two reference voltage signal lines to provide reference voltage signal, the integrated level of circuit is lower, can not meet the demand of image high-resolution.Inventor, through research, provides the driving method of a kind of organic light emitting display and image element circuit thereof, image element circuit.
For enabling above-mentioned purpose of the present invention, feature and advantage more become apparent, and are described in detail specific embodiments of the invention below in conjunction with accompanying drawing.
Fig. 1 is the circuit diagram of the image element circuit of the organic light emitting display of the embodiment of the present invention.With reference to figure 1, described image element circuit comprises: the first transistor M1, transistor seconds M2, third transistor M3, the 4th transistor M4, the 5th transistor M5, the 6th transistor M6, electric capacity C1 and Organic Light Emitting Diode D1.
The grid of described the first transistor M1 connects the grid of described 6th transistor M6, first electrode of described the first transistor M1 is suitable for connecting reference voltage signal line, described reference voltage signal line is suitable for providing low level reference voltage signal Vref when the work of described image element circuit, the first end N1 of electric capacity C1 described in second Electrode connection of described the first transistor M1, second electrode of described transistor seconds M2 and first electrode of described third transistor M3.
The grid of described transistor seconds M2 connects the grid of described 5th transistor M5, and first electrode of described transistor seconds M2 is suitable for connection data line, and described data line is suitable for providing data-signal Vdata when described image element circuit work.
First electrode of the second end N2 of electric capacity C1 described in second Electrode connection of described third transistor M3, the grid of described 4th transistor M4 and described 5th transistor M5.
First electrode of described 4th transistor M4 is suitable for connection first power lead, described first power lead is suitable for providing the first supply voltage Vdd, second electrode of the 5th transistor M5 described in second Electrode connection of described 4th transistor M4 and first electrode of described 6th transistor M6.
The anode of Organic Light Emitting Diode D1 described in second Electrode connection of described 6th transistor M6.
The negative electrode of described Organic Light Emitting Diode D1 is suitable for connecting second source line, and described second source line is suitable for providing second source voltage Vee, and described second source voltage Vee is lower than described first supply voltage Vdd.
Particularly, in the present embodiment, described the first transistor M1, described transistor seconds M2, described third transistor M3, described 4th transistor M4, described 5th transistor M5 and described 6th transistor M6 are PMOS.First electrode of each transistor is the source electrode of PMOS, and the second electrode of each transistor is the drain electrode of PMOS.
It should be noted that, in other embodiments, described the first transistor M1, described transistor seconds M2, described third transistor M3, described 4th transistor M4, described 5th transistor M5 and described 6th transistor M6 also can be NMOS tube, first electrode of each transistor is the drain electrode of NMOS tube, and the second electrode of each transistor is the source electrode of NMOS tube.Certainly; the present invention does not limit this; those skilled in the art can also do other distortion to transistor according to actual needs; such as portion of transistor is set to PMOS; and other portion of transistor corresponding are set to NMOS tube; as long as circuit can realize object of the present invention, it all should fall into protection scope of the present invention.
The image element circuit that technical solution of the present invention provides, because first electrode of described third transistor M3 is connected with the first end N1 of described electric capacity C1, do not need to connect reference voltage signal line, therefore, a reference voltage signal line is only needed to provide described reference voltage signal Vref to first electrode of described the first transistor M1, the integrated level of image element circuit can be improved, increase the number of pixels that organic light emitting display per inch has, adapt to the demand of image high-resolution.
Based on described image element circuit, the invention provides and drive described image element circuit method.For understanding principle of the present invention and effect better, be described in detail below in conjunction with the course of work of specific embodiment to described image element circuit.
Embodiment 1
Fig. 2 is the drive singal sequential chart of the image element circuit of the embodiment of the present invention 1, wherein, the grid of described third transistor M3 receives the first sweep signal S1, the grid of described transistor seconds M2 and the grid of described 5th transistor M5 receive the second sweep signal S2, the grid of described the first transistor M1 and the grid reception control signal Emit of described 6th transistor M6.
With reference to figure 1 and Fig. 2, at initial phase T31, the control signal Emit applying there is the first voltage magnitude to the grid of described the first transistor M1 and the grid of described 6th transistor M6, described in there is the first voltage magnitude control signal Emit make described the first transistor M1 and described 6th transistor M6 conducting; Apply the grid of the first sweep signal S1 to described third transistor M3 with the first voltage magnitude, described in there is the first voltage magnitude the first sweep signal S1 make described third transistor M3 conducting; The the second sweep signal S2 applying there is the second voltage magnitude to the grid of described transistor seconds M2 and the grid of described 5th transistor M5, described in there is the second voltage magnitude the second sweep signal S2 described transistor seconds M2 and described 5th transistor M5 is ended.
In three embodiments provided by the invention, because described the first transistor M1, described transistor seconds M2, described third transistor M3, described 5th transistor M5 and described 6th transistor M6 are PMOS, therefore, described first voltage magnitude is low level magnitude of voltage, and described second voltage magnitude is the magnitude of voltage of high level.Further, the size of described first voltage magnitude and described second voltage magnitude can set according to the threshold voltage size of each transistor.
Correspondingly, in other embodiments, if described the first transistor M1, described transistor seconds M2, described third transistor M3, described 5th transistor M5 and described 6th transistor M6 are NMOS tube, then described first voltage magnitude is the magnitude of voltage of high level, and described second voltage magnitude is low level magnitude of voltage.In like manner, those skilled in the art can according to the spirit of embodiment, adopts PMOS, part is when adopting NMOS tube, do corresponding conversion in part, similarly to reach the effect of the described image element circuit of above-mentioned driving, in this exhaustive no longer one by one.Therefore, limitation of the present invention should do not formed with the detail provided in three embodiments provided by the invention.
At described initial phase T31, due to described the first transistor M1 conducting, described reference voltage signal Vref transfers to the first end N1 of described electric capacity C1 and first electrode of described third transistor M3 by described the first transistor M1.Described third transistor M3 also conducting, described reference voltage signal Vref transfers to the second end N2 of described electric capacity C1 by described third transistor M3, completes the grid initialization of described 4th transistor M4.
Continue with reference to figure 2, at data write phase T32, the control signal Emit applying there is the second voltage magnitude to the grid of described the first transistor M1 and the grid of described 6th transistor M6, described in there is the second voltage magnitude control signal Emit described the first transistor M1 and described 6th transistor M6 is ended; Apply the grid of the first sweep signal S1 to described third transistor M3 with the second voltage magnitude, described in there is the second voltage magnitude the first sweep signal S1 described third transistor M3 is ended; The the second sweep signal S2 applying there is the first voltage magnitude to the grid of described transistor seconds M2 and the grid of described 5th transistor M5, described in there is the first voltage magnitude the second sweep signal S2 make described transistor seconds M2 and described 5th transistor M5 conducting.
At described data write phase T32, because described the first transistor M1 cut-off, described transistor seconds M2 conducting, described third transistor M3 end, described data-signal Vdata transfers to the first end N1 of described electric capacity C1 by described transistor seconds M2.
Described 5th transistor M5 conducting makes described 4th transistor M4 form diode connection, and the grid of described 4th transistor M4 is connected with the second end N2 of described electric capacity C1, described electric capacity C1 second end N2 input be low level described reference voltage signal Vref, namely the grid of described 4th transistor M4 is electronegative potential, therefore, described 6th transistor M6 cut-off forces the pressure reduction between first electrode of described 4th transistor M4 and grid to be the threshold voltage vt h of transistor, the voltage of the second end N2 of described electric capacity C1 is the difference of described first supply voltage Vdd and described threshold voltage vt h, i.e. Vdd-Vth, data have write, the voltage difference at described electric capacity C1 two ends is Vdata-(Vdd-Vth).
Continue with reference to figure 2, at glow phase T33, there is the control signal Emit of the first voltage magnitude to the grid of described the first transistor M1 and the grid of described 6th transistor M6 described in applying, make described the first transistor M1 and described 6th transistor M6 conducting; There is described in applying the grid of the first sweep signal S1 to described third transistor M3 of the second voltage magnitude, described third transistor M3 is ended; There is the second sweep signal S2 of the second voltage magnitude to the grid of described transistor seconds M2 and the grid of described 5th transistor M5 described in applying, described transistor seconds M2 and described 5th transistor M5 is ended.
At described glow phase T33, described the first transistor M1 conducting, described transistor seconds M2 cut-off and described third transistor M3 end, and the signal of the first end N1 of described electric capacity C1 is reset as described reference voltage signal Vref.Described 5th transistor M5 ends, according to the coupling effect of principle of charge conservation and electric capacity, the voltage of the second end N2 of described electric capacity C1 is Vref-Vdata+ (Vdd-Vth), therefore, voltage difference Vsg=Vdd-[Vref-Vdata+ (Vdd-Vth)]=Vdata-Vref+Vth between the first electrode pole of described 4th transistor M4 and grid.Described 4th transistor M4 is in saturation conduction state, can draw the electric current I=k (Vsg-Vth) flowing through described 4th transistor M4 thus
2=k (Vdata-Vref)
2, wherein, k is the constant coefficient relevant to the mobility of transistor, breadth length ratio and grid source capacitance.Described 6th transistor M6 is in conducting state, and the electric current I flowing through described 4th transistor M4 drives described Organic Light Emitting Diode D1 luminous.
From the expression formula of electric current I flowing through described 4th transistor M4, the threshold voltage vt h of the electric current of described Organic Light Emitting Diode D1 and described first supply voltage Vdd and transistor is driven to have nothing to do, the pressure drop that threshold drift because technique causes and load circuit cause can be compensated, eliminate the problem of display device non-uniform light.
From the course of work of described image element circuit, at described initial phase T31, described the first transistor M1 and described third transistor M3 is in conducting state simultaneously, therefore, described reference voltage signal Vref can transfer to the second end N2 of described electric capacity C1 by described the first transistor M1 and described third transistor M3, and no longer need reference voltage signal line to provide described reference voltage signal Vref directly to first electrode of described third transistor M3, namely first electrode of described third transistor M3 does not need to connect reference voltage signal line.
In addition, the image element circuit of technical solution of the present invention is at described initial phase T31 and described glow phase T33, described transistor seconds M2 does not have conducting, there is not leakage phenomenon in the first end N1 of described electric capacity C1, therefore, at described initial phase T31 and described glow phase T33, do not need the data line of the first Electrode connection that described data-signal Vdata to described transistor seconds M2 is provided, at described data write phase T32, the data line of first Electrode connection of described data-signal Vdata to described transistor seconds M2 is provided, reduce the overall power of circuit.
The foregoing describe the three phases of described image element circuit work, it should be noted that, the setting of the driving circuit of described first sweep signal S1, described second sweep signal S2 and described control signal Emit is conveniently provided, between described initial phase T31, described data write phase T32 and described glow phase T33, can also transition period be set.
Embodiment 2
Fig. 3 is the drive singal sequential chart of the image element circuit of the embodiment of the present invention 2, similar in the signal described image element circuit applied at initial phase T41, data write phase T44 and glow phase T46 and embodiment 1, do not repeat them here, the transition period below only just between above-mentioned three phases is described.
With reference to figure 3, first time period T42 between described initial phase T41 and described data write phase T44, there is the control signal Emit of the second voltage magnitude to the grid of described the first transistor M1 and the grid of described 6th transistor M6 described in applying, described the first transistor M1 and described 6th transistor M6 is ended; There is described in applying the grid of the first sweep signal S1 to described third transistor M3 of the first voltage magnitude, make described third transistor M3 conducting; There is the second sweep signal S2 of the second voltage magnitude to the grid of described transistor seconds M2 and the grid of described 5th transistor M5 described in applying, described transistor seconds M2 and described 5th transistor M5 is ended.
At described first time period T42, because described the first transistor M1 ends, the two ends of described electric capacity C1 still store described reference voltage signal Vref.
The second time period T43 between described first time period T42 and described data write phase T44, there is the control signal Emit of the second voltage magnitude to the grid of described the first transistor M1 and the grid of described 6th transistor M6 described in applying, described the first transistor M1 and described 6th transistor M6 is ended; There is described in applying the grid of the first sweep signal S1 to described third transistor M3 of the second voltage magnitude, described third transistor M3 is ended; There is the second sweep signal S2 of the second voltage magnitude to the grid of described transistor seconds M2 and the grid of described 5th transistor M5 described in applying, described transistor seconds M2 and described 5th transistor M5 is ended.
At described second time period T43, described third transistor M3 cut-off, for write data are prepared.
The 3rd time period T45 between described data write phase T44 and described glow phase T46, there is the control signal Emit of the second voltage magnitude to the grid of described the first transistor M1 and the grid of described 6th transistor M6 described in applying, described the first transistor M1 and described 6th transistor M6 is ended; There is described in applying the grid of the first sweep signal S1 to described third transistor M3 of the second voltage magnitude, described third transistor M3 is ended; There is the second sweep signal S2 of the second voltage magnitude to the grid of described transistor seconds M2 and the grid of described 5th transistor M5 described in applying, described transistor seconds M2 and described 5th transistor M5 is ended.
End, for described glow phase T46 prepares at described 3rd time period T45, described transistor seconds M2 and described 5th transistor M5.
Embodiment 3
Fig. 4 is the drive singal sequential chart of the image element circuit of the embodiment of the present invention 3, similar in the signal described image element circuit applied at initial phase T51, data write phase T54 and glow phase T56 and embodiment 1, do not repeat them here, the transition period below only just between above-mentioned three phases is described.
With reference to figure 4, the 4th time period T52 between described initial phase T51 and described data write phase T54, there is the control signal Emit of the first voltage magnitude to the grid of described the first transistor M1 and the grid of described 6th transistor M6 described in applying, make described the first transistor M1 and described 6th transistor M6 conducting; There is described in applying the grid of the first sweep signal S1 to described third transistor M3 of the second voltage magnitude, described third transistor M3 is ended; There is the second sweep signal S2 of the second voltage magnitude to the grid of described transistor seconds M2 and the grid of described 5th transistor M5 described in applying, described transistor seconds M2 and described 5th transistor M5 is ended.
At described 4th time period T52, due to described third transistor M3 cut-off, the two ends of described electric capacity C1 still store described reference voltage signal Vref.
The 5th time period T53 between described 4th time period T52 and described data write phase T54 is identical with the described second time period T43 in embodiment 2, does not repeat them here.
The 6th time period T55 between described data write phase T54 and described glow phase T56 is identical with the described 3rd time period T45 in embodiment 2, does not repeat them here.
In embodiment 1, embodiment 2 and embodiment 3, described first sweep signal S1 and described second sweep signal S2 is separate in sequential, therefore, more simple driving circuit can be adopted to provide this drive singal, the running of driving circuit is also convenient simultaneously.In addition, separate in sequential due to drive singal, can also realize the multi-path choice to image element circuit, thus improve integrated level and the convenience of image element circuit.
Correspondingly, the present invention also provides a kind of organic light emitting display, as shown in Figure 5.Described organic light emitting display comprises: scan drive cell 10, data drive unit 20, N+1 bar sweep trace Scn, M bar data line Dm and multiple image element circuit Pnm, wherein, 1≤n≤N, 1≤m≤M, in the structure of described image element circuit and above-described embodiment, any one image element circuit structure is similar, does not repeat them here.
Particularly, described multiple image element circuit lays respectively in the pixel region that described N+1 bar sweep trace and M bar data line intersect to form.The grid of the third transistor M3 of n-th line image element circuit is connected to n-th sweep trace, the grid of the transistor seconds M2 of n-th line image element circuit and the grid of the 5th transistor M5 are all connected to (n+1)th article of sweep trace, and first Electrode connection of the transistor seconds M2 of m row image element circuit is to m article of data line.
Described scan drive cell 10 is suitable for providing corresponding sweep signal to each bar sweep trace, and described data drive unit 20 is suitable for providing data-signal to pieces of data line.
In image element circuit due to organic light emitting display provided by the invention, the electric current of Organic Light Emitting Diode and the threshold voltage of supply voltage and transistor is driven to have nothing to do, therefore, described organic light emitting display can uniformly light-emitting, and, because the integrated level of image element circuit improves, thus described organic light emitting display is made to have higher resolution.
In sum, the image element circuit that technical solution of the present invention provides can compensate the pressure drop that transistor threshold drifts about and load circuit causes because technique causes, eliminate the problem of display device non-uniform light, further increase circuit level simultaneously, add the number of pixels that organic light emitting display per inch has, the demand of image high-resolution can be adapted to, and, simplify peripheral drive circuit, reduce circuit power consumption.
Although the present invention discloses as above, the present invention is not defined in this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, and therefore protection scope of the present invention should be as the criterion with claim limited range.
Claims (9)
1. the image element circuit of an organic light emitting display, it is characterized in that, comprise: the first transistor, transistor seconds, third transistor, the 4th transistor, the 5th transistor, the 6th transistor, electric capacity and Organic Light Emitting Diode, wherein, the grid of described the first transistor connects the grid of described 6th transistor, first electrode of described the first transistor is suitable for connecting reference voltage signal line, the first electrode of the first end of electric capacity, the second electrode of described transistor seconds and described third transistor described in the second Electrode connection of described the first transistor; The grid of described transistor seconds connects the grid of described 5th transistor, and the first electrode of described transistor seconds is suitable for connection data line; First electrode of the second end of electric capacity described in the second Electrode connection of described third transistor, the grid of described 4th transistor and described 5th transistor; First electrode of described 4th transistor is suitable for connection first power lead, the second electrode of the 5th transistor described in the second Electrode connection of described 4th transistor and the first electrode of described 6th transistor; The anode of Organic Light Emitting Diode described in second Electrode connection of described 6th transistor; The negative electrode of described Organic Light Emitting Diode is suitable for connecting second source line, the voltage that the voltage that described second source line provides provides lower than described first power lead.
2. image element circuit according to claim 1, is characterized in that, described the first transistor, transistor seconds, third transistor, the 4th transistor, the 5th transistor and the 6th transistor are PMOS.
3. image element circuit according to claim 1, is characterized in that, described the first transistor, transistor seconds, third transistor, the 4th transistor, the 5th transistor and the 6th transistor are NMOS tube.
4. the driving method of image element circuit as described in any one of claims 1 to 3, is characterized in that, comprising:
At initial phase, apply that there is the grid controlling signal to described the first transistor of the first voltage magnitude and the grid of described 6th transistor, described in there is the first voltage magnitude control signal make described the first transistor and described 6th transistor turns; The first sweep signal applying there is the first voltage magnitude to the grid of described third transistor, described in there is the first voltage magnitude the first sweep signal make described third transistor conducting; The second sweep signal applying there is the second voltage magnitude to the grid of described transistor seconds and the grid of described 5th transistor, described in there is the second voltage magnitude the second sweep signal make described transistor seconds and described 5th transistor cutoff;
In data write phase, apply that there is the grid controlling signal to described the first transistor of the second voltage magnitude and the grid of described 6th transistor, described in there is the second voltage magnitude control signal make described the first transistor and described 6th transistor cutoff; The first sweep signal applying there is the second voltage magnitude to the grid of described third transistor, described in there is the second voltage magnitude the first sweep signal described third transistor is ended; The second sweep signal applying there is the first voltage magnitude to the grid of described transistor seconds and the grid of described 5th transistor, described in there is the first voltage magnitude the second sweep signal make described transistor seconds and described 5th transistor turns;
In glow phase, there is described in applying the grid controlling signal to described the first transistor of the first voltage magnitude and the grid of described 6th transistor, there is described in applying the grid of the first sweep signal to described third transistor of the second voltage magnitude, there is the second sweep signal of the second voltage magnitude to the grid of described transistor seconds and the grid of described 5th transistor described in applying.
5. driving method according to claim 4, is characterized in that, described first sweep signal and described second sweep signal separate in sequential.
6. driving method according to claim 4, is characterized in that, also comprises:
First time period between described initial phase and described data write phase, there is described in applying the grid controlling signal to described the first transistor of the second voltage magnitude and the grid of described 6th transistor, there is described in applying the grid of the first sweep signal to described third transistor of the first voltage magnitude, there is the second sweep signal of the second voltage magnitude to the grid of described transistor seconds and the grid of described 5th transistor described in applying;
The second time period between described first time period and described data write phase, there is described in applying the grid controlling signal to described the first transistor of the second voltage magnitude and the grid of described 6th transistor, there is described in applying the grid of the first sweep signal to described third transistor of the second voltage magnitude, there is the second sweep signal of the second voltage magnitude to the grid of described transistor seconds and the grid of described 5th transistor described in applying;
The 3rd time period between described data write phase and described glow phase, there is described in applying the grid controlling signal to described the first transistor of the second voltage magnitude and the grid of described 6th transistor, there is described in applying the grid of the first sweep signal to described third transistor of the second voltage magnitude, there is the second sweep signal of the second voltage magnitude to the grid of described transistor seconds and the grid of described 5th transistor described in applying.
7. driving method according to claim 4, is characterized in that, also comprises:
The 4th time period between described initial phase and described data write phase, there is described in applying the grid controlling signal to described the first transistor of the first voltage magnitude and the grid of described 6th transistor, there is described in applying the grid of the first sweep signal to described third transistor of the second voltage magnitude, there is the second sweep signal of the second voltage magnitude to the grid of described transistor seconds and the grid of described 5th transistor described in applying;
The 5th time period between described 4th time period and described data write phase, there is described in applying the grid controlling signal to described the first transistor of the second voltage magnitude and the grid of described 6th transistor, there is described in applying the grid of the first sweep signal to described third transistor of the second voltage magnitude, there is the second sweep signal of the second voltage magnitude to the grid of described transistor seconds and the grid of described 5th transistor described in applying;
The 6th time period between described data write phase and described glow phase, there is described in applying the grid controlling signal to described the first transistor of the second voltage magnitude and the grid of described 6th transistor, there is described in applying the grid of the first sweep signal to described third transistor of the second voltage magnitude, there is the second sweep signal of the second voltage magnitude to the grid of described transistor seconds and the grid of described 5th transistor described in applying.
8. driving method according to claim 4, is characterized in that, in described data write phase, provides data-signal to the data line of the first Electrode connection of described transistor seconds; In described initial phase and described glow phase, do not provide described data-signal to the data line of the first Electrode connection of described transistor seconds.
9. an organic light emitting display, is characterized in that, comprising: scan drive cell, data drive unit, N+1 bar sweep trace, M bar data line and multiple image element circuit as described in any one of claims 1 to 3; Wherein, multiple described image element circuit lays respectively in the pixel region that described N+1 bar sweep trace and M bar data line intersect to form, the grid of the third transistor of n-th line image element circuit is connected to n-th sweep trace, the grid of the transistor seconds of n-th line image element circuit and the grid of the 5th transistor are all connected to (n+1)th article of sweep trace, first Electrode connection of the transistor seconds of m row image element circuit is to m article of data line, 1≤n≤N, 1≤m≤M; Described scan drive cell is suitable for providing corresponding sweep signal to each bar sweep trace, and described data drive unit is suitable for providing data-signal to pieces of data line.
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| TWI555002B (en) * | 2015-04-02 | 2016-10-21 | 友達光電股份有限公司 | Display panel and pixel circuit thereof |
| CN105096838B (en) * | 2015-09-25 | 2018-03-02 | 京东方科技集团股份有限公司 | Display panel and its driving method and display device |
| CN105489166A (en) * | 2016-02-03 | 2016-04-13 | 上海天马有机发光显示技术有限公司 | Pixel circuit and display device |
| KR102605283B1 (en) * | 2016-06-30 | 2023-11-27 | 삼성디스플레이 주식회사 | Display device |
| CN106531082B (en) * | 2016-12-13 | 2019-01-22 | 上海天马有机发光显示技术有限公司 | A kind of pixel-driving circuit, display panel, display equipment and image element driving method |
| CN106531075B (en) * | 2017-01-10 | 2019-01-22 | 上海天马有机发光显示技术有限公司 | Organic light emissive pixels driving circuit, driving method and organic light emitting display panel |
| CN106611585B (en) * | 2017-03-01 | 2019-04-05 | 上海天马微电子有限公司 | A kind of driving circuit, display panel and display device |
| CN106847179A (en) * | 2017-04-12 | 2017-06-13 | 武汉华星光电技术有限公司 | A kind of pixel compensation circuit and display device |
| US10147357B2 (en) | 2017-04-12 | 2018-12-04 | Wuhan China Star Optoelectronics Technology Co., Ltd. | Pixel compensation circuit and display device |
| CN107146580A (en) * | 2017-07-20 | 2017-09-08 | 京东方科技集团股份有限公司 | A kind of image element circuit and its driving method, display device |
| CN109473063B (en) * | 2018-12-06 | 2020-08-11 | 武汉华星光电半导体显示技术有限公司 | Pixel compensation circuit and pixel compensation method |
| TWI695363B (en) * | 2019-03-26 | 2020-06-01 | 友達光電股份有限公司 | Pixel circuit |
| CN109872682A (en) * | 2019-03-28 | 2019-06-11 | 武汉华星光电半导体显示技术有限公司 | Pixel compensation circuit and display device |
| CN110767163B (en) * | 2019-11-08 | 2021-01-26 | 京东方科技集团股份有限公司 | Pixel circuit and display panel |
| CN111583870A (en) * | 2020-05-15 | 2020-08-25 | 武汉华星光电半导体显示技术有限公司 | Pixel driving circuit |
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