CN104409042A - Pixel circuit, driving method, display panel and display device - Google Patents
Pixel circuit, driving method, display panel and display device Download PDFInfo
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Abstract
The invention discloses a pixel circuit, a driving method, a display panel and a display device. The pixel circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a drive transistor, a first capacitor and a second capacitor. By the matching of each transistor and each capacitor, the pixel circuit achieves at least one of the following benefits that the voltage drop of threshold voltages and power supply signals of a drive current and the drive transistor is irrelevant to cross voltages of the two ends of a light emitting component, and the influence of the factors is eliminated, so that the problem of non-uniformity of luminance of the display device is effectively improved, and the uniformity of luminance and the display effect of the display device are improved.
Description
Technical Field
The invention relates to the technical field of organic light emitting display, in particular to a pixel circuit, a driving method thereof, a display panel and a display device.
Background
With the continuous development of multimedia, Organic Light Emitting Diode (OLED) displays have attracted attention in the display market with advantages of simple structure and excellent operating temperature, contrast, viewing angle, etc. The organic light emitting diode display includes a passive matrix OLED display and an active matrix OLED display, which are widely used due to low power consumption. In practical use, the phenomenon of uneven light emission of the organic light emitting diode display is found.
Disclosure of Invention
In view of the above, the present invention provides a pixel circuit, a driving method thereof, a display panel, and a display device, which eliminate the current drop effect of the threshold voltage of the driving transistor and the power voltage by compensating the threshold voltage of the transistor driving the light emitting element, thereby eliminating the phenomenon of non-uniform light emission of the display device.
In one aspect, a preferred embodiment of the present invention provides a pixel circuit, including: a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a driving transistor, a first capacitor, a second capacitor, and a light emitting element,
the driving transistor is used for determining the magnitude of driving current, and the magnitude of the driving current is determined by the voltage difference of the grid electrode and the source electrode of the driving transistor;
the first transistor is controlled by a first driving signal and is used for transmitting a reference voltage signal to the grid electrode of the driving transistor;
the second transistor is controlled by a second driving signal and is used for transmitting a power supply voltage signal to the source electrode of the driving transistor;
the third transistor is controlled by a third driving signal and is used for controlling the connection and disconnection of a grid electrode and a drain electrode of the driving transistor;
the fourth transistor is controlled by a third driving signal and is used for transmitting a data signal to the first polar plate of the second capacitor, and the second polar plate of the second capacitor is connected to the drain electrode of the driving transistor;
the fifth transistor is controlled by a fourth driving signal for transmitting a driving current from the driving transistor to the light emitting element;
the first capacitor is used for keeping the voltage difference between the gate and the source of the driving transistor unchanged;
the cathode of the light emitting element is coupled to a cathode low potential and emits light in response to the driving current.
Further, a first electrode of the first transistor is coupled to the reference voltage signal input terminal for receiving a reference voltage signal, and a second electrode of the first transistor is coupled to the gate of the driving transistor;
a first electrode of the second transistor is coupled to a power supply voltage signal input end for receiving a power supply voltage signal, and a second electrode of the second transistor is coupled to a source electrode of the driving transistor;
the third transistor is coupled to two ends of the grid electrode and the drain electrode of the driving transistor;
a first electrode of the fourth transistor is coupled to a data signal input end for receiving a data signal, and a second electrode of the fourth transistor is coupled to a first electrode plate of the second capacitor;
a first electrode of the fifth transistor is coupled to the drain electrode of the driving transistor, and a second electrode of the fifth transistor is coupled to the anode of the light-emitting element;
the first capacitor is coupled between the power supply voltage signal input end and the grid electrode of the driving transistor.
In another aspect, a preferred embodiment of the present invention provides a driving method for driving a pixel circuit, the pixel circuit including: the light-emitting diode comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a driving transistor, a first capacitor, a second capacitor and a light-emitting element, wherein the first transistor is controlled by a first driving signal, a first electrode is coupled to a reference voltage signal input end for receiving a reference voltage signal, and a second electrode is coupled to a grid electrode of the driving transistor;
the second transistor is controlled by a second driving signal, a first electrode is coupled with a power supply voltage signal input end for receiving a power supply voltage signal, and a second electrode is coupled with a source electrode of the driving transistor;
the third transistor is controlled by a third driving signal, and a first electrode and a second electrode are respectively coupled to the grid electrode and the drain electrode of the driving transistor;
the fourth transistor is controlled by a third driving signal, the first electrode is coupled to a data signal input end for receiving a data signal, and the second electrode is coupled to the drain electrode of the driving transistor through the second capacitor;
the fifth transistor is controlled by a fourth driving signal, a first electrode is coupled with the drain electrode of the driving transistor, and a second electrode is coupled with the anode of the light-emitting element;
the first capacitor is coupled between the power supply voltage signal input end and the grid electrode of the driving transistor;
the cathode of the light-emitting element is coupled to a cathode low potential;
the driving method includes a node resetting step, a threshold grabbing step, a data writing step, and a light emitting step, wherein,
in the node resetting step, the first driving signal controls the first transistor to be turned on, the reference voltage signal is transmitted to the gate of the driving transistor to initialize the gate of the driving transistor, the second driving signal controls the second transistor to be turned on, the power voltage signal is transmitted to the source of the driving transistor, and other transistors are turned off;
in the threshold value grabbing step, the first driving signal controls the first transistor to be turned off, the third driving signal controls the third transistor and the fourth transistor to be turned on, the fourth transistor transmits a data signal to a first plate of a second capacitor, the driving transistor is turned on until the gate voltage and the drain voltage are both the power voltage minus the threshold voltage of the driving transistor, and the first capacitor and the second capacitor both store the threshold voltage;
in the data writing step, the second driving signal controls the second transistor to be turned off, the third driving signal controls the third transistor and the fourth transistor to be turned on, the fourth transistor transmits the data signal to the first plate of the second capacitor, and the data signal is transmitted to the drain of the driving transistor through the coupling of the second capacitor;
in the light emitting step, the second driving signal controls the second transistor to be turned on, the fourth driving signal controls the fifth transistor to be turned on, and the driving transistor generates a driving current to drive the light emitting element to emit light.
In another aspect, a preferred embodiment of the present invention further provides a display panel including the pixel circuit as described above.
In another aspect, a preferred embodiment of the present invention further provides a display device including the display panel as described above.
Compared with the prior art, the technical scheme provided by the invention has at least one of the following advantages:
the invention provides a pixel circuit, a driving method, a display panel and a display device, wherein the pixel circuit comprises: the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the driving transistor, the first capacitor and the second capacitor are matched with each other through the transistors and the capacitors, so that the driving current is unrelated to the threshold voltage of the driving transistor, the voltage drop of a power supply signal and the cross voltage of two ends of the light-emitting element, the influence of the factors is eliminated, the problem of uneven light emission of the display device is effectively solved, and the light-emitting uniformity and the display effect of the display device are improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a conventional pixel circuit;
FIG. 2 is a driving timing diagram of the pixel circuit of FIG. 1;
FIG. 3 is a schematic diagram of a pixel circuit according to a preferred embodiment of the present invention;
FIG. 4 is a timing diagram of a preferred driving signal for the pixel circuit of FIG. 3;
FIG. 5a is a current path diagram during stage T1 in FIG. 4;
FIG. 5b is a current path diagram during stage T2 in FIG. 4;
FIG. 5c is a current path diagram during stage T3 of FIG. 4;
fig. 5d is a current path diagram of a stage T4 in fig. 4.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As described in the background art, in practical use, it is found that the organic light emitting diode display has a phenomenon of non-uniform light emission. The reason for causing the non-uniformity of light emission is mainly due to the fact that the threshold voltage of the driving transistor may shift with the use time or the threshold voltage of each transistor may not be the same due to the manufacturing process, and therefore, a great deal of research and development directions are shifted to the threshold shift compensation, and referring to fig. 1, a circuit diagram of an existing pixel circuit in an organic light emitting diode display is shown, and the pixel circuit of the existing pixel circuit adopts a 6T2C structure and comprises six transistors and two capacitors, namely, a transistor M1, a transistor M2, a transistor M3, a transistor M4, a transistor M5, a transistor M6, and capacitors Ca and Cst shown in fig. 1. The transistor M3 serves as a current driving transistor for supplying a current for light emission to the organic light emitting diode OLED. Fig. 2 is a schematic diagram of the driving timing sequence of fig. 1. The operation of the pixel circuit shown in fig. 1 includes: an initialization stage: s1 is low level, S2 and emit are high level, the M5 tube is opened, and the N1 point is reset to low level; data signal writing and threshold grabbing stage: s2 is low level, S1 and emit are high level, M2, M3 and M4 tubes are turned on, and the potential of the point N1 is changed into VDATA- | vth |; a light emitting stage: emit is low, S1 and S2 are high, the transistor M1, the transistor M3 and the transistor M6 are turned on, and the transistor M3 has a current value of I ═ K ═ (Vsg- | Vth |) > 2 ═ K (Vdd-Vdata) ^ 2. However, the magnitude of the driving current is related to the power voltage VDD, and due to the influence of the manufacturing process and the difference in the length of the lead wire for transmitting VDD to each row of pixels or each sub-pixel, the current drop influence is different when VDD is transmitted, so that the power voltage transmitted to each row of pixels or each sub-pixel is different, and thus when the same data voltage is applied to a plurality of pixel circuits, the currents flowing through the organic light emitting diodes in the pixel circuits are different, and the phenomenon of uneven light emission of the display device occurs.
Example one
Based on this, an embodiment of the present application provides a pixel circuit, which is shown in fig. 3 and is a schematic structural diagram of the pixel circuit provided in the embodiment of the present application, wherein the pixel circuit includes:
a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a driving transistor M0, a first capacitor C1, a second capacitor C2, and a light emitting element D; wherein,
the driving transistor M0 is used for determining the magnitude of the driving current, which is determined by the voltage difference between the gate and the source of the driving transistor M0;
the first transistor M1 is controlled by the first driving signal S1 for transmitting the reference voltage signal Vref to the gate of the driving transistor M0;
the second transistor M2 is controlled by the second driving signal S2 for transmitting the power voltage signal PVDD to the source of the driving transistor M0;
the third transistor M3 is controlled by a third driving signal S3, and is used for controlling the on/off between the gate and the drain of the driving transistor M0;
the fourth transistor M4 is controlled by the third driving signal S3 and is used for transmitting the data signal Vdata to the first plate of the second capacitor C2, and the second plate of the second capacitor C2 is coupled to the drain of the driving transistor M0;
the fifth transistor M5 is controlled by the fourth driving signal S4 for transmitting the driving current from the driving transistor M0 to the light emitting element D;
the first capacitor C1 is used for keeping the voltage difference between the gate and the source of the driving transistor M0 unchanged;
the cathode of the light emitting device D is coupled to the cathode low potential Pvee and emits light in response to the driving current.
The driving transistor M0 is a PMOS transistor, and the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, and the fifth transistor M5 may be PMOS transistors, NMOS transistors, thin film transistors, or metal-oxide-semiconductor field effect transistors. If the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4 and the fifth transistor M5 are PMOS transistors, the first electrode refers to a source electrode and the second electrode refers to a drain electrode; if the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, and the fifth transistor M5 are NMOS transistors, the first electrode refers to a drain, and the second electrode refers to a source. The first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, and the fifth transistor M5 shown in fig. 2 are all PMOS transistors.
More specifically, referring to fig. 3, in the pixel circuit, a first electrode of the first transistor M1 is coupled to a reference voltage signal input terminal for receiving a reference voltage signal, and a second electrode is coupled to a gate of the driving transistor, i.e., the first node N1 in fig. 3; the second transistor M2 has a first electrode coupled to a power voltage signal input terminal for receiving a power voltage signal, and a second electrode coupled to the source of the driving transistor M0; the first electrode and the second electrode of the third transistor M3 are respectively coupled to the gate and the drain of the driving transistor M0; a first electrode of the fourth transistor M4 is coupled to the data signal input terminal for receiving the data signal, a second electrode of the fourth transistor M4 is coupled to a first plate of a second capacitor C2, i.e., the third node N3 in fig. 3, and a second plate of the second capacitor C2 is coupled to the drain of the driving transistor M0, i.e., the second node N2 in fig. 3; the fifth transistor M5 has a first electrode coupled to the drain of the driving transistor M0, and a second electrode coupled to the anode of the light emitting device D; the first capacitor C1 is coupled between the power voltage signal input terminal and the gate of the driving transistor M0, and is used for holding the gate potential of the driving transistor M0.
In addition, it should be noted that any one of the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, and the fifth transistor M5 provided in the embodiment of the present application may be an N-type transistor or a P-type transistor, that is, the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, and the fifth transistor M5 may be five transistors in which an N-type transistor and a P-type transistor are mixed.
Fig. 4 is a driving timing diagram of a pixel circuit according to a first embodiment, in the driving timing diagram shown in fig. 4, a working process of the pixel circuit includes a node resetting step, a threshold capturing step, a data writing step, and a light emitting step, specifically:
in the node resetting step, the first driving signal S1 controls the first transistor M1 to be turned on, transmits a reference voltage signal Vref to the gate of the driving transistor M0 to initialize the driving transistor gate, the second driving signal S2 controls the second transistor M2 to be turned on, transmits the power voltage signal PVDD to the source of the driving transistor M0, and turns off the third transistor M3, the fourth transistor M4 and the fifth transistor M5;
in the threshold grabbing step, the first driving signal S1 controls the first transistor M1 to be turned off, the third driving signal S3 controls the third transistor M3 and the fourth transistor M4 to be turned on, the fourth transistor M4 transmits the data signal Vdata to the first plate of the second capacitor C2, the driving transistor M0 is turned on until the gate and drain voltages thereof are the power voltage minus the threshold voltage of the driving transistor, that is, the potentials of the first node N1 and the second node N2 are PVDD- | Vth |. At this time, the first capacitor C1 stores the potential of the first node N1, and the second capacitor C2 stores the potential of the second node N2, that is, the first capacitor C1 and the second capacitor C2 both store the threshold voltage Vth of the driving transistor;
in the data writing step, the second driving signal S2 controls the second transistor M2 to be turned off, and the third driving signal S3 controls the third transistor M3 and the fourth transistor M4 to be turned on, so that the fourth transistor transmits the data signal Vdata to the third node N3, and the data signal Vdata is transmitted to the drain of the driving transistor M0 through the coupling effect of the second capacitor C2;
in the light emitting step, the second driving signal S2 controls the second transistor M2 to be turned on, the fourth driving signal S4 controls the M5 to be turned on, and the driving transistor M0 generates a driving current to drive the light emitting element to emit light.
The operation circuit diagram of each step is shown in fig. 5a to 5d, and a preferred driving method according to the first embodiment is described in detail below with reference to fig. 4 and fig. 5a to 5 d. Fig. 4 corresponds to a case where all the transistors in the pixel circuit are PMOS transistors.
Fig. 5a is a circuit diagram of a node resetting step of the pixel circuit according to the first embodiment, which corresponds to a period T1 in fig. 4, wherein the first driving signal S1 and the second driving signal S2 are at low level and respectively control the first transistor M1 and the second transistor M2 to turn on, the first transistor M1 transmits the reference voltage signal Vref to the gate of the driving transistor M0, i.e., the first node N1, to initialize the gate of the driving transistor, the second transistor M2 transmits the power voltage signal PVDD to the source of the driving transistor M0, and the third driving signal S3 and the fourth driving signal S4 are at high level and respectively control the third transistor M3, the fourth transistor M4 and the fifth transistor M5 to turn off. This step is mainly to initialize the gate of the driving transistor, so that the potential at point N1 is Vref, and Vref is low.
Fig. 5b is a circuit diagram of a threshold grabbing step of the pixel circuit according to the first embodiment, which corresponds to a period T2 in fig. 4, wherein the first driving signal S1 and the fourth driving signal S4 are at a high level, the first transistor M1 and the fifth transistor M5 are respectively controlled to be turned off, the second driving signal S2 and the third driving signal S3 are at a low level, the second driving signal S2 controls the second transistor M2 to be turned on, the third driving signal S3 controls the third transistor M3 and the fourth transistor M4 to be turned on, the fourth transistor M4 transmits the data signal Vdata to the first plate of the second capacitor C2, the driving transistor M0 is turned on until the gate and the drain voltages thereof are equal to the power voltage minus the threshold voltage of the driving transistor, and the Vth first node N1 and the second node N2 are at potentials PVDD- |. At this time, the first capacitor C1 stores the potential of the first node N1, and the second capacitor C2 stores the potential of the second node N2, that is, the first capacitor C1 and the second capacitor C2 both store the threshold voltage Vth of the driving transistor. It should be noted that the data signal Vdata input from the data signal input terminal in this step is equal to the reference voltage signal. This step mainly captures the threshold voltage Vth into the first capacitor C1 and the second capacitor C2.
Fig. 5c is a circuit diagram of a data writing step of the pixel circuit according to the first embodiment, which corresponds to the period T3 in fig. 4, wherein the first driving signal S1, the second driving signal S2, and the fourth driving signal S4 are at a high level, and respectively control the first transistor M1, the second transistor M1, and the fifth transistor M5 to be turned off, and the third driving signal S3 is at a low level, and control the third transistor M3 and the fourth transistor M4 to be turned on. The fourth transistor M4 transmits the data signal Vdata to the third node N3, where the data signal is an active display data signal and the potential value is less than the reference signal value. At this time, the potential of the third node N3 changes to Vdata-Vref, and due to the coupling effect of the second capacitor C2, the potential of the second node N2 changes to: PVDD- | VTH | + (VDATA-VREF) (C2)/(C1+ C2) is transmitted to the first node N1 through the third transistor M3, so that the potential of the first node N1 also becomes PVDD- | VTH | + (VDATA-VREF) (C2)/(C1+ C2). This step is mainly to transmit the data signal to the gate of the driving transistor.
Fig. 5d is a circuit diagram of a light emitting step of the pixel circuit according to the first embodiment, which corresponds to the period T4 in fig. 4, wherein the first driving signal S1 and the third driving signal S3 are at high level, and respectively control the first transistor M1, the third transistor M3 and the fourth transistor M4 to turn off, and the second driving signal S2 and the fourth driving signal S4 are at low level, and respectively control the second transistor M2 and the fifth transistor M5 to turn on. Since the potential of the first node N1 is PVDD- | VTH | + (VDATA-VREF) (C2)/(C1+ C2) in the previous step, the current generated by the driving transistor M0 is:
I＝k(VS-VG-|Vth|)2＝k(Vdata-Vref)(C2)/(C1+C2))2
the driving current drives the light emitting element D, which may be an organic light emitting diode, to emit light.
As can be seen from the above working process, the pixel circuit according to the first embodiment of the present invention, through the cooperation between each transistor and the capacitor, makes the driving current not only unrelated to the threshold voltage of the driving transistor, but also unrelated to the voltage drop of the power signal and the cross voltage at the two ends of the light emitting element, thereby eliminating the influence of the threshold voltage drift of the driving transistor, the current voltage drop of the power voltage, and the cross voltage of the light emitting element on the driving current, further effectively improving the problem of non-uniform light emission, and improving the uniformity of display light emission and the display effect.
It should be noted that, when the transistors provided in the first embodiment are all NMOS transistors, the voltage values of the driving signals in each step need to be opposite, so that the same function can be achieved. Since the operation is substantially the same as described above, it will not be described in detail.
Example two
In addition, a display panel is further provided in a preferred embodiment of the present invention, which includes a pixel circuit, wherein the pixel circuit adopts the pixel circuit described in the above embodiment.
The pixel circuit provided by the second display panel of the embodiment may be a pure PMOS structure, or a CMOS structure in which the driving transistor is a PMOS transistor and the other transistors are NMOS transistors. In the corresponding operation process, the data signal input terminal needs to input a value equal to the reference voltage signal in the threshold value capturing step of the pixel circuit.
The pixel circuit in the display panel ensures that the driving current is not only irrelevant to the threshold voltage of the driving transistor by matching each transistor with the capacitor, but also irrelevant to the voltage drop of a power supply signal and the cross voltage at two ends of the light-emitting element, so that the influence of the threshold voltage drift of the driving transistor, the current voltage drop of the power supply voltage and the cross voltage of the light-emitting element on the driving current is eliminated, the problem of uneven light emission is effectively solved, and the uniformity and the display effect of display light emission are improved.
It should be noted that the display panel provided in the present application is not particularly limited to the number of pixel circuits, and needs to be designed according to practical applications.
EXAMPLE III
A third preferred embodiment of the present invention provides a display device, which includes a display panel, wherein the display panel is the display panel described in the second embodiment.
It should be noted that "coupled" in the embodiments of the present invention refers to an electrical connection between two components, including a direct electrical connection and an indirect electrical connection.
It should be understood that the above-described embodiments are merely illustrative of the present invention and are not to be construed as limiting the scope of the present invention. Those skilled in the art will appreciate that various modifications and changes can be made without inventive faculty, and all such modifications and changes are within the scope of the invention as defined in the claims.
Claims (13)
1. A pixel circuit, comprising: a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a driving transistor, a first capacitor, a second capacitor, and a light emitting element,
the driving transistor is used for determining the magnitude of driving current, and the magnitude of the driving current is determined by the voltage difference of the grid electrode and the source electrode of the driving transistor;
the first transistor is controlled by a first driving signal and is used for transmitting a reference voltage signal to the grid electrode of the driving transistor;
the second transistor is controlled by a second driving signal and is used for transmitting a power supply voltage signal to the source electrode of the driving transistor;
the third transistor is controlled by a third driving signal and is used for controlling the connection and disconnection of a grid electrode and a drain electrode of the driving transistor;
the fourth transistor is controlled by a third driving signal and is used for transmitting a data signal to the first polar plate of the second capacitor, and the second polar plate of the second capacitor is connected to the drain electrode of the driving transistor;
the fifth transistor is controlled by a fourth driving signal for transmitting a driving current from the driving transistor to the light emitting element;
the first capacitor is used for keeping the voltage difference between the gate and the source of the driving transistor unchanged;
the cathode of the light emitting element is coupled to a cathode low potential and emits light in response to the driving current.
2. The pixel circuit according to claim 1, wherein a first electrode of the first transistor is coupled to the reference voltage signal input terminal for receiving a reference voltage signal, and a second electrode of the first transistor is coupled to the gate of the driving transistor;
a first electrode of the second transistor is coupled to a power supply voltage signal input end for receiving a power supply voltage signal, and a second electrode of the second transistor is coupled to a source electrode of the driving transistor;
the third transistor is coupled to two ends of the grid electrode and the drain electrode of the driving transistor;
a first electrode of the fourth transistor is coupled to a data signal input end for receiving a data signal, and a second electrode of the fourth transistor is coupled to a first electrode plate of the second capacitor;
a first electrode of the fifth transistor is coupled to the drain electrode of the driving transistor, and a second electrode of the fifth transistor is coupled to the anode of the light-emitting element;
the first capacitor is coupled between the power supply voltage signal input end and the grid electrode of the driving transistor.
3. The pixel circuit according to claim 1 or 2, wherein the driving transistor is a P-type transistor.
4. The pixel circuit according to claim 3, wherein the reference voltage signal is low.
5. The pixel circuit according to claim 3, wherein the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor are P-type transistors; or,
the first transistor, the second transistor, the third transistor, the fourth transistor and the fifth transistor are all N-type transistors.
6. A driving method is used for driving a pixel circuit, the pixel circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a driving transistor, a first capacitor, a second capacitor and a light-emitting element, the first transistor is controlled by a first driving signal, a first electrode is coupled with a reference voltage signal input end used for receiving a reference voltage signal, and a second electrode is coupled with a grid electrode of the driving transistor;
the second transistor is controlled by a second driving signal, a first electrode is coupled with a power supply voltage signal input end for receiving a power supply voltage signal, and a second electrode is coupled with a source electrode of the driving transistor;
the third transistor is controlled by a third driving signal, and a first electrode and a second electrode are respectively coupled to the grid electrode and the drain electrode of the driving transistor;
the fourth transistor is controlled by a third driving signal, the first electrode is coupled to a data signal input end for receiving a data signal, and the second electrode is coupled to the drain electrode of the driving transistor through the second capacitor;
the fifth transistor is controlled by a fourth driving signal, a first electrode is coupled with the drain electrode of the driving transistor, and a second electrode is coupled with the anode of the light-emitting element;
the first capacitor is coupled between the power supply voltage signal input end and the grid electrode of the driving transistor;
the cathode of the light-emitting element is coupled to a cathode low potential;
the driving method includes a node resetting step, a threshold grabbing step, a data writing step, and a light emitting step, wherein,
in the node resetting step, the first driving signal controls the first transistor to be turned on, the reference voltage signal is transmitted to the gate of the driving transistor to initialize the gate of the driving transistor, the second driving signal controls the second transistor to be turned on, the power voltage signal is transmitted to the source of the driving transistor, and other transistors are turned off;
in the threshold value grabbing step, the first driving signal controls the first transistor to be turned off, the third driving signal controls the third transistor and the fourth transistor to be turned on, the fourth transistor transmits a data signal to a first plate of a second capacitor, the driving transistor is turned on until the gate voltage and the drain voltage are both the power voltage minus the threshold voltage of the driving transistor, and the first capacitor and the second capacitor both store the threshold voltage;
in the data writing step, the second driving signal controls the second transistor to be turned off, the third driving signal controls the third transistor and the fourth transistor to be turned on, the fourth transistor transmits the data signal to the first plate of the second capacitor, and the data signal is transmitted to the drain of the driving transistor through the coupling of the second capacitor;
in the light emitting step, the second driving signal controls the second transistor to be turned on, the fourth driving signal controls the fifth transistor to be turned on, and the driving transistor generates a driving current to drive the light emitting element to emit light.
7. The driving method according to claim 6, wherein in the node resetting step, when the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the driving transistor are all P-type transistors, the first driving signal and the second driving signal are at a low level, and the third driving signal and the fourth driving signal are at a high level;
when the first transistor, the second transistor, the third transistor, the fourth transistor and the fifth transistor are all N-type transistors, the driving transistor is a P-type transistor, the first driving signal and the second driving signal are at high level, and the third driving signal and the fourth driving signal are at low level.
8. The driving method according to claim 6, wherein in the threshold grabbing step, when the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor and the driving transistor are all P-type transistors, the first driving signal and the fourth driving signal are at a high level, the second driving signal and the third driving signal are at a low level, and the data signal input at the data signal input terminal is equal to a reference voltage signal;
when the first transistor, the second transistor, the third transistor, the fourth transistor and the fifth transistor are all N-type transistors, the driving transistor is a P-type transistor, the first driving signal and the fourth driving signal are at low level, the second driving signal and the third driving signal are at high level, and the data signal input by the data signal input end is equal to the reference voltage signal.
9. The driving method according to claim 6, wherein in the data writing step, when the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the driving transistor are all P-type transistors, the first driving signal, the second driving signal, and the fourth driving signal are at a high level, the third driving signal is at a low level, and an active display data signal is input to the data signal input terminal;
when the first transistor, the second transistor, the third transistor, the fourth transistor and the fifth transistor are all N-type transistors, the driving transistor is a P-type transistor, the first driving signal, the second driving signal and the fourth driving signal are at low level, the third driving signal is at high level, and an effective display data signal is input to the data signal input end.
10. The driving method according to claim 9, wherein the valid display data signal is smaller than the reference voltage signal.
11. The driving method according to claim 6, wherein in the light emitting step, when the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the driving transistor are all P-type transistors, the first driving signal and the third driving signal are at a high level, and the second driving signal and the fourth driving signal are at a low level;
when the first transistor, the second transistor, the third transistor, the fourth transistor and the fifth transistor are all N-type transistors, the driving transistor is a P-type transistor, the first driving signal and the third driving signal are at low level, and the second driving signal and the fourth driving signal are at high level.
12. A display panel comprising the pixel circuit according to any one of claims 1 to 5.
13. A display device characterized by comprising the display panel according to claim 12.
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| CN109712568B (en) * | 2019-02-27 | 2021-04-23 | 京东方科技集团股份有限公司 | Pixel driving circuit and driving method thereof, display panel and display device |
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| US11170714B2 (en) | 2019-09-05 | 2021-11-09 | Chengdu Boe Optoelectronics Technology Co., Ltd. | Pixel circuit, method for driving the same, display panel and display device |
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| CN110930944B (en) * | 2019-12-13 | 2021-04-13 | 云谷（固安）科技有限公司 | Display panel driving method and display device |
| CN110930944A (en) * | 2019-12-13 | 2020-03-27 | 云谷（固安）科技有限公司 | Display panel driving method and display device |
| CN111754939B (en) * | 2020-07-28 | 2021-11-09 | 京东方科技集团股份有限公司 | Pixel circuit, driving method thereof and display device |
| CN111754939A (en) * | 2020-07-28 | 2020-10-09 | 京东方科技集团股份有限公司 | Pixel circuit, driving method thereof and display device |
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