JP3230629B2 - Image display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image display device,
Specifically, regarding an active drive type image display device,
More specifically, the present invention relates to an image display device such as a liquid crystal display device that performs field sequential scanning.

[0002]

2. Description of the Related Art The terms "field" and "frame" in the present specification are defined below. In the following description, a liquid crystal display device is assumed as an example.

Frame: A single complete image displayed on a liquid crystal display.

Field: An image that is a component of a "frame".

In line-sequential scanning, if the screen is scanned once from top to bottom, an image for one field is displayed and output. One field period is a time period from the scanning start time at which scanning starts from the upper end of the screen to the next restarting of scanning from the upper end. When the image signal is an interlace signal, an image of one frame is formed in two fields. When the image signal is a non-interlace signal, one field is an image of one frame.

In the field sequential scanning, scanning the screen once results in an image of one field. One field period refers to the time from one scan of the screen to the next scan of the screen. If fields and frames are defined as described above, the interlaced signal is an R (red) signal and a G (green) signal.
If the image is divided into a signal and a B (blue) signal, and the image is scanned sequentially, the image of one frame is completed in six fields.

In the following, one TV field or one TV field
The term TV frame is used. One TV field means a field handled by a normal TV (television) signal, and one image of one TV frame is completed by two TV fields. For reference, NTSC
In the case of the (M) signal, one TV field period is about 16.7.
msec (60 Hz), PAL / SECAM (B / G /
In the case of a (D / K / I / L) signal, one TV field period is 20 msec (50 Hz).

FIG. 11 is a circuit diagram of a configuration corresponding to one pixel of a conventional active drive type liquid crystal display device. The liquid crystal display device has a plurality of scanning signal lines 6 and data signal lines 5.
And a plurality of pixels are provided in a matrix form. Each pixel includes a driving element 3, a pixel capacitor 1, and an auxiliary capacitor 8. The pixel capacitor 1 has a configuration in which liquid crystal is sandwiched between one electrode and the other electrode of the pixel capacitor 1. The drive element 3 is configured by a TFT (thin film transistor) as an example. The data signal line 5 is connected to the one electrode (pixel electrode) of the pixel capacitor 1 via the drain terminal and the source terminal of the TFT, and the gate terminal of the TFT is connected to the scanning signal line 6. The other electrode of the pixel capacitor 1 is connected to a common power supply line 7. Such a configuration is provided for each pixel.

Each scanning signal line 6 is a data scanning circuit (not shown) for sequentially outputting a scanning signal for each scanning signal line 6.
And each data signal line 5 is connected to a data transfer circuit (not shown) that transfers a data signal for image display to each drive element 3. The data transfer circuit outputs the display data signal to the data signal line 5 for each scanning line or for each pixel. When any one of the scanning signal lines 6 is activated, the plurality of driving elements 3 connected to the activated scanning signal line 6 are turned on, and the display data signal on the data signal line 5 causes the driving elements 3 to be turned on. The electric charge is supplied to the pixel capacitor 1 through the electric field. Then, a voltage is applied to the sandwiched liquid crystal by the electric charge accumulated in the pixel capacitor 1, and the display is maintained.

On the other hand, in practice, since the pixel capacitor 1 has a relatively high resistance but a leak resistance, the accumulated electric charge leaks out through the leak resistance until the driving element 3 is turned on again. During this period, the voltage between the terminals of the pixel capacitor 1 is attenuated, and the display quality is reduced. For this reason, as shown in FIG. 11, a method in which an auxiliary capacitor 8 is provided in parallel with the pixel capacitor 1 and a voltage is maintained by the auxiliary capacitor 8 is adopted.

Further, it is necessary to perform AC driving on the pixel capacitance 1, that is, the liquid crystal sandwiched between the one electrode and the other electrode. At this time, 1H inversion driving is performed in which the polarity of the driving voltage is inverted for each scanning line so that flicker does not occur due to the periodic inversion of the driving voltage applied to the liquid crystal. However, in the case of 1H inversion driving, the voltage difference between each scanning line is large. Accordingly, there is an inconvenience that the change of the liquid crystal alignment cannot follow the inversion of the drive voltage every 1H, and a steep change of display cannot be clearly displayed.

As a remedy, means for providing a black matrix made of a light-shielding material such as a metal thin film between scanning lines is adopted. However, this black matrix has the disadvantage of lowering the aperture ratio of the liquid crystal display device and darkening the image.

As one of means for solving the problem, a field sequential scanning method in which surface scanning is performed for each color at the time of colorization is effective. The field sequential scanning method is a color technology that performs time-continuous additive color mixing by displaying two or more colors in a time-division manner. In Japanese Patent Application No. 3-77983 (Japanese Patent Application Laid-Open No. 4-310925) proposed by the present applicant, two embodiments are mentioned as a driving method in a field sequential scanning method. The first in this application
In the example of FIG. 11, the driving circuit included in one pixel is
In addition to the configuration of the driving circuit of FIG.
A buffer amplifier circuit 2 is provided between the buffer amplifier circuit 2 and the pixel capacitor 1, and a storage capacitor 4 is connected in parallel with the buffer amplifier circuit 2 and the pixel capacitor 1.

The driving circuit of the prior art operates as shown in the timing chart of FIG. In the driving circuit of the prior art, one field period is set to the R display time TR,
The time is divided into a G display time TG and a B display time TB. Also,
The transfer time τ of the display data of each of the R, G, and B images to the pixel portion is extremely short, and the display is performed with the remaining display times TR, TG, and TB. The high input impedance of the buffer amplifier circuit 2 ensures that the transferred display data is securely held by the storage capacitor 4 and the period until the next display data is transferred, that is, the display periods TR, TG, and TB. The function of maintaining the charge in the pixel capacitor 1 is realized.
Further, assuming that each scanning line from the first first scanning line to the last n-th scanning line is sequentially turned on during the transfer time τ, the on-time of each scanning line is as follows.
13 (3) to 13 (7).

In the second embodiment of the prior art, as shown in FIG. 14, in addition to the configuration of the drive circuit of FIG.
The common terminal of the switch SW2 is connected to the common terminal of the switch SW2 and the common terminal of the switch W2. One individual terminal of each of the switches SW1 and SW2 is connected to each other, and each other individual terminal is also connected to each other. A holding capacitor 4a is connected between one individual terminal of each of the switches SW1 and SW2 and the common signal line 7, and a holding capacitor 4b is connected between the other individual terminal of each of the switches SW1 and SW2 and the common signal line 7. Connected. While the display is performed with the voltage based on the charge held in one of the holding capacitors 4a and 4b, the charge is stored in the other holding capacitor of the holding capacitors 4a and 4b.

With such a configuration, the storage capacitors 4a,
4b, the transfer of the display data to any one of them and the writing of the display data to the pixel capacitor 1 can be performed alternately. FIG. 15 is a timing chart for explaining the operation of the second example of the conventional example. FIGS. 15A and 15B show the transfer time of the display data to the storage capacities 4a and 4b. R image, G within one field time
Images and B images can be transferred. Therefore, in the conventional example, the transfer time τ is extended to 1/3 field period.

Patent application No. Hei 4-2217 filed by the present applicant
Japanese Patent Application Laid-Open No. 75-221774 and Japanese Patent Application Laid-Open No. 4-221774 disclose an invention which suggests a specific circuit configuration in a pixel as means for enabling clear display and for quickly switching the display. Japanese Patent Application No. 4-2177 filed by the present applicant
No. 5 discloses an invention which suggests that a refresh circuit is added to the circuit of FIG. 14 to refresh the electric charge of the pixel capacitance, thereby enabling AC driving of the pixel capacitance. Also, Japanese Patent Application No. 4-221 filed by the present applicant.
774, the buffer amplifier circuit 2 is a dual amplifier circuit that can supply a positive potential or a negative potential charge to the pixel capacitance according to the voltage of the storage capacitor,
It suggests an invention that allows AC driving.

A driving circuit system of the field sequential scanning system is disclosed in Japanese Patent Application Laid-Open No. Sho 64-5282. In this prior art, a configuration capable of performing color display in a transmission type liquid crystal display device is shown. That is, in this transmission type liquid crystal display device, in addition to the liquid crystal cell which is a display portion, an R signal which is a display signal for each of three primary colors (red (R), green (G), and blue (B)). , G signal and B signal, a sampling circuit,
It has a pair of frame memories for storing a display signal corresponding to an image for a frame and a display signal corresponding to an image for the next frame. Further, the transmission type liquid crystal display device, a display period control unit that selects a display signal read from the pair of frame memories for each of the R, G, and B signals, and applies a display voltage to a liquid crystal cell; And a liquid crystal control unit for holding the display voltage, three light source units used for each of R, G, and B colors, and a liquid crystal shutter for blocking or passing each light source light from the three light source units. It has. The prior art suggests a method in which the vertical scanning time is time-divided into three equal parts, and R, G, and B signals are alternately read from the pair of frame memories to perform color display.

[0019]

In the field sequential scanning method, when data is simply transferred to a pixel portion,
That is, as shown in FIG. 13, each pixel row which is located farthest from the data transfer circuit and in which the display signal is to be written last can be written without shortage as shown in FIG. When writing is sequentially performed on the pixel rows at the time interval t, the display time differs between the vicinity of the first scanning line, which is the upper and lower part of the screen, and the vicinity of the last scanning line.
Thereby, in the liquid crystal display device, uneven brightness or flicker occurs. Further, the effective display time as an image is gradually reduced for each scanning line, causing adverse effects such as a decrease in screen brightness. Also, due to the difference in diopter for human colors,
If each color is displayed for the same display time, there is a problem that a natural color tone of an image to be displayed on a screen should be lost.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and prevents the occurrence of luminance unevenness or flicker, prevents the brightness of a display from being reduced, and reduces the difference in human perception of each color. It is an object of the present invention to provide an image display device which can prevent a problem that a natural color tone of an image to be displayed on a screen based on the image is deteriorated based on the image quality and can significantly improve display quality.

[0021]

In order to solve the above-mentioned problems, an image display apparatus according to the present invention comprises a display means in which a plurality of pixels are arranged in a matrix, and a plurality of pixels which are scanned. Scanning means for setting a pixel to a state in which a display signal for each display color can be written; and
A plurality of display driving means for supplying a display signal for each display color, a time modulation means for modulating the writing time of the display signal for each display color to each pixel according to the progress of scanning by the scanning means , Stores input display signals for each display color
Storage means , wherein the storage means is adapted to human visual characteristics.
Each table for one field time-divided in the time axis direction according to
A display signal for each color is output to the time modulation means, thereby solving the above problem. A plurality of scanning signal lines respectively connected to a plurality of pixel rows arranged in a row direction among the plurality of pixels and supplying a scanning signal from the scanning means to each pixel row; And a plurality of display signal lines respectively connected to a plurality of pixel columns arranged in a column direction and supplying a display signal for each display color from the display driving unit to each pixel column. Wherein the time modulating means comprises:
In some cases, the scanning period of at least one scanning signal line is set to be different from the scanning periods of the other plurality of scanning signal lines. The time modulation means may change the transfer time of the display signal for one screen corresponding to one screen. Based on a predetermined signal component of the display signal, signal identification means for identifying the display signal to any one of a plurality of types is provided, and modulation of the writing time of the display signal to the pixel by the time modulation means is performed. May be performed based on information from the signal identification means. A color display signal having a color component is used as the display signal, and the signal identification unit may identify the color display signal based on a difference in a color component included in the display signal. Before Symbol time modulation means, by changing the read timing for reading the display signal for each display color stored in said storage means from said storage means, display signal for each display color of the plurality of pixels May be modulated. The display means may be a liquid crystal display element.

[0022]

[0023]

[0024]

[0025]

[0026]

[0027]

[0028]

According to the present invention, the effective voltage application time to the liquid crystal is prolonged, and the difference between the voltage application time to the liquid crystal in the first scan line and the last scan line in the scan is reduced. Etc. can be suppressed. Further, natural color can be expressed by means for correcting the difference in human visual perception with respect to color components.

[0029]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a block diagram of a liquid crystal display device according to a first embodiment of the present invention. In the figure, R (red), G (green) and B (blue) input to the display device of the present invention.
The display signal for each color is a signal line 10 corresponding to each color.
R, 10G, and 10B are supplied from an external control device. Each color signal from each signal line 10R, 10G, 10B is supplied to A / D converters 20R, 20R provided for each color.
G and 20B, respectively, and are converted from analog signals to digital signals.

In the A / D converter 20R, storage devices 31 and 32 for storing the red signals one field at a time,
The storage devices 34 and 3 are connected to the A / D converter 20G and store the green signals one field at a time.
5 and 36 are connected, and the storage device 3 stores the blue signal in the A / D converter 20B one field at a time.
7, 38 and 39 are connected. These storage devices 3
1 to 39 are collectively referred to as a storage device group 30. Storage device group 30
, The color signal for each color is divided into the n-th field and the (n +
1) Fields and (n + 2) th field can be stored over three field times, respectively.

The color signals from the storage device group 30 are input to the write time modulator 82 and the time axis modulator 40, respectively. The writing time modulation device 82 is a circuit that modulates the writing time of the display signal to the pixel. The time axis modulation device 40 expands or compresses the color signal for each color from the storage device group 30 in the time axis direction. Circuit. The digital signal from the time axis modulator 40 is converted into a plurality of D / D signals that convert the time axis expanded or compressed digital signal into an analog signal.
The signal is converted into an analog signal by the A-converter 50. D
The A / A converter 50 has a plurality of pixels arranged in a matrix in the D / A converter 50 arranged in a row direction of a plurality of pixels arranged in a matrix in the pixel display section 100. A data transfer circuit 60 for generating a signal voltage for driving a liquid crystal in the pixel display unit 100 is connected.

The display operation in the pixel display unit 100 is performed by sequentially scanning the pixel rows of each of a plurality of pixels arranged in a matrix of the pixel display unit 100 by the data scanning circuit 70. Is achieved. The liquid crystal display device of this embodiment further includes a control device 80 for controlling each of the above devices.

Each of the constituent elements in the figure may be formed on the same substrate or on separate substrates, and the combination thereof is arbitrary.

In the embodiment shown in FIG. 1, the time axis modulation processing is performed by the time axis modulation device 40 provided between the storage device group 30 and the D / A conversion device 50. On the other hand, in the present embodiment, the time axis modulation processing is performed by another means, for example, by changing the readout timing from the storage device group 30 to expand or compress each color signal in the time axis direction. No problem. This is the same in the following embodiments.

Next, let the original signal be an interlace signal,
The operation of displaying all the display signals of one TV frame on the pixel display unit 100 in the non-interlace mode during the TV field period will be described. Here, a color signal of an nTV field of a red signal is represented by a symbol Rn, a color signal of an nTV field of a green signal is represented by a symbol Gn, and an nT
The color signal of the V field is represented by a symbol Bn. Similarly,
The color signals of the (n + 1) -th TV field of the red signal, the green signal, and the blue signal are represented by symbols R (n + 1), G (n +
1) and B (n + 1).

In FIG. 1, the color signal lines 10R, 10G, 1
0B, the color signals Rn, R (n +
1), R (n + 2); Gn, G (n + 1), G (n +
2); Bn, B (n + 1), B (n + 2) are input to the liquid crystal display device of the present embodiment. At this time, each color signal is
The signal is converted from an analog signal to a digital signal by the A / D converter 20, and is input to the storage device group 30 and stored.

At this time, each color signal is input in a time-division manner along a horizontal time axis as required. The input order is such that the color signals Rn, Gn, and Bn of the n-th TV field are stored in the storage devices 31, 34, and 37, and the color signals R (n + 1), G (n + 1), and B () of the next (n + 1) TV field are stored. n +
1) are stored in the storage devices 32, 35, and 38, and the color signals R (n + 2) of the next (n + 2) th TV field are stored.
G (n + 2) and B (n + 2) are stored in the storage devices 33, 36, 3
9 is stored. During the process of storing the color signals R (n + 2), G (n + 2), B (n + 2) of the (n + 2) th TV field, the nth TV field and the (n + 1) th field are stored.
A process of outputting and displaying a color signal of a TV field, that is, all signals of one TV frame is performed.

The display is performed as follows. The control device 80 outputs the color signals Rn, Rn from the storage device group 30.
The (n + 1) data is selected and input to the time axis modulator 40. Data stored in the storage device group 30 includes:
Because it is time-divided and stored in the horizontal time axis as required, the selected data, the time axis modulation device 40
To extend along the horizontal time axis. The time axis modulated data of each color signal is converted into an analog signal by the D / A converter 50 and converted into a signal form suitable for display in the pixel display unit 100. The color signal of the analog signal format from the D / A conversion device 50 is input to the data transfer device 60.

The pixel transfer section 1 is controlled by the data transfer circuit 60.
00, eg red signals Rn, R (n + 1)
Is shown in the timing chart of FIG.
In this embodiment, one TV field period is time-divided into a red display period, a green display period, and a blue display period. In the red display period, at time t0, the data transfer circuit 60
Outputs a red color signal R1 to each pixel connected to the first to n-th scanning lines. On the other hand, all the scanning signals to the first to n-th scanning signal lines rise at the same time t0. Here, the ON period P1 of the scanning signal to the first scanning line is selected as a time during which a color signal can be sufficiently written in the liquid crystal of the pixel connected to the n-th scanning line. By writing the color signal to the pixel during the ON period P1, the liquid crystal of the pixel connected to the n-th scanning line changes its alignment state to an alignment state determined according to the voltage of the applied color signal. Can be.

In this embodiment, the ON period of each scanning line is
Starting at the time t0, each time t1, which gradually delays as the scanning progresses from the first scanning line to the nth scanning line,
It ends at t2, ..., tn. Therefore, the ON periods P1, P2, P3,..., Pn of each scanning line gradually become longer. At this time, the liquid crystal of the pixel connected to each scanning line rises at the time P1 from the rising start time t0. Therefore, the liquid crystal of the pixel connected to any of the scanning lines performs display in a period after the time t1 after the lapse of the time P1 from the time t0. Hereinafter, scanning for each scanning line proceeds similarly.

Since the liquid crystal display device of this embodiment performs field sequential scanning, a display period corresponding to one color signal is, for example, a 1/3 TV field period. When there is no means for accumulating a color signal (data) other than the signal being displayed on the pixel display unit 100, the pixel data of the red signal can be obtained in an extremely short writing time τ as shown in FIG. The data of the color signals Rn and R (n + 1) is transferred to the pixel display unit 100, and the remaining time TR is a display period. At this time,
When transferring the red color signals Rn and R (n + 1), a write time modulator 8 for modulating the write time to the pixel
2, the data scanning circuit 70 and the data transfer circuit 60
The time axis modulator 40 and the like are controlled so that the on-time of the scanning line is different from at least one line as shown in FIG. In the embodiment shown in FIG. 2, as described above, the start time t0 of the ON period of the n-th scanning line is set to the same time for all the scanning lines, and the ON periods P1, P2,
.., Pn are sequentially changed to be longer.

As described above, when the ON period of each scan line is gradually changed, the difference between the rise time of the liquid crystal of the pixel connected to the first scan line and the rise time of the liquid crystal of the pixel connected to the nth scan line is obtained. And the occurrence of luminance unevenness and flicker can be suppressed. Further, a decrease in display brightness can be prevented, and display quality can be remarkably improved.

The generation timing of the scanning signal is not limited to the timing at which the scanning start time of each scanning line is selected to be the same as shown in the time chart of FIG.
Other timings may be selected. For example, the timing described below as shown in FIG. 4 may be selected. The ON period of the first scanning line starts from the time t0 and ends at the time t1 after the elapse of the period P1. The start time tia (i = 2 to 2) of the ON period of the i-th scanning line (i = 2 to n)
n) is the start time t of the ON period of the (i-1) th scanning line.
(I-1) after the start time t (i-1)
It is selected at a time before the period P1 elapses from a.

The end time tib (i = 2 to n) of the ON period of the i-th scanning line (i = 2 to n) is selected at a time after the elapse of the period Pi from the start time tia. This period Pi
Is selected as a period that is equal to or longer than the period P1 and gradually becomes longer as scanning proceeds from the first scanning line to the n-th scanning line.

In this manner, the scanning signal may be generated at such a timing that the ON periods of the (n-1) th scanning line and the nth scanning line overlap.

As still another modified example of the generation timing of the scanning signal, as shown in FIG. 5, the (i-1) th scanning line (i = 2 to n) and the ith scanning line (i = 2 to n). Therefore, the timing may be selected such that the ON periods Pi (i = 1 to n) of the respective scanning lines gradually become longer as the scanning progresses. Further, the timing may be a combination of the above examples of the generation timing of the scanning signal.

As another embodiment for modulating the writing time to the pixel, the display time for each of the three equally divided color signals in one TV field indicated by a broken line in FIG. 3 may be changed to the timing indicated by the solid line. In FIG. 3, for example, based on a color component signal, for example, a red display period TR is set as a shortest period,
The display time is changed so that the green display period TG is longer than the display period TR and the blue display period TB is longer than the display period TG.

As described above, the display periods TR, TG,
By changing TB, it is possible to correct a difference in visual perception of a human color. Therefore, when each color is displayed for the same display time due to the difference in visual perception of human colors, it is possible to solve the problem that the natural tint to be displayed in the image to be displayed on the screen is impaired, The display quality in the liquid crystal display device can be remarkably improved.

As a modification of this embodiment, the display time may be changed based on the amplitude level of the signal. In this modification, for example, the smaller the change in luminance, the shorter the display time. Thus, when the change in luminance is small, the display time can be shortened, and the effective display time can be lengthened. Also, the larger the change in luminance,
Increase the display time. This makes it possible to sufficiently change the alignment state of the liquid crystal when the change in luminance is large. In this regard, the display quality can be significantly improved.

When the pixel display section 100 shown in FIG. 1 is provided with a storage means such as a memory for storing signals (data) other than the signal being displayed, naturally, the transfer time τ Is longer, for example, over a 1/3 TV field period or a 1 TV field period.

As for the writing time to the above-mentioned pixel, as shown in FIG. 7, a switching circuit 81 having a judgment means and a modulation switching means is provided separately from a writing time modulation device 82 for modulating the writing time. The writing time may be modulated by the signal to be written. A signal indicating a difference in color components of a displayed image signal, a signal indicating a level of the image signal, a signal indicating the polarity of the image signal, or the like is input to the determination unit. The judging means judges a difference between color components according to the type of the input signal, judges whether the level of the image signal exceeds a predetermined level, or judges the polarity of the image signal. Then, a determination signal corresponding to the determination result is output. As a method of determining a difference in color component, for example, a pulse signal having a different amplitude level or signal width for each color is inserted into a blanking period of an image signal or a period corresponding to the blanking period. May be. Further, when the determination signal output from the determination means is input to the modulation switching means, and the modulation of the writing time is necessary, the modulation switching means outputs a switching signal to the writing time modulation device 82 to perform the modulation of the writing time. Do.

As described above, the modulation of the writing time required for writing the color signal to the pixel is performed. At this time, the data transfer method from the data transfer circuit 60 to the pixel display unit 100 is arbitrary. For example, a dot-sequential scanning method in which data is transferred in a dot-sequential manner may be adopted, or signals for one line are collected. Line-sequential scanning method to transfer by
A scanning method in which several lines are simultaneously divided and transferred may be adopted.

In each of the above embodiments, the original signal is an interlaced signal, and one TV field is used during one TV field period.
The operation of displaying all the signals of the frame on the pixel unit in a non-interlaced manner has been described. Here, the color signal transferred to the pixel may be a signal faithful to the original signal, or may be a signal that has been subjected to some processing, for example, an addition or subtraction based on a signal of 2 TV fields or more. May be.

Further, it goes without saying that the color signal is not limited to the interlace signal, but may be a non-interlace signal. The color signal does not need to be a color signal composed of three primary colors, and may be a two-color signal, for example. In addition, the data stored by the storage device group 30 does not need to be 3 TV fields (3 frames in the case of interlace), and the number is arbitrary. For example, the storage device group 30 stores signals for 2 TV fields, red signals Rn and R (n + 1), green signals Gn and G (n + 1), and blue signals Bn and B (n +
1) may be stored.

Further, it is not necessary to completely separate the storage device groups 30 corresponding to, for example, the red, blue and green signals from each other. As a modification, for example, one storage device group may be used in a time-division manner, and may be used for red, green, or the like in terms of time.

Further, in the method of scanning a plurality of pixels, the same data is transferred to two scanning signal lines with respect to the original signal of the interlace, and the combination scanning is performed in the nth and (n + 1) th TV fields. Things are also possible. Here, the scanning of the two scanning signal lines to which the same data is transferred is as follows.
It is not necessary to perform two-line simultaneous scanning. Each of the above modifications is
The same holds for each embodiment described below.

The electrical configuration of the liquid crystal display device for modulating the field sequential scanning / writing time is not limited to the example shown in FIG. 1, and other configurations may be used. Hereinafter, some modifications of the configuration of the liquid crystal display device will be described.

The configuration of the liquid crystal display device shown in FIG. 6 differs from that of FIG. 1 in that it does not include an A / D converter or a D / A converter, and for example, handles image signals input from the outside as analog signals. This is a configuration in the case of holding in a storage means such as a capacitor.

In the liquid crystal display device of this embodiment, the color signals R, G, and B to be displayed correspond to the red signal line 10R and the green signal line 10R.
G, and is input to the liquid crystal display device of the present embodiment via the blue signal line 10B. The input color signals are sampled by the sampling devices 200R, 200G, 200B for each color signal. Each sampling device 200R, 2
The color signals sampled at 00G and 200B are stored in the storage device group 30. The storage device group 30 includes storage devices 31 and 32 for each color, each of which includes a capacitor or the like.
33, 34, 35, 36; 37, 38, and 39, and stores each color signal one field at a time.

The storage device group 30 is connected to the data transfer circuit 60 and the write time modulation device 82, respectively. The write time modulation device 82 is connected to the data scanning circuit 70. Each of the above devices is controlled by a control device 80.

In the structure of the liquid crystal display device of the embodiment shown in FIG. 6, the time axis modulator is not particularly shown.
If necessary, a time axis modulator as shown in each of the above embodiments may be provided.

FIGS. 7, 8, 9, and 10 are block diagrams showing still another embodiment of the present invention. Unlike the above-described embodiment, the pixel display unit 100 is provided with a sampling circuit for sampling an image signal for each pixel. still,
In these figures, only the pixel capacitance 1 is connected to the pixel electrode, but an auxiliary capacitance 8 may be further connected to the pixel electrode if necessary.

FIG. 7 is a block diagram showing the basic configuration of this embodiment. Circuits equivalent to those in the previous embodiments are denoted by the same reference numerals. In FIG. 7, a video signal is input to the data scanning circuit 70 via the switching circuit 81 and the write time modulation device 82 via the signal line 10. In the present embodiment, as an example, the shift register 400 provided in the data transfer circuit 60 in the configuration example of FIG. 1 outputs a sampling pulse at a horizontal scanning cycle to a pixel row composed of pixels arranged in the row direction. On the other hand, the display signal to each pixel 500 is transmitted to the shift register 400.
Is supplied to each pixel 500 by, for example, a point scanning method or a line scanning method.

In each pixel 500, a sampling circuit 200 for sampling the display signal, a data holding circuit 600 for holding the sampled display signal for a predetermined time, and a display signal from the data holding circuit 600 for each color. A color selection circuit 800 for selecting one of the signals and a data conversion circuit 300 are provided.

Note that the shift register 400 and the data conversion circuit 300 may be provided outside the pixel unit 500 or both outside and inside the pixel unit 500 as necessary. Further, in the writing time modulation device 82 for modulating the writing time of the display signal to the pixel capacitor 1, the switching circuit 81 is arranged at the preceding stage, but this configuration may be reversed.

Further, the data scanning circuit 70 receives an output signal from the writing time modulation circuit 82 for modulating the writing time to the pixel, and controls the sampling control circuit for controlling the sampling operation of the sampling circuit 200 and the operation of the color selection circuit 800. , And a circuit having both functions of a color selection control circuit for controlling the scanning and a scanning circuit for scanning a plurality of scanning lines. As another configuration example, the data scanning circuit 70 is divided into the sampling control circuit, the color selection control circuit, and the scanning circuit, and each of the divided circuits outputs an output signal from the writing time modulation circuit 82. A configuration may be employed. Also, in the figure, the modulation of the writing time is performed by the data scanning circuit 70. On the other hand, the configuration for modulating the writing time is not limited to this, and other means such as changing the switching timing of the color selection circuit 800 may be used. This is the same in each of the following embodiments.

Next, the operation of the liquid crystal display device of this embodiment will be described with reference to a specific circuit.

FIG. 8 shows a configuration for performing signal processing around the pixel section 500 of the liquid crystal display device according to the present embodiment and the pixel section 50.
FIG. 3 is a block diagram illustrating a specific circuit configuration of a zero. In this embodiment, portions corresponding to the configuration shown in FIG. 7 are denoted by the same reference numerals. In the liquid crystal display device of the present embodiment, three color signals R, G, and B are input to the pixel display unit 100 via the color signal lines 10R, 10G, and 10B. In this embodiment, the shift register 400 is used to output a sampling pulse at a horizontal scanning period to a plurality of pixel rows arranged in the horizontal direction.

The respective color signals are input to a switching circuit 81, and the output from the switching circuit 81 is input to a writing time modulation device 82. The output of the writing time modulator 82 is input to a color selection drive circuit 810 that generates a signal for driving the color selection circuit 800. The sampling circuit 200 is provided for each of the color signal lines 10R, 10G, 10G.
It has two sets of three transistors Tr1, Tr2 and Tr3 to which the color signals from B are respectively input. Each transistor Tr1, Tr2, Tr3 of each set includes two ANDs.
Each output of the circuit 250 is turned on / off for each set. Each AND circuit 250 calculates the logical sum of each scanning signal from the data scanning circuit 70 via the scanning lines 71 and 72 and a signal from the shift register 400.
The scanning signals on the scanning signal lines 71 and 72 are alternately output every field period.

The data holding circuit 600 includes holding capacitors C1, C2, C3, C4, C5, and C6 each of which is a capacitor for individually storing the analog signals from the two sets of transistors Tr1, Tr2, and Tr3 as electric charges. I have.
The signal from the data holding circuit 600 is sent to the color selection circuit 800
Is input to The color selection circuit 800 includes, for example, six transistors Tr7, Tr8, Tr9, and T each composed of a MOS transistor as an example in which six types of signals from the color selection drive circuit 810 are input as control signals.
r10, Tr11 and Tr12. The output terminals of the transistors Tr7 to Tr12 are commonly connected and input to the data conversion circuit 300.

The data conversion circuit 300 may be provided outside the pixel section 500 as necessary, or both outside and inside the pixel section 500.

The operation of the liquid crystal display of this embodiment will be described below with reference to FIGS. FIG. 10 is a timing chart for explaining the operation of this embodiment. When the color signals Rn, Gn, and Bn of the n-th TV field are input via the color signal lines 10R, 10G, and 10B, first, the scanning signal line 71 is turned on for each scanning line within the vertical cycle period. Is output. Shift register 400
Are sequentially turned on in the horizontal direction within the horizontal period, and the AND circuit 250 in the sampling circuit 200
For each line, the transistors Tr1, Tr2, Tr3 in the sampling circuit 200 are turned on, and the color signals Rn,
Gn and Bn are sampled. The sampled color signal is stored in the storage capacitor C1 in the data storage circuit 600.
To C3.

The above operation is performed up to the n-th scanning signal line.
The n-th TV field data is all stored in the storage capacitors C1 to C3 for each color. Thereafter, similarly, each color signal of the (n + 1) th TV field is stored in the storage capacitors C4 to C6 in the data holding circuit 600 by activating the scanning signal from the scanning signal line 72.
The (n + 1) th TV field data is stored in the storage capacitors C4 to C
6, the color selection drive circuit 810 activates the color selection signal line. As a result, the transistors Tr7, Tr8, and Tr9 in the color selection circuit 800 are turned on alternately, and the color signal of the n-th TV field held in the holding capacitors C1 to C3 is converted to the data conversion circuit 30.
Enter 0.

Here, the switching circuit 81 realizes the operation of determining the writing time as described above based on a signal representing a signal level, a signal representing a color component signal, or the like, and converts the switching signal to a signal at a subsequent stage. Write time modulator 8
Input to 2. The write time modulation device 82 controls the color selection drive circuit 810 according to the switching signal, and switches the switching transistors Tr7,
The on-periods of Tr8 and Tr9 are changed. This allows
As shown in FIG. 10, the display time of each color is modulated from the timing represented by the broken line to the timing represented by the solid line.

In this way, it is possible to adjust the luminance of each color, enhance a specific color, or attenuate a specific color.

In each of the above embodiments, a liquid crystal display device has been described as an example. Since the liquid crystal must be driven by an alternating current, the data conversion circuit 300 may be a circuit having a polarity inversion function of inverting the polarity of an output signal. After that, the data converted by the data conversion circuit 300 is sequentially transferred to the pixel capacitor 1 with the color signals R,
G and B are displayed. Further, the display signal of the (n + 1) th TV field sequentially turns on the transistors Tr10, Tr11, and Tr12 while the display signal of the (n + 2) th TV field is stored in the storage device group 30. As a result, a display signal for each color is written into the liquid crystal, and a red image, a green image, and a blue image are sequentially displayed within one field period.

In the timing example shown in FIG. 10, as an example, the display time of the green display signal G extends over 1/3 TV field. As a modification of the present embodiment, there is no problem even if the display time of each color is set to be within 1/3 TV field.

The sampling circuit 200 shown in FIG.
As another configuration example, as shown in FIG.
00 is provided inside the pixel unit 500 for each scanning line, and a scanning signal from the data scanning circuit 70 is input to the shift register 400, thereby selecting a scanning line and providing the pixel unit 500 connected to the scanning line. Sampling in the sampling circuit 200 may be performed in conjunction with each other.

Further, in the above-described embodiment, an example has been described in which a capacitor is used as the data holding circuit 600 and a MOS transistor is used as the color selection circuit 800. May be a means,
Also, the number is not limited.

Next, still another embodiment will be described.
In each of the above-described embodiments, the data storage unit is provided either inside the pixel display unit 100 or outside the pixel display unit 100. However, the data storage unit is provided inside the pixel display unit 100. It may be provided separately from the outside. In such a case, the connection and configuration of other components are also changed. For example, the writing time modulation unit is changed to the pixel unit 500 and the data transfer circuit 60 or the data scanning circuit 7.
It may be installed in both the area outside the pixel unit 500 such as 0.

In each of the embodiments described above, each means and circuit element used in each of the embodiments is a substrate or a substrate made of a material containing single crystal silicon, sapphire, diamond, or polycrystalline silicon. The effect is particularly exhibited when the element is formed from a thin film.

The above is the configuration and operation of each embodiment as an example of the present invention. In the present invention, the display signal handled is not limited to the ordinary television signal described in each of the above embodiments, but may be other display signals such as an image signal created by using a computer. There is no problem even if there is. Whether the display signal is an interlaced signal or a non-interlaced signal, a color signal or a black and white signal, or whether the pixel display unit 100 has the number of scanning lines capable of displaying the contents of the 1 TV frame. The display is not performed, or the content of each frame or each field is displayed as it is or displayed by some processing, or the signal line used for transferring the display signal or the display digital data is provided for each color. It goes without saying that the configuration and the display operation of each of the above-described embodiments are appropriately modified according to whether they are independently set or shared with respect to. Further, in each of the above embodiments, the present invention has been described by taking the liquid crystal display device as an example. On the other hand, it goes without saying that the present invention is modified and applied to display devices other than the liquid crystal display device according to the characteristics of the display device.

[0084]

As is apparent from the above description, according to the present invention, in the pixel display device using the field sequential scanning method, the voltage application time to the liquid crystal becomes longer, and the first line and the last line of the scanning are applied. In this case, the difference in the voltage application time to the liquid crystal can be reduced, the screen can be prevented from becoming dark, and the occurrence of luminance unevenness, flicker, and the like can be suppressed. In addition, natural brightness and color can be expressed by correcting differences in human visual perception with respect to color components.

[Brief description of the drawings]

FIG. 1 is a block diagram of a liquid crystal display device according to one embodiment of the present invention.

FIG. 2 is a time chart for explaining a scanning operation according to the embodiment.

FIG. 3 is a time chart illustrating a display operation according to another embodiment of the present invention.

FIG. 4 is a time chart for explaining a display operation of still another embodiment of the present invention.

FIG. 5 is a time chart for explaining a display operation of still another embodiment of the present invention.

FIG. 6 is a block diagram of a liquid crystal display device according to still another embodiment of the present invention.

FIG. 7 is a block diagram of a liquid crystal display device according to still another embodiment of the present invention.

FIG. 8 is a circuit diagram showing a configuration example of the present embodiment.

FIG. 9 is a block diagram of still another configuration example of the present invention.

FIG. 10 is a time chart of still another embodiment of the present invention.

FIG. 11 is a block diagram of an electrical configuration per pixel in a conventional example.

FIG. 12 is a block diagram of an electric configuration per pixel according to another conventional example.

FIG. 13 is a time chart for explaining the operation of the conventional example.

FIG. 14 is a block diagram of still another conventional example.

FIG. 15 is a time chart of a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Pixel capacitance 2 Buffer amplifier circuit 3 Drive element 4 Storage capacity 5 Data signal line 10 Color signal line 30 Storage group 40 Time axis modulator 50 Digital-to-analog converter 60 Data transfer circuit 70 Data scanning circuit 80 Control device 100 Pixel display section 200 sampling circuit 250 AND circuit 300 data conversion circuit 500 pixel unit 600 data holding circuit 800 color selection circuit

Continuation of the front page (58) Field surveyed (Int. Cl. ⁷ , DB name) G02F 1/133 510 G02F 1/133 550 G09G 3/36

Claims (7)

(57) [Claims] 1. A display unit in which a plurality of pixels are arranged in a matrix, and a scanning unit that scans the plurality of pixels and sets each pixel to a state in which a display signal for each display color can be written. A plurality of display driving means for supplying a display signal for each display color to the plurality of pixels, and a writing time of the display signal for each display color to each pixel,
And time modulation means for modulating in accordance with the progress of scanning by said scanning means, and storage means for storing for each display color of the display signal input, the storage means, in the time axis direction according to the human visual characteristics Time
Display signals for each display color for one divided field
Images display device for outputting to said time modulation means. 2. The display device according to claim 1, wherein the display unit is connected to a plurality of pixel rows arranged in a row direction among the plurality of pixels, and supplies a plurality of scanning signals from the scanning unit to each pixel row. A signal line connected to each of a plurality of pixel columns arranged in a column direction among the plurality of pixels, for each display color from the display driving unit;
A plurality of display signal lines for respectively supplying display signals to each pixel column, wherein the time modulation unit sets a scanning period of at least one of the plurality of scanning signal lines to another 2. The image display device according to claim 1, wherein the scanning period is different from the scanning period of the scanning signal line. 3. The time modulating means changes a transfer time of a display signal for one screen corresponding to one screen.
The image display device as described in the above. 4. A signal discriminating means for discriminating a display signal into one of a plurality of types based on a predetermined signal component of the display signal is provided, and the time modulation means transmits the display signal to a pixel. The image display device according to claim 1, wherein the modulation of the writing time is performed based on information from the signal identification unit. 5. A color display signal having a color component is used as the display signal, and the signal identification means identifies the color display signal based on a difference in a color component included in the display signal. The image display device as described in the above. 6. Before Symbol time modulation means, by changing the read timing for reading the display signal for each display color stored in said storage means from said memory means, each display color of the plurality of pixels The image display device according to claim 1, wherein modulation of a writing time of a display signal is performed for each display. 7. The image display device according to claim 1, wherein said display means is a liquid crystal display element.