JP4945979B2 - Nitride semiconductor field effect transistor - Google Patents

Description

  The present invention relates to a nitride semiconductor field effect transistor, and more particularly to a MIS field effect transistor capable of high-temperature operation, high-speed switching, and high-power operation used for mobile base stations and satellite communications, particularly a gate of MIS-HEMT. The present invention relates to a nitride semiconductor field effect transistor characterized by a configuration for reducing a leakage current.

  With the recent development of wireless communication technology or satellite communication technology, there is a demand for higher speed and higher output of devices, and there is also a demand for operation in areas where conventional Si devices and GaAs devices cannot. .

  Group III nitride semiconductors typified by GaN, AlN, InN, and mixed crystals thereof have attracted a great deal of attention as high-power electronic devices and short-wavelength light emitting devices that replace GaAs-based devices because of their excellent material properties.

For example, in the case of the representative GaN,
a. The band gap is as high as 3.4 eV, and high temperature operation near 200 ° C is possible.
b. The breakdown electric field is 2 × 10 ⁶ V · cm ⁻¹ and high breakdown voltage,
c. Although the saturation drift velocity of electrons is lower than that of GaAs, it is relatively high at 2.7 × 10 ⁷ cm / sec.
It has the characteristics.

  As a high-power electronic device utilizing such characteristics, many reports have been made on field-effect transistors, particularly high-electron mobility transistors (HEMTs) in which a two-dimensional electron gas with little ionized impurity scattering is formed in a channel layer. Yes.

  However, since Group III nitride semiconductors such as GaN are not very crystalline, there are many dangling bonds and surface levels in the crystal, which are caused by these dangling bonds and surface levels. There is a problem that the gate leakage current is large.

Therefore, in recent years, there has been reported a MIS-HEMT in which a SiN film is inserted between a gate electrode and a group III nitride semiconductor in order to reduce the reverse and forward gate leakage current and improve the breakdown voltage. (For example, refer nonpatent literature 1).
http: // www. nuee. nagoya-u. au. jp / labs / mizutakalab / thindex. html

However, since the band gap of the group III nitride semiconductor itself is large, oxides and nitrides such as SiN, SiO ₂ , Al ₂ O _{3 and the} like conventionally used as a gate insulating film do not have a sufficient band gap. There is a problem that the gate leakage current cannot be suppressed when a forward voltage is applied to the gate.

  Accordingly, an object of the present invention is to reduce gate leakage current and to realize excellent high output characteristics.

FIG. 1 is a diagram illustrating the basic configuration of the present invention. Means for solving the problems in the present invention will be described with reference to FIG.
Reference numerals 3 and 4 in the figure denote a gate electrode and a source / drain electrode, respectively.
In order to solve the above-mentioned problem, the present invention provides a nitride semiconductor field effect transistor comprising an electron transit layer made of a nitride semiconductor and an electron supply layer made of a nitride semiconductor, and the electron supply layer A gate insulating film made of any one of CaF ₂ , MgF _{2, and} LiF through any of a SiO ₂ film, a SiON film, an Al ₂ O ₃ film, or a polycrystalline AlN film on the side; A gate electrode is provided above, a source electrode is provided on one side of the gate electrode, and a drain electrode is provided on the other side .

CaF ₂ , MgF ₂ , and LiF have a large band gap and a sufficient barrier height of the conduction band for nitride semiconductors such as GaN and AlGaN. Therefore, gate leakage current can be obtained by using these halides as the gate insulating film 2. Can be kept very low.

Further, since the gate insulating film 2 is provided on the nitride semiconductor layer 1 side through an insulating film made of either SiO ₂ , SiON, Al ₂ O ₃ , or polycrystalline AlN , the interface state is further reduced. can do.

The film thickness of the gate insulating film 2 is preferably in the range of 1 nm to 50 nm, and if it is 1 nm or less, it becomes difficult to ensure a stable film quality, and if it exceeds 50 nm, the gate insulating film 2 becomes too thick. As a result, the driving ability is greatly reduced.
From a practical viewpoint, the range of 5 nm to 30 nm is more preferable.

In the present invention, CaF ₂ , MgF ₂ , and LiF having a large band gap are used as the gate insulating film. Therefore, the gate leakage current can be greatly reduced, and the MIS type using a nitride semiconductor exhibiting excellent high output characteristics. A field effect transistor can be realized.

The invention, together via a direct or surface protection semiconductor layer of GaN or the like on the carrier supply layer of AlGaN layer for forming a two-dimensional carrier gas _{layer, SiO 2, SiON, Al 2} O 3, or a multi via an insulating film made of any crystalline AlN provided a gate insulating film made of a large halides of one of the band gap of CaF _2, MgF ₂ or LiF, is provided with a gate electrode thereon.

Here, with reference to FIGS. 2 and 3, the manufacturing process of the AlGaN / GaN-based MIS-HEMT of the first embodiment of the present invention.
See Figure 2
First, an i-type GaN electron transit layer 12 having a thickness of, for example, 3 μm is formed on a SiC substrate 11 having a (0001) plane as a main surface by using a normal MOCVD method (metal organic chemical vapor deposition method). For example, an i-type AlGaN layer 13 with a thickness of 5 nm, an Si doping concentration of 5 × 10 ¹⁸ cm ⁻³ , for example, an n-type AlGaN electron supply layer 14 with a thickness of, for example, 30 nm, and an Si doping concentration of, for example, The n-type GaN protective layer 15 having a thickness of 5 × 10 ¹⁸ cm ⁻³ and a thickness of, for example, 10 nm is sequentially deposited.

Next, a SiN film 23 having a thickness of 5 to 20 nm, for example, 10 nm, and a CaF ₂ film 24 having a thickness of 5 to 20 nm, for example, 10 nm, are deposited on the entire surface by vapor deposition.

Next, a resist pattern having openings in the source electrode / drain electrode formation region is provided using photolithography, and the CaF ₂ film 24 to the n-type GaN protective layer 15 in the source electrode / drain electrode formation region are removed by dry etching. To do.
In this case, the distance between the source electrode formation region and the drain electrode formation region is, for example, 10 μm.

See Figure 3
Next, after sequentially depositing a Ti film and an Al film on the removal portion by using an evaporation / lift-off method, the source electrode 17 and the drain electrode 18 having ohmic characteristics are formed by performing heat treatment at, for example, 600 ° C. in a nitrogen atmosphere. Form.

  Next, a resist pattern having an opening with a length of, for example, 1.0 μm along the channel direction is provided, and an Ni film and an Au film as the gate electrode 25 are sequentially deposited by using an evaporation / lift-off method to thereby obtain AlGaN. / Basic structure of GaN-based MIS-HEMT is completed.

In the AlGaN / GaN-based MIS-HEMT of Example 1 of the present invention, the gate insulating film is composed of a multilayer structure film of SiN film / CaF ₂ film with a SiN film having excellent passivation properties with respect to GaN as a base. Therefore, the interface state can be further reduced.

Next, with reference to FIGS. 4 and 5, the manufacturing process of the AlGaN / GaN-based MIS-HEMT of the second embodiment of the present invention.
See Figure 4
First, an i-type GaN electron transit layer 12 having a thickness of, for example, 3 μm is formed on a SiC substrate 11 having a (0001) plane as a main surface by using a normal MOCVD method (metal organic chemical vapor deposition method). For example, an i-type AlGaN layer 13 with a thickness of 5 nm, an Si doping concentration of 5 × 10 ¹⁸ cm ⁻³ , for example, an n-type AlGaN electron supply layer 14 with a thickness of, for example, 30 nm, and an Si doping concentration of, for example, The n-type GaN protective layer 15 having a thickness of 5 × 10 ¹⁸ cm ⁻³ and a thickness of, for example, 10 nm is sequentially deposited.

  Next, a SiN film 23 having a thickness of 5 to 20 nm, for example, 10 nm is deposited on the entire surface by vapor deposition.

Next, a resist pattern having openings in the source electrode / drain electrode formation region is provided using photolithography, and dry etching using a fluorine-based gas and a chlorine-based gas is performed to form the SiN films 23 to 23 in the source / drain electrode formation region. The n-type GaN protective layer 15 is removed.
In this case, the distance between the source electrode formation region and the drain electrode formation region is, for example, 10 μm.

See Figure 5
Next, after sequentially depositing a Ti film and an Al film on the removal portion by using an evaporation / lift-off method, the source electrode 17 and the drain electrode 18 having ohmic characteristics are formed by performing heat treatment at, for example, 600 ° C. in a nitrogen atmosphere. Form.

Next, a resist pattern having an opening with a length of, for example, 1.0 μm along the channel direction is provided, and a CaF ₂ film 26 and a gate with a thickness of 5 to 20 nm, for example, 10 nm, using a vapor deposition / lift-off method. The basic structure of the AlGaN / GaN-based MIS-HEMT is completed by sequentially depositing the Ni film and the Au film as the electrode 27.

In the AlGaN / GaN-based MIS-HEMT of Example 2 of the present invention, the gate insulating film is composed of a multilayer structure film of SiN film / CaF ₂ film based on a SiN film having excellent passivation properties with respect to GaN. Therefore, the interface state can be further reduced.

The embodiments of the present invention have been described above. However, the present invention is not limited to the configurations and conditions described in the embodiments, and various modifications are possible. For example, in each embodiment, a substrate is used. However, the present invention is not limited to the SiC substrate. For example, a sapphire substrate or a ZnO substrate excellent in lattice matching with a GaN-based semiconductor may be used as in the case of SiC.
When a sapphire substrate is used, an i-type GaN carrier traveling layer may be provided via an AlN low-temperature buffer layer or a GaN low-temperature buffer layer.

In addition, the stacked structure of the semiconductor in each of the above embodiments is merely an example, and the number of stacked layers and the material composition are completely arbitrary as long as they function as a field effect transistor.
For example, the n-type GaN protective layer in each of the above embodiments may be omitted, and the composition of the i-type AlGaN layer and the n-type AlGaN layer is premised on Al _0.3 Ga _0.7 N. However, other composition ratios such as Al _0.25 Ga _0.75 N may be used.

  In addition, the layer structure / formation method of the source / drain electrode and the gate electrode in each of the above embodiments is an example, and other layer structures / materials may be used, and the manufacturing method is not limited to the lift-off method. The source / drain electrode or the gate electrode may be formed by depositing the entire surface and then selectively removing it by etching.

In each of the above embodiments, CaF ₂ is used as an insulator having a large band gap constituting the gate insulating film, but is not limited to CaF ₂ , and MgF ₂ or LiF may be used. In any case, an insulator having a larger band gap than SiN may be used.

Further, in each of the above embodiments, the vapor deposition method is used when forming the CaF ₂ film. However, it is not limited to the vapor deposition method, and other film formation methods such as sputtering and molecular beam epitaxy are used. Is also good.

  In each of the above embodiments, the source / drain electrode formation process is described on the premise of just etching. However, it is not always necessary to perform just etching, and even if a little n-type GaN protective layer is left, Alternatively, the AlGaN layer may be slightly etched by excessive etching.

In the first and second embodiments, the thickness of the SiN film serving as the base gate insulating film is 10 nm, for example. However, in this case, it is desirable that the SiN film as the gate insulating film is thinner. For example, after forming the SiN film to about 10 nm, the gate electrode forming portion may be selectively etched to 5 nm or less, and then the CaF ₂ film may be deposited.

In the first and second embodiments described above, the gate insulating film has a two-layer structure of SiN / CaF ₂ , but the underlying layer does not necessarily need to be a SiN film, and is a group III from a halide such as CaF _2. Any insulator that has excellent passivation properties for nitride semiconductors may be used. For example, SiO ₂ , SiON, Al ₂ O ₃ , polycrystalline AlN, or the like may be used.

  As a practical example of the present invention, a high-power transistor for a mobile base station or satellite communication is typical, but it is monolithically integrated with a blue semiconductor light emitting element as a driving transistor for a blue semiconductor light emitting element such as a blue semiconductor laser. It is possible to make it.

It is explanatory drawing of the fundamental structure of this invention. It is explanatory drawing of the manufacturing process to the middle of the AlGaN / GaN-type MIS-HEMT of Example 1 of this invention. It is explanatory drawing of the manufacturing process after FIG. 2 of AlGaN / GaN-type MIS-HEMT of Example 1 of this invention. It is explanatory drawing of the manufacturing process to the middle of the AlGaN / GaN-type MIS-HEMT of Example 2 of this invention. It is explanatory drawing of the manufacturing process after FIG. 4 of AlGaN / GaN-type MIS-HEMT of Example 2 of this invention .

1 Nitride semiconductor layer
2 Gate insulating film 3 Gate electrode 4 Source / drain electrode 11 SiC substrate 12 i-type GaN electron transit layer 13 i-type AlGaN layer 14 n-type AlGaN electron supply layer 15 n-type GaN protective layer 16 SiN film 17 Source electrode
18 Drain electrode
23 SiN film 24 CaF2 film 25 Gate electrode 26 CaF2 film 27 Gate electrode

Claims (2)

An electron transit layer made of a nitride semiconductor;
An electron supply layer made of a nitride semiconductor;
Have
On the electron supply layer side, a gate insulating film made of any one of CaF ₂ , MgF _{2, and} LiF is provided via any one of a SiO ₂ film, a SiON film, an Al ₂ O ₃ film, or a polycrystalline AlN film ,
A nitride semiconductor field effect transistor comprising a gate electrode provided on the gate insulating film, a source electrode provided on one side of the gate electrode, and a drain electrode provided on the other side . The nitride semiconductor field effect transistor according to claim 1, wherein the gate insulating film has a thickness of 1 nm to 50 nm.

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