JP4926469B2 - Display device - Google Patents

Description

  The present invention relates to a display device and a driving method thereof, and more particularly to a display device to which a time gray scale method is applied.

  In recent years, so-called self-luminous display devices in which pixels are formed by light-emitting elements such as light-emitting diodes (LEDs) have attracted attention. As a light-emitting element used in such a self-luminous display device, an organic light-emitting diode (also referred to as an OLED (Organic Light Emitting Diode), an organic EL element, or an electroluminescence (EL) element) attracts attention. It has been used for EL displays and the like. Since light-emitting elements such as OLEDs are self-luminous, there are advantages such as higher pixel visibility than a liquid crystal display, no need for a backlight, and high response speed. The luminance of the light emitting element is controlled by the value of current flowing therethrough.

There are a digital gradation method and an analog gradation method as driving methods for controlling the light emission gradation of such a display device. In the digital gradation method, gradation is expressed by turning on and off the light emitting element by digital control. On the other hand, the analog gradation method includes a method in which the light emission intensity of the light emitting element is controlled in an analog manner and a method in which the light emission time of the light emitting element is controlled in an analog manner.

  In the digital gradation method, since there are only two states of light emission and non-light emission, only two gradations can be expressed as it is. In view of this, multi-gradation is being achieved by combining different methods. In many cases, a time gray scale method is used as a technique for multi-gradation.

  In addition to the organic EL display using the digital gradation method, there are several displays that display gradation by combining the time gradation by controlling the display state of the pixel by digital control. An example is a plasma display.

The time gradation method is a method of expressing gradation by controlling the length of a light emitting period and the number of times of light emission. In other words, one frame period is divided into a plurality of subframe periods, and each subframe is weighted such as the number of times of light emission and the time of light emission. The gradation is expressed by adding a difference to. When such a time gray scale method is used, it is known that a display defect called pseudo contour (or pseudo contour) or the like is caused, and countermeasures thereof are being studied (see Patent Documents 1 to 7).
Japanese Patent No. 2903984 Japanese Patent No. 3075335 Japanese Patent No. 2639311 Japanese Patent No. 3322809 JP-A-10-307561 Japanese Patent No. 3585369 Japanese Patent No. 3489884

As described above, various methods for reducing the pseudo contour have been proposed, but the effect of the pseudo contour reduction is not yet sufficient.

  For example, refer to FIG. The pixel A expresses the gradation number 127, and the adjacent pixel B expresses the gradation number 128. FIG. 32 shows a lighting / non-lighting state in each subframe in that case. If only the pixel A or the pixel B is viewed without moving the line of sight, the pseudo contour does not occur. This is because the brightness of the place where the line of sight passes is summed and the eyes feel bright. Therefore, the line of sight 3201 feels that the pixel A has 127 gradations (= 1 + 2 + 4 + 8 + 16 + 32 + 32 + 32), and the line of sight 3202 feels that the pixel B has 128 gradations (= 32 + 32 + 32 + 32). That is, the eyes feel the correct gradation.

On the other hand, it is assumed that the line of sight moves from the pixel A to the pixel B or from the pixel B to the pixel A. This case is shown in FIG. In this case, depending on how the line of sight moves, when the line of sight is 3301, the number of gradations is felt as 96 (= 32 + 32 + 32), and when the line of sight is 3302, the number of gradations is felt as 159 (= 1 + 2 + 4 + 8 + 16 + 32 + 32 + 32 + 32). Originally, the number of gradations should be 127 and 128, but the number of gradations is about 96 to 159, and a pseudo contour is generated.

  32 and 33 show the case of 8 bits (256 gradations). Next, FIG. 34 shows the case of 5 bits. Similarly, when the line of sight is 3401, the number of gradations is 12 (= 4 + 4 + 4), and when the line of sight is 3402, the number of gradations is 19 (= 1 + 2 + 4 + 4 + 4 + 4). Originally, the number of gradations should be 15 and 16, but the number of gradations is about 12 to 19, and a pseudo contour is generated.

  Similarly, reference is made to FIG. The pixel A expresses the number of gradations 31, and the adjacent pixel B expresses the number of gradations 32. FIG. 35 shows a lighting / non-lighting state in each subframe in that case. If only the pixel A or the pixel B is viewed without moving the line of sight, the pseudo contour does not occur. This is because the brightness of the place where the line of sight passes is summed and the eyes feel bright. Accordingly, the line of sight 3501 feels that the pixel A has a gradation number of 31 (= 16 + 4 + 4 + 4 + 1 + 1 + 1), and the line of sight 3502 feels that the pixel B has a gradation number of 32 (= 16 + 16). That is, the eyes feel the correct gradation.

On the other hand, it is assumed that the line of sight moves from the pixel A to the pixel B or from the pixel B to the pixel A. This case is shown in FIG. In this case, depending on how the line of sight moves, when the line of sight 3602 is felt, the number of gradations is 16 (= 16), and when the line of sight 3601 is felt, the number of gradations is 47 (= 16 + 16 + 4 + 4 + 4 + 1 + 1 + 1). Originally, the number of gradations should be 31 and 32, but the number of gradations is 16 to 47, and a pseudo contour is generated.

  In view of such problems, it is an object of the present invention to provide a display device configured with a small number of subframes and capable of reducing pseudo contours, and a driving method using the display device.

  According to the present invention, when expressing high-order bits (that is, bits with high digits such as MSB (Most Significant Bit)) in gradations displayed in binary numbers, weighting (lighting period) in each subframe is used. Gradation is expressed by adding together the number of times and the number of lighting). Also, in the gradation displayed in binary numbers, when expressing lower bits (that is, bits with lower digits such as LSB (Least Significant Bit)), weighting (lighting period or lighting) in each subframe is also used. The gradation is expressed by adding together the number of times. Then, the subframe for the upper bits and the subframe for the lower bits are prevented from being unevenly distributed at a specific place in one frame. For example, the lower bit subframe is sandwiched between the upper bit subframes. The above object is achieved by expressing gradation using such a method.

The present invention is a method for driving a display device that divides one frame into a plurality of subframes to express gradation,
For the lighting of a plurality of subframes corresponding to the higher-order bits of the gradation displayed in binary, substantially equal weighting is performed,
For the lighting of one or more subframes corresponding to the lower bits of the gradation displayed in binary number, approximately equal weighting is performed,
In the one frame, one subframe of a plurality of subframes corresponding to the upper bits is lit,
One of the one or more subframes corresponding to the lower bit is turned on,
Another one of the plurality of subframes corresponding to the higher-order bits is lit.

The present invention is a method for driving a display device that divides one frame into a plurality of subframes to express gradation,
For the lighting of a plurality of subframes corresponding to the higher-order bits of the gradation displayed in binary, substantially equal weighting is performed,
For the lighting of one or more subframes corresponding to the lower bits of the gradation displayed in binary number, approximately equal weighting is performed,
In the one frame, one subframe of a plurality of subframes corresponding to the lower bits is turned on,
One subframe of a plurality of subframes corresponding to the upper bits is turned on,
Another subframe of a plurality of subframes corresponding to the lower bits is lit.

The present invention is a method for driving a display device that divides one frame into a plurality of subframes to express gradation,
For the lighting of a plurality of subframes corresponding to the higher-order bits of the gradation displayed in binary, substantially equal weighting is performed,
For the lighting of one or more subframes corresponding to the lower bits of the gradation displayed in binary number, approximately equal weighting is performed,
In the one frame, one subframe of a plurality of subframes corresponding to the lower bits is turned on,
A plurality of subframes among a plurality of subframes corresponding to the upper bits are lit,
Another subframe of a plurality of subframes corresponding to the lower bits is lit.

The present invention is a method for driving a display device that divides one frame into a plurality of subframes to express gradation,
For the lighting of a plurality of subframes corresponding to the higher-order bits of the gradation displayed in binary, substantially equal weighting is performed,
For the lighting of one or more subframes corresponding to the lower bits of the gradation displayed in binary number, approximately equal weighting is performed,
In the one frame, one subframe of a plurality of subframes corresponding to the upper bits is lit,
A plurality of subframes among a plurality of subframes corresponding to the lower bits are turned on,
Another one of the plurality of subframes corresponding to the higher-order bits is lit.

The present invention is a method for driving a display device that divides one frame into a plurality of subframes to express gradation,
For the lighting of a plurality of subframes corresponding to the higher-order bits of the gradation displayed in binary, substantially equal weighting is performed,
For the lighting of one or more subframes corresponding to the lower bits of the gradation displayed in binary number, approximately equal weighting is performed,
The plurality of subframes corresponding to the upper bit or the lower bit with the smaller number of the upper bits or the lower bits is the higher bit with the higher number of the upper bits or the lower bits. A subframe is selected through one subframe selected from a plurality of subframes corresponding to the bit or the lower bit.

  In the present invention, there are no limitations on the types of transistors that can be used, and the transistor is formed using a thin film transistor (TFT) using a non-single-crystal semiconductor film typified by amorphous silicon or polycrystalline silicon, a semiconductor substrate, or an SOI substrate. A MOS transistor, a junction transistor, a bipolar transistor, a transistor using an organic semiconductor or a carbon nanotube, and other transistors can be used. There is no limitation on the kind of the substrate over which the transistor is provided, and the transistor can be provided on a single crystal substrate, an SOI substrate, a glass substrate, a plastic substrate, or the like.

  In the present invention, being connected is synonymous with being electrically connected. Therefore, in the configuration disclosed by the present invention, in addition to a predetermined connection relationship, another element (for example, another element or a switch) that enables electrical connection may be disposed therebetween.

  Further, the “substantially equal weighting” discussed above indicates that the number of times of light emission and the light emission period weighted in each subframe may have a difference that cannot be recognized by human eyes. For example, when displaying with 64 gradations, even if there are 3 gradations in each subframe, it is considered that the weights are approximately equal.

  In the present invention, the pseudo contour can be reduced. Accordingly, the display quality is improved and a beautiful image can be seen.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention is not construed as being limited to the description of this embodiment mode.

(Embodiment 1)
First, here, as an example, consider the case of expressing gradation with 5 bits. That is, the case of 32 gradations will be described. First, the gradation to be expressed (here, 5 bits) is divided into upper bits and lower bits. Here, as an example, the upper bits are 3 bits and the lower bits are 2 bits.

In the present invention, in each of the divided areas (here, the upper bit and the lower bit), the lighting period (or the number of times of lighting in a certain time) in each subframe is sequentially added to obtain the gradation. Express. That is, the number of subframes to be lit increases as the gray level increases. Therefore, a subframe that is lit at a small gradation is also lit at a large gradation. Such a gradation method is called an overlapping time gradation method. This overlapping time gray scale method is applied to each of the divided areas. Thereby, the whole gradation is expressed.

Next, as a specific example, a method for selecting a subframe in each gradation, that is, whether or not each subframe is lit in each gradation will be described. FIG. 1 shows a method of selecting a subframe when gradation is expressed by 5 bits, the upper bit is 3 bits, and the lower bit is 2 bits. The upper bits are 7 sub-frames (SF1 to SF7). Thereby, 3 bits, that is, 8 gradations can be expressed. It is assumed that the lengths of the lighting periods are all 4. Here, it is assumed that the number of gradations 1 corresponds to the length of the lighting period 1. The number of subframes of the lower bits is 3 (SF8 to SF10). Thereby, 2 bits, that is, 4 gradations can be expressed. It is assumed that the lengths of the lighting periods are all 1. In this way, a 5-bit gradation can be expressed by 7 subframes for the upper bits, 3 subframes for the lower bits, and a total of 10 subframes.

  It is assumed that the length of the lighting period (or the number of times of lighting at a certain time, that is, the amount of weighting) in the upper bit subframe is 4, and the lighting period in the lower bit subframe (or at a certain time). The length of the number of times of lighting, that is, the weighting amount) is all 1, but is not limited thereto. The length of the lighting period (or the number of times of lighting in a certain time, that is, the weighting amount) may be different depending on the subframe.

  For example, for some of the upper bit subframes, the lighting period may be divided to increase the number of subframes. As an example, a subframe with a lighting period of 4 may be divided into a subframe with a lighting period of 2 and a subframe with a lighting period of 2. Alternatively, it may be divided into a subframe with a lighting period of 1 and a subframe with a lighting period of 3.

  Note that when lighting is continued all the time, gradation is expressed by lighting time, and when it continues to blink within a certain time, gradation is expressed by the number of lighting times. A typical display that expresses gradation using the number of times of lighting is a plasma display. A typical display that expresses gradation using a lighting period is an organic EL display.

  Here, how to view FIG. 1 will be described. Lights up in subframes with a circle mark, and does not light up in subframes with a cross mark. Then, in each gradation number, gradation is expressed by selecting which subframe to light. For example, when the number of gradations is 0, SF1 to SF10 are not lit. At the gradation number 1, SF1 to SF7 and SF9 to SF10 are not lit, and SF8 is lit. In the number of gradations 4, SF2 to SF10 are not lit and SF1 is lit. At the gradation number 5, SF2 to SF7 and SF9 to SF10 are not lit, and SF1 and SF8 are lit. At the gradation number 8, SF3 to SF10 are not lit, and SF1 and SF2 are lit. SF1 to SF7 are subframes for upper bits, and SF8 to SF10 are subframes for lower bits.

  Next, a method for expressing the number of gradations, that is, a method for selecting each subframe will be described. Since the superimposition time gradation method is used for the upper 3 bits, all of SF1 to SF7 are not lit until the number of gradations 0 to 3. From the gradation number 4 to 7, SF1 is turned on, and SF2 to SF7 are all turned off. From the gradation number 8 to 11, SF1 and SF2 are turned on, and SF3 to SF7 are all turned off. From the gradation number 12 to 15, SF1, SF2, and SF3 are turned on, and SF4 to SF7 are all turned off. Similarly, when the number of gradations increases, lighting or non-lighting is selected.

Thus, the upper 3 bits express gradation by sequentially adding the lighting periods in each subframe. That is, the number of subframes to be lit increases as the number of gradations increases. Therefore, SF1 is all lit when the number of gradations is 4 or more, SF2 is all lit when the number of gradations is 8 or more, and SF3 is all lit when the number of gradations is 12 or more. The same applies to SF4 to SF7. That is, a subframe that is lit at a small number of gradations is also lit at a large number of gradations.

By adopting such a driving method, the pseudo contour can be reduced. This is because, in a certain gradation, all subframes that are lit in a gradation lower than that are lit. Therefore, even when the line of sight moves, it can be prevented that the image is viewed with inaccurate brightness at the change of gradation.

Since the superposition time gray scale method is used for the lower 2 bits, SF8 to SF10 are all unlit at the gray scale numbers 0, 4, 8, 12, 16. In the gradation numbers 1, 5, 9, 13, 17..., SF8 is turned on, and SF9 to SF10 are all turned off. In the gradation numbers 2, 6, 10, 14, 18,..., SF8 and SF9 are lit, and SF10 is not lit. In the number of gradations 3, 7, 11, 15, 19..., SF8 to SF10 are all lit.

In this way, the lower 2 bits also express gradation by sequentially adding the lighting periods in each subframe. That is, the number of subframes to be lit increases as the number of gradations increases within the lower bit range. That is, in the lower bit range, a subframe that is lit at a small number of gradations is lit even at a large number of gradations within the lower bit range.

By adopting such a driving method, the pseudo contour can be reduced. This is because all subframes that are lit at a lower number of gradations within a lower bit range are lit at a higher number of gradations than the certain number of gradations within the lower bit range. Because. Therefore, even if the line of sight moves, it can be prevented that the image is viewed with inaccurate brightness at the change of the number of gradations.

As described above, FIG. 1 shows a subframe selection method when the upper bits are 3 bits and the lower bits are 2 bits. Next, FIG. 2 shows a subframe selection method when the upper bits are 2 bits and the lower bits are 3 bits.

The upper 2 bits have 3 subframes (SF1 to SF3). Thereby, 2 bits, that is, 4 gradations can be expressed. The lower 3 bits are 7 sub-frames (SF4 to SF10). Thereby, 3 bits, that is, 8 gradations can be expressed. In this way, a 5-bit gray scale can be expressed with 3 subframes for the upper bits, 7 subframes for the lower bits, and a total of 10 subframes.

The pseudo contour is likely to appear when the subframe selection method changes greatly in terms of time or place. Therefore, in the case of FIG. 1, it tends to occur when the number of gradations changes from 3 to 4, when the number of gradations changes from 7 to 8, or when the number of gradations changes from 12 to 13. In the case of FIG. 1, there are seven such locations. However, the difference in the sum of the lighting periods of different subframes is small. Therefore, since the pseudo contour is small in intensity, it is difficult to see.

On the other hand, in the case of FIG. 2, it tends to occur when the number of gradations changes from 7 to 8, when the number of gradations changes from 15 to 16, or when the number of gradations changes from 23 to 24. In the case of FIG. 2, there are three such places. However, the sum of the lighting periods of different subframes is large. Therefore, since the pseudo contour has a high strength, it becomes easy to see.

Therefore, in the case of FIG. 1, although the number of pseudo contours is large, the strength of the pseudo contour is weak. On the other hand, in FIG. 2, the number of pseudo contours is small, but the strength of the pseudo contour is strong. In consideration of the above, it is only necessary to determine how to divide the upper and lower bits.

If the upper bits are 2 bits and the lower bits are 3 bits, the length of the lighting period in the subframe at the upper bits is 8. This is because the lower bits are for 3 bits. Since 3 bits, that is, 8 gradations can be expressed, it is necessary to increase the lighting period by a maximum of 8 for the upper bits. From the above, it is desirable that the length of the lighting period in the subframe in the upper bits is equal to or less than the length of the lighting period in the maximum number of gradations in the lower bits. If the length of the lighting period in the subframe in the upper bits is smaller than the length of the lighting period in the maximum number of gradations in the lower bits, in the lower bits, some of the subframe selection methods are actually It just means that they are not used.

Note that the length of the lighting period varies depending on the total number of gradations (number of bits), the total number of subframes, and the like. Therefore, even if the length of the lighting period is the same, if the total number of gradations (number of bits) or the total number of subframes changes, the length of the actual lighting period (for example, how many μs it is) ) Is subject to change.

Next, consider the case of expressing gradation with 6 bits. FIG. 3 shows a subframe selection method when the upper bits are 3 bits and the lower bits are 3 bits.

The upper 3 bits are 7 sub-frames (SF1 to SF7). Thereby, 3 bits, that is, 8 gradations can be expressed. The lower 3 bits are 7 sub-frames (SF8 to SF14). Thereby, 3 bits, that is, 8 gradations can be expressed. The length of the lighting period in the subframe in the upper bits is 8. In this way, a 6-bit gray scale can be expressed with seven subframes for the upper bits, seven subframes for the lower bits, and a total of 14 subframes.

As in FIG. 2, even when gradation is expressed by 6 bits, it is possible to express gradation using the superposition time gradation method by arbitrarily dividing upper bits and lower bits. Become.

As described above, in FIGS. 1 to 3, the case of expressing a gradation of 5 bits or 6 bits has been described. However, by making the same, it is possible to correspond to various numbers of bits. That is, when expressing gradation with n bits, if the upper bit is a bit and the lower bit is b bit, the number of subframes is at least (2a-1) in the upper bits, and the subframe is lower bits. The number is at least (2b-1). The length of the lighting period in the subframe in the upper bits is 2b.

In this way, by dividing the gradation into a plurality of regions and using the overlapping time gradation method in each region, the pseudo contour can be reduced or the number of gradations can be increased without increasing the number of subframes. Can be displayed.

  Note that when one gradation is expressed, there may be a plurality of methods for selecting a subframe. Therefore, the selection method of subframes in a certain number of gradations may be changed in time or place. That is, the selection method of the subframe may be changed depending on the time, and the selection method of the subframe may be changed depending on the pixel. Further, it may be changed depending on the time and also depending on the pixel.

For example, when a certain number of gradations is expressed, the selection method of subframes may be changed depending on whether a certain frame is an odd number or an even number. In addition, when expressing a certain number of gradations, the selection method of subframes may be changed depending on whether odd-numbered pixels are displayed or even-numbered pixels are displayed. In addition, when expressing a certain number of gradations, the selection method of subframes may be changed depending on whether the pixels in the odd-numbered columns are displayed or the pixels in the even-numbered columns are displayed.

Heretofore, the case where gradation is expressed using the superposition time gradation method has been described, but other gradation expression methods may be combined. For example, it may be combined with an area gradation method. A pixel is further divided into a plurality of sub-pixels, and a gradation is expressed by changing the area that is lit. Therefore, it becomes possible to further suppress the pseudo contour.

So far, the case where the lighting period increases linearly in proportion to the number of gradations has been described. Next, a case where gamma correction is performed will be described. The gamma correction refers to a non-linear lighting period that increases as the number of gradations increases. Even if the luminance increases linearly in proportion, the human eye does not feel that it is brighter in proportion. The higher the brightness, the less the difference in brightness is felt. Therefore, in order for the human eye to feel a difference in brightness, it is necessary to increase the lighting period as the number of gradations increases, that is, to perform gamma correction.

  The simplest method is to enable display with a larger number of bits (number of gradations) than the actual number of bits (number of gradations) to be displayed. For example, when displaying with 6 bits (64 gradations), in reality, 8 bits (256 gradations) can be displayed. And when actually displaying, it displays by 6 bits (64 gradations) so that the brightness | luminance of the number of gradations becomes nonlinear. Thereby, gamma correction can be realized.

  As an example, FIG. 4 shows a method for selecting a subframe in a case where gamma correction is performed so that 6-bit display is possible and display is performed with 5 bits. In FIG. 4, the number of gradations in 5 bits up to 12 is the same as the number of gradations in 6 bits. However, when the number of gray scales with 5 bits after gamma correction is 13, light is actually turned on by a subframe selection method with 14 bits of gray scale levels. Similarly, when the number of gradations with 5 bits after gamma correction is 14, display is actually performed with 16 gradations with 6 bits, and when gradation number with 5 bits after gamma correction is 15, Actually, the display is performed with 18 bits of 6-bit gradation. In this way, a correspondence table between the number of gradations of 5 bits after gamma correction and the number of gradations of 6 bits may be created and displayed accordingly. Thereby, gamma correction can be realized.

  It should be noted that the correspondence table between the number of gradations of 5 bits after gamma correction and the number of gradations of 6 bits can be changed as appropriate. Therefore, it is possible to easily change the degree of gamma correction by changing the correspondence table.

Also, how many bits (for example, p bits, where p is an integer) can be displayed, and how many bits (for example, q bits, where q is an integer) after gamma correction is displayed. It is not limited. When displaying with gamma correction, it is desirable to increase the number of bits p as much as possible in order to express gradation smoothly. However, if it is made too large, there will be adverse effects such as an increase in the number of subframes. Therefore, it is desirable that the relationship between the number of bits q and the number of bits p is q + 2 ≦ p ≦ q + 5. As a result, it is possible to realize that the number of subframes does not increase too much while the gradation is expressed smoothly.

  As another gamma correction method, when the superposition time gray scale method is used in the upper bits, the lengths of the lighting periods in the subframes are made different.

  As an example, FIG. 5 shows a subframe selection method in which the number of gradations 0 to 15 is normal, and in the case of gradations 16 to 31, the amount of change in the lighting period is doubled with respect to the number of gradations. Show. In this case, as compared with FIG. 1, subframes 5 (SF5) to 7 (SF7) corresponding to the subframes of higher bits among the subframes used in the superposition time gray scale method for higher bits. ) Is different from the fact that each lighting period is doubled and that the subframe is added for the lower bits and the lighting period of the additional subframe is doubled. .

  For gradation levels 0 to 15, the subframes used for the lower bits are SF8 to SF10. On the other hand, for gradation numbers 16 to 31, the subframes used for the lower bits are SF11 to SF13. In this way, the lighting period changes smoothly as the gray level increases.

  By doing so, the pseudo contour can be reduced.

  Note that, in the gradation numbers 16 to 31, subframes other than SF11 to SF13 may be used as subframes used for lower bits. Thereby, the number of subframes can be reduced. As an example, FIG. 6 shows an example in which the number of subframes is reduced by using subframes SF9 and SF10 instead of subframe SF11 in FIG.

  In FIG. 5 and FIG. 6, the length of the lighting period in the subframe used for the upper bits is set to be twice different, but the present invention is not limited to this. Adjustment may be made according to the gamma value when performing gamma correction. That is, the length of the lighting period in the subframe used for the upper bits may be different and longer.

  In FIGS. 5 and 6, the gradation region is divided into two, but the present invention is not limited to this. It may be divided into more areas. As an example, FIG. 7 shows a case where it is divided into four.

  First, the region is divided into gradation numbers 0 to 7, gradation numbers 8 to 15, gradation numbers 16 to 23, and gradation numbers 24 to 31. The gradation number 0 to 7 is normal, the gradation number 8 to 15 is twice the amount of change in the lighting period with respect to the gradation number, and the gradation number 16 to 23 is the level. The amount of change in the lighting period with respect to the key number is further doubled. From the number of gradations 24 to 31, the amount of change in the lighting period with respect to the number of gradations is further doubled. In this case, among the subframes used in the superimposition time gray scale method for the upper bits, the lighting period becomes longer by two as the subframe of the higher bits is used. Further, subframes are added for the lower bits, and the lighting periods of the added subframes are sequentially doubled.

  For gradations 0 to 7, the subframes used for the lower bits are SF8 to SF10. For gradations 8 to 15, the subframes used for the lower bits are SF11 to SF13. From Equations 16 to 23, the subframes used for the lower bits are SF14 to SF16. From the gradation numbers 24 to 31, the subframes used for the lower bits are SF17 to SF19. By doing in this way, the lighting period also changes smoothly as the number of gradations increases.

  Note that the subframe used for the lower bits is not necessarily divided for each divided gradation region. Thereby, the number of subframes can be reduced. As an example, subframes SF9 and SF10 are used instead of subframe SF11 in FIG. 7, subframes SF12 and SF13 are used instead of subframe SF14, and subframes SF15 and SF16 are used instead of subframe SF17. FIG. 8 shows an example in which the number of subframes is reduced.

  Note that although the length of the lighting period with respect to the number of gradations is doubled for each gradation region, the present invention is not limited to this. It may be increased by a power of 2, such as 4 times or 8 times. Or you may become large little by little. Adjustment may be made according to the gamma value when performing gamma correction. That is, the length of the lighting period in the subframe used in the overlapping time gray scale method is different as long as it is longer.

So far, the gradation expression method, that is, the subframe selection method has been described. Next, the appearance order of subframes will be described.

  Here, the case of FIG. 1 is used as an example, but the present invention is not limited to this, and can be similarly applied to other drawings.

First, the most basic one is that one frame is configured in the order of SF8, SF9, SF10, SF1, SF2, SF3, SF4, SF5, SF6, and SF7. The sub-frame starts from the shortest lighting period, and thereafter, the sub-frames that are lit up are arranged in order in the overlapping time gray scale method.

  Alternatively, the reverse order may be SF7, SF6, SF5, SF4, SF3, SF2, SF1, SF10, SF9, SF8. Further, the order in which the subframes in the upper bits and the subframes in the lower bits appear may be reversed. For example, SF1, SF2, SF3, SF4, SF5, SF6, SF7, SF8, SF9, and SF10 may be used.

Next, a subframe with a lower bit is inserted somewhere between subframes with an upper bit. For example, in the feeling of SF1, SF8, SF2, SF9, SF3, SF10, SF4, SF5, SF6, SF7, subframes SF8, SF9, SF10 in the lower bits are subframes of SF1 and SF2 in the upper bits. Between SF2 and SF3, and between SF3 and SF4. Note that the place where the subframe is inserted in the lower bits is not limited to this. Further, the number of subframes to be inserted is not limited to this.

In this way, by inserting the sub-frame with the lower bits into the order of the sub-frames with the upper bits, the eyes are deceived and the pseudo contour becomes less visible.

  Therefore, FIG. 9 shows a case of 5 bits arranged in the order of SF8, SF1, SF2, SF9, SF3, SF4, SF10, SF5, SF6, and SF7. It is assumed that the pixel A displays the gradation number 15 and the pixel B displays the gradation number 16. Here, if the line of sight is moving, depending on how the line of sight is chased, the number of gradations is felt as 18 (= 1 + 4 + 4 + 1 + 4 + 4) when the line of sight is 902, and the number of gradations is felt as 13 (= 4 + 4 + 4 + 1) when the line of sight is 901. End up. Originally, the number of gradations should be visible at 15 and 16, but the number of gradations is visible at 18 to 13. Therefore, the pseudo contour is reduced because the deviation of gradation is small.

  In addition, the subframes in the upper bits may be arranged in the order of lighting (for example, SF1, SF2, SF3, SF4, SF5, SF6, SF7) or the reverse order (for example, SF7, SF6, SF5). , SF4, SF3, SF2, SF1). Or you may make it light up gradually from the middle (SF7, SF5, SF1, SF3, SF2, SF4, SF6). By doing in this way, when changing from the first frame to the second frame, it is possible to reduce the occurrence of a pseudo contour at the switching point. So-called moving image pseudo contour can be reduced.

Alternatively, they may be arranged in a completely random order (for example, SF1, SF6, SF2, SF4, SF3, SF5, SF7). By doing so, the eyes are easily deceived, so that the pseudo contour is less visible.

  As an example, it is assumed that the appearance order of the subframes of the entire frame is arranged as SF8, SF1, SF5, SF9, SF2, SF6, SF10, SF4, SF7, SF3. This corresponds to a case where the subframes in the upper bits are arranged in a random order, and the subframes in the lower bits are arranged between the subframes in the upper bits.

  Such a case is shown in FIG. Here, if the line of sight is moving, depending on how the line of sight is followed, the number of gradations is felt as 18 (= 1 + 4 + 1 + 4 + 4 + 4) when the line of sight is 1002, and the number of gradations is felt as 13 (= 4 + 4 + 1 + 4) when the line of sight is 1001. End up. Originally, the number of gradations should be visible at 15 and 16, but the number of gradations is visible at 13 to 18. Therefore, there is no great difference between the case of FIG. 9 and the case of FIG.

  However, suppose that the line of sight moves suddenly. For example, FIG. 11 shows a case where the line of sight moves suddenly in the case of FIG. If the line of sight suddenly moves, depending on how the line of sight is chased, the number of gradations will be 19 (= 1 + 4 + 4 + 1 + 4 + 4 + 1) when the line of sight is 1101, and the number of gradations will be 12 (= 4 + 4 + 4) when the line of sight is 1102. . Originally, the number of gradations should be 15 and 16, but the number of gradations is 12 to 19 or so.

  On the other hand, FIG. 12 shows a case where the line of sight moves rapidly in the case of FIG. If the line of sight suddenly moves, depending on how the line of sight is tracked, the number of gradations is 15 (= 1 + 4 + 1 + 4 + 1 + 4) when the line of sight is 1201, and the number of gradations is 16 (= 4 + 4 + 4 + 4) when the line of sight is 1202. . Originally, the number of gradations should be 15 and 16, but it looks correct. Therefore, the case of FIG. 11 and the case of FIG. 12 are greatly different. That is, even in the subframes in the superposition time gray scale method, the effect of reducing the pseudo contour is enhanced by arranging them as randomly as possible.

Thus, the order of appearance of the entire subframes may be determined by determining the order of the subframes in the upper bits and inserting the subframes in the lower bits between the subframes.

  At this time, the subframes in the lower bits may be arranged in the order of short lighting periods (for example, SF8, SF9, SF10), or vice versa (for example, SF10, SF9, SF8). Or you may make it light up gradually from the center. Alternatively, they may be arranged in a completely random order. By doing so, the eyes are easily deceived, so that the pseudo contour is less visible.

  In addition, when a subframe in the lower bit is inserted between subframes in the upper bit, the number of subframes is not limited.

  Alternatively, the order of appearance of the entire subframes may be determined by determining the order of the subframes in the lower bits and inserting the subframes in the upper bits between the subframes.

  In this way, the subframes in the lower bits are arranged between the subframes in the upper bits so that the subframes are not unevenly distributed. As a result, the eyes are deceived and pseudo contours can be reduced.

  As an example, FIG. 13 shows a pattern example of the appearance order of subframes in the case of FIG.

The first pattern is SF1, SF2, SF3, SF4, SF5, SF6, SF7, SF8, SF9, SF10. The subframes in the lower bits are arranged together at the end.

The second pattern is SF8, SF9, SF10, SF1, SF2, SF3, SF4, SF5, SF6, SF7. The subframes in the lower bits are arranged together first.

The third pattern is SF1, SF2, SF3, SF4, SF8, SF9, SF10, SF6, SF7, SF5. The subframes in the lower bits are arranged together in the middle.

The fourth pattern is SF1, SF2, SF8, SF3, SF4, SF9, SF5, SF6, SF10, SF7. The subframes in the upper bits are arranged in order. The subframes in the lower bits are also arranged in order. Then, after two subframes in the upper bits are arranged, one subframe in the lower bits is arranged.

The fifth pattern is SF1, SF2, SF9, SF3, SF4, SF8, SF5, SF6, SF10, SF7. This is a randomized subframe appearance order in the lower bits for the fourth pattern.

The sixth pattern is SF1, SF5, SF8, SF2, SF7, SF9, SF3, SF6, SF10, SF4. This is a randomized subframe appearance order in the upper bits for the fourth pattern.

The seventh pattern is SF1, SF5, SF9, SF2, SF7, SF8, SF3, SF6, SF10, SF4. This is a random pattern of the subframe appearance order in the upper bits and the subframe appearance order in the lower bits with respect to the fourth pattern.

The eighth pattern is SF1, SF2, SF8, SF3, SF9, SF4, SF5, SF6, SF10, SF7. This is because, after two subframes in the upper bits are arranged, one subframe in the lower bits is arranged, one subframe in the upper bits is arranged, one subframe is arranged in the lower bits, 3 are arranged, one subframe is arranged in the lower bits, and one subframe is arranged in the upper bits.

The ninth pattern is SF1, SF2, SF3, SF4, SF8, SF9, SF5, SF6, SF7, SF10. This is a sequence of 4 subframes in the upper bits, 2 subframes in the lower bits, 3 subframes in the upper bits, and 1 subframe in the lower bits. is there.

In this way, one subframe of a plurality of subframes corresponding to the upper bits is lit, and then one subframe of one or more subframes corresponding to the lower bits is lit. Thereafter, it is desirable that another one of the plurality of subframes corresponding to the upper bits is turned on.

  Also, one subframe of a plurality of subframes corresponding to the lower bits is lit, and then one subframe of the plurality of subframes corresponding to the upper bits is lit, and then the lower It is desirable that another one of the plurality of subframes corresponding to the bits is turned on.

  Also, one subframe of a plurality of subframes corresponding to the lower bits is lit, and then a plurality of subframes of the plurality of subframes corresponding to the upper bits are lit, and then the lower order It is desirable that another one of the plurality of subframes corresponding to the bits of the above is turned on.

  Also, one subframe of a plurality of subframes corresponding to the upper bits is lit, and then a plurality of subframes of the plurality of subframes corresponding to the lower bits are lit, and then the upper bits It is desirable that another one of the plurality of subframes corresponding to the bits is turned on.

Note that the appearance order of the subframes may change depending on the time. For example, the appearance order of subframes may change between the first frame and the second frame. Further, the appearance order of subframes may vary depending on the location. For example, the appearance order of the subframes may be changed between the pixel A and the pixel B. In addition, by combining them, the appearance order of the subframes may change with time and change with place.

The normal frame frequency is 60 Hz, but is not limited to this. The pseudo contour may be reduced by further increasing the frame frequency. For example, the operation may be performed at a frequency that is about twice that of a normal frequency of 120 Hz.

(Embodiment 2)
In this embodiment, an example of a timing chart is described. As an example, the subframe selection method shown in FIG. 1 is used. However, the subframe selection method is not limited to this, and the method can be easily applied to other subframe selection methods and other gradation numbers.

In addition, the order in which the subframes appear is, for example, SF1, SF8, SF2, SF9, SF3, SF10, SF4, SF5, SF6, and SF7. It is applicable to.

First, FIG. 14 shows a timing chart in the case where a period for writing a signal to a pixel and a lighting period are separated. First, in a signal writing period, a signal for one screen is input to all pixels. During this time, the pixels are not lit. After the signal writing period ends, the lighting period starts and the pixels are lit. The length of the lighting period at that time is 4. Next, the next subframe starts, and a signal for one screen is input to all pixels in the signal writing period. During this time, the pixels are not lit. After the signal writing period ends, the lighting period starts and the pixels are lit. The length of the lighting period at that time is 1.

  By repeating the same, the lengths of the lighting periods are arranged in the order of 4, 1, 4, 1, 4, 1, 4, 4, 4, 4.

As described above, the driving method in which the signal writing period and the lighting period are separated from each other is preferably applied to the plasma display. In the case of using for a plasma display, an initialization operation or the like is required. However, it is omitted for simplicity.

  In addition, this driving method includes an EL display (an organic EL display, an inorganic EL display, a display including an element including an inorganic material and an organic material), a field emission display, or a display using a digital micromirror device (DMD). It is also suitable to apply to the above.

FIG. 15 shows a pixel configuration in that case. The gate line 1507 is selected, the selection transistor 1501 is turned on, and a signal is input from the signal line 1505 to the storage capacitor 1502. Then, the current of the driving transistor 1503 is controlled according to the signal, and current flows from the first power supply line 1506 through the display element 1504 to the second power supply line 1508.

Note that in the signal writing period, the potential of the first power supply line 1506 and the second power supply line 1508 is controlled so that no voltage is applied to the display element 1504. As a result, the display element 1504 can be prevented from being lit during the signal writing period.

Next, FIG. 16 shows a timing chart in the case where a period for writing a signal to a pixel and a lighting period are not separated. When a signal writing operation is performed in each row, the lighting period starts immediately.

In a certain row, a signal is written, and after a predetermined lighting period ends, a signal writing operation in the next subframe is started. By repeating this, the length of the lighting period is arranged in the order of 4, 1, 4, 1, 4, 1, 4, 4, 4, 4.

This makes it possible to arrange many subframes in one frame even if the signal writing operation is slow.

Such a driving method is preferably applied to a plasma display. In the case of using for a plasma display, an initialization operation or the like is necessary, but it is omitted for simplicity.

  This driving method is also preferably applied to an EL display, a field emission display, a display using a digital micromirror device (DMD), and the like.

FIG. 17 shows a pixel configuration in that case. The first gate line 1707 is selected, the first selection transistor 1701 is turned on, and a signal is input from the first signal line 1705 to the storage capacitor 1702. Then, the current of the driving transistor 1703 is controlled according to the signal, and current flows from the first power supply line 1706 through the display element 1704 to the second power supply line 1708. Similarly, the second gate line 1717 is selected, the second selection transistor 1711 is turned on, and a signal is input from the second signal line 1715 to the storage capacitor 1702. Then, the current of the driving transistor 1703 is controlled according to the signal, and current flows from the first power supply line 1706 through the display element 1704 to the second power supply line 1708.

The first gate line 1707 and the second gate line 1717 can be controlled separately. Similarly, the first signal line 1705 and the second signal line 1715 can be controlled separately. Therefore, it is possible to input signals to the pixels for two rows at the same time, so that the driving method as shown in FIG. 16 can be realized.

Note that the driving method as shown in FIG. 16 can be realized by using the circuit of FIG. A timing chart in that case is shown in FIG. As shown in FIG. 18, one gate selection period is divided into a plurality (two in FIG. 18). Then, each gate line is selected within the divided selection period, and a corresponding signal is input to the first signal line 1705 at that time. For example, in one gate selection period, the first half selects the i-th row and the second half selects the j-th row. Then, it is possible to operate as if two rows are selected at the same time in one gate selection period.

Details of such a driving method are described in, for example, Japanese Patent Application Laid-Open No. 2001-324958, and the contents thereof can be applied in combination with the present application.

Next, FIG. 19 shows a timing chart in the case of performing an operation of erasing the pixel signal. In each row, a signal writing operation is performed, and the pixel signal is erased before the next signal writing operation is performed. In this way, the length of the lighting period can be easily controlled.

In a certain row, a signal is written, and after a predetermined lighting period ends, a signal writing operation in the next subframe is started. If the lighting period is short, a signal erasing operation is performed to turn off the light. By repeating this, the lengths of the lighting periods are arranged in the order of 4, 1, 4, 1, 4, 1, 4, 4, 4, 4.

In FIG. 19, the signal erasing operation is performed when the lighting periods are 1 and 2, but the present invention is not limited to this. The erase operation may be performed in other lighting periods.

This makes it possible to arrange many subframes in one frame even if the signal writing operation is slow. Further, when performing an erasing operation, it is not necessary to acquire erasing data in the same manner as a video signal, so that the driving frequency of the source driver can be reduced.

Such a driving method is preferably applied to a plasma display. In the case of using for a plasma display, an initialization operation or the like is necessary, but it is omitted for simplicity.

  This driving method is also preferably applied to an EL display, a field emission display, a display using a digital micromirror device (DMD), and the like.

The pixel configuration in that case is shown in FIG. The first gate line 2007 is selected, the selection transistor 2001 is turned on, and a signal is input from the signal line 2005 to the storage capacitor 2002. Then, the current of the driving transistor 2003 is controlled according to the signal, and the current flows from the first power supply line 2006 to the second power supply line 2008 through the display element 2004.

When the signal is to be erased, the second gate line 2017 is selected, the erase transistor 2011 is turned on, and the drive transistor 2003 is turned off. Then, no current flows from the first power supply line 2006 to the second power supply line 2008 through the display element 2004. As a result, a non-lighting period can be created and the length of the lighting period can be freely controlled.

In FIG. 20, the erase transistor 2011 is used, but another method may be used. This is because it is only necessary to forcibly create a non-lighting period, so that no current is supplied to the display element 2004. Therefore, a switch is arranged somewhere along the path of current flowing from the first power supply line 2006 to the second power supply line 2008 through the display element 2004, and the on / off state of the switch is controlled to set the non-lighting period. Just make it. Alternatively, the gate-source voltage of the driving transistor 2003 may be controlled so that the driving transistor is forcibly turned off.

  FIG. 21 shows an example of a pixel configuration when the driving transistor is forcibly turned off. A selection transistor 2101, a drive transistor 2103, an erasing diode 2111, and a display element 2104 are arranged. The source and drain of the selection transistor 2101 are connected to the signal line 2105 and the gate of the driving transistor 2103, respectively. The gate of the selection transistor 2101 is connected to the first gate line 2107. The source and drain of the driving transistor 2103 are connected to the power supply line 2106 and the display element 2104, respectively. The erasing diode 2111 is connected to the gate of the driving transistor 2103 and the second gate line 2117.

  The storage capacitor 2102 serves to hold the gate potential of the driving transistor 2103. Therefore, although connected between the gate of the driving transistor 2103 and the power supply line 2106, the invention is not limited to this. It suffices if the gate potential of the driving transistor 2103 can be held. In the case where the gate potential of the driving transistor 2103 can be held using the gate capacitance of the driving transistor 2103 or the like, the holding capacitor 2102 may be omitted.

  As an operation method, the first gate line 2107 is selected, the selection transistor 2101 is turned on, and a signal is input from the signal line 2105 to the storage capacitor 2102. Then, the current of the driving transistor 2103 is controlled according to the signal, and current flows from the first power supply line 2106 through the display element 2104 to the second power supply line 2108.

When the signal is to be erased, the second gate line 2117 is selected (here, set to a high potential), the erasing diode 2111 is turned on, and a current flows from the second gate line 2117 to the gate of the driving transistor 2103. Like that. As a result, the driving transistor 2103 is turned off. Then, no current flows from the first power supply line 2106 to the second power supply line 2108 through the display element 2104. As a result, a non-lighting period can be created and the length of the lighting period can be freely controlled.

When it is desired to hold the signal, the second gate line 2117 is not selected (here, set to a low potential). Then, the erasing diode 2111 is turned off, so that the gate potential of the driving transistor 2103 is held.

  The erasing diode 2111 may be anything as long as it has a rectifying property. A PN-type diode, a PIN-type diode, a Schottky diode, or a Zener-type diode may be used.

  Alternatively, a transistor may be used by diode connection (gate and drain connected). A circuit diagram in that case is shown in FIG. As the erasing diode 2111, a diode-connected transistor 2211 is used. Here, an N-channel type is used, but the present invention is not limited to this. A P-channel type may be used.

As another circuit, the driving method as shown in FIG. 19 can be realized by using the circuit shown in FIG. A timing chart in that case is shown in FIG. As shown in FIG. 18, one gate selection period is divided into a plurality (two in FIG. 18). Then, each gate line is selected within the divided selection period, and a signal (a video signal and a signal for erasing) corresponding to the gate line is input to the first signal line 1705 at that time. For example, in one gate selection period, the first half selects the i-th row and the second half selects the j-th row. When the i-th row is selected, such a video signal is input. On the other hand, when the j-th row is selected, a signal that turns off the driving transistor is input. Then, it is possible to operate as if two rows are selected at the same time in one gate selection period.

Details of such a driving method are described in, for example, Japanese Patent Application Laid-Open No. 2001-324958, and the contents thereof can be applied in combination with the present application.

Note that the timing chart, the pixel configuration, and the driving method shown in this embodiment mode are examples, and the present invention is not limited to this. The present invention can be applied to various timing charts, pixel configurations, and driving methods.

Note that the appearance order of the subframes may change depending on the time. For example, the appearance order of subframes may change between the first frame and the second frame. Further, the appearance order of subframes may vary depending on the location. For example, the appearance order of the subframes may be changed between the pixel A and the pixel B. In addition, by combining them, the appearance order of the subframes may change with time and change with place.

  Note that although a lighting period, a signal writing period, and a non-lighting period are arranged in one frame period in this embodiment mode, the present invention is not limited to this. Other operation periods may be arranged. For example, a period in which the voltage applied to the display element has a polarity opposite to that of the normal voltage, that is, a so-called reverse bias period may be provided. By providing the reverse bias period, the reliability of the display element may be improved.

Note that the description in this embodiment can be implemented in free combination with the content described in Embodiment 1.

(Embodiment 3)
In the present embodiment, an example of how many bits should be allocated to the upper bits and the lower bits when expressing a certain gradation will be described.

First, consider the case of expressing 6-bit (64 gradations) gradation. As an example, the upper bits are 4 bits (16 gradations) and 15 subframes, and the lower bits are 2 bits (4 gradations) and at least 3 subframes. Note that the number of subframes may be further increased by dividing upper bits. This gives a total of 18 subframes.

As an example, the upper bits are 3 bits (8 gradations) and 7 subframes, and the lower bits are 3 bits (8 gradations) and a minimum of 7 subframes. The number of subframes may be further increased by dividing the upper bits. This gives a total of 14 subframes.

In the following example, the upper bits are 6 gradations and 5 subframes, and the lower bits are 4 bits (16 gradations) and at least 15 subframes. The number of subframes may be increased by dividing the upper bits. In this case, the lower bits can express more gradations than the number of gradations actually used, but there is no problem. If the lower bits are set to the optimum value, 11 gradations are sufficient. In that case, there are at least 10 subframes. This gives a total of 15 subframes.

As an example, the upper bits are 2 bits (4 gradations) and 3 subframes, and the lower bits are 4 bits (16 gradations) and a minimum of 15 subframes. The number of subframes may be increased by dividing the upper bits. This gives a total of 18 subframes.

Next, consider the case of expressing 8-bit (256 gradations) gradation. As an example, the upper bits are 5 bits (32 gradations) and 31 subframes, and the lower bits are 3 bits (8 gradations) and a minimum of 7 subframes. The number of subframes may be increased by dividing the upper bits. This gives a total of 38 subframes.

As an example, the upper bits are 4 bits (16 gradations) and 15 subframes, and the lower bits are 4 bits (16 gradations) and a minimum of 15 subframes. The number of subframes may be increased by dividing the upper bits. This gives a total of 30 subframes.

As an example, the upper bits are 3 bits (8 gradations) and 7 subframes, and the lower bits are 5 bits (32 gradations) and a minimum of 31 subframes. The number of subframes may be increased by dividing the upper bits. This gives a total of 38 subframes.

In the following example, the upper bits are 2 bits (4 gradations) and 3 subframes, and the lower bits are 6 bits (64 gradations) and a minimum of 63 subframes. The number of subframes may be increased by dividing the upper bits. This gives a total of 66 subframes.

Thus, in general, considering the case of expressing an n-bit gradation, the upper bits are m bits (2 ^m −1) subframes, the lower bits are p bits, and (2 ^p −1) Subframe. The number of subframes may be increased by dividing the upper bits. As a result, the minimum required is a total of (2 ^m +2 ^p −2) subframes.

Note that the description in this embodiment can be implemented in free combination with the contents described in Embodiments 1 and 2.

(Embodiment 4)
In this embodiment mode, an example of a display device using the driving method of the present invention will be described.

The most typical display device is a plasma display. A pixel of a plasma display can take only two states of light emission and non-light emission. Therefore, the time gray scale method is used as one of means for increasing the gray scale. Therefore, the present invention can be applied to such a driving method.

Note that in a plasma display, it is necessary to initialize a pixel in addition to writing a signal to the pixel. Therefore, it is desirable that the subframes be arranged in order in the portion using the overlapping time gray scale method. By arranging subframes in this way, the number of pixel initializations can be reduced. As a result, the contrast can be improved.

Therefore, for example, it is desirable to arrange subframes with lower bits at the beginning or end of one frame. As an example, using the case of FIG. 1, one frame is configured in the order of SF1, SF2, SF3, SF4, SF5, SF6, SF7, SF8, SF9, and SF10. The subframes in the lower bits are collected at the end of one frame. Note that the order of subframes in the lower bits is also preferable because the number of initializations can be reduced by arranging them in order. That is, the overlapping time gray scale subframes are arranged in order. When it is lit in a certain subframe, it is also lit in the previous subframe. Therefore, the number of initializations can be reduced and the contrast can be improved.

If priority is given to the reduction of pseudo contour over the improvement of contrast, the sub-frame of the lower bit superposition time gradation method is inserted in the sub-frame of the superposition time gray method of the upper bits. By doing so, the pseudo contour can be reduced.

Examples of display devices other than the plasma display include an EL display, a field emission display, a display using a digital micromirror device (DMD), a ferroelectric liquid crystal display, and a bistable liquid crystal display. These are all display devices that can use the time gray scale method. By applying to these display devices, pseudo contour can be reduced while using the time gray scale method.

  For example, in the case of an EL display, there is no need to perform operations such as pixel initialization in a plasma display. Therefore, it does not occur that light is emitted when an operation such as initialization of a pixel is performed and the contrast is reduced. Therefore, the appearance order of subframes can be set arbitrarily. It is desirable to arrange them so that pseudo contours do not occur as much as possible.

  Therefore, the upper bit superposition time gray scale subframes are arranged so that the lighted subframes are continuous, and the lower bit superposition time gray scale subframes are superposed of the upper bits. You may disperse | distribute and arrange | position between the subframes of a time gradation system. As a result, the upper bit superimposing time gray scale subframes are arranged together to some extent within one frame. Therefore, when changing from the first frame to the second frame, it is possible to reduce the occurrence of a pseudo contour at the switching point. So-called moving image pseudo contour can be reduced. In addition, since the subframes in the overlapping time gray scale method of the lower bits are arranged in a distributed manner, pseudo contour can be reduced.

  Also, the sub-frames of the superimposition time gray scale method of the upper bits may be arranged separately, and the sub-frames of the superposition time gray scale method of the lower bits may be arranged separately. As a result, the pseudo contour caused by the superimposing time gray scale portion of the lower bits is mixed with the sub frame of the superposed time gray scale method of the upper bits, so that the effect of reducing the pseudo contour as a whole becomes high. .

Note that the contents described in this embodiment mode can be freely combined with the contents described in Embodiment Modes 1 to 3.

(Embodiment 5)
Hereinafter, in this embodiment, structures and operations of a display device, a signal line driver circuit, a gate line driver circuit, and the like will be described.

  As shown in FIG. 23, the display device includes a pixel portion 2301, a gate line driver circuit 2302, and a signal line driver circuit 2310. The gate line driver circuit 2302 sequentially outputs selection signals to the pixel portion 2301. The gate line driver circuit 2302 includes a shift register, a buffer circuit, and the like.

  In addition, the gate line driver circuit 2302 often includes a level shifter circuit, a pulse width control circuit, and the like. The shift register outputs pulses that sequentially select gate lines. The signal line driver circuit 2310 sequentially outputs video signals to the pixel portion 2301. The shift register 2303 outputs a pulse for sampling the video signal. The pixel portion 2301 displays an image by controlling the state of light according to the video signal. A video signal input from the signal line driver circuit 2310 to the pixel portion 2301 is often a voltage. That is, the state of the display element arranged in each pixel and the element that controls the display element changes depending on the video signal (voltage) input from the signal line driver circuit 2310. Examples of the display element arranged in the pixel include an EL element, an element used in an FED (field emission display), a liquid crystal, a DMD (digital micromirror device), and the like.

  Note that a plurality of gate line driver circuits 2302 and signal line driver circuits 2310 may be provided.

  The signal line driver circuit 2310 is divided into a plurality of parts. Roughly, as an example, it is divided into a shift register 2303, a first latch circuit (LAT1) 2304, a second latch circuit (LAT2) 2305, and an amplifier circuit 2306. The amplifier circuit 2306 may have a function of converting a digital signal into analog or a function of performing gamma correction.

  Further, the pixel has a display element such as an EL element. A circuit for outputting a current (video signal) to the display element, that is, a current source circuit may be provided.

  Therefore, the operation of the signal line driver circuit 2310 will be briefly described. The shift register 2303 receives a clock signal (S-CLK), a start pulse (SP), and a clock inversion signal (S-CLKb), and sequentially outputs sampling pulses according to the timing of these signals.

  The sampling pulse output from the shift register 2303 is input to the first latch circuit (LAT1) 2304. A video signal is input to the first latch circuit (LAT1) 2304 from the video signal line 2308, and the video signal is held in each column in accordance with the timing at which the sampling pulse is input.

  When the first latch circuit (LAT1) 2304 completes holding of the video signal up to the last column, a latch pulse (Latch Pulse) is input from the latch control line 2309 during the horizontal blanking period, and the first latch circuit (LAT1) The video signals held in 2304 are transferred to the second latch circuit (LAT2) 2305 all at once. After that, the video signal held in the second latch circuit (LAT2) 2305 is input to the amplifier circuit 2306 for one row at the same time. A signal output from the amplifier circuit 2306 is input to the pixel portion 2301.

  While the video signal held in the second latch circuit (LAT2) 2305 is input to the amplifier circuit 2306 and is input to the pixel portion 2301, a sampling pulse is output again in the shift register 2303. That is, two operations are performed simultaneously. Thereby, line-sequential driving becomes possible. Thereafter, this operation is repeated.

  Note that the signal line driver circuit and a part thereof (such as a current source circuit and an amplifier circuit) do not exist on the same substrate as the pixel portion 2301, and may be configured using, for example, an external IC chip.

  Note that the structures of the signal line driver circuit, the gate line driver circuit, and the like are not limited to those in FIGS. For example, a signal may be supplied to the pixel by dot sequential driving. An example of the signal line driver circuit 2410 in that case is shown in FIG. A sampling pulse is output from the shift register 2403 to the sampling circuit 2404. A video signal is input from the video signal line 2408, and the video signal is output to the pixel portion 2401 in accordance with the sampling pulse. Then, signals are sequentially input to the pixels in the row selected by the gate line driver circuit 2402.

  Note that as described above, the transistor in the present invention may be any type of transistor, and may be formed on any substrate. Therefore, the circuits as shown in FIGS. 23 and 24 may all be formed on a glass substrate, may be formed on a plastic substrate, may be formed on a single crystal substrate, It may be formed on an SOI substrate, or may be formed on any substrate. Alternatively, a part of the circuit in FIGS. 23 and 24 may be formed on a certain substrate, and another part of the circuit in FIGS. 23 and 24 may be formed on another substrate. That is, all the circuits in FIGS. 23 and 24 may not be formed on the same substrate. For example, in FIGS. 23 and 24, the pixel portion 2301 and the gate line driver circuit 2302 are formed using a TFT over a glass substrate, and the signal line driver circuit 2310 (or part thereof) is a single crystal as an IC chip. It may be formed on a substrate, and the IC chip may be connected to the glass substrate by COG (Chip On Glass). Alternatively, the IC chip may be connected to the glass substrate using TAB (Tape Auto Bonding) or a printed board.

  The contents described in the present embodiment correspond to those using the contents described in the first to fourth embodiments. Therefore, the contents described in Embodiments 1 to 4 can be applied to this embodiment.

(Embodiment 6)
Next, a pixel layout in the display device of the present invention will be described. As an example, FIG. 25 shows a layout diagram of the circuit diagram shown in FIG. Note that the circuit diagrams and layout diagrams are not limited to FIGS. 22 and 25.

  A selection transistor 2501, a driving transistor 2503, a diode-connected transistor 2511, and an electrode 2504 of a display element are provided. The source and drain of the selection transistor 2501 are connected to the signal line 2505 and the gate of the driving transistor 2503, respectively. The gate of the selection transistor 2501 is connected to the first gate line 2507. The source and drain of the driving transistor 2503 are connected to the power supply line 2506 and the electrode 2504 of the display element, respectively. The diode-connected transistor 2511 is connected to the gate of the driving transistor 2503 and the second gate line 2517. The storage capacitor 2502 is connected between the gate of the driving transistor 2503 and the power supply line 2506.

  The signal line 2505 and the power supply line 2506 are formed by the second wiring, and the first gate line 2507 and the second gate line 2517 are formed by the first wiring.

  In the case of the top gate structure, the substrate, the semiconductor layer, the gate insulating film, the first wiring, the interlayer insulating film, and the second wiring are configured in this order. In the case of the bottom gate structure, the substrate, the first wiring, the gate insulating film, the semiconductor layer, the interlayer insulating film, and the second wiring are configured in this order.

Note that the contents described in this embodiment mode can be implemented by being freely combined with the contents described in Embodiment Modes 1 to 5.

(Embodiment 7)
In the present embodiment, hardware for controlling the driving method described in the first to sixth embodiments will be described.

  A rough block diagram is shown in FIG. A pixel portion 2604 is provided over the substrate 2601. In many cases, a signal line driver circuit 2606 and a gate line driver circuit 2605 are provided. In addition, a power supply circuit, a precharge circuit, a timing generation circuit, and the like may be arranged. In some cases, the signal line driver circuit 2606 and the gate line driver circuit 2605 are not provided. In that case, what is not arranged on the substrate 2601 is often formed in an IC. In many cases, the IC is disposed on the substrate 2601 by COG (Chip On Glass). Alternatively, an IC may be arranged on a connection board 2607 that connects the peripheral circuit board 2602 and the board 2601.

  A signal 2603 is input to the peripheral circuit board 2602. Then, the controller 2608 controls and the signal is stored in the memory 2609, the memory 2610, or the like. When the signal 2603 is an analog signal, it is often stored in the memory 2609, the memory 2610, etc. after analog-digital conversion. Then, the controller 2608 outputs a signal to the substrate 2601 using a signal stored in the memory 2609, the memory 2610, or the like.

In order to realize the driving method described in Embodiment Modes 1 to 6, the controller 2608 controls the appearance order of subframes and outputs a signal to the substrate 2601.

Note that the contents described in this embodiment can be implemented by being freely combined with the contents described in Embodiments 1 to 6.

(Embodiment 8)
An example of a structure of a mobile phone having the display device of the present invention and a display device using the driving method thereof in a display portion will be described with reference to FIG.

  The display panel 5410 is incorporated in a housing 5400 so as to be detachable. The shape and dimensions of the housing 5400 can be changed as appropriate in accordance with the size of the display panel 5410. A housing 5400 to which the display panel 5410 is fixed is fitted into a printed board 5401 and assembled as a module.

  The display panel 5410 is connected to the printed board 5401 through the FPC 5411. A signal processing circuit 5405 including a speaker 5402, a microphone 5403, a transmission / reception circuit 5404, a CPU, a controller, and the like is formed over the printed board 5401. Such a module is combined with the input means 5406 and the battery 5407 and housed in the housings 5409 and 5412. The pixel portion of the display panel 5410 is arranged so as to be visible from an opening window formed in the housing 5409.

  In the display panel 5410, a pixel portion and some peripheral driver circuits (a driver circuit having a low operating frequency among a plurality of driver circuits) are formed over a substrate using TFTs, and some peripheral driver circuits (a plurality of driver circuits) are formed. A driving circuit having a high operating frequency among the circuits) may be formed over the IC chip, and the IC chip may be mounted on the display panel 5410 by COG (Chip On Glass). Alternatively, the IC chip may be connected to the glass substrate using TAB (Tape Auto Bonding) or a printed board. Note that FIG. 28A shows an example of the configuration of a display panel in which some peripheral drive circuits are formed integrally with a pixel portion on a substrate and an IC chip on which other peripheral drive circuits are formed is mounted by COG or the like. is there. 28A includes a substrate 5300, a signal line driver circuit 5301, a pixel portion 5302, a scanning line driver circuit 5303, a scanning line driver circuit 5304, an FPC 5305, an IC chip 5306, an IC chip 5307, a seal, and the like. A stop substrate 5308 and a sealant 5309 are provided. With such a structure, low power consumption of the display device can be achieved, and the use time by one charge of the mobile phone can be extended. In addition, the cost of the mobile phone can be reduced.

In addition, by performing impedance conversion of a signal set to the scanning line or the signal line using a buffer, the pixel writing time for each row can be shortened. Therefore, a high-definition display device can be provided.

In order to further reduce power consumption, a pixel portion is formed on a substrate using TFTs as shown in FIG. 28B, and all peripheral drive circuits are formed on an IC chip. The display panel may be mounted by COG (Chip On Glass) or the like. 28B includes a substrate 5310, a signal line driver circuit 5311, a pixel portion 5312, a scan line driver circuit 5313, a scan line driver circuit 5314, an FPC 5315, an IC chip 5316, an IC chip 5317, a seal, and the like. A stop substrate 5318 and a sealant 5319 are provided.

Then, by using the display device of the present invention and its driving method, it is possible to view a clear image with reduced pseudo contour. Therefore, even an image whose gradation changes slightly like human skin can be displayed neatly.

Further, the configuration shown in this embodiment is an example of a mobile phone, and the display device of the present invention can be applied to mobile phones having various configurations limited to the mobile phone having such a configuration.

(Embodiment 9)
FIG. 29 shows an EL module in which a display panel 5701 and a circuit board 5702 are combined. A display panel 5701 includes a pixel portion 5703, a scan line driver circuit 5704, and a signal line driver circuit 5705. On the circuit board 5702, for example, a control circuit 5706, a signal dividing circuit 5707, and the like are formed. The display panel 5701 and the circuit board 5702 are connected to each other through a connection wiring 5708. An FPC or the like can be used for the connection wiring.

  The control circuit 5706 corresponds to the controller 2608, the memory 2609, the memory 2610, and the like in the seventh embodiment. The control circuit 5706 mainly controls the appearance order of subframes.

In the display panel 5701, a pixel portion and some peripheral driver circuits (a driver circuit having a low operating frequency among the plurality of driver circuits) are formed over the substrate using TFTs, and some peripheral driver circuits (a plurality of driver circuits) are formed. A driver circuit having a high operating frequency among the circuits) is formed over the IC chip, and the IC chip is preferably mounted on the display panel 5701 by COG (Chip On Glass) or the like. Alternatively, the IC chip may be mounted on the display panel 5701 using TAB (Tape Auto Bonding) or a printed board. Note that FIG. 28A shows an example of the configuration of a display panel in which some peripheral drive circuits are formed integrally with a pixel portion on a substrate and an IC chip on which other peripheral drive circuits are formed is mounted by COG or the like. is there.

In addition, by performing impedance conversion of a signal set to the scanning line or the signal line using a buffer, the pixel writing time for each row can be shortened. Therefore, a high-definition display device can be provided.

In order to further reduce power consumption, a pixel portion is formed using a TFT on a glass substrate, all signal line driver circuits are formed on an IC chip, and the IC chip is formed by COG (Chip On Glass) or the like. It may be mounted on the display panel.

FIG. 28B shows an example of a configuration in which an IC chip in which a pixel portion is formed over a substrate and a signal line driver circuit is formed over the substrate is mounted by COG or the like.

  With this EL module, an EL television receiver can be completed. FIG. 30 is a block diagram illustrating a main configuration of an EL television receiver. A tuner 5801 receives video signals and audio signals. The video signal includes a video signal amplifying circuit 5802, a video signal processing circuit 5803 that converts a signal output from the video signal into a color signal corresponding to each color of red, green, and blue, and uses the video signal as input specifications of the drive circuit. Processing is performed by a control circuit 5706 for conversion. The control circuit 5706 outputs a signal to each of the scan line side and the signal line side. In the case of digital driving, a signal dividing circuit 5707 may be provided on the signal line side, and an input digital signal may be divided into m pieces and supplied.

  Of the signals received by the tuner 5801, the audio signal is sent to the audio signal amplifier circuit 5804, and the output is supplied to the speaker 5806 through the audio signal processing circuit 5805. The control circuit 5807 receives control information on the receiving station (reception frequency) and volume from the input unit 5808 and sends a signal to the tuner 5801 and the audio signal processing circuit 5805.

  A television receiver can be completed by incorporating an EL module into a housing. A display portion is formed by the EL module. In addition, a speaker, a video input terminal, and the like are provided as appropriate.

  Of course, the present invention is not limited to a television receiver, and is applied to various uses as a display medium of a particularly large area such as a monitor of a personal computer, an information display board in a railway station or airport, an advertisement display board in a street, etc. can do.

  As described above, by using the display device of the present invention and its driving method, it is possible to view a beautiful image with reduced pseudo contour. Therefore, even an image whose gradation changes slightly like human skin can be displayed neatly.

(Embodiment 10)
As an electronic device using the present invention, a camera such as a video camera or a digital camera, a goggle type display, a navigation system, a sound reproduction device (car audio, audio component, etc.), a computer, a game device, a portable information terminal (mobile computer, portable) An image playback apparatus (specifically, a digital versatile disc (DVD)) such as a telephone, a portable game machine, or an electronic book), and an apparatus including a display that can display the image. ) And the like. Specific examples of these electronic devices are shown in FIGS.

  FIG. 31A illustrates a light-emitting device, which includes a housing 13001, a support base 13002, a display portion 13003, a speaker portion 13004, a video input terminal 13005, and the like. The present invention can be used for a display device included in the display portion 13003. Further, according to the present invention, a clear image with reduced pseudo contour can be seen, and the light-emitting device shown in FIG. 31A is completed. Since the light-emitting device is a self-luminous type, a backlight is not necessary and a display portion thinner than a liquid crystal display can be obtained. The light emitting device includes all display devices for displaying information such as for personal computers, for receiving TV broadcasts, and for displaying advertisements.

  FIG. 31B illustrates a digital camera, which includes a main body 13101, a display portion 13102, an image receiving portion 13103, operation keys 13104, an external connection port 13105, a shutter 13106, and the like. The present invention can be used for a display device included in the display portion 13102. Further, according to the present invention, a clear image with reduced pseudo contour can be seen, and the digital still camera shown in FIG. 31B is completed.

  FIG. 31C illustrates a computer, which includes a main body 13201, a housing 13202, a display portion 13203, a keyboard 13204, an external connection port 13205, a pointing mouse 13206, and the like. The present invention can be used for a display device included in the display portion 13203. Further, according to the present invention, a clear image with reduced pseudo contour can be seen, and the light emitting device shown in FIG. 31C is completed.

  FIG. 31D illustrates a mobile computer, which includes a main body 13301, a display portion 13302, a switch 13303, operation keys 13304, an infrared port 13305, and the like. The present invention can be used for a display device included in the display portion 13302. Further, according to the present invention, a clear image with reduced pseudo contour can be seen, and the mobile computer shown in FIG. 31D is completed.

  FIG. 31E shows a portable image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 13401, a housing 13402, a display portion A13403, a display portion B13404, and a recording medium (DVD or the like). A reading unit 13405, operation keys 13406, a speaker unit 13407, and the like are included. Although the display portion A 13403 mainly displays image information and the display portion B 13404 mainly displays character information, the present invention can be used for a display device that constitutes the display portions A, B 13403, and 13404. Note that an image reproducing device provided with a recording medium includes a home game machine and the like. Further, according to the present invention, it becomes possible to view a beautiful image with reduced pseudo contour, and the DVD reproducing apparatus shown in FIG. 31E is completed.

  FIG. 31F illustrates a goggle type display including a main body 13501, a display portion 13502, and an arm portion 13503. The present invention can be used for a display device included in the display portion 13502. Further, according to the present invention, a clear image with reduced pseudo contour can be seen, and the goggle type display shown in FIG. 31F is completed.

  FIG. 31G illustrates a video camera, which includes a main body 13601, a display portion 13602, a housing 13603, an external connection port 13604, a remote control receiving portion 13605, an image receiving portion 13606, a battery 13607, an audio input portion 13608, operation keys 13609, an eyepiece Part 13610 and the like. The present invention can be used for a display device included in the display portion 13602. Further, according to the present invention, it becomes possible to view a beautiful image with reduced pseudo contour, and the video camera shown in FIG. 31G is completed.

  FIG. 31H illustrates a mobile phone, which includes a main body 13701, a housing 13702, a display portion 13703, an audio input portion 13704, an audio output portion 13705, operation keys 13706, an external connection port 13707, an antenna 13708, and the like. The present invention can be used for a display device included in the display portion 13703. Note that the display portion 13703 can suppress current consumption of the mobile phone by displaying white characters on a black background. Further, according to the present invention, a clear image with reduced pseudo contour can be seen, and the mobile phone shown in FIG. 31H is completed.

  Note that when a light emitting material having high light emission luminance is used, it is possible to enlarge and project the light including the output image information with a lens or the like and use it in a front type or rear type projector.

  In addition, the electronic devices often display information distributed through electronic communication lines such as the Internet and CATV (cable television), and in particular, opportunities to display moving image information are increasing. Since the response speed of the light emitting material is very high, the light emitting device is preferable for displaying moving images.

  In addition, since the light emitting device consumes power in the light emitting portion, it is desirable to display information so that the light emitting portion is minimized. Therefore, when a light emitting device is used for a display unit mainly including character information, such as a portable information terminal, particularly a mobile phone or a sound reproduction device, it is driven so that character information is formed by the light emitting part with the non-light emitting part as the background. It is desirable to do.

  As described above, the applicable range of the present invention is so wide that it can be used for electronic devices in various fields. In addition, the electronic device of this embodiment may use the display device having any structure described in Embodiments 1 to 9.

4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 14 illustrates an electronic device to which the present invention is applied. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 14 illustrates an electronic device to which the present invention is applied. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 14 illustrates an electronic device to which the present invention is applied. 8A and 8B illustrate a structure of a conventional display device driving method. 8A and 8B illustrate a structure of a conventional display device driving method. 8A and 8B illustrate a structure of a conventional display device driving method. 8A and 8B illustrate a structure of a conventional display device driving method. 8A and 8B illustrate a structure of a conventional display device driving method.

Claims (5)

One frame period is a plurality of first subframe periods having the same lighting weight and a plurality of second subframe periods having the same lighting weight and different from the lighting weights of the plurality of first subframe periods. And having
In the case of expressing N (N is a natural number) gradations, a combination of lighting periods among the plurality of first subframe periods and the plurality of second subframe periods is mutually in each of the N gradations. In a different manner, gradation expression is performed by sequentially adding the lighting periods of the plurality of first subframe periods, and sequentially adding the lighting periods of the plurality of second subframe periods,
The plurality of first subframe periods correspond to upper bits of a gradation displayed in binary number ,
The plurality of second subframe periods correspond to the lower bits of the gradation displayed in binary number ,
At least one subframe period selected from the plurality of first subframe periods is arranged between any two subframe periods selected from the plurality of second subframe periods. Display device. In claim 1,
q (q is an integer greater than or equal to 2 ) bits gradation is displayed,
The plurality of first subframe periods and the plurality of second subframe periods can express a gray scale of p (p is an integer of 4 or more ) bits,
The display device characterized in that a relationship between the q bits and the p bits satisfies q + 2 ≦ p ≦ q + 5. In claim 1 or claim 2,
Wherein the plurality of first sub-frame period, the display apparatus characterized by order of start to light up as the gradation increases emerge from an early period in order. In claim 1 or claim 2,
The plurality of first sub-frame periods appear in order from a period in which the order of starting lighting is late as the gray level increases.   The display device according to any one of claims 1 to 4, wherein the display device is an EL display.

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