JP4926463B2 - Display device - Google Patents

Description

  The present invention relates to a display device driving method, and more particularly to a display device driving method to which a time gray scale method is applied.

  In recent years, so-called self-luminous display devices in which pixels are formed by light-emitting elements such as light-emitting diodes (LEDs) have attracted attention. As a light-emitting element used in such a self-luminous display device, an organic light-emitting diode (also referred to as an OLED (Organic Light Emitting Diode), an organic EL element, or an electroluminescence (EL) element) attracts attention. It has been used for EL displays (for example, organic EL displays). Since light-emitting elements such as OLEDs are self-luminous, there are advantages such as higher pixel visibility than a liquid crystal display, no need for a backlight, and high response speed. The luminance of the light emitting element is controlled by the value of current flowing therethrough.

There are a digital gradation method and an analog gradation method as driving methods for controlling the light emission gradation of such a display device. In the digital gradation method, gradation is expressed by turning on and off the light emitting element by digital control. On the other hand, the analog gradation method includes a method in which the light emission intensity of the light emitting element is controlled in an analog manner and a method in which the light emission time of the light emitting element is controlled in an analog manner.

  In the digital gradation method, since there are only two states of light emission and non-light emission, only two gradations can be expressed as it is. In view of this, multi-gradation is being achieved by combining different methods. In many cases, a time gray scale method is used as a technique for multi-gradation.

  In addition to the organic EL display using the digital gradation method, there are several displays that display gradation by combining the time gradation by controlling the display state of the pixel by digital control. An example is a plasma display.

The time gradation method is a method of expressing gradation by controlling the length of a light emitting period and the number of times of light emission. In other words, one frame period is divided into a plurality of subframe periods, and each subframe is weighted such as the number of times of light emission and the time of light emission. The gradation is expressed by adding a difference to. When such a time gray scale method is used, it is known that a display defect called pseudo contour (or pseudo contour) or the like is caused, and countermeasures thereof are being studied (see Patent Documents 1 to 7).
Japanese Patent No. 2903984 Japanese Patent No. 3075335 Japanese Patent No. 2639311 Japanese Patent No. 3322809 JP-A-10-307561 Japanese Patent No. 3585369 Japanese Patent No. 3489884

As described above, various methods for reducing the pseudo contour have been proposed, but the effect of the pseudo contour reduction is not yet sufficient.

  For example, refer to Patent Document 2. The pixel A expresses the gradation number 127, and the adjacent pixel B expresses the gradation number 128. FIG. 33 shows a lighting / non-lighting state in each subframe in that case. If only the pixel A or the pixel B is viewed without moving the line of sight, the pseudo contour does not occur. This is because the brightness of the place where the line of sight passes is summed and the eyes feel bright. Therefore, the pixel A feels that the number of gradations is 127 (= 1 + 2 + 4 + 8 + 16 + 32 + 32 + 32), and the pixel B feels that the number of gradations is 128 (= 32 + 32 + 32 + 32). That is, the eyes feel the correct gradation.

On the other hand, it is assumed that the line of sight moves from the pixel A to the pixel B or from the pixel B to the pixel A. Such a case is shown in FIG. In this case, depending on how the line of sight moves, the number of gradations may be 96 (= 32 + 32 + 32) in some cases, and the gradation number may be 159 (= 1 + 2 + 4 + 8 + 16 + 32 + 32 + 32 + 32) in other cases. Originally, the number of gradations should be 127 and 128, but the number of gradations is 96 to 159, and a pseudo contour is generated.

  In FIGS. 33 and 34, the case of 8 bits (256 gradations) is shown. Next, FIG. 35 shows a case of 5 bits. Similarly, depending on how the line of sight moves, the number of gradations is felt 12 (= 4 + 4 + 4) in some cases, and the gradation number 19 is felt in other cases (= 1 + 2 + 4 + 4 + 4 + 4). Originally, the number of gradations should be 15 and 16, but the number of gradations is visible from 12 to 19, and a pseudo contour is generated.

  In view of such problems, it is an object of the present invention to provide a display device configured with a small number of subframes and capable of reducing pseudo contours, and a driving method using the display device.

  According to the present invention, in expressing a high-order bit (that is, a bit having a high digit like MSB (Most Significant Bit)) in a halftone displayed in a binary number, weighting (lighting period) in each subframe is performed. Gradation is expressed by adding together the number of times and the number of lighting). On the other hand, in the case of expressing lower-order bits (that is, low-significant bits such as LSB (Least Significant Bit), etc.) in halftones displayed in binary numbers, which should be lit in each subframe? The gradation is expressed by selecting. Then, the subframe for the upper bits and the subframe for the lower bits are prevented from being unevenly distributed at a specific place in one frame. For example, the lower bit subframe is sandwiched between the upper bit subframes. The above object is achieved by expressing gradation using such a method.

The present invention is a method for driving a display device that divides one frame into a plurality of subframes to express gradation,
A plurality of subframes corresponding to the high-order bits of the halftone displayed in binary numbers have substantially equal weights for lighting,
One or more subframes corresponding to the lower half-tone bits displayed in binary numbers are weighted according to the binary numbers for lighting,
In the one frame, one subframe of a plurality of subframes corresponding to the upper bits is lit,
Thereafter, one of the one or more subframes corresponding to the lower bits is turned on,
After that, another subframe of a plurality of subframes corresponding to the higher order bits is lit.

The present invention is a method for driving a display device that divides one frame into a plurality of subframes to express gradation,
A plurality of subframes corresponding to the high-order bits of the halftone displayed in binary numbers have substantially equal weights for lighting,
A plurality of subframes corresponding to the lower bits of the halftone displayed in binary number are weighted according to the binary number for lighting,
In the one frame, one subframe of a plurality of subframes corresponding to the lower bits is turned on,
Thereafter, one subframe of a plurality of subframes corresponding to the upper bits is turned on,
After that, another subframe of a plurality of subframes corresponding to the lower bits is turned on.

The present invention is a method for driving a display device that divides one frame into a plurality of subframes to express gradation,
A plurality of subframes corresponding to the high-order bits of the halftone displayed in binary numbers have substantially equal weights for lighting,
A plurality of subframes corresponding to the lower bits of the halftone displayed in binary number are weighted according to the binary number for lighting,
In the one frame, one subframe of a plurality of subframes corresponding to the lower bits is turned on,
Thereafter, a plurality of subframes among the plurality of subframes corresponding to the higher order bits are lit,
After that, another subframe of a plurality of subframes corresponding to the lower bits is turned on.

The present invention is a method for driving a display device that divides one frame into a plurality of subframes to express gradation,
A plurality of subframes corresponding to the high-order bits of the halftone displayed in binary numbers have substantially equal weights for lighting,
A plurality of subframes corresponding to the lower bits of the halftone displayed in binary number are weighted according to the binary number for lighting,
In the one frame, one subframe of a plurality of subframes corresponding to the upper bits is lit,
Thereafter, a plurality of subframes among the plurality of subframes corresponding to the lower bits are turned on,
After that, another subframe of a plurality of subframes corresponding to the higher order bits is lit.

The present invention is a method for driving a display device that divides one frame into a plurality of subframes to express gradation,
A plurality of subframes corresponding to the upper half-tone bits displayed in binary numbers are approximately equally weighted for lighting,
A plurality of subframes corresponding to the lower bits of the halftone displayed in binary number are weighted according to the binary number for lighting,
A plurality of subframes corresponding to the upper bit or the lower bit with the smaller number of bits of the upper bit or the lower bit, whichever has the larger number of bits of the upper bit or the lower bit A subframe is selected through one subframe selected from a plurality of subframes corresponding to the upper bits or the lower bits.

  In the present invention, there are no limitations on the types of transistors that can be used, and the transistor is formed using a thin film transistor (TFT) using a non-single-crystal semiconductor film typified by amorphous silicon or polycrystalline silicon, a semiconductor substrate, or an SOI substrate. A MOS transistor, a junction transistor, a bipolar transistor, a transistor using an organic semiconductor or a carbon nanotube, and other transistors can be used. There is no limitation on the kind of the substrate over which the transistor is provided, and the transistor can be provided on a single crystal substrate, an SOI substrate, a glass substrate, a plastic substrate, or the like.

  In the present invention, being connected is synonymous with being electrically connected. Therefore, in the configuration disclosed by the present invention, in addition to a predetermined connection relationship, another element (for example, another element or a switch) that enables electrical connection may be disposed therebetween.

  In the present invention, the pseudo contour can be reduced. Accordingly, the display quality is improved and a beautiful image can be seen.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention is not construed as being limited to the description of this embodiment mode.

(Embodiment 1)
First, here, as an example, consider the case of expressing gradation with 5 bits. That is, the case of 32 gradations will be described. First, the gradation to be expressed (here, 5 bits) is divided into upper bits and lower bits. Here, as an example, the upper bits are 3 bits and the lower bits are 2 bits.

In the present invention, the upper 3 bits express gradation by sequentially adding the lighting periods (or the number of times of lighting at a certain time) in each subframe. That is, the number of subframes to be lit increases as the gray level increases. Therefore, a subframe that is lit at a small gradation is also lit at a large gradation. Such a gradation method is called an overlapping time gradation method.

On the other hand, the lower 2 bits express gradation by selecting which of the sub-frames having different lighting periods (or the number of lighting times in a certain time) to be lit. As an example, the length of the lighting period (or the number of times of lighting at a certain time) in each subframe is a weight according to a binary number and is a power of 2. Therefore, when it is a power of 2, the lighting period (or the number of times of lighting in a certain time) in each subframe is 1: 2: 4: 8:. Then, gradation is expressed by selecting whether to light up in each subframe. Therefore, a subframe that is lighted at a small gradation does not necessarily light at a large gradation. In this specification, such a gradation method is referred to as a binary code time gradation method.

Next, as a specific example, a method for selecting a subframe in each gradation, that is, whether or not each subframe is lit in each gradation will be described. FIG. 1 shows a method for selecting a subframe when gradation is expressed by 5 bits, the upper bit is 3 bits, and the lower bit is 2 bits. Since the upper bits use the superposition time gray scale method, the number of subframes is 7 (SF1 to SF7). Thereby, 3 bits, that is, 8 gradations can be expressed. It is assumed that the length of the lighting period (or the number of times of lighting in a certain time, that is, the weighting amount) is all four. Here, it is assumed that the number of gradations 1 corresponds to 1 of the length of the lighting period (or the number of times of lighting in a certain time, that is, the weighting amount). The lower bits use a binary code time gray scale method, and the number of subframes is two (SF8 to SF9). Thereby, 2 bits, that is, 4 gradations can be expressed. It is assumed that the length of the lighting period (or the number of times of lighting in a certain time, that is, the weighting amount) is SF8 = 1 and SF9 = 2. In this way, a 5-bit gradation can be expressed by 7 subframes for the upper bits, 2 subframes for the lower bits, and a total of 9 subframes.

  Note that the length of the lighting period (or the number of times of lighting at a certain time, that is, the amount of weighting) in the subframe of the portion using the overlapping time gray scale method is all four, but is not limited thereto. The length of the lighting period (or the number of times of lighting in a certain time, that is, the weighting amount) may be different depending on the subframe.

  The lighting period is used when the lamp continues to be lit, and the lighting count is used when the lamp continues to flash within a certain time. A typical display using the number of times of lighting is a plasma display. A typical display using the lighting period is an organic EL display.

  Here, how to view FIG. 1 will be described. Lights up in subframes with a circle mark, and does not light up in subframes with a cross mark. Then, in each gradation number, gradation is expressed by selecting which subframe to light. For example, at the gradation number 0, SF1 to SF9 are not lit. At the gradation number 1, SF1 to SF7 and SF9 are not lit, and SF8 is lit. In the number of gradations 4, SF2 to SF9 are not lit, and SF1 is lit. At the gradation number 5, SF2 to SF7 and SF9 are not lit, and SF1 and SF8 are lit. At the gradation number 8, SF3 to SF9 are not lit, and SF1 and SF2 are lit. SF1 to SF7 are subframes for upper bits, and SF8 to SF9 are subframes for lower bits.

  Next, a method for expressing the number of gradations, that is, a method for selecting each subframe will be described. Since the superimposition time gradation method is used for the upper 3 bits, all of SF1 to SF7 are not lit until the number of gradations 0 to 3. From the gradation number 4 to 7, SF1 is turned on, and SF2 to SF7 are all turned off. From the gradation number 8 to 11, SF1 and SF2 are turned on, and SF3 to SF7 are all turned off. From the gradation number 12 to 15, SF1, SF2, and SF3 are turned on, and SF4 to SF7 are all turned off. Similarly, when the number of gradations increases, lighting or non-lighting is selected.

Thus, the upper 3 bits express gradation by sequentially adding the lighting periods in each subframe. That is, the number of subframes to be lit increases as the gray level increases. Therefore, SF1 is all lit when the number of gradations is 4 or more, SF2 is all lit when the number of gradations is 8 or more, and SF3 is all lit when the number of gradations is 12 or more. The same applies to SF4 to SF7. That is, a subframe that is lit at a small gradation is also lit at a large gradation.

By adopting such a driving method, the pseudo contour can be reduced. This is because, in a certain gradation, all subframes that are lit in a gradation lower than that are lit. Therefore, even when the line of sight moves, it can be prevented that the image is viewed with inaccurate brightness at the change of gradation.

Next, a method of expressing gradation with lower bits will be described. If the subframes to be lit are the same in the subframes for the upper bits, fine gradations cannot be expressed as they are. Therefore, in order to express a finer gradation, that is, to express lower bits, a binary code time gradation method is used. That is, at gradation number 0, SF8 and SF9 are not lit, at gradation number 1, SF8 is lit, SF9 is not lit, at gradation number 2, SF8 is not lit, SF9 is lit, and gradation number 3 is , SF8 and SF9 are turned on. Similarly, at gradation number 4, SF8 and SF9 are not lit, at gradation number 5, SF8 is lit, SF9 is not lit, at gradation number 6, SF8 is not lit, SF9 is lit, gradation number 7 Then, SF8 and SF9 are turned on.

In this way, the length of the subframe is 1: 2: 4: 8:...: 2 ⁿ , so that it becomes a power of 2 according to the binary system, and each subframe is turned on / off. The lighting is controlled to express an n-bit gradation. As a result, when the subframes to be lit are the same in the subframes for the upper bits, it is possible to express a finer gradation. That is, it is possible to express the lower bits.

As described above, FIG. 1 shows a subframe selection method when the upper bits are 3 bits and the lower bits are 2 bits. Next, FIG. 2 shows a subframe selection method when the upper bits are 2 bits and the lower bits are 3 bits.

Since the upper 2 bits use the superposition time gray scale method, the number of subframes is 3 (SF1 to SF3). Thereby, 2 bits, that is, 4 gradations can be expressed. Since the lower 3 bits use the binary code time gray scale method, the number of subframes is 3 (SF4 to SF6). Thereby, 3 bits, that is, 8 gradations can be expressed. In this way, a 5-bit gray scale can be expressed with three subframes for the upper bits, three subframes for the lower bits, and a total of six subframes.

In this way, the total number of subframes can be reduced by increasing the number of bits using the binary code time gray scale method. However, when the number of gradations changes by one, the selection of the subframe to be selected, that is, the subframe to be lit may change greatly. In such a case, a pseudo contour is likely to appear. Therefore, the number of bits using the binary code time gray scale method may be determined by a trade-off between the number of subframes and the effect of reducing the pseudo contour.

When the upper bit is 2 bits and the lower bit is 3 bits, the length of the lighting period in the subframe in the superposition time gray scale method is 8. This is because the lower bits using the binary code time gray scale method are for 3 bits. Since 3 bits, that is, 8 gradations can be expressed, in the superposition time gradation method, it is necessary to increase the lighting period by 8 at a maximum. From the above, it is desirable that the length of the lighting period in the subframe in the overlapping time gray scale method is equal to or less than the length of the lighting period in the maximum gray scale in the binary code time gray scale method. . If the length of the lighting period in the subframe in the superimposed time gray scale method is smaller than the length of the lighting period in the maximum gray scale in the binary code time gray scale method, the subframe in the binary code time gray scale method It just means that some of the choices are not actually used.

Note that the length of the lighting period varies depending on the total number of gradations (number of bits), the total number of subframes, and the like. Therefore, even if the length of the lighting period is the same, if the total number of gradations (number of bits) or the total number of subframes changes, the length of the actual lighting period (for example, how many μs it is) ) Is subject to change.

Next, consider the case of expressing gradation with 6 bits. FIG. 3 shows a subframe selection method when the upper bits are 3 bits and the lower bits are 3 bits.

The upper 3 bits use the superposition time gray scale method, so the number of subframes is 7 (SF1 to SF7). Thereby, 3 bits, that is, 8 gradations can be expressed. Since the lower 3 bits use the binary code time gray scale method, the number of subframes is 3 (SF8 to SF10). Thereby, 3 bits, that is, 8 gradations can be expressed. The length of the lighting period in the subframe in the overlapping time gray scale method is 8. In this way, a 6-bit gradation can be expressed by using 7 subframes for the upper bits, 3 subframes for the lower bits, and a total of 10 subframes.

As in FIG. 2, even when gradation is expressed by 6 bits, the upper bit and the lower bit are arbitrarily divided, and the combination of the overlapping time gradation method and the binary code time gradation method is used. Can be expressed.

As described above, in FIGS. 1 to 3, the case of expressing a gradation of 5 bits or 6 bits has been described. However, by making the same, it is possible to correspond to various numbers of bits. In other words, when the gradation is expressed by n bits, assuming that the upper bit is a bit and the lower bit is b bit, the number of subframes is at least (2 ^a −1) in the upper bits using the overlapping time gradation method. In the lower bits using the binary code time gray scale method, the number of subframes is at least b. The length of the overlapping lighting period in the subframe in the time gradation method will 2 ^b.

In this way, by combining the overlay time gray scale method and the binary code time gray scale method, the pseudo contour can be reduced or the gray scale number can be displayed without increasing the number of subframes. It becomes possible.

In the case of using a binary code time gray scale method for representing lower bits, the length of a lighting period of the subframes, as an example, 1: 2: 4: 8: ...: feeling of 2 ^n, 2 Although it is said that it becomes the power of, it is not limited to this. For example, subframes may be divided into upper bit subframes in the case of using the binary code time gray scale method, that is, subframes having a long period. For example, a subframe of length 4 is divided into two subframes of length 2, or a subframe of length 8 is long, with a feeling of 1: 2: (2 + 2) :( 3 + 3 + 2):. It may be divided into three subframes of length 3, length 3 and length 2. FIG. 4 shows a case where SF6 in FIG. 2 is divided into two, which are SF6 and SF7, and the lighting period is 2.

Here, focusing on FIG. 4, it can be seen that there are sub-frames of lower bits using the binary code time gray scale method that have the same lighting period. In such a case, it is possible to change which subframe is lit. For example, as shown in FIG. 5, in the number of gradations 4, 5, 10, 11, 20, 21, etc., the lighting period may be selected differently from the case of FIG. In the case of the number of gradations 4, the light is turned on at SF6 and SF7 in FIG. 4, but the light is turned on at SF5 and SF7 in FIG. Actually, it is only necessary to select from the same lighting period, so there are more ways of selection. Therefore, the selection of the lighting period selection method in a certain gradation may be changed in time or place. That is, the method for selecting the lighting period may be changed depending on the time, and the method for selecting the lighting period may be changed depending on the pixel. Further, it may be changed depending on the time and also depending on the pixel.

For example, when a certain gradation is expressed, the selection method of subframes may be changed depending on whether the number of frames is an odd number or an even number. In addition, when expressing a certain gradation, the method of selecting a subframe may be changed depending on whether an odd-numbered row pixel is displayed or an even-numbered row pixel is displayed. In addition, when expressing a certain gradation, the method of selecting a subframe may be changed depending on whether an odd-numbered column pixel is displayed or an even-numbered column pixel is displayed.

  Another example will be described in which the length of the lighting period of the subframe is not a power of 2 when the binary code time gray scale method expressing the lower bits is used. Basically, it is sufficient that gradations can be expressed continuously by lighting each subframe. For that purpose, if the length of the lighting period of a certain subframe is about the same as the sum of the lighting periods for a subframe having a shorter lighting period, gradation can be expressed continuously. .

  For example, if the ratio of the lengths of the lighting periods of the subframes is 1: 1: 2: 3, all the gradations from 0 to 7 can be expressed continuously. That is, if the length of the lighting period of subframe i is Ti, the value obtained by subtracting lighting period 1 from Ti is compared with the sum of the lengths of lighting periods from subframe 1 to subframe (i-1). It should be the same length or shorter. Thus, all gradations can be expressed continuously by appropriately selecting each subframe. For example, in the case of T1: T2: T3: T4, the value obtained by subtracting the lighting period 1 from T4 may be equal to or less than the sum of T1 to T3, and the value obtained by subtracting the lighting period 1 from T3 may be T1 to T2. Or less than the total up to T1, and subtracting the lighting period 1 from T2 may be T1 or less. Thereby, all gradations can be expressed continuously.

  FIG. 6 shows a method of selecting a subframe when the upper bits are 2 bits and the lower bits are 3 bits in this way. The length of the lighting period in the sub-frame of the lower bits was 1: 1: 2: 3. Thereby, 8 gradations from 0 to 7 can be expressed. In this way, when the sub-frame is turned on as shown in FIG. 6, it is possible to prevent the method of selecting the selected sub-frame from changing greatly when the number of gradations changes. Therefore, the pseudo contour can be reduced.

Here, paying attention to FIG. 6, it can be seen that there are a plurality of subframe selection methods when a certain gradation is expressed with respect to the lower bits using the binary code time gradation method. For example, when expressing the number of gradations 2, two subframes having a lighting period of 1 may be selected, or one subframe having a lighting period of 2 may be selected. Similarly, when expressing the gradation number 3, one subframe having a lighting period of 3 may be selected, or subframes having a lighting period of 1 and 2 may be selected. Note that there are a plurality of subframes with a lighting period of one. So you can choose either one.

As described above, when one gradation is expressed, there are a plurality of methods for selecting a subframe.
Therefore, in a certain gradation, the selection method of subframes may be changed in time or place. That is, the selection method of the subframe may be changed depending on the time, and the selection method of the subframe may be changed depending on the pixel. Further, it may be changed depending on the time and also depending on the pixel.

For example, when a certain gradation is expressed, the selection method of subframes may be changed depending on whether the number of frames is an odd number or an even number. In addition, when expressing a certain gradation, the method of selecting a subframe may be changed depending on whether an odd-numbered row pixel is displayed or an even-numbered row pixel is displayed. In addition, when expressing a certain gradation, the method of selecting a subframe may be changed depending on whether an odd-numbered column pixel is displayed or an even-numbered column pixel is displayed.

Heretofore, the case where the gradation is expressed by combining the overlay time gradation method and the binary code time gradation method has been described, but another gradation expression method may be combined. For example, it may be combined with an area gradation method. A pixel is further divided into a plurality of sub-pixels, and a gradation is expressed by changing the area that is lit. Therefore, it becomes possible to further suppress the pseudo contour.

So far, the case where the lighting period increases linearly in proportion to the number of gradations has been described. Next, a case where gamma correction is performed will be described. The gamma correction refers to a non-linear lighting period that increases as the number of gradations increases. Even if the luminance increases linearly in proportion, the human eye does not feel that it is brighter in proportion. The higher the brightness, the less the difference in brightness is felt. Therefore, in order for the human eye to feel a difference in brightness, it is necessary to increase the lighting period as the number of gradations increases, that is, to perform gamma correction.

  The simplest method is to enable display with a larger number of bits (number of gradations) than the actual number of bits (number of gradations) to be displayed. For example, when displaying with 6 bits (64 gradations), in reality, 8 bits (256 gradations) can be displayed. And when actually displaying, it displays by 6 bits (64 gradations) so that the brightness | luminance of the number of gradations becomes nonlinear. Thereby, gamma correction can be realized.

  As an example, FIG. 7 shows a method of selecting a subframe in a case where gamma correction is performed so that 6-bit display is possible and display is performed with 5 bits. In FIG. 7, the number of gradations in 5 bits up to 12 is the same as the number of gradations in 6 bits. However, when the number of gray scales with 5 bits after gamma correction is 13, light is actually turned on by a subframe selection method with 14 bits of gray scale levels. Similarly, when the number of gradations with 5 bits after gamma correction is 14, display is actually performed with 16 gradations with 6 bits, and when gradation number with 5 bits after gamma correction is 15, Actually, the display is performed with 18 bits of 6-bit gradation. In this way, a correspondence table between the number of gradations of 5 bits after gamma correction and the number of gradations of 6 bits may be created and displayed accordingly. Thereby, gamma correction can be realized.

  It should be noted that the correspondence table between the number of gradations of 5 bits after gamma correction and the number of gradations of 6 bits can be changed as appropriate. Therefore, it is possible to easily change the degree of gamma correction by changing the correspondence table.

Also, how many bits (for example, p bits, where p is an integer) can be displayed, and how many bits (for example, q bits, where q is an integer) after gamma correction is displayed. It is not limited. When displaying with gamma correction, it is desirable to increase the number of bits p as much as possible in order to express gradation smoothly. However, if it is made too large, there will be adverse effects such as an increase in the number of subframes. Therefore, it is desirable that the relationship between the number of bits q and the number of bits p is q + 2 ≦ p ≦ q + 5. As a result, it is possible to realize that the number of subframes does not increase too much while the gradation is expressed smoothly.

  As another gamma correction method, when the superposition time gray scale method is used in the upper bits, the lengths of the lighting periods in the subframes are made different.

  As an example, FIG. 8 shows a subframe selection method in which the number of gradations 0 to 15 is normal, and in the case of gradations 16 to 31, the change amount of the lighting period with respect to the number of gradations is doubled. Show. In this case, as compared with FIG. 1, subframes 5 (SF5) to 7 (SF7) corresponding to the subframes of higher bits among the subframes used in the superposition time gray scale method for higher bits. ) Is doubled and the subframe is added for the lower bits using the binary code time gray scale method.

  For the gradation numbers 0 to 15, the subframes using the binary code time gradation method are SF8 and SF9. On the other hand, for gradation numbers 16 to 31, the subframes using the binary code time gradation method are SF9 and SF10. In this way, the lighting period changes smoothly as the gray level increases.

  By doing so, the pseudo contour can be reduced.

  In FIG. 8, the length of the lighting period in the subframe used in the overlapping time gray scale method is set to be twice different, but the present invention is not limited to this. Adjustment may be made according to the gamma value when performing gamma correction. That is, the length of the lighting period in the subframe used in the overlapping time gray scale method is different as long as it is longer.

  In FIG. 8, the gradation area is divided into two, but the present invention is not limited to this. It may be divided into more areas. As an example, FIG. 9 shows a case where it is divided into four.

  First, the area is divided into gradation numbers 0 to 7, 8 to 15, 16 to 23, and 24 to 31. The gradation number 0 to 7 is normal, the gradation number 8 to 15 is twice the amount of change in the lighting period with respect to the gradation number, and the gradation number 16 to 23 is the level. The amount of change in the lighting period with respect to the key number is further doubled. From the number of gradations 24 to 31, the amount of change in the lighting period with respect to the number of gradations is further doubled. In this case, among the subframes used in the superimposition time gray scale method for the upper bits, the lighting period becomes longer by two as the subframe of the higher bits is used. Further, the number of subframes is further increased for lower bits using the binary code time gray scale method.

  For gradations 0 to 7, the subframes using the binary code time gradation method are SF8 and SF9, and for gradations 8 to 15, the subframe using the binary code time gradation method is SF9. For SF10, the subframes using the binary code time gray scale method for the gradation numbers 16 to 23 are SF10 and SF11, and for the gray scale numbers 24 to 31, the subframe using the binary code time gray scale method. Are SF11 and SF12. In this way, the lighting period changes smoothly as the gray level increases.

  Note that although the length of the lighting period with respect to the number of gradations is doubled for each gradation region, the present invention is not limited to this. It may be increased by a power of 2, such as 4 times or 8 times. Or you may become large little by little. Adjustment may be made according to the gamma value when performing gamma correction. That is, the length of the lighting period in the subframe used in the overlapping time gray scale method is different as long as it is longer.

So far, the gradation expression method, that is, the subframe selection method has been described. Next, the appearance order of subframes will be described.

  Here, the case of FIG. 1 is used as an example, but the present invention is not limited to this, and can be similarly applied to other drawings.

First, the most basic one is that one frame is configured in the order of SF8, SF9, SF1, SF2, SF3, SF4, SF5, SF6, and SF7. The sub-frame starts from the shortest lighting period, and thereafter, the sub-frames that are lit up are arranged in order in the overlapping time gray scale method.

  Alternatively, the reverse order may be SF7, SF6, SF5, SF4, SF3, SF2, SF1, SF9, SF8. The order in which the binary code time gray scale method and the overlay time gray scale method appear may be reversed. For example, SF1, SF2, SF3, SF4, SF5, SF6, SF7, SF8, and SF9 may be used.

Next, a subframe in the binary code time gray scale method is inserted somewhere between the subframes in the superposition time gray scale method. For example, SF1, SF8, SF2, SF9, SF3, SF4, SF5, SF6, and SF7, subframes SF8 and SF9 in the binary code time gray scale method are subframes in the superposed time gray scale method. It is inserted between SF1 and SF2 and between SF2 and SF3. Note that the place where the subframe is inserted in the binary code time gray scale method is not limited to this. Further, the number of subframes to be inserted is not limited to this.

In this way, by inserting subframes in the binary code time gray scale method into the subframe order in the superposition time gray scale method, the eyes are deceived so that the pseudo contour becomes less visible.

  Therefore, FIG. 10 shows a case of 5 bits arranged in the order of SF1, SF8, SF2, SF3, SF4, SF5, SF9, SF6, and SF7. It is assumed that the pixel A displays the gradation number 15 and the pixel B displays the gradation number 16. Here, if the line of sight is moving, depending on how the line of sight is followed, the number of gradations may be 17 (= 4 + 1 + 4 + 4 + 4) in some cases, and the gradation number may be 14 (= 4 + 4 + 4 + 2) in other cases. . Originally, the number of gradations should be visible as 15 and 16, but the number of gradations is visible between 16 and 17. Therefore, since the deviation of gradation is very small, the pseudo contour is reduced.

  Note that the subframes in the overlapping time gray scale method may be arranged in the order of lighting (for example, SF1, SF2, SF3, SF4, SF5, SF6, SF7), or the reverse order (for example, SF7). , SF6, SF5, SF4, SF3, SF2, SF1). Or you may make it light up gradually from the middle (SF7, SF5, SF5, SF3, SF2, SF4, SF6). By doing in this way, when changing from the first frame to the second frame, it is possible to reduce the occurrence of a pseudo contour at the switching point. So-called moving image pseudo contour can be reduced.

Alternatively, they may be arranged in a completely random order (for example, SF1, SF6, SF2, SF4, SF3, SF5, SF7). By doing so, the eyes are easily deceived, so that the pseudo contour is less visible.

  As an example, it is assumed that the appearance order of the subframes of one entire frame is arranged as follows: SF1, SF8, SF5, SF7, SF2, SF4, SF9, SF3, SF6. This is because the subframes in the superposition time gray scale method are arranged in a random order, and the subframes in the binary code time gray scale method are arranged between the subframes in the superposition time gray scale method. Equivalent to.

  This case is shown in FIG. Here, if the line of sight is moving, depending on how the line of sight is followed, the number of gradations may be 17 (= 4 + 1 + 4 + 4 + 4) in some cases, and the gradation number may be 14 (= 4 + 4 + 2 + 4) in other cases. . Originally, the number of gradations should be visible as 15 and 16, but the number of gradations is visible between 16 and 17. Therefore, there is no great difference between the case of FIG. 10 and the case of FIG.

  However, suppose that the line of sight moves suddenly. For example, FIG. 12 shows a case where the line of sight moves suddenly in the case of FIG. If the line of sight suddenly moves, depending on how the line of sight is followed, the number of gradations may be felt 12 (= 4 + 4 + 4) in some cases, and the gradation number 19 may be felt in other cases (= 4 + 1 + 4 + 4 + 4 + 2). Originally, the number of gradations should be 15 and 16, but the number of gradations is 12 to 19 or so.

  On the other hand, FIG. 13 shows a case where the line of sight moves rapidly in the case of FIG. If the line of sight rapidly moves, depending on how the line of sight is followed, the number of gradations may be 16 (= 4 + 4 + 4 + 4) in some cases, and the gradation number may be 15 (= 4 + 1 + 4 + 2 + 4) in other cases. Originally, since the number of gradations should be 15 and 16, it looks roughly correct. Therefore, the case of FIG. 12 and the case of FIG. 13 are greatly different. That is, even in the subframes in the superposition time gray scale method, the effect of reducing the pseudo contour is enhanced by arranging them as randomly as possible.

In this way, the order of subframes in the overlapped time gray scale method is determined, and the subframes in the binary code time gray scale method are inserted between the subframes, so that the appearance order of the entire subframe is determined. Just decide.

  At this time, the binary code time gray scale method may be arranged in the order of short lighting periods (for example, SF8, SF9), or vice versa (for example, SF9, SF8). Or you may make it light up gradually from the center. Alternatively, they may be arranged in a completely random order. By doing so, the eyes are easily deceived, so that the pseudo contour is less visible.

  In addition, when a subframe in the binary code time gray scale method is inserted between subframes in the overlapping time gray scale method, the number of subframes is not limited.

  In addition, in this way, the order of the subframes in the binary code time gray scale method is determined, and the subframes in the superimposed time gray scale method are inserted between the subframes so that the entire subframe appears. The order may be determined.

  In this way, subframes in the binary code time gray scale method are arranged between subframes in the overlapping time gray scale method so that the subframes are not unevenly distributed. As a result, the eyes are deceived and pseudo contours can be reduced.

  As an example, FIG. 14 shows a pattern example of the appearance order of subframes in the case of FIG.

The first pattern is SF1, SF2, SF3, SF4, SF5, SF6, SF7, SF8, SF9, SF10. Subframes in the binary code time gray scale method are arranged together at the end.

The second pattern is SF8, SF9, SF10, SF1, SF2, SF3, SF4, SF5, SF6, SF7. The subframes in the binary code time gray scale method are arranged together first.

The third pattern is SF1, SF2, SF3, SF4, SF8, SF9, SF10, SF6, SF7, SF5. Subframes in the binary code time gray scale method are arranged together in the middle.

The fourth pattern is SF1, SF2, SF8, SF3, SF4, SF9, SF5, SF6, SF10, SF8. The subframes in the overlapping time gray scale method are arranged in order. The subframes in the binary code time gray scale method are also arranged in order. Then, after two subframes in the overlapping time gray scale method are arranged, one subframe in the binary code time gray scale method is arranged.

The fifth pattern is SF1, SF2, SF9, SF3, SF4, SF8, SF5, SF6, SF10, SF8. This is a randomized subframe appearance order in the binary code time gray scale method for the fourth pattern.

The sixth pattern is SF1, SF5, SF8, SF2, SF7, SF9, SF3, SF6, SF10, SF4. In this case, the appearance order of the subframes in the overlapping time gray scale method is made random with respect to the fourth pattern.

The seventh pattern is SF1, SF5, SF9, SF2, SF7, SF8, SF3, SF6, SF10, SF4. This is a random pattern of the subframe appearance order in the overlapping time gray scale method and the subframe appearance order in the binary code time gray scale method for the fourth pattern.

The eighth pattern is SF1, SF2, SF8, SF3, SF9, SF4, SF5, SF6, SF10, SF8. This is because, after two subframes in the superimposition time gray scale method are arranged, one subframe in the binary code time gray scale method is arranged, and one subframe in the superposition time gray scale method is arranged. One subframe in the code time gray scale method is arranged, three subframes in the superposition time gray scale method are arranged, and one subframe in the binary code time gray scale method is arranged.

The ninth pattern is SF1, SF2, SF3, SF4, SF8, SF9, SF5, SF6, SF7, SF10. This is because, after four subframes in the superposition time gray scale method are arranged, two subframes in the binary code time gray scale method are arranged, and three subframes in the superposition time gray scale method are arranged. One subframe in the code time gray scale method is arranged.

In this way, one subframe of a plurality of subframes corresponding to the upper bits is lit, and then one subframe of one or more subframes corresponding to the lower bits is lit. Thereafter, it is desirable that another one of the plurality of subframes corresponding to the upper bits is turned on.

  Also, one subframe of a plurality of subframes corresponding to the lower bits is lit, and then one subframe of the plurality of subframes corresponding to the upper bits is lit, and then the lower It is desirable that another one of the plurality of subframes corresponding to the bits is turned on.

  Also, one subframe of a plurality of subframes corresponding to the lower bits is lit, and then a plurality of subframes of the plurality of subframes corresponding to the upper bits are lit, and then the lower order It is desirable that another one of the plurality of subframes corresponding to the bits of the above is turned on.

  Also, one subframe of a plurality of subframes corresponding to the upper bits is lit, and then a plurality of subframes of the plurality of subframes corresponding to the lower bits are lit, and then the upper bits It is desirable that another one of the plurality of subframes corresponding to the bits is turned on.

  Next, the subframe appearance order in the case of FIG. 4 will be described. In the case of FIG. 4, the upper subframe in the binary code time gray scale method is divided. Therefore, it is necessary to make the appearance order of the subframes suitable for it. For example, the feeling is SF4, SF1, SF6, SF2, SF5, SF3, SF7. In this way, subframes in the binary code time gray scale method are arranged between subframes in the superposition time gray scale method, and the subframe in the binary code time gray scale method can be a subframe of higher bits. Just try to place them apart. As a result, the pseudo contour can be reduced.

Note that the order of the subframes in the overlapping time gray scale method may be arranged in the order of lighting, the reverse thereof, or the random order as in the case of FIG. The order in which the subframes in the binary code time gray scale method are inserted into the subframes in the superposition time gray scale method may be determined as appropriate so that the subframes are not unevenly distributed. As a result, the pseudo contour can be reduced.

Note that the appearance order of the subframes may change depending on the time. For example, the appearance order of subframes may change between the first frame and the second frame. Further, the appearance order of subframes may vary depending on the location. For example, the appearance order of the subframes may be changed between the pixel A and the pixel B. In addition, by combining them, the appearance order of the subframes may change with time and change with place.

The normal frame frequency is 60 Hz, but is not limited to this. The pseudo contour may be reduced by further increasing the frame frequency. For example, the operation may be performed at a frequency that is about twice that of a normal frequency of 120 Hz.

(Embodiment 2)
In this embodiment, an example of a timing chart is described. As an example, the subframe selection method shown in FIG. 1 is used. However, the subframe selection method is not limited to this, and the method can be easily applied to other subframe selection methods and other gradation numbers.

In addition, the order in which subframes appear is, for example, SF1, SF8, SF2, SF9, SF3, SF4, SF5, SF6, and SF7, but is not limited to this, and can be easily applied to other orders. Is possible.

First, FIG. 15 shows a timing chart in the case where a period for writing a signal to a pixel and a lighting period are separated. First, in a signal writing period, a signal for one screen is input to all pixels. During this time, the pixels are not lit. After the signal writing period ends, the lighting period starts and the pixels are lit. The length of the lighting period at that time is 4. Next, the next subframe starts, and a signal for one screen is input to all pixels in the signal writing period. During this time, the pixels are not lit. After the signal writing period ends, the lighting period starts and the pixels are lit. The length of the lighting period at that time is 1.

  By repeating the same, the lengths of the lighting periods are arranged in the order of 4, 1, 4, 2, 4, 4, 4, 4, 4.

As described above, the driving method in which the signal writing period and the lighting period are separated from each other is preferably applied to the plasma display. In the case of using for a plasma display, an initialization operation or the like is required. However, it is omitted for simplicity.

  This driving method is also preferably applied to an organic EL display, a field emission display, a display using a digital micromirror device (DMD), and the like.

FIG. 16 shows a pixel configuration in that case. The gate line 1607 is selected, the selection transistor 1601 is turned on, and a signal is input from the signal line 1605 to the storage capacitor 1602. Then, the current of the driving transistor 1603 is controlled according to the signal, and current flows from the first power supply line 1606 through the display element 1604 to the second power supply line 1608.

Note that in the signal writing period, the potential of the first power supply line 1606 and the second power supply line 1608 is controlled so that no voltage is applied to the display element 1604. As a result, the display element 1604 can be prevented from being lit during the signal writing period.

Next, FIG. 17 shows a timing chart in the case where the period for writing a signal to the pixel and the lighting period are not separated. When a signal writing operation is performed in each row, the lighting period starts immediately.

In a certain row, a signal is written, and after a predetermined lighting period ends, a signal writing operation in the next subframe is started. By repeating this, the length of the lighting period is arranged in the order of 4, 1, 4, 2, 4, 4, 4, 4, 4.

This makes it possible to arrange many subframes in one frame even if the signal writing operation is slow.

Such a driving method is preferably applied to a plasma display. In the case of use in a plasma display, an initialization operation is required, but the initialization operation is omitted for simplicity.

  This driving method is also preferably applied to an organic EL display, a field emission display, a display using a digital micromirror device (DMD), and the like.

The pixel configuration in that case is shown in FIG. The first gate line 1807 is selected, the first selection transistor 1801 is turned on, and a signal is input from the first signal line 1805 to the storage capacitor 1802. Then, the current of the driving transistor 1803 is controlled according to the signal, and current flows from the first power supply line 1806 through the display element 1804 to the second power supply line 1808. Similarly, the second gate line 1817 is selected, the second selection transistor 1811 is turned on, and a signal is input from the second signal line 1815 to the storage capacitor 1802. Then, the current of the driving transistor 1803 is controlled according to the signal, and current flows from the first power supply line 1806 through the display element 1804 to the second power supply line 1808.

The first gate line 1807 and the second gate line 1817 can be controlled separately. Similarly, the first signal line 1805 and the second signal line 1815 can be controlled separately. Accordingly, since signals can be input to the pixels for two rows at the same time, a driving method as shown in FIG. 17 can be realized.

Note that the driving method shown in FIG. 17 can be realized by using the circuit shown in FIG. FIG. 19 shows a timing chart in that case. As shown in FIG. 19, one gate selection period is divided into a plurality (two in FIG. 19). Then, each gate line is selected within the divided selection period, and a corresponding signal is input to the first signal line 1805 at that time. For example, in one gate selection period, the first half selects the i-th row and the second half selects the j-th row. Then, it is possible to operate as if two rows are selected at the same time in one gate selection period.

Details of such a driving method are described in, for example, Japanese Patent Application Laid-Open No. 2001-324958, and the contents thereof can be applied in combination with the present application.

Next, FIG. 20 shows a timing chart in the case of performing an operation of erasing the pixel signal. In each row, a signal writing operation is performed, and the pixel signal is erased before the next signal writing operation is performed. In this way, the length of the lighting period can be easily controlled.

In a certain row, a signal is written, and after a predetermined lighting period ends, a signal writing operation in the next subframe is started. If the lighting period is short, a signal erasing operation is performed to turn off the light. By repeating such an operation, the lighting periods are arranged in the order of 4, 1, 4, 2, 4, 4, 4, 4, 4.

In FIG. 20, the signal erasing operation is performed when the lighting periods are 1 and 2, but the present invention is not limited to this. The erase operation may be performed in other lighting periods.

This makes it possible to arrange many subframes in one frame even if the signal writing operation is slow. Further, when performing an erasing operation, it is not necessary to acquire erasing data in the same manner as a video signal, so that the driving frequency of the source driver can be reduced.

Such a driving method is preferably applied to a plasma display. In the case of using for a plasma display, an initialization operation or the like is necessary, but it is omitted for simplicity.

  This driving method is also preferably applied to an organic EL display, a field emission display, a display using a digital micromirror device (DMD), and the like.

FIG. 21 shows a pixel configuration in that case. The first gate line 2107 is selected, the selection transistor 2101 is turned on, and a signal is input from the signal line 2105 to the storage capacitor 2102. Then, the current of the driving transistor 2103 is controlled according to the signal, and current flows from the first power supply line 2106 through the display element 2104 to the second power supply line 2108.

When the signal is to be erased, the second gate line 2117 is selected, the erase transistor 2111 is turned on, and the drive transistor 2103 is turned off. Then, no current flows from the first power supply line 2106 to the second power supply line 2108 through the display element 2104. As a result, a non-lighting period can be created and the length of the lighting period can be freely controlled.

Although the erase transistor 2111 is used in FIG. 21, another method can be used. This is because it is only necessary to forcibly create a non-lighting period, so that no current is supplied to the display element 2104. Therefore, a switch is arranged somewhere along the path through which current flows from the first power supply line 2106 to the second power supply line 2108 through the display element 2104, and the on / off state of the switch is controlled. Just make it. Alternatively, the gate-source voltage of the drive transistor 2103 may be controlled so that the drive transistor is forcibly turned off.

  FIG. 22 shows an example of a pixel configuration when the driving transistor is forcibly turned off. A selection transistor 2201, a driving transistor 2203, an erasing diode 2211, and a display element 2204 are provided. The source and drain of the selection transistor 2201 are connected to the signal line 2205 and the gate of the driving transistor 2203, respectively. The gate of the selection transistor 2201 is connected to the first gate line 2107. The source and drain of the driving transistor 2203 are connected to the first power supply line 2206 and the display element 2204, respectively. The erasing diode 2211 is connected to the gate of the driving transistor 2203 and the second gate line 2217.

  The storage capacitor 2202 serves to hold the gate potential of the driving transistor 2203. Therefore, although it is connected between the gate of the driving transistor 2203 and the first power supply line 2206, the present invention is not limited to this. It is only necessary that the gate potential of the driving transistor 2203 be arranged so as to be held. In the case where the gate potential of the driving transistor 2203 can be held using the gate capacitance of the driving transistor 2203 or the like, the holding capacitor 2202 may be omitted.

  As an operation method, the first gate line 2207 is selected, the selection transistor 2201 is turned on, and a signal is input from the signal line 2205 to the storage capacitor 2202. Then, the current of the driving transistor 2203 is controlled according to the signal, and current flows from the first power supply line 2106 to the second power supply line 2108 through the display element 2104.

When the signal is to be erased, the second gate line 2117 is selected (here, set to a high potential), the erasing diode 2211 is turned on, and a current flows from the second gate line 2117 to the gate of the driving transistor 2203. To. As a result, the driving transistor 2203 is turned off. Then, no current flows from the first power supply line 2206 to the second power supply line 2208 through the display element 2204. As a result, a non-lighting period can be created and the length of the lighting period can be freely controlled.

When it is desired to hold the signal, the second gate line 2117 is not selected (here, set to a low potential). Then, since the erasing diode 2211 is turned off, the gate potential of the driving transistor 2203 is held.

  The erasing diode 2211 may be anything as long as it has a rectifying property. A PN-type diode, a PIN-type diode, a Schottky diode, or a Zener-type diode may be used.

  Alternatively, a transistor may be used by diode connection (gate and drain connected). A circuit diagram in that case is shown in FIG. As the erasing diode 2211, a diode-connected transistor 2311 is used. Here, an N-channel type is used, but the present invention is not limited to this. A P-channel type may be used.

As another circuit, the driving method as shown in FIG. 20 can be realized by using the circuit shown in FIG. FIG. 19 shows a timing chart in that case. As shown in FIG. 19, one gate selection period is divided into a plurality (two in FIG. 19). Then, each gate line is selected within the divided selection period, and a corresponding signal (video signal and signal for erasing) is input to the first signal line 1805 at that time. For example, in one gate selection period, the first half selects the i-th row and the second half selects the j-th row. When the i-th row is selected, such a video signal is input. On the other hand, when the j-th row is selected, a signal that turns off the driving transistor is input. Then, it is possible to operate as if two rows are selected at the same time in one gate selection period.

Details of such a driving method are described in, for example, Japanese Patent Application Laid-Open No. 2001-324958, and the contents thereof can be applied in combination with the present application.

Note that the timing chart, the pixel configuration, and the driving method shown in this embodiment mode are examples, and the present invention is not limited to this. The present invention can be applied to various timing charts, pixel configurations, and driving methods.

Note that the appearance order of the subframes may change depending on the time. For example, the appearance order of subframes may change between the first frame and the second frame. Further, the appearance order of subframes may vary depending on the location. For example, the appearance order of the subframes may be changed between the pixel A and the pixel B. In addition, by combining them, the appearance order of the subframes may change with time and change with place.

  Note that although a lighting period, a signal writing period, and a non-lighting period are arranged in one frame period in this embodiment mode, the present invention is not limited to this. Other operation periods may be arranged. For example, a period in which the voltage applied to the display element has a polarity opposite to that of the normal voltage, that is, a so-called reverse bias period may be provided. By providing the reverse bias period, the reliability of the display element may be improved.

  Note that the pixel structure described in this embodiment is not limited thereto. Any structure can be applied as long as it has a similar function.

Note that the description in this embodiment can be implemented in free combination with the contents described in Embodiments 1 and 2.

(Embodiment 3)
In this embodiment, an example of how many bits should be assigned to the superposition time gray scale method and the binary code time gray scale method when expressing a certain gray scale will be described.

First, consider the case of expressing 6-bit (64 gradations) gradation. As an example, the upper bits using the overlay time gray scale method are 4 bits (16 gray levels) and 15 subframes, and the lower bits using the binary code time gray scale method are 2 bits (4 gray levels). At least 2 subframes. In the binary code time gray scale method, the number of subframes may be increased by dividing upper bits. This gives a total of 17 subframes.

As an example, the upper bits using the superimposing time gray scale method are 3 bits (8 gray scales) and 7 subframes, and the lower bits using the binary code time gray scale system are 3 bits (8 gray scales). Therefore, at least 3 subframes are set. In the binary code time gray scale method, the number of subframes may be increased by dividing upper bits. This gives a total of 10 subframes.

As the next example, the upper bits using the superimposition time gray scale method are 5 subframes with 6 gray scales, and the lower bits using the binary code time gray scale system are 4 bits (16 gray scales), at least 4 bits. Subframe. In the binary code time gray scale method, the number of subframes may be increased by dividing upper bits. In this case, the lower bits can express more gradations than the number of gradations actually used, but there is no problem. This gives a total of 9 subframes.

As the next example, the upper bits using the overlay time gray scale method are 2 bits (4 gray levels) and 3 subframes, and the lower bits using the binary code time gray scale method are 4 bits (16 gray levels) Therefore, at least 4 subframes are set. In the binary code time gray scale method, the number of subframes may be increased by dividing upper bits. This gives a total of 7 subframes.

Next, consider the case of expressing 8-bit (256 gradations) gradation. As an example, the upper bit using the overlay time gray scale method is 5 bits (32 gray scales) and 31 subframes, and the lower bit using the binary code time gray scale system is 3 bits (8 gray scales). At least 3 subframes. In the binary code time gray scale method, the number of subframes may be increased by dividing upper bits. This gives a total of 34 subframes.

As an example, the upper bits using the overlay time gray scale method are 4 bits (16 gray levels) and 15 subframes, and the lower bits using the binary code time gray scale method are 4 bits (16 gray levels). Therefore, at least 4 subframes are set. In the binary code time gray scale method, the number of subframes may be increased by dividing upper bits. This gives a total of 19 subframes.

As an example, the upper bits using the overlay time gray scale method are 3 bits (8 gray scales) and 7 subframes, and the lower bits using the binary code time gray scale system are 5 bits (32 gray scales). Therefore, at least 5 subframes are set. In the binary code time gray scale method, the number of subframes may be increased by dividing upper bits. This gives a total of 12 subframes.

As an example, the upper bits using the superimposing time gray scale method are 2 bits (4 gray scales) and 3 subframes, and the lower bits using the binary code time gray scale system are 6 bits (64 gray scales). Therefore, at least 6 subframes are set. In the binary code time gray scale method, the number of subframes may be increased by dividing upper bits. This gives a total of 9 subframes.

Thus, in general, considering the case of expressing an n-bit gradation, the upper bits using the overlapping time gradation method are m bits (2 ^m −1) subframes, and the binary code time gradation method is used. The lower order bits using are p bits and are at least p subframes. In the binary code time gray scale method, the number of subframes may be increased by dividing upper bits. As a result, the minimum required is a total of (2 ^m −1 + p) subframes.

Note that the description in this embodiment can be implemented in free combination with the contents described in Embodiments 1 and 2.

(Embodiment 4)
In this embodiment mode, an example of a display device using the driving method of the present invention will be described.

The most typical display device is a plasma display. A pixel of a plasma display can take only two states of light emission and non-light emission. Therefore, the time gray scale method is used as one of means for increasing the gray scale. Therefore, the present invention can be applied to that portion.

Note that in a plasma display, it is necessary to initialize a pixel in addition to writing a signal to the pixel. Therefore, it is desirable that the subframes are arranged in order in the portion using the overlapping time gray scale method, and that no subframe in the binary code time gray scale method is inserted between them. By arranging subframes in this way, the number of pixel initializations can be reduced. As a result, the contrast can be improved.

  However, if subframes in the binary code time gray scale method are arranged together, a pseudo contour is generated due to the portion. Therefore, it is desirable to arrange the subframes in the binary code time gray scale method so as to be dispersed within one frame as much as possible. When subframes in the binary code time gray scale method are used, it is necessary to perform initialization corresponding to each subframe. Therefore, even if the subframes in the binary code time gray scale method are distributed and arranged, it does not cause a big problem. On the other hand, in the case of the overlapping time gray scale subframe, if the lit subframes are arranged continuously, it is not necessary to perform initialization. Therefore, it is desirable to arrange them in order as much as possible.

  Therefore, as for the appearance order of the subframes, the subframes in the superimposition time gray scale method are arranged so that the subframes that are lit are continuous, and the subframes in the binary code time gray scale method are in superposition time. It is desirable to disperse the gray scale subframes. As a result, the number of initializations can be reduced, the contrast can be improved, and the occurrence of pseudo contours can be reduced.

Examples of display devices other than plasma displays include organic EL displays, field emission displays, displays using digital micromirror devices (DMD), ferroelectric liquid crystal displays, and bistable liquid crystal displays. These are all display devices that can use the time gray scale method. By applying to these display devices, pseudo contour can be reduced while using the time gray scale method.

  For example, in the case of an organic EL display, there is no need to perform operations such as pixel initialization in a plasma display. Therefore, it does not occur that light is emitted when an operation such as initialization of a pixel is performed and the contrast is reduced. Therefore, the appearance order of subframes can be set arbitrarily. It is desirable to arrange them so that pseudo contours do not occur as much as possible.

  Therefore, the superframe time gray scale subframes are arranged so that the lit subframes are continuous, and the binary code time grayscale subframes are arranged between the superposition time grayscale subframes. It may be arranged in a distributed manner. As a result, the overlapping time gray scale subframes are arranged to some extent within one frame. Therefore, when changing from the first frame to the second frame, it is possible to reduce the occurrence of a pseudo contour at the switching point. So-called moving image pseudo contour can be reduced. In addition, since the subframes in the binary code time gray scale method are arranged in a distributed manner, pseudo contour can be reduced.

  In addition, the subframes of the overlapping time gray scale method may be arranged separately, and the subframes of the binary code time gray scale method may be arranged separately. As a result, the pseudo contour caused by the binary code time gray scale method is mixed with the superframe time gray scale subframe, so that the effect of reducing the pseudo contour as a whole is enhanced.

Note that the contents described in this embodiment mode can be freely combined with the contents described in Embodiment Modes 1 to 3.

(Embodiment 5)
Hereinafter, in this embodiment, structures and operations of a display device, a signal line driver circuit, a gate line driver circuit, and the like will be described.

  As shown in FIG. 24, the display device includes a pixel array 2401, a gate line driver circuit 2402, and a signal line driver circuit 2410. The gate line driver circuit 2402 sequentially outputs a selection signal to the pixel array 2401. The gate line driver circuit 2402 includes a shift register, a buffer circuit, and the like.

  In addition, the gate line driver circuit 2402 often includes a level shifter circuit, a pulse width control circuit, and the like. The shift register outputs pulses that are sequentially selected. The signal line driver circuit 2410 sequentially outputs video signals to the pixel array 2401. The shift register 2403 outputs pulses that are sequentially selected. In the pixel array 2401, an image is displayed by controlling the light state according to the video signal. A video signal input from the signal line driver circuit 2410 to the pixel array 2401 is often a voltage. In other words, the display elements arranged in each pixel and the elements that control the display elements change states according to the video signal (voltage) input from the signal line driver circuit 2410. Examples of the display element arranged in the pixel include an EL element, an element used in an FED (field emission display), a liquid crystal, a DMD (digital micromirror device), and the like.

  Note that a plurality of gate line driver circuits 2402 and signal line driver circuits 2410 may be provided.

  The signal line driver circuit 2410 is divided into a plurality of parts. Roughly, as an example, it is divided into a shift register 2403, a first latch circuit (LAT1) 2404, a second latch circuit (LAT2) 2405, and an amplifier circuit 2406. The amplifier circuit 2406 may have a function of converting a digital signal into analog or a function of performing gamma correction.

  Further, the pixel has a display element such as an EL element. A circuit that outputs a current (video signal) to the display element, that is, a current source circuit may be provided.

  Therefore, the operation of the signal line driver circuit 2410 will be briefly described. The shift register 2403 receives a clock signal (S-CLK), a start pulse (SP), and a clock inversion signal (S-CLKb), and sequentially outputs sampling pulses according to the timing of these signals.

  The sampling pulse output from the shift register 2403 is input to the first latch circuit (LAT1) 2404. The first latch circuit (LAT1) 2404 receives a video signal from the video signal line 2408, and holds the video signal in each column in accordance with the timing at which the sampling pulse is input.

  When the first latch circuit (LAT1) 2404 completes holding the video signal up to the last column, a latch pulse (Latch Pulse) is input from the latch control line 2409 during the horizontal blanking period, and the first latch circuit (LAT1) The video signals held in 2404 are transferred all at once to the second latch circuit (LAT2) 2405. After that, the video signal held in the second latch circuit (LAT2) 2405 is input to the amplifier circuit 2406 for one row at the same time. A signal output from the amplifier circuit 2406 is input to the pixel array 2401.

  While the video signal held in the second latch circuit (LAT2) 2405 is input to the amplifier circuit 2406 and is input to the pixel array 2401, the shift register 2403 outputs a sampling pulse again. That is, two operations are performed simultaneously. Thereby, line-sequential driving becomes possible. Thereafter, this operation is repeated.

  Note that the signal line driver circuit and a part thereof (such as a current source circuit and an amplifier circuit) do not exist on the same substrate as the pixel array 2401, and may be configured using, for example, an external IC chip.

  Note that the structures of the signal line driver circuit, the gate line driver circuit, and the like are not limited to those in FIGS. For example, a signal may be supplied to the pixel by dot sequential driving. An example of the signal line driver circuit 2510 in that case is shown in FIG. A sampling pulse is output from the shift register 2503 to the sampling circuit 2504. A video signal is input from the video signal line 2508, and the video signal is output to the pixel array 2501 in accordance with the sampling pulse. In addition, the gate line driver circuit 2502 sequentially outputs selection signals to the pixel array 2501.

  Note that as described above, the transistor in the present invention may be any type of transistor, and may be formed on any substrate. Therefore, the circuits as shown in FIGS. 24 and 25 may all be formed on a glass substrate, may be formed on a plastic substrate, may be formed on a single crystal substrate, It may be formed on an SOI substrate, or may be formed on any substrate. Alternatively, part of the circuit in FIGS. 24 and 25 may be formed on a certain substrate, and another part of the circuit in FIGS. 24 and 25 may be formed on another substrate. That is, all the circuits in FIGS. 24 and 25 do not have to be formed on the same substrate. For example, in FIGS. 24 and 25, the pixel array 2401 and the gate line driver circuit 2402 are formed using a TFT over a glass substrate, and the signal line driver circuit 2410 (or part thereof) is formed over a single crystal substrate. Then, the IC chip may be connected to the glass substrate by COG (Chip On Glass). Alternatively, the IC chip may be connected to the glass substrate using TAB (Tape Auto Bonding) or a printed board.

  The contents described in the present embodiment correspond to those using the contents described in the first to fourth embodiments. Therefore, the contents described in Embodiments 1 to 4 can be applied to this embodiment.

(Embodiment 6)
Next, a pixel layout in the display device of the present invention will be described. As an example, FIG. 26 shows a layout diagram of the circuit diagram shown in FIG. Note that the circuit diagram and the layout diagram are not limited to FIG. 23 and FIG.

  A selection transistor 2601, a driving transistor 2603, a diode-connected transistor 2611, and a display element 2604 are provided. The source and drain of the selection transistor 2601 are connected to the signal line 2605 and the gate of the driving transistor 2603, respectively. The gate of the selection transistor 2601 is connected to the first gate line 2107. The source and drain of the driving transistor 2603 are connected to the power supply line 2606 and the display element 2604, respectively. The diode-connected transistor 2611 is connected to the gate of the driving transistor 2603 and the second gate line 2617. The storage capacitor 2602 is connected between the gate of the driving transistor 2603 and the power supply line 2606.

  The signal line 2605 and the power supply line 2606 are formed by the second wiring, and the first gate line 2607 and the second gate line 2617 are formed by the first wiring.

  In the case of the top gate structure, the film is formed in the order of the substrate, the semiconductor layer, the gate insulating film, the first wiring, the interlayer insulating film, and the second wiring. In the case of the bottom gate structure, the film is formed in the order of the substrate, the first wiring, the gate insulating film, the semiconductor layer, the interlayer insulating film, and the second wiring.

Note that the contents described in this embodiment mode can be implemented by being freely combined with the contents described in Embodiment Modes 1 to 5.

(Embodiment 7)
In the present embodiment, hardware for controlling the driving method described in the first to sixth embodiments will be described.

  A rough block diagram is shown in FIG. A pixel array 2704 is arranged on the substrate 2701. In many cases, the signal line driver circuit 2706 and the gate line driver circuit 2705 are provided. In addition, a power supply circuit, a precharge circuit, a timing generation circuit, and the like may be arranged. In some cases, the signal line driver circuit 2706 and the gate line driver circuit 2705 are not provided. In that case, what is not arranged on the substrate 2701 is often formed in an IC. In many cases, the IC is disposed on the substrate 2701 by COG (Chip On Glass). Alternatively, an IC may be disposed on a connection board 2707 that connects the peripheral circuit board 2702 and the board 2701.

  A signal 2703 is input to the peripheral circuit board 2702. Then, the controller 2708 controls and the signal is stored in the memory 2709, the memory 2710, or the like. In the case where the signal 2703 is an analog signal, it is often stored in the memory 2709 or the memory 2710 after analog-digital conversion. Then, the controller 2708 outputs a signal to the substrate 2701 using a signal stored in the memory 2709, the memory 2710, or the like.

In order to realize the driving method described in Embodiment Modes 1 to 6, the controller 2708 controls the appearance order of subframes and outputs a signal to the substrate 2701.

Note that the contents described in this embodiment can be implemented by being freely combined with the contents described in Embodiments 1 to 6.

(Embodiment 8)
An example of a structure of a cellular phone having a display portion using the display device of the present invention and a display device using the driving method thereof will be described with reference to FIG.

  The display panel 5410 is incorporated in a housing 5400 so as to be detachable. The shape and dimensions of the housing 5400 can be changed as appropriate in accordance with the size of the display panel 5410. A housing 5400 to which the display panel 5410 is fixed is fitted into a printed board 5401 and assembled as a module.

  The display panel 5410 is connected to the printed board 5401 through the FPC 5411. A signal processing circuit 5405 including a speaker 5402, a microphone 5403, a transmission / reception circuit 5404, a CPU, a controller, and the like is formed over the printed board 5401. Such a module is combined with the input means 5406 and the battery 5407 and housed in the housing 5409 and the housing 5412. The pixel portion of the display panel 5410 is arranged so as to be visible from an opening window formed in the housing 5409.

  In the display panel 5410, a pixel portion and some peripheral driver circuits (a driver circuit having a low operating frequency among a plurality of driver circuits) are formed over a substrate using TFTs, and some peripheral driver circuits (a plurality of driver circuits) are formed. A driving circuit having a high operating frequency among the circuits) may be formed over the IC chip, and the IC chip may be mounted on the display panel 5410 by COG (Chip On Glass). Alternatively, the IC chip may be connected to the glass substrate using TAB (Tape Auto Bonding) or a printed board. Note that FIG. 29A shows an example of a structure of a display panel in which some peripheral driver circuits are formed integrally with a pixel portion over a substrate and an IC chip on which other peripheral driver circuits are formed is mounted by COG or the like. is there. Note that the structure of the display panel in FIG. 29A includes a substrate 5300, a signal line driver circuit 5301, a pixel portion 5302, a scan line driver circuit 5303, a scan line driver circuit 5304, an FPC 5305, an IC chip 5306, an IC chip 5307, a sealant. A stop substrate 5308 and a sealant 5309 are provided. With such a structure, low power consumption of the display device can be achieved, and the use time by one charge of the mobile phone can be extended. In addition, the cost of the mobile phone can be reduced.

In addition, by performing impedance conversion of a signal set to the scanning line or the signal line using a buffer, the pixel writing time for each row can be shortened. Therefore, a high-definition display device can be provided.

In order to further reduce power consumption, a pixel portion is formed using a TFT on a substrate as shown in FIG. 29B, and all peripheral driver circuits are formed on an IC chip. The display panel may be mounted by COG (Chip On Glass) or the like. 29B includes a substrate 5310, a signal line driver circuit 5311, a pixel portion 5312, a scan line driver circuit 5313, a scan line driver circuit 5314, an FPC 5315, an IC chip 5316, an IC chip 5317, a sealant, and the like. A stop substrate 5318 and a sealant 5319 are provided.

Then, by using the display device of the present invention and its driving method, it is possible to view a clear image with reduced pseudo contour. Therefore, even an image whose gradation changes slightly like human skin can be displayed neatly.

Further, the configuration shown in this embodiment is an example of a mobile phone, and the display device of the present invention is not limited to the mobile phone having such a configuration, and can be applied to mobile phones having various configurations.

(Embodiment 9)
FIG. 30 shows an EL module in which a display panel 5701 and a circuit board 5702 are combined. A display panel 5701 includes a pixel portion 5703, a scan line driver circuit 5704, and a signal line driver circuit 5705. On the circuit board 5702, for example, a control circuit 5706, a signal dividing circuit 5707, and the like are formed. The display panel 5701 and the circuit board 5702 are connected to each other through a connection wiring 5708. An FPC or the like can be used for the connection wiring.

  The control circuit 5706 corresponds to the controller 2708, the memory 2709, the memory 2710, and the like in the seventh embodiment. The control circuit 5706 mainly controls the appearance order of subframes.

In the display panel 5701, a pixel portion and some peripheral driver circuits (a driver circuit having a low operating frequency among the plurality of driver circuits) are formed over the substrate using TFTs, and some peripheral driver circuits (a plurality of driver circuits) are formed. A driver circuit having a high operating frequency among the circuits) is formed over the IC chip, and the IC chip is preferably mounted on the display panel 5701 by COG (Chip On Glass) or the like. Alternatively, the IC chip may be mounted on the display panel 5701 using TAB (Tape Auto Bonding) or a printed board. Note that FIG. 29A shows an example of a structure in which some peripheral driver circuits are formed integrally with a pixel portion over a substrate and an IC chip on which other peripheral driver circuits are formed is mounted by COG or the like. With such a structure, low power consumption of the display device can be achieved, and the use time by one charge of the mobile phone can be extended. In addition, the cost of the mobile phone can be reduced.

In addition, by performing impedance conversion of a signal set to the scanning line or the signal line using a buffer, the pixel writing time for each row can be shortened. Therefore, a high-definition display device can be provided.

In order to further reduce power consumption, a pixel portion is formed using a TFT on a glass substrate, all signal line driver circuits are formed on an IC chip, and the IC chip is displayed on a COG (Chip On Glass) display. It may be mounted on a panel.

Note that a pixel portion is formed using a TFT over a substrate, all peripheral driver circuits are formed over an IC chip, and the IC chip is mounted on a display panel by COG (Chip On Glass). Note that FIG. 29B shows an example of a structure in which an IC chip in which a pixel portion is formed over a substrate and a signal line driver circuit is formed over the substrate is mounted by COG or the like.

  With this EL module, an EL television receiver can be completed. FIG. 31 is a block diagram illustrating a main configuration of an EL television receiver. A tuner 5801 receives video signals and audio signals. The video signal includes a video signal amplifying circuit 5802, a video signal processing circuit 5803 that converts a signal output from the video signal into a color signal corresponding to each color of red, green, and blue, and uses the video signal as input specifications of the drive circuit. Processing is performed by a control circuit 5706 for conversion. The control circuit 5706 outputs a signal to each of the scan line side and the signal line side. In the case of digital driving, a signal dividing circuit 5707 may be provided on the signal line side, and an input digital signal may be divided into m pieces and supplied.

  Of the signals received by the tuner 5801, the audio signal is sent to the audio signal amplifier circuit 5804, and the output is supplied to the speaker 5806 through the audio signal processing circuit 5805. The control circuit 5807 receives control information on the receiving station (reception frequency) and volume from the input unit 5808 and sends a signal to the tuner 5801 and the audio signal processing circuit 5805.

  A television receiver can be completed by incorporating an EL module into a housing. A display portion is formed by the EL module. In addition, a speaker, a video input terminal, and the like are provided as appropriate.

  Of course, the present invention is not limited to a television receiver, and is applied to various uses as a display medium of a particularly large area such as a monitor of a personal computer, an information display board in a railway station or airport, an advertisement display board in a street, etc. can do.

  As described above, by using the display device of the present invention and its driving method, it is possible to view a beautiful image with reduced pseudo contour. Therefore, even an image whose gradation changes slightly like human skin can be displayed neatly.

(Embodiment 10)
As an electronic device using the present invention, a video camera, a digital camera, a goggle type display, a navigation system, a sound reproduction device (car audio, audio component, etc.), a computer, a game device, a portable information terminal (mobile computer, cellular phone, portable Type game machine or electronic book), an image playback device provided with a recording medium (specifically, a device provided with a display capable of playing back a recording medium such as Digital Versatile Disc (DVD) and displaying the image). Can be mentioned. Specific examples of these electronic devices are shown in FIGS.

  FIG. 32A illustrates a light-emitting device, which includes a housing 13001, a support base 13002, a display portion 13003, a speaker portion 13004, a video input terminal 13005, and the like. The present invention can be used for a display device included in the display portion 13003. Further, according to the present invention, a clear image with reduced pseudo contour can be seen, and the light emitting device shown in FIG. 32A is completed. Since the light-emitting device is a self-luminous type, a backlight is not necessary and a display portion thinner than a liquid crystal display can be obtained. Note that the light emitting device includes all display devices for displaying information such as for personal computers, for receiving TV broadcasts, and for displaying advertisements.

  FIG. 32B shows a digital camera, which includes a main body 13101, a display portion 13102, an image receiving portion 13103, operation keys 13104, an external connection port 13105, a shutter 13106, and the like. The present invention can be used for a display device included in the display portion 13102. Further, according to the present invention, a clear image with reduced pseudo contour can be seen, and the digital camera shown in FIG. 32B is completed.

  FIG. 32C illustrates a computer, which includes a main body 13201, a housing 13202, a display portion 13203, a keyboard 13204, an external connection port 13205, a pointing mouse 13206, and the like. The present invention can be used for a display device included in the display portion 13203. In addition, according to the present invention and the present invention, a clear image with reduced pseudo contour can be seen, and the computer shown in FIG. 32C is completed.

  FIG. 32D illustrates a mobile computer, which includes a main body 13301, a display portion 13302, a switch 13303, operation keys 13304, an infrared port 13305, and the like. The present invention can be used for a display device included in the display portion 13302. Further, according to the present invention and according to the present invention, a clear image with reduced pseudo contour can be seen, and the mobile computer shown in FIG. 32D is completed.

  FIG. 32E shows a portable image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 13401, a housing 13402, a display portion A13403, a display portion B13404, a recording medium (DVD, etc.). A reading unit 13405, operation keys 13406, a speaker unit 13407, and the like are included. Although the display portion A 13403 mainly displays image information and the display portion B 13404 mainly displays character information, the present invention can be used for a display device that constitutes the display portions A, B 13403, and 13404. Note that an image reproducing device provided with a recording medium includes a home game machine and the like. In addition, according to the present invention, the present invention makes it possible to view a beautiful image with reduced pseudo contour, and the DVD reproducing apparatus shown in FIG. 32E is completed.

  FIG. 32F illustrates a goggle type display which includes a main body 13501, a display portion 13502, and an arm portion 13503. The present invention can be used for a display device included in the display portion 13502. Further, according to the present invention and according to the present invention, a beautiful image with reduced pseudo contour can be seen, and the goggle type display shown in FIG. 32F is completed.

  FIG. 32G illustrates a video camera, which includes a main body 13601, a display portion 13602, a housing 13603, an external connection port 13604, a remote control receiving portion 13605, an image receiving portion 13606, a battery 13607, an audio input portion 13608, operation keys 13609, and an eyepiece Part 13610 and the like. The present invention can be used for a display device included in the display portion 13602. Further, according to the present invention and according to the present invention, a beautiful image with reduced pseudo contour can be viewed, and the video camera shown in FIG. 32G is completed.

  FIG. 32H illustrates a mobile phone, which includes a main body 13701, a housing 13702, a display portion 13703, an audio input portion 13704, an audio output portion 13705, operation keys 13706, an external connection port 13707, an antenna 13708, and the like. The present invention can be used for a display device included in the display portion 13703. Note that the display portion 13703 can suppress current consumption of the mobile phone by displaying white characters on a black background. Further, according to the present invention and the present invention, it becomes possible to view a clear image with reduced pseudo contour, and the mobile phone shown in FIG. 32H is completed.

  If the emission luminance of the luminescent material is increased in the future, the light including the output image information can be enlarged and projected by a lens or the like to be used for a front type or rear type projector.

  In addition, the electronic devices often display information distributed through electronic communication lines such as the Internet and CATV (cable television), and in particular, opportunities to display moving image information are increasing. Since the response speed of the light emitting material is very high, the light emitting device is preferable for displaying moving images.

  In addition, since the light emitting device consumes power in the light emitting portion, it is desirable to display information so that the light emitting portion is minimized. Therefore, when a light emitting device is used for a display unit mainly including character information, such as a portable information terminal, particularly a mobile phone or a sound reproduction device, it is driven so that character information is formed by the light emitting part with the non-light emitting part as the background. It is desirable to do.

  As described above, the applicable range of the present invention is so wide that it can be used for electronic devices in various fields. In addition, the electronic device of this embodiment may use the display device having any structure described in Embodiments 1 to 9.

4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. 4A and 4B illustrate a structure of a driving method of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 14 illustrates an electronic device to which the present invention is applied. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 14 illustrates an electronic device to which the present invention is applied. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 14 illustrates an electronic device to which the present invention is applied. 8A and 8B illustrate a structure of a conventional display device driving method. 8A and 8B illustrate a structure of a conventional display device driving method. 8A and 8B illustrate a structure of a conventional display device driving method.

Claims (8)

In one frame period, when q (q is an integer greater than or equal to 2) representing the gradation of bits, the one frame period, p (p is an integer of 4 or more) to be representable gradation bits Possible, having a plurality of first subframe periods and a plurality of second subframe periods;
The relationship between the q bits and the p bits satisfies q + 2 ≦ p ≦ q + 5,
The lighting weights of the plurality of first subframe periods are equal,
At least two of the lighting weights of the plurality of second subframe periods are different from each other,
In the one frame period, at least one of the plurality of second subframe periods from when one of the two periods of the plurality of first subframe periods appears until when the other appears. A period appears,
Each of the plurality of first subframe periods is such that the relationship between the gray level and the lighting period in the one frame period becomes nonlinear, and the amount of change in the lighting period in the one frame period increases as the gray level increases. The display device is characterized in that gradation is expressed by sequentially adding the lighting periods and combining the lighting periods of the plurality of second subframe periods. In claim 1,
In the one-frame period, the plurality of first sub-frame periods appear in order from a period in which the order of starting lighting is earlier as the gray level increases. In claim 1,
In the one frame period, the plurality of first subframe periods appear in order from a period in which the order of starting lighting is later as the gray level increases. In any one of Claims 1 thru | or 3,
In the one frame period, the plurality of second subframe periods appear in order from a period in which the lighting weight is small. In any one of Claims 1 thru | or 3,
Wherein in one frame period, the plurality of second sub-frame period, a display device, characterized in that emerging from period large weight of the lighting in sequence. In any one of Claims 1 thru | or 5,
In the plurality of second subframe periods, the lighting weighting is in accordance with a binary system. In any one of Claims 1 thru | or 5,
Any one of the plurality of second subframe periods is divided into a plurality of periods. In any one of Claims 1 thru | or 7,
A plurality of pixels each having a first transistor, a second transistor, and a light-emitting element;
One of a source and a drain of the first transistor is electrically connected to a signal line;
The other of the source and the drain of the first transistor is electrically connected to the gate of the second transistor;
A gate of the first transistor is electrically connected to a gate line;
One of a source and a drain of the second transistor is electrically connected to a power supply line;
The other of the source and the drain of the second transistor is electrically connected to the light emitting element.

Images