JP4916617B2 - 実時間プロセッサ用デバッグシステム - Google Patents

実時間プロセッサ用デバッグシステム Download PDF

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Publication number
JP4916617B2
JP4916617B2 JP2001029003A JP2001029003A JP4916617B2 JP 4916617 B2 JP4916617 B2 JP 4916617B2 JP 2001029003 A JP2001029003 A JP 2001029003A JP 2001029003 A JP2001029003 A JP 2001029003A JP 4916617 B2 JP4916617 B2 JP 4916617B2
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JP
Japan
Prior art keywords
signal
debug
core processor
address
update
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JP2001029003A
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English (en)
Japanese (ja)
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JP2001222446A5 (enExample
JP2001222446A (ja
Inventor
ウィリアム・シー・モイヤー
マイケル・ディー・フィッツシモンズ
リチャード・ジー・コリンズ
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NXP USA Inc
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NXP USA Inc
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Publication of JP2001222446A publication Critical patent/JP2001222446A/ja
Publication of JP2001222446A5 publication Critical patent/JP2001222446A5/ja
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/28—Error detection; Error correction; Monitoring by checking the correct order of processing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/362—Debugging of software
    • G06F11/3648—Debugging of software using additional hardware
    • G06F11/3656—Debugging of software using additional hardware using a specific debug interface

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
JP2001029003A 2000-02-07 2001-02-06 実時間プロセッサ用デバッグシステム Expired - Fee Related JP4916617B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/498812 2000-02-07
US09/498,812 US6769076B1 (en) 2000-02-07 2000-02-07 Real-time processor debug system

Publications (3)

Publication Number Publication Date
JP2001222446A JP2001222446A (ja) 2001-08-17
JP2001222446A5 JP2001222446A5 (enExample) 2008-03-27
JP4916617B2 true JP4916617B2 (ja) 2012-04-18

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ID=23982605

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001029003A Expired - Fee Related JP4916617B2 (ja) 2000-02-07 2001-02-06 実時間プロセッサ用デバッグシステム

Country Status (5)

Country Link
US (1) US6769076B1 (enExample)
JP (1) JP4916617B2 (enExample)
KR (1) KR100856336B1 (enExample)
CN (1) CN1222879C (enExample)
TW (1) TW484054B (enExample)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002163127A (ja) * 2000-11-27 2002-06-07 Mitsubishi Electric Corp トレース制御回路
JP2003177938A (ja) * 2001-12-07 2003-06-27 Fujitsu Ltd 電子装置及びそのデバッグ認証方法
EP1283422A1 (en) * 2001-08-07 2003-02-12 Lucent Technologies Inc. Testbench for the validation of a device under test
DE10139660B4 (de) * 2001-08-11 2007-07-05 Infineon Technologies Ag Programmgesteuerte Einheit mit Debug-Ressourcen
US6547125B2 (en) * 2001-09-10 2003-04-15 John D. Correll Material-saving food carton
EP1349071A1 (en) * 2002-03-29 2003-10-01 STMicroelectronics N.V. Integrated circuit with direct debugging architecture
KR100423891B1 (ko) * 2002-06-21 2004-03-22 삼성전자주식회사 트레이스 모듈을 구비한 마이크로프로세서
DE10393102D2 (de) * 2002-11-22 2005-07-21 Continental Teves Ag & Co Ohg Einrichtung und Verfahren zur Analyse von eingebetteten Systemen
US7403301B2 (en) 2003-05-02 2008-07-22 Hewlett-Packard Development Company, L.P. System and method for collecting and analyzing information regarding user devices
US7500152B2 (en) * 2003-12-05 2009-03-03 Freescale Semiconductor, Inc. Apparatus and method for time ordering events in a system having multiple time domains
US7249288B2 (en) * 2004-09-14 2007-07-24 Freescale Semiconductor, Inc. Method and apparatus for non-intrusive tracing
US8621458B2 (en) * 2004-12-21 2013-12-31 Microsoft Corporation Systems and methods for exposing processor topology for virtual machines
US7627784B1 (en) * 2005-04-06 2009-12-01 Altera Corporation Modular processor debug core connection for programmable chip systems
US7865704B2 (en) 2006-03-29 2011-01-04 Freescale Semiconductor, Inc. Selective instruction breakpoint generation based on a count of instruction source events
JP4795147B2 (ja) * 2006-07-11 2011-10-19 富士通株式会社 伝送装置
US7707459B2 (en) * 2007-03-08 2010-04-27 Whirlpool Corporation Embedded systems debugging
US20090222797A1 (en) * 2008-02-29 2009-09-03 Infineon Technologies Ag Apparatus and method for providing a trigger
US8438547B2 (en) * 2009-05-05 2013-05-07 Freescale Semiconductor, Inc. Address translation trace message generation for debug
US8589738B2 (en) * 2009-05-05 2013-11-19 Freescale Semiconductor, Inc. Program trace message generation for page crossing events for debug
US9058421B2 (en) * 2009-06-16 2015-06-16 Freescale Semiconductor, Inc. Trace correlation for profiling subroutines
EP2273329A1 (en) * 2009-06-24 2011-01-12 Delphi Technologies Holding S.à.r.l. Microcontroller protection method and apparatus comprising an on-circuit debugging module
CN101894010B (zh) * 2009-08-24 2013-04-17 威盛电子股份有限公司 微处理器及适用于微处理器的操作方法
KR101636517B1 (ko) * 2009-11-13 2016-07-06 삼성전자주식회사 컴퓨팅 시스템 및 컴퓨팅 시스템의 디버그 정보 처리 방법
GB2493405B (en) * 2011-08-03 2017-04-05 Advanced Risc Mach Ltd Debug barrier transactions
CN102360329B (zh) * 2011-09-29 2014-11-05 西北工业大学 总线监控与调试控制装置及进行总线监控与总线调试的方法
CN104991845B (zh) * 2015-06-24 2018-10-23 福州瑞芯微电子股份有限公司 soc多核芯片高速debug方法及装置
CN105068898B (zh) * 2015-06-24 2018-12-18 福州瑞芯微电子股份有限公司 USB type-C高速debug方法及装置
CN106254098B (zh) * 2016-07-22 2020-02-21 纳瓦电子（上海）有限公司 一种调试数据采集方法、系统以及嵌入式无线系统
US10310012B2 (en) * 2016-12-21 2019-06-04 Samsung Electronics Co., Ltd. Lightweight, low overhead debug bus
CN112541166B (zh) * 2019-09-20 2024-09-06 杭州中天微系统有限公司 一种方法、系统和计算机可读存储介质
CN114019230B (zh) * 2021-11-03 2024-09-27 武汉盛帆电子股份有限公司 一种智能电能表设计方法及系统

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5053949A (en) * 1989-04-03 1991-10-01 Motorola, Inc. No-chip debug peripheral which uses externally provided instructions to control a core processing unit
JP2621477B2 (ja) * 1989-04-28 1997-06-18 日本電気株式会社 インサーキット・エミュレータ
JP2772604B2 (ja) * 1992-10-27 1998-07-02 シャープ株式会社 データ処理システム
JP2646957B2 (ja) * 1992-05-13 1997-08-27 日本電気株式会社 キャッシュ内蔵マイクロプロセッサ及びそのトレースシステム
US5491793A (en) * 1992-07-31 1996-02-13 Fujitsu Limited Debug support in a processor chip
JPH07281924A (ja) * 1994-04-05 1995-10-27 Hitachi Ltd トレース装置及びこれを備えたエミュレータ
CN1279449C (zh) * 1994-12-28 2006-10-11 株式会社东芝 微处理器
US5544311A (en) * 1995-09-11 1996-08-06 Rockwell International Corporation On-chip debug port
JPH1040130A (ja) * 1996-07-23 1998-02-13 Sony Corp マイクロコンピュータ
US5771240A (en) * 1996-11-14 1998-06-23 Hewlett-Packard Company Test systems for obtaining a sample-on-the-fly event trace for an integrated circuit with an integrated debug trigger apparatus and an external pulse pin
JPH11272560A (ja) 1998-03-19 1999-10-08 Sony Corp 集積回路

Also Published As

Publication number Publication date
CN1308279A (zh) 2001-08-15
KR20010078358A (ko) 2001-08-20
KR100856336B1 (ko) 2008-09-04
JP2001222446A (ja) 2001-08-17
CN1222879C (zh) 2005-10-12
US6769076B1 (en) 2004-07-27
TW484054B (en) 2002-04-21

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