JP4885462B2 - ドナーシート、ドナーシートの製造方法、ドナーシートを利用した薄膜トランジスタの製造方法、及びドナーシートを利用した平板表示装置の製造方法 - Google Patents
ドナーシート、ドナーシートの製造方法、ドナーシートを利用した薄膜トランジスタの製造方法、及びドナーシートを利用した平板表示装置の製造方法 Download PDFInfo
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- MBPCKEZNJVJYTC-UHFFFAOYSA-N 4-[4-(n-phenylanilino)phenyl]aniline Chemical compound C1=CC(N)=CC=C1C1=CC=C(N(C=2C=CC=CC=2)C=2C=CC=CC=2)C=C1 MBPCKEZNJVJYTC-UHFFFAOYSA-N 0.000 description 1
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- TVIVIEFSHFOWTE-UHFFFAOYSA-K tri(quinolin-8-yloxy)alumane Chemical compound [Al+3].C1=CN=C2C([O-])=CC=CC2=C1.C1=CN=C2C([O-])=CC=CC2=C1.C1=CN=C2C([O-])=CC=CC2=C1 TVIVIEFSHFOWTE-UHFFFAOYSA-K 0.000 description 1
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- FKIZDWBGWFWWOV-UHFFFAOYSA-N trimethyl(trimethylsilylselanyl)silane Chemical compound C[Si](C)(C)[Se][Si](C)(C)C FKIZDWBGWFWWOV-UHFFFAOYSA-N 0.000 description 1
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- B41M5/382—Contact thermal transfer or sublimation processes
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- B82Y20/00—Nanooptics, e.g. quantum optics or photonic crystals
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78681—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising AIIIBV or AIIBVI or AIVBVI semiconductor materials, or Se or Te
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/31504—Composite [nonstructural laminate]
Description
20〜40nmの厚さを有するP型Siナノワイヤの場合、商業的に利用可能な単分散金コロイド粒子(British Biocell International.Ltd製)を触媒としてSiH4及びB2H6の熱蒸着によって合成される。このとき、温度は、420〜480℃を利用し、反応器は、8インチのチューブファーネスでコンピュータで制御される成長が可能に調節する。全体圧力が30torrである時、シラン分圧は約2torr、反応時間は40分がかかる。SiH4とB2H6の比率は、ドーピングレベルを勘案して6400:1に調節する。このとき、ナノワイヤのドーピング濃度は、約4×10E+17cm−3と推定される。ドーピングレベルが高ければ高いほど、高温アニーリングプロセスなしにもコンタクト抵抗が低くなるという長所がある。
N型のSiナノワイヤは、レーザ触媒成長(Laser−assisted Catalytic Growth:LCG)方法で合成される。簡単には、Nd:YAGレーザ(532nm;8nsパルス幅、300mJ/pulse、10Hz)のレーザビームを利用して金ターゲットを剥離する方法を採択する。このとき、生成される金ナノクラスター触媒粒子は、反応容器でSiH4ガスと共に反応して、Siナノワイヤに成長する。ドーピングする場合には、N型の場合、Au−Pターゲット(99.5:0.5wt%、Alfa Aesar)と補助赤色蛍光(99% Alfa Aesar)とを反応容器のガス入口に置いて生成する。
アンモニアガス(99.99%、Matheson)、ガリウム金属(99.9999%、Alfa Aesar)、マグネシウム窒化物(Mg3N2、99.6%、Alfa Aesar)をそれぞれN、Ga、Mgのソースとして利用して金属−触媒CVDで形成する。この時に使用する基板は、c−プレインサファイアが望ましい。Mg3N2は、熱的に分解してMgN2(s)=3Mg(g)+N2(g)のようになり、Mgドーパントを生成し、Gaソースの上流に置かれる。950℃の温度条件でGaNナノワイヤが形成され、ニッケルが触媒として使われる。ほとんどの長さは、10〜40umの分布を有する。
CdSナノリボンは、真空カポー伝達方法で合成される。特に、少量のCdS粉末(100mg以下)を真空管の一側端に置いて密封する。CdS粉末の温度が900℃に維持されるように真空管を加熱する間に、他側端は50℃より低く維持する。2時間以内にほとんどのCdSが冷たい側に移動し、真空管の器壁にくっ付く。このような方法で得られた物質は、30〜150nm間の厚さを有するナノリボンが主種であり、このときの幅は0.5〜5μm、長さは10〜200μmほどである。
2.5cmの直径のファーネス反応器でH2(全気圧=1atm)を100sccmの流速で流すと同時に、GeH4(10% in He)の流速を10sccmで維持しつつ275℃の条件で15分間CVDを行って得る。反応基板は、金(Au)ナノ結晶(平均20nmの直径)をSiO2基板の表面に均一に分散した基板を使用する。
InPナノワイヤは、LCG方法で形成される。LCGターゲットは、約94%のInP、触媒としての5%のAu、ドーピング元素としての1%のTeまたはZnより構成されている。成長する間にファーネス温度は、800℃(中間)に維持し、ターゲットは、ファーネスの中間よりは上流端部に位置させる。レーザ条件は、Nd−YAGレーザ(波長1064nm)のパルスを10分間照射し、このとき、ナノワイヤは、ファーネスの冷たい端側の下流端部に捕集される。
ZnOナノ棒は、約29.5g(0.13mol)のZnアセト酸二水和物(ZnOCOCH3−2H2O)を60℃で125mLのメタノールに溶かした後、65mLのメタノールに14.8g(0.23mol)のポタシウムヒドロキシド(KOH)を溶かした溶液を付加して作る。反応混合物は、60℃で数日間攪拌する。数日内にナノ棒が沈殿されれば、沈殿物をメタノールで洗浄し、5500rpmで30分間遠心分離する。得られたナノ粒子をエチレングリコール/水2:1の溶媒で希釈させて溶液を作る。3日ほど熟成させる場合、直径15〜30nm、長さ200〜300nmほどのナノ棒が得られる。これとは違って、CVD方法を利用すれば、ナノワイヤを得ることもある。
310 フィルム
312 ベースフィルム
314 光熱転換(LTHC)層
320 転写層
330 ナノ粒子
Claims (17)
- 高分子系の第1ファイバと、
複数個のナノワイヤ、ナノ棒、またはナノリボンからなるナノ粒子をほぼ平行に含む高分子系第2ファイバと、
複数個の前記第1ファイバと複数個の前記第2ファイバとが交差するように形成された、転写層としての織布と、
を含むことを特徴とするドナーシート。 - 前記ナノ粒子は、P型またはN型半導体であることを特徴とする請求項1に記載のドナーシート。
- フィルムを準備する段階と、
高分子系の第1ファイバを形成する段階と、
複数個のナノワイヤ、ナノ棒、またはナノリボンからなるナノ粒子をほぼ平行に含む高分子系第2ファイバを形成する段階と、
複数個の前記第1ファイバと複数個の前記第2ファイバとが交差するように織布を形成する段階と、
前記織布とフィルムとをラミネーティングする段階と、を含むことを特徴とするドナーシートの製造方法。 - 前記ナノ粒子は、P型またはN型半導体であることを特徴とする請求項3に記載のドナーシートの製造方法。
- 半導体の活性層を有する薄膜トランジスタの製造方法において、
複数個のナノラインを区画する段階と、
複数個のナノワイヤ、ナノ棒、またはナノリボンからなるナノ粒子がほぼ平行に配列された織布を転写層として有するドナーシートを準備する段階と、
前記ドナーシートのナノ粒子が前記ナノラインと平行となるように、前記ドナーシートをアクセプターである基板に整列した後、前記ドナーシートの転写層を前記ナノラインに沿って転写して前記活性層を形成する段階と、を含むことを特徴とする薄膜トランジスタの製造方法。 - 前記活性層を形成する段階は、
前記ドナーシートの転写層を前記ナノラインに沿って転写してライン上のナノ膜を形成する段階と、
前記ナノ膜をパターニングして活性層を形成する段階と、を含むことを特徴とする請求項5に記載の薄膜トランジスタの製造方法。 - 前記ナノラインは、P型ナノラインとN型ナノラインとが互いに平行に交互的に配列され、
前記ナノ膜は、P型ナノ膜及びN型ナノ膜より備えられ、それぞれ前記P型ナノライン及びN型ナノラインに沿って形成されることを特徴とする請求項6に記載の薄膜トランジスタの製造方法。 - 前記ナノ粒子の長手方向が前記ナノ膜の長手方向に平行であることを特徴とする請求項6または7に記載の薄膜トランジスタの製造方法。
- 前記ナノラインのうち少なくとも一つは、ストライプ状であることを特徴とする請求項5〜8のいずれか一項に記載の薄膜トランジスタの製造方法。
- 前記織布を転写層として有するドナーシートを準備する段階は、
フィルムを準備する段階と、
高分子系の第1ファイバを形成する段階と、
複数個の前記ナノ粒子をほぼ平行に含む高分子系の第2ファイバを形成する段階と、
複数個の前記第1ファイバと複数個の前記第2ファイバとが交差するように織布を形成する段階と、
前記織布及びフィルムをラミネーティングする段階と、を含むことを特徴とする請求項5〜9のいずれか一項に記載の薄膜トランジスタの製造方法。 - 複数個の画素を備えた発光領域と、前記各画素ごとに備えられた半導体の活性層を有する薄膜トランジスタを備えた選択駆動回路とを含む平板表示装置の製造方法において、
複数個のナノラインを区画する段階と、
複数個のナノワイヤ、ナノ棒、またはナノリボンからなるナノ粒子がほぼ平行に配列された織布を転写層として有するドナーシートを準備する段階と、
前記ドナーシートの前記ナノ粒子が前記ナノラインと平行となるように前記ドナーシートをアクセプターである基板に整列した後、前記ドナーシートの転写層を前記ナノラインに沿って転写して前記活性層を形成する段階と、を含むことを特徴とする平板表示装置の製造方法。 - 前記活性層を形成する段階は、
前記ドナーシートの転写層を前記ナノラインに沿って転写してライン上のナノ膜を形成する段階と、
前記ナノ膜をパターニングして活性層を形成する段階と、を含むことを特徴とする請求項11に記載の平板表示装置の製造方法。 - 前記ナノラインは、P型ナノラインとN型ナノラインとが互いに平行に交互的に配列され、
前記ナノ膜は、P型ナノ膜及びN型ナノ膜より備えられ、それぞれ前記P型ナノライン及びN型ナノラインに沿って形成されることを特徴とする請求項12に記載の平板表示装置の製造方法。 - 前記ナノ粒子の長手方向が前記ナノ膜の長手方向に平行であることを特徴とする請求項12または13に記載の平板表示装置の製造方法。
- 前記ナノラインのうち少なくとも一つは、ストライプ状であることを特徴とする請求項11〜14のいずれか一項に記載の平板表示装置の製造方法。
- 前記織布を転写層として有するドナーシートを準備する段階は、
フィルムを準備する段階と、
高分子系の第1ファイバを形成する段階と、
複数個の前記ナノ粒子をほぼ平行に含む高分子系の第2ファイバを形成する段階と、
複数個の前記第1ファイバと複数個の前記第2ファイバとが交差するように織布を形成する段階と、
前記織布及びフィルムをラミネーティングする段階と、を含むことを特徴とする請求項11〜15のいずれか一項に記載の平板表示装置の製造方法。 - 前記各画素に、いずれか一つの電極が前記選択駆動回路に電気的に連結された有機電界発光素子を形成する段階を含むことを特徴とする請求項11〜16のいずれか一項に記載の平板表示装置の製造方法。
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