JP4885422B2 - ガロア拡大体線形変換器 - Google Patents
ガロア拡大体線形変換器 Download PDFInfo
- Publication number
- JP4885422B2 JP4885422B2 JP2003550049A JP2003550049A JP4885422B2 JP 4885422 B2 JP4885422 B2 JP 4885422B2 JP 2003550049 A JP2003550049 A JP 2003550049A JP 2003550049 A JP2003550049 A JP 2003550049A JP 4885422 B2 JP4885422 B2 JP 4885422B2
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- JP
- Japan
- Prior art keywords
- cell
- exclusive
- input
- programmable
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
- G06F7/724—Finite field arithmetic
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- General Engineering & Computer Science (AREA)
- Error Detection And Correction (AREA)
Description
32 記憶装置
36 排他的論理和ゲート
40,42,44,46,48,50,52,54 セル
56,58,60,62,64,66,68,70 セル
Claims (4)
- 複数の入力ビットに応答してガロア拡大体論理演算をシングルクロックサイクルで実行するプログラマブル論理装置であって、
前記プログラマブル論理装置は、複数のセルラインを具備し、
各セルラインは、前記入力ビットの個数と同数の複数のセルを具備し、
前記入力ビットは、前記各セルラインにおいて、前記セルと1対1に対応し、かつ、該セルに接続され、
各セルは、
該セルに対応する入力ビットによって提供される1ビット値を記憶するプログラマブル記憶装置
を具備し、
該1ビット値は、実行されるべきガロア拡大体論理演算に従ってセットされ、
各セルは、
前記プログラマブル記憶装置が記憶する1ビット値に応じて、(i) 該セルに対応する入力ビットの値と前段のセルの出力値との排他的論理和演算の演算結果、または、(ii)前段のセルの出力値をそのまま、のうちの1つを、次段のセルに出力する論理回路
を具備し、
前記各セルラインにおける最後のセルは、前記プログラマブル論理装置の出力を提供する
ことを特徴とするプログラマブル論理装置。 - 前記論理回路は、
前記セルに対応する入力ビットの値と前記プログラマブル記憶装置が記憶する1ビット値との論理積演算を行う論理積回路と、
前記排他的論理和演算を行う排他的論理和回路と
を更に具備する
ことを特徴とする請求項1に記載のプログラマブル論理装置。 - 前記論理回路は、
前記排他的論理和演算を行う排他的論理和回路と、
前記プログラマブル記憶装置が記憶する1ビット値に応じて、前段のセルの出力値、または、前記排他的論理和回路の出力値のうちの何れかを、次段のセルに出力する選択回路と
を更に具備する
ことを特徴とする請求項1に記載のプログラマブル論理装置。 - 各セルのプログラマブル記憶装置には、互いに異なる入力端子が接続され、かつ、同一の書き込み信号が、各セルのプログラマブル記憶装置に入力される
ことを特徴とする請求項1に記載のプログラマブル論理装置。
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US33466201P | 2001-11-30 | 2001-11-30 | |
US60/334,662 | 2001-11-30 | ||
US10/051,533 US6587864B2 (en) | 2001-11-30 | 2002-01-18 | Galois field linear transformer |
US10/051,533 | 2002-01-18 | ||
PCT/US2002/036745 WO2003048924A1 (en) | 2001-11-30 | 2002-11-14 | Galois field linear transformer |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005512129A JP2005512129A (ja) | 2005-04-28 |
JP4885422B2 true JP4885422B2 (ja) | 2012-02-29 |
Family
ID=26729523
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2003550049A Expired - Fee Related JP4885422B2 (ja) | 2001-11-30 | 2002-11-14 | ガロア拡大体線形変換器 |
Country Status (5)
Country | Link |
---|---|
US (1) | US6587864B2 (ja) |
EP (1) | EP1449069A4 (ja) |
JP (1) | JP4885422B2 (ja) |
CN (1) | CN100383727C (ja) |
WO (1) | WO2003048924A1 (ja) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7177891B2 (en) * | 2002-10-09 | 2007-02-13 | Analog Devices, Inc. | Compact Galois field multiplier engine |
US7269615B2 (en) * | 2001-12-18 | 2007-09-11 | Analog Devices, Inc. | Reconfigurable input Galois field linear transformer system |
US6766345B2 (en) | 2001-11-30 | 2004-07-20 | Analog Devices, Inc. | Galois field multiplier system |
US7082452B2 (en) * | 2001-11-30 | 2006-07-25 | Analog Devices, Inc. | Galois field multiply/multiply-add/multiply accumulate |
US7283628B2 (en) | 2001-11-30 | 2007-10-16 | Analog Devices, Inc. | Programmable data encryption engine |
US7895253B2 (en) * | 2001-11-30 | 2011-02-22 | Analog Devices, Inc. | Compound Galois field engine and Galois field divider and square root engine and method |
WO2003053001A1 (en) | 2001-12-18 | 2003-06-26 | Analog Devices, Inc. | Programmable data encryption engine for advanced encryption standard algorithm |
US7508937B2 (en) * | 2001-12-18 | 2009-03-24 | Analog Devices, Inc. | Programmable data encryption engine for advanced encryption standard algorithm |
US7000090B2 (en) * | 2002-01-21 | 2006-02-14 | Analog Devices, Inc. | Center focused single instruction multiple data (SIMD) array system |
US6941446B2 (en) * | 2002-01-21 | 2005-09-06 | Analog Devices, Inc. | Single instruction multiple data array cell |
US6865661B2 (en) | 2002-01-21 | 2005-03-08 | Analog Devices, Inc. | Reconfigurable single instruction multiple data array |
US20040024802A1 (en) * | 2002-08-05 | 2004-02-05 | Khan Raheel Ahmed | High-performance programmable processing element for GF (2N) |
US7197686B2 (en) * | 2002-10-11 | 2007-03-27 | Nvidia Corporation | Reconfigurable bit-manipulation node |
US7693928B2 (en) * | 2003-04-08 | 2010-04-06 | Analog Devices, Inc. | Galois field linear transformer trellis system |
US7865806B2 (en) * | 2006-03-03 | 2011-01-04 | Peter Lablans | Methods and apparatus in finite field polynomial implementations |
US20140055290A1 (en) | 2003-09-09 | 2014-02-27 | Peter Lablans | Methods and Apparatus in Alternate Finite Field Based Coders and Decoders |
US7421076B2 (en) * | 2003-09-17 | 2008-09-02 | Analog Devices, Inc. | Advanced encryption standard (AES) engine with real time S-box generation |
US7512647B2 (en) | 2004-11-22 | 2009-03-31 | Analog Devices, Inc. | Condensed Galois field computing system |
US8024551B2 (en) | 2005-10-26 | 2011-09-20 | Analog Devices, Inc. | Pipelined digital signal processor |
US8285972B2 (en) * | 2005-10-26 | 2012-10-09 | Analog Devices, Inc. | Lookup table addressing system and method |
US7728744B2 (en) * | 2005-10-26 | 2010-06-01 | Analog Devices, Inc. | Variable length decoder system and method |
CN101335741B (zh) * | 2007-06-28 | 2011-04-27 | 财团法人工业技术研究院 | 认证加密的迦罗瓦计数模式中赫序运算的加速方法与装置 |
US20090077153A1 (en) * | 2007-09-14 | 2009-03-19 | Cswitch Corporation | Reconfigurable arithmetic unit |
US20090077145A1 (en) * | 2007-09-14 | 2009-03-19 | Cswitch Corporation | Reconfigurable arithmetic unit |
US8301990B2 (en) * | 2007-09-27 | 2012-10-30 | Analog Devices, Inc. | Programmable compute unit with internal register and bit FIFO for executing Viterbi code |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3805037A (en) * | 1972-02-22 | 1974-04-16 | J Ellison | N{40 th power galois linear gate |
FR2605769B1 (fr) * | 1986-10-22 | 1988-12-09 | Thomson Csf | Operateur polynomial dans les corps de galois et processeur de traitement de signal numerique comportant un tel operateur |
US5689452A (en) * | 1994-10-31 | 1997-11-18 | University Of New Mexico | Method and apparatus for performing arithmetic in large galois field GF(2n) |
US5768168A (en) * | 1996-05-30 | 1998-06-16 | Lg Semicon Co., Ltd. | Universal galois field multiplier |
US6636553B1 (en) * | 1998-12-29 | 2003-10-21 | Texas Instruments Incorporated | Pseudorandom noise generator for WCDMA |
US6311200B1 (en) * | 1999-09-23 | 2001-10-30 | Chameleon Systems, Inc. | Reconfigurable program sum of products generator |
-
2002
- 2002-01-18 US US10/051,533 patent/US6587864B2/en not_active Expired - Lifetime
- 2002-11-14 WO PCT/US2002/036745 patent/WO2003048924A1/en active Application Filing
- 2002-11-14 CN CNB028208439A patent/CN100383727C/zh not_active Expired - Fee Related
- 2002-11-14 JP JP2003550049A patent/JP4885422B2/ja not_active Expired - Fee Related
- 2002-11-14 EP EP02789683A patent/EP1449069A4/en not_active Ceased
Also Published As
Publication number | Publication date |
---|---|
WO2003048924A1 (en) | 2003-06-12 |
EP1449069A4 (en) | 2006-09-06 |
EP1449069A1 (en) | 2004-08-25 |
CN1571953A (zh) | 2005-01-26 |
US6587864B2 (en) | 2003-07-01 |
JP2005512129A (ja) | 2005-04-28 |
US20030105790A1 (en) | 2003-06-05 |
CN100383727C (zh) | 2008-04-23 |
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