JP4872957B2 - Manufacturing method of electronic parts - Google Patents

Description

  The present invention relates to a method for manufacturing an electronic component having a functional layer and a pair of electrode layers sandwiching the functional layer.

As a method for manufacturing this type of electronic component, Patent Document 1 described below describes a method for manufacturing a thin film capacitor having a dielectric layer and a pair of electrode layers sandwiching the dielectric layer. In this method of manufacturing a thin film capacitor, first, a thin film to be a dielectric layer is formed on a Pt foil to be one electrode layer, and a Ni thin film to be the other electrode layer is formed on the dielectric layer. Form the body. Thereafter, the laminate is cut into individual thin film capacitors by dicing.
JP-A-8-78283

  This type of electronic component may be used by being embedded in a substrate. Therefore, in order to improve the adhesion between the electrode layer of the electronic component and the substrate, the surface of the electrode layer of the laminate may be roughened so-called roughening in the manufacturing process. On the other hand, processing such as etching may be performed on the electrode layer of the laminate in the manufacturing process. The present inventors have found that there are the following problems when these two techniques are used in combination.

  That is, when the thickness of the laminate is thin and flexible, when etching one electrode layer, the other electrode layer may be fixed to the support by the adhesive layer in order to fix the laminate. . In this case, if the surface of the other electrode layer is roughened, the adhesion between the other electrode layer and the adhesive layer is high, and it is difficult to peel the adhesive layer from the other electrode layer after etching. become. In particular, when the laminate is thin, the strength is low, and it is particularly difficult to peel the adhesive layer from the laminate.

  The present invention has been made to solve the above problems, and even when the surface of the electrode layer in the laminate is roughened, the adhesive layer is used to fix the laminate to the support. It is an object of the present invention to provide a method for manufacturing an electronic component capable of easily peeling a laminate.

  The electronic component manufacturing method of the present invention includes a forming step of forming a laminate having a functional layer and a first electrode layer and a second electrode layer facing each other with the functional layer interposed therebetween, and the first step By roughening the surface of the electrode layer, covering the surface of the first electrode layer that has been roughened with a protective layer, and adhering the protective layer to the adhesive layer, A fixing step of fixing the laminate to a support through the adhesive layer, a second electrode layer processing step for processing the second electrode layer, and peeling the adhesive layer from the protective layer And a removing step of removing the protective layer from the first electrode layer.

  In the method for manufacturing an electronic component of the present invention, in the fixing step, the surface of the roughened first electrode layer is covered with the protective layer, and the protective layer is adhered to the adhesive layer, and the adhesive layer The laminate is fixed to the support via That is, since the protective layer covering the roughened first electrode layer is adhered to the adhesive layer, it is possible to prevent the first electrode layer and the adhesive layer from being firmly adhered. Therefore, even if the surface of the first electrode layer is roughened, the protective layer can be easily peeled from the adhesive layer in the peeling step.

  In the electronic component manufacturing method of the present invention, preferably, the protective layer includes a dry film, and in the fixing step, the surface of the first electrode layer that has been roughened is brought into contact with the dry film. In the state where the surface of the first electrode layer is covered with the protective layer, the laminated body is fixed with a support through the adhesive layer, and in the removing step, a peeling solution for the dry film is used. The dry film is removed from the first electrode layer. In this case, the dry film covers the roughened first electrode layer, and in the removing step, the dry film is removed from the first electrode layer by using a dry film peeling solution, so that the first electrode layer is included. The dry film can be easily removed from the first electrode layer without applying a force to the laminate. The stripping solution is a solution such as a NaOH solution of about 3% by weight.

  In the method of manufacturing an electronic component according to the present invention, preferably, the protective layer has a base film bonded to the dry film, and in the fixing step, the base film is adhered to the adhesive layer. The laminated body is fixed to a support, and in the removing step, after the base film is peeled from the dry film, the dry film is removed from the first electrode layer by using a peeling liquid for the dry film. In this case, the base film has lower adhesiveness to the adhesive layer than the dry film, and the laminate can be more reliably peeled from the support. And when peeling a protective layer, a base film can be easily peeled from a dry film.

  In the method of manufacturing an electronic component according to the present invention, preferably, in the processing step of the second electrode layer, the second electrode layer is etched.

  The method for manufacturing an electronic component of the present invention includes a first electrode layer etching step of performing etching on the first electrode layer before the fixing step.

  In the electronic component manufacturing method of the present invention, preferably, the first electrode layer etching step performs etching of a dividing pattern along a dividing line for dividing the laminate into a plurality of electronic components, In the processing step of the second electrode layer, the division pattern is etched on the second electrode layer so as to overlap the division pattern formed on the first electrode layer.

  In this case, in the first electrode layer etching step and the second electrode layer processing step, the stacked body is divided into a plurality of electronic components with respect to the first electrode layer and the second electrode layer. Since etching of the dividing pattern along the dividing line is performed, a portion on the dividing line in the first electrode layer and the second electrode layer can be removed. Therefore, the first electrode layer and the second electrode layer can be divided for individual electronic components. Since the functional layer is thin and can be easily divided, the laminate can be easily divided into a plurality of electronic components by removing the protective layer.

  In the electronic component manufacturing method of the present invention, preferably, in the first electrode layer etching step, etching of the first electrode pattern formed for each of the electronic components is performed together with etching of the divided pattern. This is performed on the electrode layer. In this case, the etching of the first electrode pattern formed on the first electrode layer for each electronic component and the etching of the divided pattern performed on the first electrode layer to divide into individual electronic components are simultaneously performed. It becomes. Therefore, the efficiency of the manufacturing process can be improved.

  In the method of manufacturing an electronic component according to the present invention, preferably, in the step of processing the second electrode layer, the second electrode pattern formed for each of the electronic components is etched together with the etching of the divided pattern. This is performed on the electrode layer. In this case, the etching of the second electrode pattern formed on the second electrode layer for each electronic component and the etching of the divided pattern performed on the second electrode layer in order to divide into individual electronic components are performed simultaneously. It becomes. Therefore, the efficiency of the manufacturing process can be improved.

  In the method for manufacturing an electronic component according to the present invention, preferably, the support and the adhesive layer are formed of a light-transmitting material, and the first electrode layer is etched in the processing step of the second electrode layer. In the step, the divided electrode etched in the first electrode layer is penetrated through the support, and the etching of the divided pattern is overlapped with the divided pattern formed in the first electrode layer. To the layer. In this case, the position of the division pattern formed on the first electrode layer and the position of the division pattern applied to the second electrode layer can be accurately matched. Therefore, since the part on the dividing line can be reliably removed in the first and second electrode layers, the laminate can be reliably divided into a plurality of electronic components.

  In the method for manufacturing an electronic component of the present invention, preferably, the functional layer is a dielectric layer, and the electronic component is a thin film capacitor.

  According to the method for manufacturing an electronic component of the present invention, even when the surface of the electrode layer in the laminate is roughened, the laminate is easily separated from the adhesive layer that fixes the laminate to the support. can do.

  The best mode for carrying out the present invention will be described below in detail with reference to the accompanying drawings. In the description of the drawings, the same reference numerals are assigned to the same elements, and duplicate descriptions are omitted.

(First embodiment)
With reference to FIG. 1, the structure of the electronic component E which concerns on 1st Embodiment is demonstrated. FIG. 1 is a plan view and a cross-sectional view of an electronic component according to the first embodiment. The electronic component E is a thin film capacitor having a size of about 1 to 10 mm square and a thickness of about 10 to 100 μm. The electronic component E includes a dielectric layer (functional layer) 3, and a first electrode layer 5 and a second electrode layer 7 that face each other with the dielectric layer 3 interposed therebetween.

  In order to function as a dielectric, the dielectric layer 3 is made of, for example, barium titanate and has a thickness of about 1 μm. The first electrode layer 5 and the second electrode layer 7 are formed of a metal foil, a deposited film, a sputtered film, a plated film, or the like in order to function as an electrode. In the present embodiment, the first electrode layer 5 is made of Ni, and the second electrode layer 7 is made of Cu. The thickness is, for example, about 25 μm for the first electrode layer 5 and about 30 μm for the second electrode layer 7.

  The dielectric layer 3, the first electrode layer 5, and the second electrode layer 7 have the same size and are stacked on top of each other, but one side of the first electrode layer 5 is It is about 5 to 200 μm larger than one side of the second electrode layer 7.

  The first and second electrode layers 5 and 7 are formed with first and second electrode patterns 6 and 8, respectively, depending on the application. The first electrode patterns 6 formed on the first electrode layer 5 are circular patterns, and five are formed at symmetrical positions in the vertical and horizontal directions of the central portion and the four corner portions of the first electrode layer 5. In the circular portion of the first electrode pattern 6, the metal material is removed, and the dielectric layer 3 is exposed from the first electrode layer 5.

  The second electrode pattern 8 formed on the second electrode layer 7 is a circular pattern, and is formed in the second electrode layer 7 symmetrically in the vertical and horizontal directions. That is, as shown in the plan view of FIG. 1A, the first and second electrode patterns 6 and 8 are arranged in three rows in the vertical and horizontal directions when viewed from the direction perpendicular to the surface of the second electrode layer 7. is doing. In the circular portion of the second electrode pattern 8, the metal material is removed, and the dielectric layer 3 is exposed from the second electrode layer 7.

  In addition, the 1st electrode pattern 6 and the 2nd electrode pattern 8 are arrange | positioned so that it may not overlap in the lamination direction of each layer. That is, at least one surface of any part of the dielectric layer 3 is covered with the first electrode layer 5 or the second electrode layer 7. Since the dielectric layer 3 has low strength and is thin, it is difficult to keep the shape alone, and each part of the dielectric layer 3 is held by at least the first electrode layer 5 or the second electrode layer 7. ing. However, this is not the case when it is desired to produce a through hole in the stacking direction in the electronic component E1, and all of the first electrode layer 5, the second electrode layer 7 and the dielectric layer 3 are removed.

  This electronic component E is used in a state where it is embedded in a substrate. Therefore, in order to improve the adhesion between the electronic component E and the substrate, the surface of the first electrode layer 5 and the surface of the second electrode layer 7 are roughened. The surface roughness of the roughened first and second electrode layers 5 and 7 has an arithmetic average roughness Ra of about 80 to 1000 nm.

  Then, the manufacturing method of the electronic component E which concerns on this embodiment is demonstrated. FIG. 2 is a flowchart of the method for manufacturing an electronic component according to this embodiment. As shown in FIG. 2, the manufacturing method of the electronic component E includes a laminated body forming step S1, a first fixing step S2, a first roughening step S3, a first etching step S4, and a protection. Step S5, first peeling step S6, second fixing step S7, second roughening step S8, second etching step S9, second peeling step S10, and removal of the protective layer Step S11. Each of these steps will be described with reference to FIGS.

  First, in the laminated body forming step S1, as shown in FIG. 3A, the laminated body 10 is formed. Fig.3 (a) shows sectional drawing of a laminated body. The laminate 10 includes a dielectric layer 13, and a first electrode layer 15 and a second electrode layer 17 that are opposed to each other with the dielectric layer 13 interposed therebetween.

  The first electrode layer 15 is a polished Ni foil having a thickness of about 25 μm. After applying a barium titanate (BT) solution on the first electrode layer 15 by a chemical solution method (CSD), it is baked at a temperature of about 900 ° C., and a dielectric layer 13 having a thickness of about 1 μm. Form. Cu is deposited on the dielectric layer 13 by a sputtering method, and further Cu is deposited by a plating method to form a second electrode layer 17 having a thickness of about 30 μm, whereby the laminate 10 is completed.

  Next, in 1st fixing process S2, as shown in FIG.3 (b), the laminated body 10 is fixed to the glass support body 20 via the adhesive sheet 30. As shown in FIG. The reason why the stacked body 10 is fixed in this manner is to perform roughening and patterning of the first electrode layer 15 in a later step. Therefore, first, the laminate 10 and the support 20 are superposed and passed through a laminator (VAII-700 manufactured by Taisei Laminator) set to a pressure of 0.4 MPa, and the warpage of the sheet-like laminate 10 is corrected.

  The pressure-sensitive adhesive sheet 30 includes a PET (Polyethylene Terephthalate) film 31 and pressure-sensitive adhesive layers 33 and 35 that cover both surfaces of the PET film 31, respectively. Of the two adhesive layers 33 and 35, one adhesive layer 33 is formed of a heat-peelable adhesive material whose adhesive force is reduced by heat. The adhesive layer 33 exhibits adhesive strength at room temperature and substantially disappears at a temperature of about 150 ° C. The other adhesive layer 35 can maintain the adhesive force at a temperature of about 150 ° C.

  The adhesive sheet 30 and the laminate 10 are bonded together by adhering the heat-peelable adhesive layer 33 and the second electrode layer 17. A laminator is also used when the pressure-sensitive adhesive sheet 30 is bonded to the laminate 10. Next, the adhesive layer 35 on the other side is attached to the support 20 using a laminator. Thus, the laminated body 10 is fixed to the support body 20 through the adhesive layer 33.

  Next, in the first roughening step S3, as shown in FIG. 3C, the surface of the first electrode layer 15 is roughened. For the roughening treatment, a treatment method such as an etching treatment, a blackening reduction treatment, or a plating treatment can be used. These treatment methods may be combined, or after etching the surface of the first electrode layer 15 with an etching solution, a plating treatment may be performed using the plating solution.

  Next, in the first etching step S4, the first electrode layer 15 is etched as shown in FIG. In this first etching step S4, etching of the divided pattern 16 along the dividing line L for dividing the laminated body 10 into a plurality (9 in this embodiment) of electronic components E together with the first electrode pattern 6 is performed. At the same time. 4A and 4B are a plan view and a cross-sectional view of the laminate in a state where the first electrode pattern 6 and the divided pattern 16 are formed on the first electrode layer 15.

  As shown in FIG. 4A, the division pattern 16 has a line shape along four vertical and four horizontal division lines L, and the line width D1 is about 250 μm. The first electrode layer 15 is divided into nine first electrode layers 5 by the division pattern 16. Five circular first electrode patterns 6 are formed on each of the nine first electrode layers 5. In FIG. 4A, a region indicated by light gray indicates a portion where the material of the first electrode layer 15 is removed by etching and the dielectric layer 13 is exposed.

  The etching of the first electrode layer 15 can be performed using a conventional etching technique. For example, after the laminate 10 is heated to about 70 ° C. in an oven, a dry film (ALPHO NIT2025 manufactured by Nichigo Morton) is pressure-bonded to the surface of the first electrode layer 15 at 105 ° C. using a laminator, and exposure and development are performed. To pattern the dry film. Thereafter, Ni is patterned using a ferric chloride solution.

  Thereby, in the 1st electrode layer 15, the division | segmentation pattern 16 and the 1st electrode pattern 6 are formed simultaneously. In this case, the etching of the first electrode pattern 6 formed on the first electrode layer 15 for each electronic component E and the division pattern 16 performed on the first electrode layer 15 to divide each electronic component E are performed. Since the etching is performed at the same time, the manufacturing process can be made more efficient.

  Next, in the protective step S5, as shown in FIG. 5A, the surface of the roughened first electrode layer 15 is covered with a protective layer 40. The protective layer 40 includes a dry film 41 and a base film 43 that are bonded to each other. This dry film 41 may be the same as the dry film used in the first etching step S4. The base film 43 is generally supplied by being bonded to the dry film 41, and is a PET (Polyethylene Terephthalate) film or the like. The base film 43 can be easily peeled from the dry film 41. The dry film 41 is pressed against the surface of the first electrode layer 15, and the surface of the roughened first electrode layer 15 is covered with the protective layer 40.

  Next, the 2nd electrode layer 17 is peeled from the adhesion layer 33 in 1st peeling process S6. The laminated body 10 is placed together with the support 20 on a hot plate heated to about 150 ° C., and the adhesive layer 33 is heated. By heating, the adhesive strength of the adhesive layer 33 is reduced to almost zero. In this state, the laminated body 10 is peeled from the adhesive sheet 30 by vacuum tweezers.

  Next, in 2nd fixing process S7, as shown in FIG.5 (b), the adhesive layer 33 of the adhesive sheet 30 is adhere | attached on the protective layer 40, and thereby the laminated body 10 is attached to the support body 20, and the adhesive sheet 30 is attached. Fix through. In the same procedure as in the first fixing step S2, the adhesive layer 33 of the adhesive sheet 30 is adhered to the protective layer using a laminator, and then the adhesive layer 35 of the adhesive sheet 30 is adhered to the support 20.

  Thereby, the surface of the roughened first electrode layer 15 is covered with the protective layer 40, and the laminate 10 is adhered to the support 20 in a state where the protective layer 40 is adhered to the adhesive layer 33. Fix through layer 33. In this state, the surface of the first electrode layer 15 is in contact with the dry film 41 to be protected. The base film 43 is adhered to the adhesive layer 33.

  Next, the second electrode layer 17 is processed by performing the second roughening step S8 and the second etching step S9 (second electrode layer processing step). First, in the second roughening step S8, the surface of the second electrode layer 17 is roughened. As in the first roughening step S3, the roughening treatment can use a processing method such as etching, blackening reduction, or plating.

  Next, in the second etching step S9, the second electrode layer 17 is etched as shown in FIG. In the second etching step S9, the divided pattern 18 is etched together with the second electrode pattern 8. FIG. 6 is a plan view and a cross-sectional view of the stacked body 10 in a state where the second electrode pattern 8 and the divided pattern 18 are formed on the second electrode layer 17. The division pattern 18 is the same pattern as the division pattern 16 formed on the first electrode layer 15 and has a linear shape along four vertical and horizontal division lines L. The line width D2 of the divided pattern 18 is larger than the line width D1 of the divided pattern 16, and is about 350 μm.

  In the second electrode layer 17, the division pattern 18 is formed so as to overlap with the position of the division pattern 16 of the first electrode layer 15. Therefore, the patterning of the dry film is performed so that the divided pattern 18 overlaps the divided pattern 16 of the first electrode layer 15. By using the support 20 and the pressure-sensitive adhesive sheet 30 that transmit light, the divided pattern 16 of the first electrode layer 15 is allowed to pass through the support 20, and the divided pattern 16 is read from the support 20 side. The alignment of the mask for patterning is performed. In order to read the divided pattern 16, the divided pattern 16 itself may be read, or a marker for positioning formed on the electrode layer 15 may be read.

  Thereby, while being able to suppress the position shift of the division | segmentation pattern 16 and the division | segmentation pattern 18, the shift | offset | difference of the 2nd electrode pattern 8 with respect to the 1st electrode pattern 6 can be suppressed. Thereafter, Cu is patterned using a ferric chloride solution. Since the misalignment between the division pattern 16 and the division pattern 18 is suppressed, the portions on the division line L in the first and second electrode layers 15 and 17 can be surely removed, and the laminate 10 is made up of a plurality of electronic components E. Can be reliably divided. Further, since the line width D2 of the divided pattern 18 is larger than the line width D1 of the divided pattern 16, even when the divided pattern 18 is deviated by about several μm from the position of the divided pattern 16, the portion on the divided line L is surely removed. can do.

  In the second etching step S <b> 9, the second electrode layer 8 is etched in order to divide each electronic component E into the second electrode pattern 8 formed on the second electrode layer 17 for each electronic component E. Since the etching of the divided pattern 18 is performed at the same time, the efficiency of the manufacturing process can be improved.

  When the dividing pattern 18 is etched in the second electrode layer 17, the portion on the dividing line L in the dielectric layer 13 is damaged because the first electrode layer 15 has already been removed. The dielectric layer 13 penetrates along. In this way, the through hole 13 a along the division pattern 18 is formed in the dielectric layer 13. Therefore, the laminated body 10 has a through groove penetrating on the dividing line L.

  Next, in order to remove the dry film pressure-bonded to the second electrode layer 17, when the laminate 10 is immersed together with the support 20 in a stripping solution (for example, 3% by weight NaOH solution), the stripping solution is 10 to the dry film 41 that is pressure-bonded to the first electrode layer 15 from the through groove penetrating on the dividing line L. For this reason, in the dry film 41, the part along the division | segmentation pattern 18 is removed. As a result, also in the dry film 41, the part on the dividing line L is removed.

  In this state, as shown in FIG. 6B, the first electrode layer 15, the dielectric layer 13, the second electrode layer 17, and the dry film 41 are divided for each electronic component E. . That is, the laminated body 10 is already divided into individual electronic components E, and nine electronic components E are held together by the base film 43, the adhesive sheet 30, and the support body 20.

  Next, in the second peeling step S <b> 10, the adhered base film 43 is peeled from the pressure-sensitive adhesive layer 33. Similar to the first peeling step S <b> 6, the adhesive layer 33 is heated to reduce the adhesive force of the adhesive layer 33. When the adhesive strength of the adhesive layer 33 becomes almost zero, the adhesive layer 33 peels from the protective layer 40.

  In this state, as shown in FIG. 7A, the first electrode layer 15, the dielectric layer 13, the second electrode layer 17, and the dry film 41 are divided for each electronic component E. . That is, the laminate 10 is already divided into individual electronic components E, and nine electronic components E are connected by the base film 43.

  Next, in the protective layer removing step S <b> 11, the protective layer 40 is removed from the divided first electrode layer 15. First, the base film 43 is peeled from the dry film 41. The base film 43 can be easily peeled from the dry film 41. When the base film 43 is peeled from the dry film 41, the laminate 10 is already divided into the electronic components E. Therefore, as shown in FIG. 7B, the electronic components E with the dry film 41 are separated into pieces. The The dry film 41 is removed from the electronic component E by immersing the electronic component E with the dry film 41 in a dry film peeling solution (for example, 3 wt% NaOH solution).

  In the electronic component manufacturing method of the present embodiment described above, the surface of the roughened first electrode layer 15 is covered with the protective layer 40 in the second fixing step S7, and the protective layer 40 is covered. The laminate 10 is fixed to the support 20 through the adhesive layer 33 in a state where the adhesive layer 33 is adhered to the adhesive layer 33. That is, since the protective layer 40 covering the roughened first electrode layer 15 is adhered to the adhesive layer 33, it is possible to prevent the first electrode layer 15 and the adhesive layer 33 from being firmly adhered. . Therefore, even if the surface of the first electrode layer 15 is roughened, the protective layer 40 can be easily peeled from the adhesive layer 33 in the second peeling step S10.

  In the method for manufacturing an electronic component according to the present embodiment, the dry film 41 covers the roughened first electrode layer 15, and in the protective layer removing step S <b> 11, the dry film 41 is used by using a peeling solution of the dry film 41. Is removed from the first electrode layer 15, the dry film 41 can be easily removed from the first electrode layer 15 without applying a force to the laminate 10 including the first electrode layer 15. .

  In the electronic component manufacturing method of the present embodiment, a dry film 41 and a base film 43 bonded to each other are used as the protective layer 40. Since the base film 43 has lower adhesiveness to the adhesive layer 33 than the dry film 41, the laminate 10 can be more reliably peeled from the support 20. And when removing the protective layer 40, the base film 43 can be easily peeled from the dry film.

  Moreover, in the manufacturing method of the electronic component E of the present embodiment, a plurality of the stacked bodies 10 are provided for the first electrode layer 15 and the second electrode layer 17 in the first and second etching steps S4 and S9. Since the divided patterns 16 and 18 along the dividing line L for dividing the electronic component E are etched, a portion on the dividing line L in the first electrode layer 15 and the second electrode layer 17 can be removed. . Therefore, the first electrode layer 15 and the second electrode layer 17 can be divided for each electronic component E. In general, since the dielectric layer 13 can be easily divided, by dividing the first electrode layer 15 and the second electrode layer 17 for each electronic component E, the stacked body 10 can be divided into individual electrons. It can be easily divided into parts E. In addition, since the first and second electrode layers 15 and 17 are divided by etching, so-called burrs that occur when dicing is used at the time of division, that is, a state in which the metal extends to the division surface, are generated. Can be prevented.

  As a comparative example of the method for manufacturing an electronic component according to the present embodiment, the first electrode layer 15 roughened in the second fixing step S7 is directly applied to the adhesive layer 33 in the second fixing step S7 without performing the protection step S5. The laminate 10 was adhered to the adhesive sheet 30 by adhering. In this case, even when the pressure-sensitive adhesive sheet 30 was heated to 150 ° C. in the second peeling step S <b> 10, the pressure-sensitive adhesive layer 33 did not peel from the first electrode layer 15. On the other hand, in the manufacturing method of the electronic component according to the embodiment, the protective layer 40 covering the roughened first electrode layer 15 is adhered to the adhesive layer 33. Even if the surface is roughened, the first electrode layer 15 can be easily peeled off from the adhesive layer 33.

  The present invention is not limited to the above embodiment, and various modifications can be made. For example, in the above embodiment, the electronic component is a capacitor, but may be a varistor. In this case, a varistor layer that exhibits a varistor function may be used as a functional layer included in the electronic component.

  Further, for example, in the above embodiment, the adhesive layer 33 is made of a heat-releasable material whose adhesive strength is reduced by heat, but is not limited thereto. As the adhesive layer 33, an ultraviolet peelable layer whose adhesive force is reduced by ultraviolet rays may be used. In this case, in the first and second peeling steps S6 and S10, the adhesive layer 33 is reduced in adhesive force by irradiating the adhesive layer 33 with ultraviolet rays from the light-transmitting support 20 side. Also in this case, the first electrode layer 15 can be easily peeled from the adhesive layer 33, and the laminate 10 can be easily separated into a plurality of electronic components E.

  Further, for example, in the above embodiment, in order to divide the laminate 10 into a plurality of electronic components E, the divided patterns 16 and 18 are etched on the first and second electrode layers 15 and 17. However, the method for dividing the laminated body 10 into a plurality of electronic components E is not limited to this. The laminated body 10 may be divided into individual electronic components E by using dicing without etching the divided patterns 16 and 18. However, it is preferable to use etching rather than dicing that may generate burrs.

  For example, in the said embodiment, although the dry film 41 and the base film 43 which were bonded together as the protective layer 40 were used, it is not restricted to this. As the protective layer 40, a liquid photoresist may be used.

  For example, in the said embodiment, although 2nd surface roughening process S8 and 2nd etching process S9 were performed in the process process of a 2nd electrode layer, it is not restricted to this. In the processing step of the second electrode layer, only one of the second roughening step S8 and the second etching step S9 may be performed, or other processing is performed on the second electrode layer 17. May be.

It is the top view and sectional view of an electronic component concerning a 1st embodiment. It is a flowchart of the manufacturing method of the electronic component which concerns on 1st Embodiment. It is a figure which shows the manufacturing method of the electronic component which concerns on 1st Embodiment. It is a figure which shows the manufacturing method of the electronic component which concerns on 1st Embodiment. It is a figure which shows the manufacturing method of the electronic component which concerns on 1st Embodiment. It is a figure which shows the manufacturing method of the electronic component which concerns on 1st Embodiment. It is a figure which shows the manufacturing method of the electronic component which concerns on 1st Embodiment.

Explanation of symbols

  E ... Electronic component, 3 ... Dielectric layer, 6 ... First electrode pattern, 8 ... Second electrode pattern, 10 ... Laminate, 13 ... Dielectric layer, 15 ... First electrode layer, 16, 18 ... Dividing pattern, 17 ... second electrode layer, 20 ... support, 33 ... adhesive layer, 40 ... protective layer, 41 ... dry film, 43 ... base film, L ... dividing line.

Claims (10)

Forming a laminate having a functional layer and a first electrode layer and a second electrode layer facing each other with the functional layer interposed therebetween;
A roughening step of roughening the surface of the first electrode layer;
The surface of the first electrode layer that has been roughened is covered with a protective layer, and the protective layer is adhered to the adhesive layer, thereby fixing the laminate to the support via the adhesive layer. A fixing process;
A second electrode layer processing step for processing the second electrode layer;
A peeling step of peeling the adhesive layer from the protective layer;
A removing step of removing the protective layer from the first electrode layer;
An electronic component manufacturing method comprising: The protective layer includes a dry film,
In the fixing step, the surface of the first electrode layer that has been roughened is brought into contact with the dry film, and the surface of the first electrode layer is covered with the protective layer, and the adhesive layer Fixing the laminate with a support through layers,
2. The method of manufacturing an electronic component according to claim 1, wherein, in the removing step, the dry film is removed from the first electrode layer using a peeling solution of the dry film. The protective layer has a base film bonded to the dry film,
In the fixing step, in a state where the base film is adhered to the adhesive layer, the laminate is fixed to a support,
The said removal process WHEREIN: After peeling the said base film from the said dry film, the said dry film is removed from the said 1st electrode layer using the peeling liquid of the said dry film, The said 1st electrode layer is removed. Manufacturing method of electronic components.   4. The method of manufacturing an electronic component according to claim 1, wherein in the processing step of the second electrode layer, etching is performed on the second electrode layer. 5.   5. The electronic component according to claim 1, further comprising an etching step of a first electrode layer that performs etching on the first electrode layer before the fixing step. 6. Production method. The etching process of the first electrode layer is performed by etching a dividing pattern along a dividing line for dividing the stacked body into a plurality of electronic components,
In the processing step of the second electrode layer, the division pattern is etched on the second electrode layer so as to overlap the division pattern formed on the first electrode layer. The manufacturing method of the electronic component of Claim 5.   The etching process for the first electrode layer is characterized in that the first electrode layer formed for each electronic component is etched on the first electrode layer together with the etching of the divided pattern. 6. A method for producing an electronic component according to 6.   The etching process of the second electrode layer is performed on the second electrode layer by etching the second electrode pattern formed for each of the electronic components together with the etching of the division pattern. 8. A method for producing an electronic component according to 6 or 7. The support and the adhesive layer are formed of a light transmissive material,
In the second electrode layer processing step, the divided pattern etched in the first electrode layer in the first electrode layer etching step is watermarked in the support, and the etching of the divided pattern is performed in the first electrode layer. 9. The method of manufacturing an electronic component according to claim 6, wherein the method is performed on the second electrode layer so as to overlap a division pattern formed on one electrode layer. 10.   The method for manufacturing an electronic component according to claim 1, wherein the functional layer is a dielectric layer, and the electronic component is a thin film capacitor.