JP4859174B2 - Probe card - Google Patents

Description

  The present invention relates to a probe card for inspecting electrical characteristics by mechanically contacting a probe to a pad of an LSI chip in a semiconductor wafer state.

  Conventionally, an apparatus called a probe card has been used to inspect the electrical characteristics of a chip device on a semiconductor wafer. As the number of chips on the wafer increases, it has been attempted to complete the inspection in a short time by inspecting a large number of chips simultaneously. When inspecting a plurality of chips simultaneously, a method of inspecting adjacent chips as a group and a method of inspecting chips separated by a predetermined relationship as a group have been considered. In the case of the former method, a group of chips arranged in 1 × N or n × m is to be inspected, and a test area arranged in 1 × N or n × m corresponding to each chip is set on the probe card side, The probe card and the object to be inspected are relatively repeatedly moved relative to each other at a constant cycle, and there is an advantage that the inspection can proceed efficiently. As this example, a 2 × 2 four-probe probe card is disclosed as a prior art (Reference 1). However, a large number of probes that are lowered to adjacent chips have a two-layer structure, and there is a problem of preventing the probes from crossing and contacting each other, which corresponds to an increase in the number of probes due to higher integration of chips. A state that cannot be exhausted occurs.

On the other hand, the latter method has the advantage that the arrangement of the probe can be simplified compared to the former method, but the relative movement between the probe card and the inspection object becomes complicated and the number of movements increases. Therefore, it has been considered that the efficiency is lower than that of the former method. However, along with the high integration of chips on a wafer, a probe card prior art that enables simultaneous measurement of many chips in order to increase the inspection capability has been disclosed (Reference 2). The prior art of Document 2 is a multi-chip probe card that can simultaneously measure as many chip regions as possible while reducing local congestion of probes (probes). Only diagonally adjacent chip areas are measured simultaneously, and inspection of chip areas adjacent in the X-axis direction and Y-axis direction is postponed. That is, the openings which are test areas are provided in a staggered pattern.
Japanese Patent Laying-Open No. 2004-156976 ([0054 to 0058], FIGS. 10 and 11) JP 2001-291750 A ([0011], [0013], FIG. 1)

  In the above-described probe card, since only a single chip area is provided, the probe provided in each opening is close to the probe in the obliquely adjacent opening. As the degree of integration increases, physical interference occurs between the entire length of the probe and the fixed portion (needle) of the probe. In particular, when the probe is a cantilever type probe, the shape and length of the entire probe affects the scrub operation in overdrive. In addition, in order to increase the reliability of the electrical inspection result, there is a problem that consideration must be given to the uniform length of the entire probe. Further, in order to simultaneously cope with a plurality of chip areas, the entire probe card is enlarged, and there is a problem of how to support a probe card unit corresponding to each of the plurality of chip areas.

The present invention has been made in order to solve these problems in view of the above circumstances, and in a probe card for inspecting the electrical characteristics of chips densely integrated on a semiconductor wafer, the present invention has a uniform shape. Adopting a cantilever type probe and completely separating the openings for simultaneously testing a plurality of chips, and the probes provided in the openings interfere with each other physically and electrically. The probe card is made as compact as possible as a whole.

In order to achieve the above object, the invention of the probe card according to claim 1 is a probe card that performs electrical measurement while facing a plurality of chip regions on a semiconductor wafer, and includes an opening corresponding to the chip region, A first probe card unit having a plurality of cantilever probes extending inward from the peripheral edge of the opening and extending outward in the X-axis direction and the Y-axis direction from the peripheral edge; N in the X-axis direction and Y-axis direction from the opening (N is a positive integer, the formula N ≧ 2L / C (L: maximum length in the cantilever probe group, C: X and Y in the tip region) A second probe card provided so that the opening is located at a position provided apart from the dimension corresponding to the chip area of the integer value obtained by (length in the axial direction), except N = 1) Unit , Characterized in that the said first probe card unit and the second probe card unit, with a support member for supporting the member extending diagonally diagonally between the two units.

  By adopting this configuration, the needle shape of the cantilever probe and the overall length of the needle are substantially the same, so the overdrive scrubbing operation during measurement can be made uniform and stable. In addition to this, it leads to high reliability of the electrical measurement result for the chip region at a plurality of openings. Furthermore, since the support member for fixing and supporting the probe card unit at a fixed position is provided, it leads to high reliability of the electrical measurement result for the chip region at the plurality of openings (claim 1). In addition, among the plurality of openings, with respect to the openings adjacent to each other on the X axis and the Y axis, the needles and needle bases of the plurality of cantilever type probes on the peripheral edge of the opening overlap or come into contact with each other. Physical interference is eliminated (claim 2). Further, since the approach between the needle and the needle base can be avoided as much as possible, interference of electrical signals, particularly high-frequency signals, can be avoided.

The invention of the probe card according to claim 2 is a probe card that performs electrical measurement while facing a plurality of chip regions on a semiconductor wafer, and includes an opening corresponding to the chip region and an inner periphery from the periphery of the opening. A first probe card unit having a plurality of cantilever probes extending in the X-axis direction and the Y-axis direction from the peripheral edge, and diagonally diagonally from the opening of the first probe card unit. (M is a positive integer, and the formula M ≧ √2L / C (L: maximum length in cantilever type probe group, C: length of tip region in X and Y axis directions), The first probe card unit, the second probe card unit provided so that the opening is located at a position provided apart from the dimension corresponding to the chip area of M) (excluding M = 1), 2 of the probe card unit, characterized by comprising a supporting member for supporting the member extending diagonally diagonally between the two units.

  By adopting this configuration, the needle shape of the cantilever probe and the overall length of the needle are substantially the same, so the overdrive scrubbing operation during measurement can be made uniform and stable. In addition to this, it leads to high reliability of the electrical measurement result for the chip region at a plurality of openings. Further, since the support member for fixing and supporting the probe card unit at a fixed position is provided, it leads to high reliability of the electrical measurement result for the chip region at the plurality of openings (claim 3). In addition, regarding the openings adjacent to each other on the diagonal line among the plurality of openings, physical and needles of a plurality of cantilever type probes at the peripheral edge of the opening overlap or come into contact with each other. Interference is eliminated (claim 4). Further, since the approach between the needle and the needle base can be avoided as much as possible, interference of electrical signals, particularly high-frequency signals, can be avoided.

  According to the probe card having the configuration according to the first to fourth aspects of the present invention, it is possible to measure a large number of chips on the wafer simultaneously (hereinafter referred to as the same measurement), and also the X-axis or Y-axis, or the diagonal With respect to the direction of the diagonal axis, since a plurality of openings in which the cantilever type probe for measuring the tip region is arranged at the peripheral portion can be disposed by skipping N number of tip regions, the cantilever type probes can be There is little physical interference, and there is no interference in the transmission and reception of electrical signals. In addition, since the cantilever type probe with the shortest needle length and approximately the same size can be used, the overdrive scrubbing action is stabilized in the measurement of the electrical characteristics of the wafer, thereby increasing the reliability of the inspection accuracy. be able to. In addition, since a large number of chip areas can be inspected simultaneously, it is possible to improve the wafer inspection processing capability corresponding to the high integration of wafer chips. Further, since cantilever type probes having substantially the same size can be adopted, the manufacture of the probe card is easy, the product quality can be easily maintained, and the reliability can be improved.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a schematic plan view of a probe card according to an embodiment of the present invention, in which nine chips are skipped in the X-axis and Y-axis directions so that four chips can be measured simultaneously. FIG. 2 is a schematic plan view of a probe card according to an embodiment of the present invention, in which three chips are slanted diagonally and four chips can be measured simultaneously. FIG. 3 is an explanatory view of a schematic arrangement of adjacent cantilever type probes and tip regions in the X-axis direction in the probe card according to the embodiment of the present invention, where a is a plan view and b is a It is a side view of an AA arrow. FIG. 4 is a schematic plan view of support members of four probe card units in the X-axis and Y-axis directions, and b is a side view of a in the probe card according to the embodiment of the present invention. Further, c is a schematic plan view of the support members of two probe card units in the diagonal direction, and d is a side view of c.

With reference to FIG. 1, a probe card 1 that enables four chips 10 according to an embodiment of the present invention to be measured simultaneously (simultaneous measurement) will be described. The probe card 1 has N chips in the X-axis and Y-axis directions. Substrate 9 so that the four probe card units 1-1, 1-2, 1-3, and 1-4, which are separated by 9 chips (10 _X , 10 _Y ) in this figure, are positioned at the apexes of the rectangle. The configuration arranged above is taken. Each probe card unit 1-1, 1-2, 1-3, 1-4 has a plurality of cantilever type probes 2 that perform electrical measurement in contact with electrodes (not shown) of the chip 10 to be measured. 3, the cantilever type probe 2 has a structure in which the cantilever type probe 2 is fixed by the needle base part 5 and supported by the intermediate support part 4.

  Referring to FIG. 3, a partial plan layout of adjacent probe card units 1-1 and 1-2 in the X-axis direction and a side view taken along the line AA will be described. The cantilever type probe 2 has a tip portion. Are bent at an angle of about 97 degrees or more, and the others are linear, and are supported by the intermediate support section 4 with a tilt angle α of about 7 degrees from the substrate 9 with the needle base section 5 as a fixed point. When viewed in a plan view, the plurality of cantilever type probes 2 are arranged in parallel from the distal end portion to the intermediate support portion 4, and bent from the intermediate support portion 4 to the needle base portion 5, respectively. The distance between the needle bases is increased to facilitate wiring between the probe and the board terminal.

The total length L of the cantilever type probe 2 (the length in the X-axis direction from the tip to the needle base) is determined by the inclination angle α and the depth d to the tip 10 to be measured, and L = d / tan α. Therefore, when a plurality of chip regions 10 and 10 _X to be measured are arranged in the X-axis direction, if there are N chip regions 10 _X (a positive integer) between the two chips 10 to be measured, a cantilever type pro When the maximum length in the group 2 is L and the length of the chip region _{10X in} the X-axis direction is C, N ≧ 2L / C. In addition, the Y-axis direction is represented by N ≧ 2L / C as in the X-axis direction.

When calculating with specific numerical values, for example, when C = 6.3 mm, d = 8.0 mm, and α = 7 °, L = 8 / tan7 = 65 mm. When the maximum value of the length of the cantilever type probe 2 is 65 mm, N ≧ 2L / C = 2 × 65 / 6.3 = 20.6, which is 21 in the X-axis direction from the measured chip 10. the skip chip area 10 _X, i.e. across at, the next measured chip 10 is disposed. In order to reduce the number of flying tip regions 10 _X , it is required to reduce the overall length of the cantilever type probe 2, and the substrate 9 extends from the intermediate support part 4 to the needle base part 5 of the cantilever type probe 2. The total length of the cantilever type probe 2 is shortened by bending it to the side, and a L = 26 mm type is adopted. In this case, N ≧ 2L / C = 2 × 26 / 6.3 = 8.25, N is 9, and the number of chip regions between the chips 10 to be measured is 9. Therefore, nine chip regions _10X are skipped from the measured chip region 10 in the X-axis direction, and the next measured chip region 10 is disposed. The same applies to the Y-axis direction, and nine chip regions _10Y are skipped from the measured chip region 10 in the Y-axis direction, and the next measured chip region 10 is disposed. Therefore, the probe card 1 of FIG. 1 has four probe card units 1-1, 1-2, 1-3, and 1-4, which are separated by 9 chips (10 _X , 10 _Y ) in the X-axis and Y-axis directions. Represents a state of being arranged on the substrate 9 so as to be positioned at the apex of the rectangle.

FIG. 2 shows a probe card 1 in which measured chip regions 10 are arranged diagonally diagonally, and the probe card 1 is skipped by M chips (in this figure, 3 chips 10 _XY ) diagonally diagonally. The four probe card units 1-1, 1-2, 1-3, 1-4 are arranged on the substrate 9 so as to be positioned on a diagonal line. Each probe card unit 1-1, 1-2, 1-3, 1-4 has a plurality of cantilever type probes 2 that perform electrical measurement in contact with electrodes (not shown) of the chip 10 to be measured. 3, the cantilever type probe 2 has a structure in which the cantilever type probe 2 is fixed by the needle base part 5 and supported by the intermediate support part 4.

The probe card units 1-1 and 1-2 that are obliquely adjacent to each other are arranged in contact with each other diagonally. A region related by the total length L of the cantilever type probe 2 in a plan view of each probe card unit can be roughly represented as a region having a substantially radius L from the peripheral edge of the chip 10 to be measured. Thus, when arranging a plurality of chip regions 10 _XY obliquely diagonally in between the measured chip 10, the schematically the diagonal of the square approximately 2L diagonal length of the side C chip region 10 _XY is a number It can be arranged. Therefore, as shown in FIG. 2, if the square is a square and the diagonal is 2L, the length of one side is √2L. In the case where a plurality of chip areas 10 and _XY to be measured are arranged in a diagonal direction, if there are M chip areas 10 _XY (a positive integer) between two chips 10 to be measured, a cantilever probe is used. the maximum length in the second group is L, if the length of the X-axis direction of the chip area 10 _XY as C, is represented by M ≧ √2L / C.

Specifically, when calculating with a numerical value, when the maximum length of the cantilever type probe 2 is 65 mm, M ≧ √2L / C = 1.4 × 65 / 6.3 = 14.4. Thus, the next chip 10 to be measured is arranged by skipping 15 chip regions _10XY in the diagonal direction from the chip 10 to be measured, that is, straddling the chip area _10XY . Also. Applying the actual cantilever type probe 2 with an overall length L = 26 mm, M ≧ √2L / C = 1.4 × 26 / 6.3 = 5.7, and M is 6. Thus, the number of chip areas between the chips 10 to be measured is six. Therefore, six chip regions _10XY are skipped diagonally from the measured chip region 10 and the next measured chip region 10 is disposed. In the case of FIG. 2, the needle base portion 5 of the cantilever type probe 2 is arranged so that the needle base portion 5 of the cantilever type probe 2 does not physically interfere with the adjacent probe card units. As a result of the improvement, a skipping chip region 10 _XY with M = 3 is achieved.

  FIG. 4 shows a support member 11 for fixing and supporting each probe card unit integrally at a fixed position in the probe card 1 of the present invention, and FIG. 4a is 4 in the X-axis and Y-axis directions. FIG. 4C is a schematic plan view of the support member 11 of each of the probe card units 1-1, 1-2, 1-3, and 1-4, and FIG. 4c shows two probe card units 1-1 in an oblique diagonal direction. , 1-2 is a schematic plan view of the support member 11. The support member 11 is formed by laminating a plurality of thin metal plates 12, and the laminated plate has a shape extending in all directions or a shape extending diagonally diagonally. Further, each tip 13 extending in all directions or extending diagonally diagonally of the support member 11 is configured to support the probe card unit and has an opening 15 corresponding to the opening 3 of the probe card unit. Further, a reinforcing plate 14 is provided to prevent deformation of the supported probe card unit.

  The use of the probe card 1 according to the embodiment of the present invention will be described briefly. In the probe card 1 of FIG. 1, four probe card units 1-1 and 1-2 among a plurality of chip regions on a semiconductor wafer. , 1-3, 1-4 with respect to the chip 10 to be measured, the electrode portion of the chip region where the tip portions of the plurality of cantilever type probes 2 extending from the opening 3 of each probe card unit face each other. The electrical characteristics are inspected by touching with scrubbing. After the inspection is completed, the probe card 1 and the wafer are relatively moved by one chip in the X-axis or Y-axis direction, and electrical measurement is again performed on the four chip regions. In this way, after sequentially measuring N skip chip areas (9 chip areas in FIG. 1), the N skip chip areas are moved in the X-axis or Y-axis direction at a time, thereby again. The measurement is repeated, and finally all the chips on the wafer are scanned to complete the inspection of the electrical characteristics.

  In the case of the probe card 1 of FIG. 2, only the difference from the case of the probe card 1 of FIG. 1 described above will be explained. Of the plurality of chip regions on the semiconductor wafer, four probe card units 1- After inspecting the electrical characteristics of the chip 10 to be measured facing 1, 1-2, 1-3, and 1-4, the probe card 1 and the wafer are relatively moved diagonally by one chip. Then, electrical measurement of the four chip areas is performed again. In this way, after measuring N skipped chip regions (3 chip regions in FIG. 2) by sequentially moving, the N skipped chip regions in the diagonal direction or the direction perpendicular to the diagonal axis at a time. By moving, the measurement is repeated again, and finally all the chips on the wafer are scanned to complete the inspection of the electrical characteristics.

  It can be used as a probe card for inspecting electrical characteristics of highly integrated IC chips in a semiconductor wafer.

FIG. 5 is a schematic plan view of a probe card according to an embodiment of the present invention, in which nine chips are skipped in the X-axis and Y-axis directions and four chips can be measured simultaneously. FIG. 4 is a schematic plan view of a probe card according to an embodiment of the present invention, in which three chips are skipped diagonally diagonally and four chips can be measured simultaneously. In the probe card which is embodiment of this invention, it is explanatory drawing of typical arrangement | positioning with the cantilever type | mold probe and chip | tip area | region adjacent to an X-axis direction, Comprising: a is a top view, b is AA of a. It is a side view of an arrow view. In the probe card according to the embodiment of the present invention, a is a schematic plan view of support members of four probe card units in the X-axis and Y-axis directions, and b is a side view of a. Further, c is a schematic plan view of the support members of two probe card units in the diagonal direction, and d is a side view of c.

Explanation of symbols

1: Probe card 1-1, 2, 3, 4: Probe card unit 2: Cantilever type probe 3: Opening part 4: Intermediate support part 5: Probe needle base part 9: Substrate 10: Chip to be measured 10 _X : X direction tip region 10 _Y : Y direction tip region 10 _{X, Y} : Diagonal direction tip region 11: Support member 12: Thin plate 13: Tip portion 14: Reinforcement plate 15: Opening portion L: Probe full length C: Tip region Length α: Angle of inclination d: Depth

Claims (2)

A probe card that performs electrical measurement while facing a plurality of chip regions on a semiconductor wafer, and includes an opening corresponding to the chip region, an inner portion extending from a peripheral portion of the opening portion, and an X-axis direction extending from the peripheral portion , A first probe card unit having a plurality of cantilever-type probes extending outward in the Y-axis direction, N pieces in the X-axis direction and the Y-axis direction from the opening of the first probe card unit (N is a positive number) And an integer value obtained by the formula N ≧ 2L / C (L: maximum length in cantilever type probe group, C: length of tip region in X and Y axis directions), except for N = 1) The second probe card unit, the first probe card unit and the second probe card provided so that the opening is located at a position provided apart from the dimension corresponding to the chip area Probe card characterized by comprising a support member for supporting the knitting, by a member extending obliquely diagonally between the two units. A probe card that performs electrical measurement while facing a plurality of chip regions on a semiconductor wafer, and includes an opening corresponding to the chip region, an inner portion extending from a peripheral portion of the opening portion, and an X-axis direction extending from the peripheral portion , A first probe card unit having a plurality of cantilever probes extending outward in the Y-axis direction, M diagonally diagonally from the opening of the first probe card unit (M is a positive integer, In the chip region of M ≧ √2 L / C (L: maximum length in cantilever type probe group, C: length of tip region in X and Y axis directions), except M = 1) corresponding second probe card unit provided so as to be positioned openings at positions disposed away dimension of, said first probe card unit and said second probe card unit, Probe card characterized by comprising a support member for supporting the member extending obliquely diagonal direction between the units.

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