JP4849733B2 - Manufacturing method of active matrix type liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a liquid crystal display device wherein liquid crystal molecules are brought into a mono-stable state by applying a DC voltage in an active matrix type liquid crystal display device. SOLUTION: (1) A liquid crystal is made to respond, and is brought into a mono-stable state by holding a voltage level with holding capacitance. The liquid crystal may be mono-stabilized while holding a gate clock pulse 114 at a constant level. (2) A transparent conductive film is formed on an element substrate, and thereafter elements such as TFTs are formed. A DC voltage is applied using an electrode formed on a counter substrate and the transparent conductive film. (3) A DC voltage is applied using the electrode formed on the counter substrate and the transparent conductive film formed on the rear surface of the element substrate.

Description

【０１２１】
数１において、Ｖは電源の直流電圧値、Ｖ_LCは液晶材料に印加する電圧、ε_rLCは強誘電性液晶の比誘電率、ｄ_LCはセルギャップ、ε_rsは素子基板の比誘電率、ｄ_sは素子基板の厚さを示す。
【０１２２】
セルギャップ２．０μｍ、素子基板のガラスの比誘電率が３．０、液晶層に印加する電圧を５Ｖとする。液晶材料のうち、強誘電性液晶の比誘電率が１０〜３０、素子基板のガラス厚が３００〜１１００μｍとすると、電源の直流電圧の値は２．５〜２７．５ｋＶとなる。電源の直流電圧のうち、ほとんどがガラスに印加される。
【０１２３】
液晶表示装置を薄型にするために、素子基板のガラスをエッチングし、ガラスの厚さを薄くすると、印加する直流電圧値を小さくできる。
【０１２４】
直流電圧を印加しながら、基板全面に対し垂直方向から紫外線を照射すると、強誘電性液晶の単安定化が行われる。
【０１２５】
強誘電性液晶の単安定化終了後に導電性のシート３００を素子基板の基板４００の裏面から剥脱する。
【０１２６】
導電性のシート３００を用いるだけでなく、素子基板の基板４００の裏面に透明導電膜を形成することも可能である。反射型の液晶表示装置ならば、素子基板の裏面に反射機能を有する金属電極を形成しても良い。
【０１２７】
以上の方法で、所望の直流電圧を、所望の領域に印加することが可能である。
素子基板の熱工程の温度に関わらず、本発明を適用できる。
【０１２８】
図１１のように、ポリシリコンをスイッチング素子の半導体層に用いたアクティブマトリクス型の液晶表示装置では、ポリシリコンの移動度の高さから、駆動回路部５０６と画素部５０７とを同一基板上に形成することができる。
【０１２９】
このような液晶表示装置では、対向基板の基板５０８に透明導電膜５１０を形成するさいに、駆動回路部に寄生容量がつかないように、駆動回路部の上方にある透明導電膜５１０はエッチングにより除去すると良い。
【０１３０】
また高分子安定化をする際に導電性のシート３００は素子基板の基板４００の裏面に、駆動回路部をさけて形成しても良い。
【０１３１】
本実施形態によれば、単一極性の電圧を液晶層に印加する電極は、一方が対向基板の透明導電膜５１０であり、他方が素子基板の裏面に設けられた導電性のシート３００であるため、素子を形成する工程の温度に関わらず、液晶層を単安定化するための電極を設けることができる。
【０１３２】
【参考例】
［参考例１］（反射型の液晶表示装置に用いる素子基板の作製工程の一例）
本発明の参考例を図１５〜図１７と図８を用いて説明する。図１７の断面図の鎖線Ｂ−Ｂ’は図８を鎖線ＢＢ’で切断したものに対応する。ここでは、画素部の画素ＴＦＴおよび保持容量と、表示領域の周辺に設けられる駆動回路のＴＦＴを同時に作製する方法について工程に従って詳細に説明する。
【０１３３】
本参考例では、画素部のスイッチング素子である画素ＴＦＴと、画素部の周辺に設けられる駆動回路（信号線駆動回路、走査線駆動回路等）のＴＦＴを同一基板上に作製する方法について工程に従って説明する。但し、説明を簡単にするために、駆動回路部にはその基本構成回路であるＣＭＯＳ回路を、画素部の画素ＴＦＴにはｎチャネル型ＴＦＴとを、ある経路に沿った断面により図示することにする。
【０１３４】
まず、図１５（Ａ）に示すように、コーニング社の＃７０５９ガラスや＃１７３７ガラスなどに代表されるバリウムホウケイ酸ガラス、またはアルミノホウケイ酸ガラスなどのガラスから成る基板４００上に酸化シリコン膜、窒化シリコン膜または酸化窒化シリコン膜などの絶縁膜から成る下地膜４０１を形成する。例えば、プラズマＣＶＤ法でＳｉＨ_４、ＮＨ_３、Ｎ_２Ｏから作製される酸化窒化シリコン膜４０１ａを１０〜２００ｎｍ（好ましくは５０〜１００ｎｍ）形成し、同様にＳｉＨ_４、Ｎ_２Ｏから作製される酸化窒化水素化シリコン膜４０１ｂを５０〜２００ｎｍ（好ましくは１００〜１５０ｎｍ）の厚さに積層形成する。本参考例では下地膜４０１を２層構造として示したが、前記絶縁膜の単層膜または２層以上積層させた構造として形成しても良い。
【０１３５】
島状半導体層４０２〜４０５は、非晶質構造を有する半導体層をレーザー結晶化法や公知の熱結晶化法を用いて作製した結晶質半導体層で形成する。この島状半導体層４０２〜４０５の厚さは２５〜８０ｎｍ（好ましくは３０〜６０ｎｍ）の厚さで形成する。結晶質半導体層の材料に限定はないが、好ましくはシリコンまたはシリコンゲルマニウム（ＳｉＧｅ）合金などで形成すると良い。
【０１３６】
レーザー結晶化法で結晶質半導体膜を作製するには、パルス発振型または連続発光型のエキシマレーザーやＹＡＧレーザー、ＹＶＯ₄レーザーを用いる。これらのレーザーを用いる場合には、レーザー発振器から放射されたレーザー光を光学系で線状に集光し半導体膜に照射する方法を用いると良い。結晶化の条件は実施者が適宣選択するものであるが、エキシマレーザーを用いる場合はパルス発振周波数３０Ｈｚとし、レーザーエネルギー密度を１００〜４００mJ/cm²(代表的には２００〜３００mJ/cm²)とする。また、ＹＡＧレーザーを用いる場合にはその第２高調波を用いパルス発振周波数１〜１０ｋＨｚとし、レーザーエネルギー密度を３００〜６００mJ/cm²(代表的には３５０〜５００mJ/cm²)とすると良い。そして幅１００〜１０００μｍ、例えば４００μｍで線状に集光したレーザー光を基板全面に渡って照射し、この時の線状レーザー光の重ね合わせ率（オーバーラップ率）を８０〜９８％として行う。
【０１３７】
次いで、島状半導体層４０２〜４０５を覆うゲート絶縁膜４０７を形成する。ゲート絶縁膜４０７はプラズマＣＶＤ法またはスパッタ法を用い、厚さを４０〜１５０ｎｍとしてシリコンを含む絶縁膜で形成する。本参考例では、１２０ｎｍの厚さの酸化窒化シリコン膜で形成する。勿論、ゲート絶縁膜はこのような酸化窒化シリコン膜に限定されるものでなく、他のシリコンを含む絶縁膜を単層または積層構造として用いても良い。例えば、酸化シリコン膜を用いる場合には、プラズマＣＶＤ法でＴＥＯＳ（Ｔｅｔｒａｅｔｈｙｌ Ｏｒｔｈｏｓｉｌｉｃａｔｅ）とＯ_２とを混合し、反応圧力４０Ｐａ、基板温度３００〜４００℃とし、高周波（１３．５６ＭＨｚ）電力密度０．５〜０．８Ｗ／ｃｍ^２で放電させて形成することができる。このようにして作製される酸化シリコン膜は、その後４００〜５００℃の熱アニールによりゲート絶縁膜として良好な特性を得ることができる。
【０１３８】
そして、ゲート絶縁膜４０７上にゲート電極を形成するための第１の導電膜４０８と第２の導電膜４０９とを形成する。本参考例では、第１の導電膜４０８をＴａＮで５０〜１００ｎｍの厚さに形成し、第２の導電膜４０９をＷで１００〜３００ｎｍの厚さに形成する。
【０１３９】
Ｗ膜を形成する場合には、Ｗをターゲットとしたスパッタ法で形成する。その他に６フッ化タングステン（ＷＦ₆）を用いる熱ＣＶＤ法で形成することもできる。いずれにしてもゲート電極として使用するためには低抵抗化を図る必要があり、Ｗ膜の抵抗率は２０μΩｃｍ以下にすることが望ましい。Ｗ膜は結晶粒を大きくすることで低抵抗率化を図ることができるが、Ｗ中に酸素などの不純物元素が多い場合には結晶化が阻害され高抵抗化する。このことより、スパッタ法による場合、純度９９．９９９９％のＷターゲットを用い、さらに成膜時に気相中からの不純物の混入がないように十分配慮してＷ膜を形成することにより、抵抗率９〜２０μΩｃｍを実現することができる。
【０１４０】
なお、本参考例では、第１の導電膜４０８をＴａＮ、第２の導電膜４０９をＷとしたが、いずれもＴａ、Ｗ、Ｔｉ、Ｍｏ、Ａｌ、Ｃｕから選ばれた元素、または前記元素を主成分とする合金材料若しくは化合物材料で形成してもよい。また、リン等の不純物元素をドーピングした多結晶シリコン膜に代表される半導体膜を用いてもよい。本参考例以外の組み合わせとしては、第１の導電膜をタンタル（Ｔａ）で形成し、第２の導電膜をＷとする組み合わせ、第１の導電膜を窒化タンタル（ＴａＮ）で形成し、第２の導電膜をＡｌとする組み合わせ、第１の導電膜を窒化タンタル（ＴａＮ）で形成し、第２の導電膜をＣｕとする組み合わせなどがある。
【０１４１】
次に、レジストによるマスク４１０〜４１５、レジスト４１７を形成し、電極及び配線を形成するための第１のエッチング処理を行う。本参考例ではＩＣＰ（Ｉｎｄｕｃｔｉｖｅｌｙ Ｃｏｕｐｌｅｄ Ｐｌａｓｍａ：誘導結合型プラズマ）エッチング法を用い、エッチング用ガスを混合し、１Ｐａの圧力でコイル型の電極に５００ＷのＲＦ（１３．５６ＭＨｚ）電力を投入してプラズマを生成して行う。基板側（試料ステージ）にも１００ＷのＲＦ（１３．５６ＭＨｚ）電力を投入し、実質的に負の自己バイアス電圧を印加する。エッチングガスを適宜選択することによりＷ膜及びＴａＮ膜とも同程度にエッチングされる。
【０１４２】
上記エッチング条件では、レジストによるマスクの形状を適したものとすることにより、基板側に印加するバイアス電圧の効果により第１の導電層及び第２の導電層の端部がテーパー部の角度が１５〜４５°のテーパー形状となる。ゲート絶縁膜上に残渣を残すことなくエッチングするためには、１０〜２０％程度の割合でエッチング時間を増加させると良い。Ｗ膜に対する酸化窒化シリコン膜の選択比は２〜４（代表的には３）であるので、オーバーエッチング処理により、酸化窒化シリコン膜が露出した面は２０〜５０nm程度エッチングされることになる。こうして、第１のエッチング処理により第１の導電層と第２の導電層から成る第１の形状の導電層４１９〜４２５（第１の導電層４１９ａ〜４２５ａと第２の導電層４１９ｂ〜４２５ｂ）を形成する。４１８はゲート絶縁膜であり、第１の形状の導電層４１９〜４２５で覆われない領域は２０〜５０nm程度エッチングされ薄くなった領域が形成される。
【０１４３】
そして、第１のドーピング処理を行い、ｎ型を付与する不純物元素を添加する。（図１５（Ｂ））ドーピングの方法はイオンドープ法若しくはイオン注入法で行えば良い。イオンドープ法の条件はドーズ量を１×１０¹³〜５×１０¹⁴atoms/cm²とし、加速電圧を６０〜１００ｋｅＶとして行う。ｎ型を付与する不純物元素として１５族に属する元素、典型的にはリン（Ｐ）または砒素（Ａｓ）を用いるが、ここではリン（Ｐ）を用いる。この場合、導電層４１９〜４２３がｎ型を付与する不純物元素に対するマスクとなり、自己整合的に第１の不純物領域４２７〜４３０が形成される。第１の不純物領域４２７〜４３０には１×１０²⁰〜１×１０²¹atomic/cm³の濃度範囲でｎ型を付与する不純物元素を添加する。
【０１４４】
次に、図１５（Ｃ）に示すように第２のエッチング処理を行う。ＩＣＰエッチング法を用い、反応性ガスをチャンバーに導入して、コイル型の電極に所定のＲＦ電力(13.56MHz)を供給し、プラズマを生成して行う。基板側（試料ステージ）には低めのＲＦ（13.56MHz）電力を投入し、第１のエッチング処理に比べ低い自己バイアス電圧を印加する。Ｗ膜を異方性エッチングして第二の形状の導電層４９４〜４９９を得る。
【０１４５】
さらに、図１５（Ｃ）に示すように第２のドーピング処理を行う。この場合、第１のドーピング処理よりもドーズ量を下げて高い加速電圧の条件としてｎ型を付与する不純物元素をドーピングする。例えば、加速電圧を７０〜１２０ｋｅＶとし、１×１０¹³/cm²のドーズ量で行い、図１５（Ｂ）で島状半導体層に形成された第１の不純物領域の内側に新たな不純物領域を形成する。ドーピングは、第２の形状の導電層４９４〜４９８を不純物元素に対するマスクとして用い、第１の導電層４９４ａ〜４９８ａの下側の領域にも不純物元素が添加されるようにドーピングする。こうして、第１の導電層４９４ａ〜４９８ａと重なる第２の不純物領域６０８〜６１２を形成する。ｎ型を付与する不純物元素は、第２の不純物領域で１×１０¹⁷〜１×１０¹⁸ atoms/cm³の濃度となるようにする。
【０１４６】
図１６（Ａ）のように、ゲート絶縁膜４３２をエッチングすることで同時に第１の導電層であるＴａＮがエッチングされて後退するので第三の形状の導電層４３３〜４３８（第１の導電層４３３ａ〜４３８ａと第２の導電層４３３ｂ〜４３８ｂ）を形成する。４３２はゲート絶縁膜であり第３の形状の導電層４３３〜４３８で覆われない領域はさらに２０〜５０nm程度エッチングされ薄くなった領域が形成される。
【０１４７】
図１６（Ａ）において、第１の導電層４３３ａ〜４３７ａと重なる第３の不純物領域４４１〜４４４と、第3の不純物領域の外側にある第４の不純物領域４４６〜４４９が形成される。これにより第３の不純物領域及び第４の不純物領域におけるｎ型を付与する不純物元素の濃度は第２の不純物領域におけるｎ型を付与する不純物元素の濃度とほぼ等しくなる。
【０１４８】
そして、図１６（Ｂ）に示すように、ｐチャネル型ＴＦＴを形成する島状半導体層４０３に一導電型とは逆の導電型の第５の不純物領域４５５、第６の不純物領域４５６を形成する。第三の形状の導電層４３４を不純物元素に対するマスクとして用い、自己整合的に不純物領域を形成する。このとき、ｎチャネル型ＴＦＴを形成する島状半導体層４０２、４０４、４０５はレジストマスク４５１〜４５３で全面を被覆しておく。第５の不純物領域４５５、第６の不純物領域４５６にはそれぞれ異なる濃度でリンが添加されているが、ジボラン（Ｂ₂Ｈ₆）を用いたイオンドープ法により、そのいずれの領域においても不純物濃度を２×１０²⁰〜２×１０²¹atoms/cm³となるようにする。
【０１４９】
以上の工程により、それぞれの島状半導体層に不純物領域が形成される。島状半導体層と重なる導電層４３３〜４３６がＴＦＴのゲート電極として機能する。また、４３７は容量配線、４３８は駆動回路内の配線として機能する。
【０１５０】
容量配線４３７は画素間に渡って形成されるため、島状半導体層４０５と重なり保持容量を形成する領域と、保持容量間を接続する配線として機能する領域とがある。
【０１５１】
こうして導電型の制御を目的として図１６（Ｃ）に示すように、それぞれの島状半導体層に添加された不純物元素を活性化する工程を行う。この工程はファーネスアニール炉を用いる熱アニール法で行う。その他に、レーザーアニール法、またはラピッドサーマルアニール法（ＲＴＡ法）を適用することができる。熱アニール法では酸素濃度が１ｐｐｍ以下、好ましくは０．１ｐｐｍ以下の窒素雰囲気中で４００〜７００℃、代表的には５００〜６００℃で行うものであり、本参考例では５００℃で４時間の熱処理を行う。ただし、４３３〜４３８に用いた配線材料が熱に弱い場合には、配線等を保護するため層間絶縁膜（シリコンを主成分とする）を形成した後で活性化を行うことが好ましい。
【０１５２】
さらに、３〜１００％の水素を含む雰囲気中で、３００〜４５０℃で１〜１２時間の熱処理を行い、島状半導体層を水素化する工程を行う。この工程は熱的に励起された水素により半導体層のダングリングボンドを終端する工程である。水素化の他の手段として、プラズマ水素化（プラズマにより励起された水素を用いる）を行っても良い。
【０１５３】
次いで、図１７のように、第１の層間絶縁膜４５７は酸化窒化シリコン膜から１００〜２００ｎｍの厚さで形成する。その上に有機絶縁物材料から成る第２の層間絶縁膜４５８を形成する。次いで、コンタクトホールを形成するためのエッチング工程を行う。
【０１５４】
そして、駆動回路部において島状半導体層のソース領域とコンタクトを形成するソース配線４５９〜４６１、ドレイン領域とコンタクトを形成するドレイン配線４６２〜４６４を形成する。また、画素部においては、ソース配線４６５、ドレイン電極４６６〜４６７を形成する。ドレイン電極４６６は隣接する画素に形成されたものである。ドレイン電極は反射型の液晶表示装置の画素電極として機能する。図１７の鎖線Ｂ−Ｂ’は図８の上面図の切断線の鎖線Ｂ−Ｂ’と対応している。
【０１５５】
ドレイン電極４６５は画素ＴＦＴの活性層に相当する島状半導体層４０５に、ドレイン電極４６７は保持容量５０５を形成する島状半導体層４０５と電気的な接続が形成される。
【０１５６】
以上のようにして、ｎチャネル型ＴＦＴ５０１、ｐチャネル型ＴＦＴ５０２、ｎチャネル型ＴＦＴ５０３を有する駆動回路部５０６と、画素ＴＦＴ５０４、保持容量５０５とを有する画素部５０７とを同一基板上に形成することができる。本明細書中ではこのような基板を便宜上アクティブマトリクス基板と呼ぶ。
【０１５７】
駆動回路部のｎチャネル型ＴＦＴ５０１はチャネル形成領域４６８、ゲート電極を形成する導電層４３３と重なる第３の不純物領域４４１（ＧＯＬＤ領域）、ゲート電極の外側に形成される第４の不純物領域４４６（ＬＤＤ領域）とソース領域またはドレイン領域として機能する第１の不純物領域４２７を有している。ｐチャネル型ＴＦＴ５０２にはチャネル形成領域４６９、ゲート電極を形成する導電層４３４と重なる第５の不純物領域４５６、ソース領域またはドレイン領域として機能する第６の不純物領域４５５を有している。ｎチャネル型ＴＦＴ５０３にはチャネル形成領域４７０、ゲート電極を形成する導電層４３５と重なる第３の不純物領域４４３（ＧＯＬＤ領域）、ゲート電極の外側に形成される第４の不純物領域４４８（ＬＤＤ領域）とソース領域またはドレイン領域として機能する第１の不純物領域４２９を有している。
【０１５８】
画素部の画素ＴＦＴ５０４にはチャネル形成領域４７１、ゲート電極を形成する導電層４３６と重なる第３の不純物領域４４４（ＧＯＬＤ領域）、ゲート電極の外側に形成される第４の不純物領域４４９（ＬＤＤ領域）とソース領域またはドレイン領域として機能する第１の不純物領域４３０を有している。また、保持容量５０５の一方の電極として機能する半導体層４０５にはｎ型を付与する不純物元素が添加されている。容量配線４３７とその間の絶縁層（ゲート絶縁膜と同じ層）とで保持容量を形成している。
【０１５９】
また、本参考例で示す工程に従えば、アクティブマトリクス基板の作製に必要なフォトマスクの数を５枚（島状半導体層パターン、第１配線パターン（ゲート配線、容量電極）、第２配線パターン（ソース配線、ドレイン電極）、コンタクトホールパターン、ｎチャネル領域のマスクパターン）とすることができる。その結果、工程を短縮し、製造コストの低減及び歩留まりの向上に寄与することができる。
【０１６０】
図８の画素部の上面図に示すように、強誘電性液晶のような自発分極を有する液晶を駆動するには大きな保持容量が必要となる。本参考例のように反射型の液晶表示装置であれば、開口率を損なうことなく保持容量５０５を大きくとることができる
【０１６１】
［参考例２］（反射型の液晶表示装置に用いる素子基板の作製工程の一例）
本参考例を図１２と図１８により説明する。図１８の鎖線Ｄ−Ｄ’、鎖線Ｅ−Ｅ’は、図１２を鎖線Ｄ−Ｄ’、鎖線Ｅ−Ｅ’で切断した断面を示す。図１８は実施例１の図１５（Ａ）〜図１６（Ｃ）の工程で作製される基板に対し、以下の工程を追加し、作製したものである。図１２の上面図に示す画素部のレイアウトは、参考例１（図８）に比べて、画素電極をソース配線に重なり合うように形成できるため、開口率が高くできる。
【０１６２】
なお、図１６（Ｃ）と異なる点は図１８の断面図に示すようにゲート電極４８５のように一フレームのほとんどで負の電圧を印加する電極を保持容量５０５の第一の電極として用いているため、保持容量の第二の電極として用いる第二の半導体層４９１にｐ型の不純物を付与していることである。
【０１６３】
素子基板の作製工程を図１８の断面図により説明する。まず、第１の層間絶縁膜４７２を酸化窒化シリコン膜で１００〜２００ｎｍの厚さで形成する。その上に有機絶縁物材料から成る第２の層間絶縁膜４７３を形成する。次いで、コンタクトホールを形成するためのエッチング工程を行う。
【０１６４】
そして、駆動回路部において島状半導体層のソース領域とコンタクトを形成するソース配線４７４〜４７６、ドレイン領域とコンタクトを形成するドレイン配線４７７〜４７９を形成する。
【０１６５】
また、画素部においては、接続電極４８０、ゲート配線４８１、ドレイン電極４８２を形成する。膜厚は０．３μｍ〜０．７５μｍが望ましい。ドレイン電極４８２は反射型の液晶表示装置の画素電極として機能する。
【０１６６】
接続電極４８０は、ソース配線４８３と第一の半導体層４８４と電気的に接続する。図示してはいないが、ゲート配線４８１はゲート電極４８５とコンタクトホールにより電気的に接続する。ドレイン電極４８２は第二の半導体層４９１と電気的に接続し、保持容量５０５の電極として機能させる。
【０１６７】
以上のように図１６（Ｃ）の断面図にて示される素子基板に工程を追加することで、ｎチャネル型ＴＦＴ５０１、ｐチャネル型ＴＦＴ５０２、ｎチャネル型ＴＦＴ５０３を有する駆動回路部と、画素ＴＦＴ５０４、保持容量５０５とを有する画素部を同一基板上に形成することができる。本明細書中ではこのような基板を便宜上アクティブマトリクス基板と呼ぶ。
【０１６８】
素子基板を図１２の上面図により説明する。図１２に示すように、素子基板は行方向に配置されたゲート配線と、列方向に配置されたソース配線４８３と、ゲート配線とソース配線の交差部近傍の画素ＴＦＴを有する画素部と、ｎチャネル型ＴＦＴやｐチャネル型ＴＦＴを有する駆動回路とを含む。
【０１６９】
ただし、図１２におけるゲート配線は、行方向に配置されたゲート電極４８５とゲート配線４８１が接続したものを指している。また、ゲート配線４８５は第二の層間絶縁膜（図示しない）の上に接して設けられたものである。
【０１７０】
第一の半導体層４８４と第二の半導体層４９１がパターニングされている。第一の半導体層４８４はＴＦＴ素子の活性層である。第二の半導体層４９１は後述する保持容量の容量電極として機能する。
【０１７１】
ゲート絶縁膜（図示しない）に接するように、ソース配線４８３とゲート電極４８５を形成する。
【０１７２】
第一の層間絶縁膜と第二の層間絶縁膜（図示しない）を形成した後、第一の半導体層４８４、第二の半導体層４９１、ソース配線４８３に達するコンタクトホール４８６〜４９０を開ける。次にパターニングにより、接続電極４８０、ドレイン電極４８２、ゲート配線４８５を形成する。
【０１７３】
コンタクトホール４８６とコンタクトホール４８８により、接続電極４８０を介して、第一の半導体層４８４とソース配線４８３が電気的に接続する。
【０１７４】
コンタクトホール４８９により、第一の半導体層４８４とドレイン電極４８２が電気的に接続する。
【０１７５】
コンタクトホール４８７により第二の半導体層４９１とドレイン電極４８２が電気的に接続する。これにより、ドレイン電極４８２は保持容量の電極として機能する第二の半導体層４９１に電位を与える。ゲート電極４８５と第二の半導体層４９１により保持容量ができる。ゲート絶縁膜が保持容量の絶縁膜として機能する。
【０１７６】
コンタクトホール４９０により、ゲート電極４８５とゲート配線４８１が電気的に接続する。
【０１７７】
参考例１と本参考例の素子基板の作製工程によると、図１８、図１２に示す画素構造を有する画素部と、駆動回路とを有する素子基板を形成するために必要なマスク数は５枚でよい。
【０１７８】
即ち、１枚目が、第１の半導体層４８４及び第２の半導体層４９１をパターニングするマスク、２枚目が、ソース配線４８３及びゲート電極４８５をパターニングするマスク、３枚目がｎチャネル領域のマスクパターン、４枚目が第１の半導体層４８４と第２の半導体層４９１とソース配線４８３とゲート電極４８５とにそれぞれ達するコンタクトホールを形成するマスク、５枚目は、接続電極４８０、ドレイン電極４８２、ゲート配線４８１をパターニングするマスクである。
【０１７９】
本参考例は、反射型の液晶表示装置の作製工程を示したものである。上面図の図１２に示すように、ソース配線４８３にドレイン電極の機能を有する画素電極をオーバーラップして形成することができるため、開口率を高くすることができる。かつ、反射型の液晶表示装置は透過型の液晶表示装置に比べ画素電極間の距離が小さくできるため、画素の輪郭が目立たない。
【０１８０】
［参考例３］（透過型の液晶表示装置に用いる素子基板の作製工程の一例）
参考例１〜２で作製したアクティブマトリクス基板はそのまま反射型の液晶表示装置に適用することができる。一方、透過型の液晶表示装置とする場合には画素部の各画素に設ける画素電極を透明電極で形成すれば良い。本参考例では透過型の液晶表示装置に対応するアクティブマトリクス基板の作製方法について図１９を用いて説明する。
【０１８１】
アクティブマトリクス基板は参考例１と同様に作製する。図１９（Ａ）では、ソース配線とドレイン配線は導電性の金属膜をスパッタ法や真空蒸着法で形成する。これは、Ｔｉ膜を５０〜１５０ｎｍの厚さで形成し、島状半導体層のソースまたはドレイン領域を形成する半導体層とコンタクトを形成し、そのＴｉ膜上に重ねてアルミニウム（Ａｌ）を３００〜４００ｎｍの厚さで形成し、さらにＴｉ膜または窒化チタン（ＴｉＮ）膜を１００〜２００ｎｍの厚さで形成して３層構造とした。その後、透明導電膜を全面に形成し、フォトマスクを用いたパターニング処理およびエッチング処理により画素電極４９１を形成する。画素電極４９１は、第２の層間絶縁膜４５８上に形成され、画素ＴＦＴのドレイン配線４９２と重なる部分を設け、接続構造を形成している。隣接する画素の画素電極４９３も図示されている。
【０１８２】
図１９（Ｂ）では最初に第２の層間絶縁膜４５８上に透明導電膜を形成し、パターニング処理およびエッチング処理をして画素電極４９１を形成した後、ドレイン配線４９２を画素電極４９１と重なる部分を設けて形成した例である。ドレイン配線４９２はＴｉ膜を５０〜１５０nmの厚さで形成し、島状半導体層のソースまたはドレイン領域を形成する半導体層とコンタクトを形成し、そのＴｉ膜上に重ねてアルミニウム（Ａｌ）を３００〜４００nmの厚さで形成して設ける。この構成にすると、画素電極４９１はドレイン配線４９２を形成するＴｉ膜のみと接触することになる。その結果、透明導電膜材料とＡｌとが反応するのを防止できる。隣接する画素の画素電極４９３も図示されている。
【０１８３】
透明導電膜の材料は、酸化インジウム（Ｉｎ₂Ｏ₃）や酸化インジウム酸化スズ合金（Ｉｎ₂Ｏ₃―ＳｎＯ₂；ＩＴＯ）などをスパッタ法や真空蒸着法などを用いて形成して用いることができる。このような材料のエッチング処理は塩酸系の溶液により行う。しかし、特にＩＴＯのエッチングは残渣が発生しやすいので、エッチング加工性を改善するために酸化インジウム酸化亜鉛合金（Ｉｎ₂Ｏ₃―ＺｎＯ）を用いても良い。酸化インジウム酸化亜鉛合金は表面平滑性に優れ、ＩＴＯに対して熱安定性にも優れているので、ドレイン配線４９２の端面で接触するＡｌとの腐蝕反応を防止できる。同様に、酸化亜鉛（ＺｎＯ）も適した材料であり、さらに可視光の透過率や導電率を高めるためにガリウム（Ｇａ）を添加した酸化亜鉛（ＺｎＯ：Ｇａ）などを用いることができる。
【０１８４】
このようにして、透過型の液晶表示装置に対応したアクティブマトリクス基板を完成させることができる。本参考例では、参考例１と同様な工程として説明したが、このような構成は参考例２で示すアクティブマトリクス基板に適用することができる。
【０１８５】
以上のようにして、ｎチャネル型ＴＦＴ５０１、ｐチャネル型ＴＦＴ５０２、ｎチャネル型ＴＦＴ５０３を有する駆動回路部５０６と、画素ＴＦＴ５０４、保持容量５０５を有する画素部５０７とを同一基板上に形成することができる。
【０１８６】
［実施例１］（液晶表示装置の作製方法の一例）
本実施例では参考例２で作製した素子基板を用いて反射型の液晶表示装置を作製する方法を示す。本実施例を図１１を用いて説明する。図１１の断面図の鎖線Ｄ−Ｄ’と鎖線Ｅ−Ｅ’は図１２の上面図を鎖線Ｄ−Ｄ’と鎖線Ｅ−Ｅ’で切断したものを示す。
【０１８７】
図１１の素子基板の基板４００は石英を用いると良い。石英は紫外線の透過率が可視光と同じく９２％にできるため、後述する紫外線照射による単安定化するさいに、照射光の吸収が少ない。
【０１８８】
基板５０８には良質な黒レベルを得るために遮光膜（図示しない）が形成されている。遮光膜はクロム等を用いることができる。
【０１８９】
遮光膜上に透明導電膜５１０が形成されている。透明導電膜はＩＴＯ膜を用いることができる。透明導電膜５１０は画素部に形成されている。強誘電性液晶の配向は透明導電膜５１０の表面平滑性に影響されるので、成膜温度、膜厚、材質をうまく選択する必要がある。以上の構成を対向基板と称する。
【０１９０】
素子基板と対向基板に配向膜５１１、５１２を形成する。日産化学社製の配向膜ＲＮ１２８６を形成し、９０℃で５分間プリベークした後、２５０℃で一時間ポストベークした。ポストベーク後の膜厚は４０ｎｍであった。配向膜の形成方法はフレキソ印刷法あるいはスピナー塗布法で行えば良い。ＲＮ１２８６はシール剤との密着性が悪いため、シール剤が配置される位置は配向膜を除去する。また、素子基板と対向基板を電気的に接続するコンタクトパッド上と、フレキシブルプリント配線板（Flexible Print Circuit ;FPC）を接続するリード線の上には配向膜を形成しない。
【０１９１】
配向膜５１１、５１２をラビングする。対向基板と素子基板を貼り合わせたときのラビング方向がパラレルになるようにする。ラビング処理はラビングの布として吉川化工社製のＹＡ−２０Ｒを用いた。常陽工学社製のラビング装置により、押しこみ量が０．２５ｍｍ、ロール回転数が１００ｒｐｍ、ステージ速度が１０ｍｍ／ｓｅｃ、ラビング回数が１回でラビングした。ラビングロールの直径は１３０ｍｍである。
【０１９２】
ラビング後に配向膜を洗浄した。まず、アルカリ現像液に６０秒浸漬した。アルカリ現像液はテトラメチルアンモニウムハイドロオキサイド（Tetra Methyl Ammonium Hydro Oxide ; TMAH）の濃度が５．４８％の富士フィルムオーリン社製のＭＩＦ現像液を２０倍に薄めて用いた。
【０１９３】
その後、５０〜１００ｋｇｆ／ｃｍ²の高圧の水流を基板面に照射して配向膜を洗浄した。
【０１９４】
配向膜の洗浄にアルカリ溶液による洗浄と高圧の水流による洗浄とを組み合わせて用いることで良好な配向が得られた。
【０１９５】
次に、シール剤５１３を形成した。シール剤は液晶材料の注入口を一箇所に設け、真空下で注入ができるパターンとすることができる。あるいは、液晶材料の注入口を設けた側と対向する側に空気が排出される間隙を設けて、常圧下で液晶材料の注入ができるパターンとすることもできる。
【０１９６】
本実施例では、常圧下で毛細管現象を利用して液晶材料を注入できるように、シール剤のパターンにおいて、液晶を注入する注入口と、空気が排出される間隙を設けた。
【０１９７】
シール剤を日立化成社製のシールディスペンサーにより対向基板上に形成した。シール剤は三井化学社製のＸＮ−２１Ｓを用いた。シール剤の仮焼成は９０℃で３０分行い、次の１５分で徐冷した。
【０１９８】
シール剤ＸＮ−２１Ｓは熱プレスをしても、２．３〜２．６μｍのセルギャップしか得られないことがわかっている。そこで１．０μｍのセルギャップを形成するために、画素部に比べて、１．５μｍ以上積層膜の厚さが薄い領域を設けてシール剤を配置すると良い。本実施例では、第一の層間絶縁膜４７２と第二の層間絶縁膜４７３をエッチングにより除去した領域にシール材５１３を配置する。
【０１９９】
シール剤を形成すると同時に導電性スペーサ（図示しない）を形成する。
【０２００】
スペーサ（図示しない）を対向基板あるいは素子基板に形成する。スペーサは球状のビーズを散布しても良い。あるいは、表示領域において感光性の樹脂をドット状またはストライプ状にパターニングしても良い。スペーサにより液晶材料の配向欠陥がでないようにする。
【０２０１】
反射型の液晶表示装置ではリタデーションの関係からセルギャップは０．５〜１．５μｍが望ましい。本実施例ではセルギャップを画素部において１．０μｍになるようにする。
【０２０２】
その後、ニュートム社製の貼り合わせ装置により、対向基板と素子基板のマーカーを合わせ、貼り合わせを行った。
【０２０３】
次に、０．３〜１．０ｋｇｆ／ｃｍ²の圧力を基板平面に垂直な方向にかつ基板全面に加えながら、クリーンオーブンにて１６０℃、３時間で熱硬化を行い、シール剤を硬化し、対向基板と素子基板を接着させる。
【０２０４】
対向基板と素子基板を貼り合わせてできる一対の基板を分断する。
【０２０５】
液晶材料５１４は強誘電性液晶と液晶性の高分子と重合開始剤の混合物を用いる。液晶性の高分子材料として大日本インキ化学社製の光重合剤を添加した液晶性アクリレートモノマーＵＣＬ−００１を使用した。強誘電性液晶にはクラリアント社製のＦｅｌｉｘ Ｍ４８５１／１００を使用した。重合開始剤を添加した液晶性アクリレートモノマーを２ｗｔ％強誘電性液晶に混合し、８０℃の等方相において攪拌子により２０分攪拌した。
【０２０６】
攪拌され混ぜ合わされた液晶材料は、粘度が低く注入が容易な等方相まで加熱されて、シール剤により固定された素子基板と対向基板とからなる液晶パネルの基板間の間隙に注入される。
【０２０７】
液晶材料を等方相（８０℃）まで加熱し注入をする。液晶パネルをホットプレート上で８０℃に加熱し、強誘電性液晶と液晶性アクリレートモノマーの混合物を注入した。液晶パネル全面に液晶材料を注入した後、液晶パネルをクリーンオーブンに搬送して、８０℃で３０分加熱後に、０．１℃／ｍｉｎで室温まで徐冷した。
【０２０８】
封止剤として注入口を覆うように小型のディスペンサーにより紫外線硬化型樹脂（図示しない）を塗布する。紫外線硬化樹脂を硬化するために紫外線を照射するときに、紫外線が石英を透過し、液晶材料に対し不要な高分子安定化処理をしてしまうことが予想されたため、この段階ではまだ紫外線硬化樹脂を硬化しない。
【０２０９】
フレキシブルプリント配線板（図示しない）を異方性導電膜（図示しない）により接着する。
【０２１０】
最後に、実施例２〜３に示す方法のうちいずれか一つにより、直流電圧を印加して高分子安定化処理を行う。本実施例の工程順では紫外線を照射すると、強誘電性液晶の単安定化が行われると同時に、封止剤の紫外線硬化が終了する。
【０２１１】
素子基板の画素電極を透明導電膜にすれば、本実施例の工程により透過型の液晶表示装置を作製することができる。透過型の液晶表示装置ではセルギャップはリタデーションの関係及び強誘電性液晶の螺旋構造を抑制する目的から１．０〜２．５μｍとすることが望ましい。
【０２１２】
本実施例によれば、注入口を封止する紫外線硬化型の封止剤と液晶材料とに紫外線を一括して照射して、封止剤の光硬化処理と液晶材料の高分子安定化処理とを同時に行う。高分子安定化処理工程で初めて液晶材料が紫外線に曝されるため、良好な高分子安定化処理をすることができる。
【０２１３】
［参考例４］（高分子安定化処理をする方法の一例）
反射型の液晶表示装置あるいは透過型の液晶表示装置において、強誘電性液晶を液晶性の高分子により単安定化する方法を以下に示す。本参考例を図１と図５により説明する。
【０２１４】
液晶表示装置にフレキシブルプリント配線板を貼りつけた後、外部からゲートドライバーに図１に示すゲートスタートパルス１１４とゲートクロックパルス１０４を入力する。ゲートスタートパルス１１４は強誘電性液晶を単安定化する間常時一定のレベルを保持する。これにより、ゲートパルス１１５の電圧値が強誘電性液晶を単安定化する間一定のレベルとなり、常時、液晶層に電荷が供給される。
【０２１５】
これにより、液晶層に印加される電圧１１６は一定の電圧を示す。線順次駆動で液晶層を電界により応答させるときに比べて、電荷が常に供給されているため、液晶層の電圧レベルが一定に保持できる。
【０２１６】
つまり、線順次駆動で液晶層に電界を印加すると、ゲート配線が選択されている期間とそうでない期間とで、液晶セルや保持容量の電流のリークにより液晶セルに印加される電圧が異なってしまう。しかし、本参考例によれば、高分子安定化処理の間、ゲートパルスが常時一定の電圧レベルになり画素ＴＦＴを導通状態にするため、電流のリークによって消費された電荷が画素ＴＦＴを介して液晶セルや保持容量に供給され、液晶セルの電位が一定に保たれる。
【０２１７】
液晶層に印加される電圧が画素部において一定となったときに、１０秒間基板全面に対し垂直方向から紫外線を照射する。液晶パネルに照射される紫外線は光の入射面で測定して１０ｍＷ／ｃｍ²であった。
【０２１８】
以上により、アクティブマトリクス型の液晶表示装置でも強誘電性液晶の高分子安定化処理をすることができる。
【０２１９】
実施例１の液晶表示装置の作製工程及び本参考例の工程の順序を図５を用いて説明する。配向膜形成〜フレキシブルプリント配線板（ＦＰＣ）貼り付けを行い、フレキシブルプリント配線板から外部信号を入力する。外部信号のゲートスタートパルスの電圧レベルを一定にすることで液晶に印加される電圧の安定した液晶応答が行われる。
【０２２０】
ラビングされた配向膜を有する素子基板及び対向基板はシール剤により貼り合わされ、シール剤硬化後に個々のパネルに分断される。パネルに強誘電性液晶や液晶性の高分子を含む液晶材料を注入し、注入口を封止した後に、ＦＰＣを貼りつける。ＦＰＣから入力される外部信号によって液晶が応答し、液晶の応答が完了した後に紫外線を照射して、強誘電性液晶を単安定化する。
【０２２１】
［実施例２］（高分子安定化処理をする方法の一例）
反射型の液晶表示装置あるいは透過型の液晶表示装置において、強誘電性液晶を液晶性の高分子により単安定化する方法を以下に示す。本実施例は図１０〜図１４により説明する。図１０の鎖線Ａ−Ａ’は図１４を鎖線ＡＡ’で切断した断面である。また、図１０の鎖線ＤＤ’及び鎖線Ｅ−Ｅ’は図１２を鎖線Ｄ−Ｄ’及び鎖線Ｅ−Ｅ’で切断した断面である。
【０２２２】
図１４は反射型の液晶表示装置あるいは透過型の液晶表示装置の上面図を示す。図１４の液晶表示装置の素子基板にはゲートドライバー５２１とソースドライバー５２２が形成されている。
【０２２３】
反射型の液晶表示装置でも透過型の液晶表示装置でも、フレキシブルプリント配線板５１９の配置される位置や、コモンパッド５２０の位置は同じである。図１４はアクティブマトリクス型の液晶表示装置の外観を示したものである。液晶表示装置の外観は、反射型の液晶表示装置にも透過型の液晶表示装置でも同じである。
【０２２４】
図１０のように、実施例１の工程で得られた反射型の液晶表示装置に対し、フレキシブルプリント配線板を貼りつけた後に、素子基板の裏面に導電性を有するシート３００を画素部に配置する。導電性のシートは例えば、導電膜を成膜しても良い。また、金属板を基板４００に接するように設けても良い。また導電性を有しかつ粘着性のあるテープを画素部に電界がかかるように貼りつけても良い。
【０２２５】
対向基板の基板５０８には透明導電膜５１０を形成する。
【０２２６】
導電性ペーストを対向基板のコモンコンタクトパッド５２０にディスペンスする。導電性ペーストはシール剤５１５に導電性のスペーサ５１６を混入したものである。導電性のスペーサは粒子状のスペーサの表面に金の粉末をコーティングしたものである。導電性のペーストをコモンパッド５２０に配置することにより対向基板の透明導電膜５１０とフレキシブルプリント配線板を接着するときのリード線５１７が電気的に接続する。
【０２２７】
シール剤５１３により対向基板と素子基板が貼り合わせられる。その後液晶材料５１４を注入する。液晶材料５１４は強誘電性液晶と液晶性高分子の混合物を示す。
【０２２８】
異方性導電膜５１９により、フレキシブルプリント配線板５１８が接着される。これにより、フレキシブルプリント配線板５１８と対向基板の透明導電膜５１０が同電位になる。フレキシブルプリント配線板５１８と導電性のシート３００の間に直流電圧を印加して高分子安定化処理をすることができる。電源の直流電圧の値は前述の数１で計算する。
【０２２９】
セルギャップ２．５μｍ、素子基板のガラスの比誘電率が３．０、液晶材料に印加する電圧を４Ｖとする。液晶材料のうち、強誘電性液晶の比誘電率が１８、素子基板のガラス厚が３００μｍとすると、直流電圧値は２．９ｋＶとなる。印加される直流電圧のうち、ほとんどがガラスに印加される。
【０２３０】
直流電圧は、直流安定化電源（Regulated DC Power Supply）により供給する。例えば、浜松ホトニクス社製のRegulated DC Power Supplyの型番Ｃ３３５０では、０〜±３．０ｋＶの直流電圧を印加することができる。
【０２３１】
直流電圧を印加しながら、基板全面に対し垂直方向から紫外線を照射する。１０秒間基板全面に対し垂直方向から紫外線を照射する。液晶パネルに照射される紫外線は光の入射面で測定して１０ｍＷ／ｃｍ²であった。
【０２３２】
これにより強誘電性液晶の単安定化が行われる。単安定化終了後に導電性のシート３００を剥離すれば良い。
【０２３３】
図１１のようにポリシリコンを半導体層として用いるときは、駆動回路部５０６と画素部５０７を同一基板上に形成することが可能である。駆動回路部に直流電圧がかからないように、画素部にのみ導電性のシート３００を接着しても良い。
【０２３４】
実施例１及び本実施例の工程の順序を図１３にまとめる。配向膜形成（１）〜液晶注入口の封止剤（９）を塗布し、フレキシブルプリント配線板を貼りつけ（１０）た後に、素子基板の裏面に導電性のシートを貼りつけ（１１）て、対向基板の透明導電膜と導電性シートの間に直流電圧を印加（１２）できるようにしているのが特徴である。
【０２３５】
導電性のシートは単安定化後に剥離できるため、簡便な工程で任意の電圧で液晶材料を単一極性の電圧によって単安定化することができる。
【０２３６】
［実施例３］（高分子安定化処理をする方法の一例）
反射型の液晶表示装置あるいは透過型の液晶表示装置において、強誘電性液晶を液晶性の高分子により単安定化する方法を以下に示す。本実施例は図６〜９と図１４により説明する。図６の鎖線Ｃ−Ｃ’は図１４を鎖線ＣＣ’で切断した断面である。また、図６〜７の鎖線ＢＢ’は図８を鎖線Ｂ−Ｂ’で切断した断面である。
【０２３７】
図１４は反射型の液晶表示装置あるいは透過型の液晶表示装置の上面図を示す。図１４の液晶表示装置の素子基板にはゲートドライバー５２１とソースドライバー５２２が形成されている。
【０２３８】
図６に示すように、基板４００上に導電性の膜２００としてＩＴＯ膜を画素部のみに１００〜１２０ｎｍの厚さで形成する。パターニングにより駆動回路部に配置されるＩＴＯ膜は除去しても良い。また半導体層を保護するために、半導体層が配置される領域はＩＴＯ膜を除去しても良い。
【０２３９】
基板上の導電性の膜を半導体層が配置される領域を避けて設けることで、液晶を単安定化するときの直流電圧が半導体層に印加されることを防ぐことができる。
【０２４０】
以下に図６に用いられる絶縁膜の比誘電率と膜厚を述べる。
【０２４１】
比誘電率の低い膜２０１を１〜６μｍの厚さで形成して、素子の配線と導電性の膜２００の間にできる寄生容量の低減を図る。本実施例では比誘電率の低い膜２０１として比誘電率が４．０の二酸化珪素（ＳｉＯ₂）膜を１．０μｍの厚さで形成する。
【０２４２】
下地膜４０１により、ガラス基板から流出するアルカリ金属等の不純物が半導体層を汚染しないようにする。下地膜は窒化珪素、二酸化珪素等を用いることができる。例えば比誘電率が６．５の窒化珪素膜（ＳｉＮ）膜４０１を１０ｎｍの厚さで形成する。
【０２４３】
ゲート絶縁膜４３２は比誘電率が４．０の酸化窒化珪素膜を１００ｎｍの厚さで形成する。第一の層間膜４５７として比誘電率が４．０の酸化窒化珪素膜を１５０ｎｍの厚さで形成する。第二の層間膜４５８として比誘電率が４．０のアクリル樹脂を２．０μｍの厚さで形成する。
【０２４４】
液晶材料５１４は強誘電性液晶と液晶性の高分子と重合開始剤を示す。本実施例において用いる強誘電性液晶の比誘電率は３０とする。セルギャップは１．０μｍの反射型の液晶表示装置とする。配向膜５１１〜５１２の膜厚は４０ｎｍで比誘電率は４．０とする。
【０２４５】
以上のような構成では計算により、液晶材料５１４に１０Ｖの直流電圧を印加したいときには、導電性の膜２００と後述する対向基板の基板５０８に形成された透明導電膜５１０の間に２６０Ｖの電圧を印加すれば良いことがわかる。
【０２４６】
次に、直流電圧を印加する方法を図６と図１４により説明する。
【０２４７】
図６のように対向基板のガラス基板５０８には遮光膜５０９が形成されている。遮光膜はクロム等を用いることができる。
【０２４８】
遮光膜５０９上に透明導電膜５１０が形成されている。透明導電膜はＩＴＯ膜を用いることができる。
【０２４９】
図６、図１４のように対向基板の透明導電膜５１０と遮光膜５０９が二層に積層してできるコンタクトパッド５２０がある。コンタクトパッド５２０に導電性ペーストを形成する。
【０２５０】
導電性ペーストはシール剤５１５に導電性のスペーサ５１６を混入したものである。導電性のスペーサは粒子状のスペーサの表面に金の粉末をコーティングしたものである。導電性のペーストをコモンパッド５２０に配置することにより対向基板の透明導電膜５１０とフレキシブルプリント配線板を接着するときのリード線５１７が電気的に接続する。
【０２５１】
配向膜５１１〜５１２により液晶材料５１４が配向する。シール剤５１３が形成されている。
【０２５２】
異方性導電膜５１９により、フレキシブルプリント配線板５１８が接着される。これにより、フレキシブルプリント配線板５１８と素子基板４００に形成された導電性の膜２００の間に直流電圧を印加して高分子安定化処理をすることができる。
【０２５３】
実施例１及び本実施例の工程の順序を図９にまとめる。配向膜形成（１）〜フレキシブルプリント配線板（ＦＰＣ）を貼りつけ（１０）て、フレキシブルプリント配線板のうち対向基板のコモンパッドと導通をとる配線と、素子基板に形成された導電膜の間に直流電源を印加することが特徴である。
【０２５４】
［参考例５］（触媒元素を用いる半導体層の結晶化法）
本参考例では、参考例１で示したアクティブマトリクス基板のＴＦＴの半導体層を形成する結晶質半導体層の他の作製方法について示す。本参考例では特開平７−１３０６５２号公報で開示されている触媒元素を用いる結晶化法を適用することもできる。以下に、その場合の例を説明する。
【０２５５】
参考例１と同様にして、ガラス基板上に下地膜、非晶質半導体層を２５〜８０ｎｍの厚さで形成する。例えば、非晶質シリコン膜を５５ｎｍの厚さで形成する。そして、重量換算で１０ｐｐｍの触媒元素を含む水溶液をスピンコート法で塗布して触媒元素を含有する層を形成する。触媒元素にはニッケル（Ｎｉ）、ゲルマニウム（Ｇｅ）、鉄（Ｆｅ）、パラジウム（Ｐｄ）、スズ（Ｓｎ）、鉛（Ｐｂ）、コバルト（Ｃｏ）、白金（Ｐｔ）、銅（Ｃｕ）、金（Ａｕ）などである。この触媒元素を含有する層１７０は、スピンコート法の他にスパッタ法や真空蒸着法によって上記触媒元素の層を１〜５ｎｍの厚さに形成しても良い。
【０２５６】
そして、結晶化の工程では、まず４００〜５００℃で１時間程度の熱処理を行い、非晶質シリコン膜の含有水素量を５atoms％以下にする。そして、ファーネスアニール炉を用い、窒素雰囲気中で５５０〜６００℃で１〜８時間の熱アニールを行う。以上の工程により結晶質シリコン膜から成る結晶質半導体層を得ることができる。
【０２５７】
このようにして作製された結晶質半導体層から島状半導体層を作製すれば、参考例１と同様にしてアクティブマトリクス基板を完成させることができる。しかし、結晶化の工程においてシリコンの結晶化を助長する触媒元素を使用した場合、島状半導体層中には微量（１×１０^１７〜１×１０^１９ａｔｏｍｓ／ｃｍ^３程度）の触媒元素が残留する。勿論、そのような状態でもＴＦＴを完成させることが可能であるが、残留する触媒元素を少なくともチャネル形成領域から除去する方がより好ましかった。この触媒元素を除去する手段の一つにリン（Ｐ）によるゲッタリング作用を利用する手段がある。
【０２５８】
この目的におけるリン（Ｐ）によるゲッタリング処理は、図６（Ｃ）で説明した活性化工程で同時に行うことができる。ゲッタリングに必要なリン（Ｐ）の濃度は高濃度ｎ型不純物領域の不純物濃度と同程度でよく、活性化工程の熱アニールにより、ｎチャネル型ＴＦＴおよびｐチャネル型ＴＦＴのチャネル形成領域から触媒元素をその濃度でリン（Ｐ）を含有する不純物領域へ偏析させることができる。その結果その不純物領域には１×１０¹⁷〜１×１０¹⁹atoms/cm³程度の触媒元素が偏析した。このようにして作製したＴＦＴはオフ電流値が下がり、結晶性が良いことから高い電界効果移動度が得られ、良好な特性を達成することができる。
【０２５９】
なお、本参考例は、実施例１乃至３のいずれか一と自由に組み合わせることが可能である。
【０２６０】
［参考例６］本発明を実施して形成されたＣＭＯＳ回路や画素部は様々な半導体装置（アクティブマトリクス型液晶ディスプレイ、アクティブマトリクス型ＥＣディスプレイ）に用いることができる。即ち、それら半導体装置を表示部に組み込んだ電子機器全てに本願発明を実施できる。以下の装置に消費電力低減のため、センサーを組み込み外部の明るさを検出して、暗いところでは輝度を落とすようにしても良い。
【０２６１】
図２０（Ａ）は携帯電話であり、表示用パネル９００１、操作用パネル９００２、接続部９００３、表示装置９００４、音声出力部９００５、操作キー９００６、電源スイッチ９００７、音声入力部９００８、アンテナ９００９から構成されている。本願発明はアクティブマトリクス基板を備えた表示装置９００４に適用することができる。
【０２６２】
図２０（Ｂ）はビデオカメラであり、本体９１０１、表示装置９１０２、音声入力部９１０３、操作スイッチ９１０４、バッテリー９１０５、受像部９１０６から成っている。本願発明はアクティブマトリクス基板を備えた表示装置９１０２に適用することができる。
【０２６３】
図２０（Ｃ）はモバイルコンピュータ或いは携帯型情報端末であり、本体９２０１、カメラ部９２０２、受像部９２０３、操作スイッチ９２０４、表示装置９２０５で構成されている。本願発明はアクティブマトリクス基板を備えた表示装置９２０５に適用することができる。
【０２６４】
図２０（Ｄ）はヘッドマウントディスプレイであり、本体９３０１、表示装置９３０２、アーム部９３０３で構成される。本願発明は表示装置９３０２に適用することができる。
【０２６５】
図２０（Ｅ）はテレビであり、本体９４０１、スピーカー９４０２、表示装置９４０３、受信装置９４０４、増幅装置９４０５等で構成される。本願発明は表示装置９４０３に適用することができる。
【０２６６】
図２０（Ｆ）は携帯書籍であり、本体９５０１、表示装置９５０２、９５０３、記憶媒体９５０４、操作スイッチ９５０５、アンテナ９５０６から構成されており、ミニディスク（ＭＤ）やＤＶＤに記憶されたデータや、アンテナで受信したデータを表示するものである。表示装置９５０２、９５０３は直視型の表示装置であり、本発明を適用することができる。
【０２６７】
図２１（Ａ）はパーソナルコンピュータであり、本体９６０１、画像入力部９６０２、表示装置９６０３、キーボード９６０４で構成される。
【０２６８】
図２１（Ｂ）はプログラムを記録した記録媒体（以下、記録媒体と呼ぶ）を用いるプレーヤーであり、本体９７０１、表示装置９７０２、スピーカ部９７０３、記録媒体９７０４、操作スイッチ９７０５で構成される。なお、この装置は記録媒体としてＤＶＤ（Ｄｉｇｔｉａｌ Ｖｅｒｓａｔｉｌｅ Ｄｉｓｃ）、ＣＤ等を用い、音楽鑑賞や映画鑑賞やゲームやインターネットを行うことができる。
【０２６９】
図２１（Ｃ）はデジタルカメラであり、本体９８０１、表示装置９８０２、接眼部９８０３、操作スイッチ９８０４、受像部（図示しない）で構成される。
【０２７０】
図２２（Ａ）はフロント型プロジェクターであり、投射装置９９０１、スクリーン９９０２で構成される。本発明は表示装置に適用することができる。
【０２７１】
図２２（Ｂ）はリア型プロジェクターであり、本体１０００１、投射装置１０００２、ミラー１０００３、スクリーン１０００４で構成される。本発明は表示装置に適用することができる。
【０２７２】
なお、図２２（Ｃ）は、図２２（Ａ）及び図２２（Ｂ）中における投射装置９９０１、１０００２の構造の一例を示した図である。投射装置９９０１、１０００２は、光源光学系１０１０１、ミラー１０１０２、１０１０４〜１０１０６、ダイクロイックミラー１０１０３、プリズム１０１０７、液晶表示装置１０１０８、位相差板１０１０９、投射光学系１０１１０で構成される。投射光学系１０１１０は、投射レンズを含む光学系で構成される。本参考例は三板式の例を示したが、特に限定されず、例えば単板式であってもよい。また、図２２（Ｃ）中において矢印で示した光路に実施者が適宜、光学レンズや、偏光機能を有するフィルムや、位相差を調節するためのフィルム、ＩＲフィルム等の光学系を設けてもよい。
【０２７３】
また、図２２（Ｄ）は、図２２（Ｃ）中における光源光学系１０２０１の構造の一例を示した図である。本参考例では、光源光学系１０２０１は、リフレクター１０２１１、光源１０２１２、レンズアレイ１０２１３、１０２１４、偏光変換素子１０２１５、集光レンズ１０２１６で構成される。なお、図２２（Ｄ）に示した光源光学系は一例であって特に限定されない。例えば、光源光学系に実施者が適宜、光学レンズや、偏光機能を有するフィルムや、位相差を調節するフィルム、ＩＲフィルム等の光学系を設けてもよい。
【０２７４】
【発明の効果】
本発明を用いることで、アクティブマトリクス基板においても強誘電性液晶の高分子安定化処理をすることができる。
【０２７５】
アクティブマトリクス型の液晶表示装置で、パネル内のソースおよびゲートドライバー回路の変更無に、外部からの入力信号を変更するのみで画素ＴＦＴで独立化している液晶に単安定化に必要な電圧を印加する手段を提案する。
【０２７６】
線順次駆動をした場合は、保持容量や液晶層の電流リークにより液晶層に印加する電圧が変動し、強誘電性液晶の高分子安定化処理するときの電圧が不安定になるが、本発明によれば、一定の電圧で高分子安定化処理をすることができる。
【０２７７】
アクティブマトリクス型の液晶表示装置では素子の耐電圧特性から液晶層に印加される電圧に制限があるが、本発明によれば、１０Ｖ程度の直流電圧を液晶層に印加し、高分子安定化処理をすることができる。
【図面の簡単な説明】
【図１】参考形態２の高分子安定化処理をするときの駆動方法を示す。
【図２】参考形態１の高分子安定化処理をするときの駆動方法を示す。
【図３】参考形態１のゲートドライバーの回路構成を示す。
【図４】参考形態１のソースドライバーの回路構成を示す。
【図５】参考形態１及び参考形態２の高分子安定化処理をするときの工程の順序を示す。
【図６】実施形態１の液晶表示装置の断面図を示す。
【図７】実施形態１の液晶表示装置の画素部及び駆動回路部の断面図を示す。
【図８】参考例１の液晶表示装置の画素部の上面図を示す。
【図９】実施形態１の高分子安定化処理をするときの工程の順序を示す。
【図１０】実施形態１の液晶表示装置の画素部及び駆動回路部の断面図を示す。
【図１１】参考例３の液晶表示装置の断面図を示す。
【図１２】参考例２の液晶表示装置の画素部の上面図を示す。
【図１３】高分子安定化処理をするときの工程の順序を示す。
【図１４】液晶表示装置の上面図を示す。
【図１５】参考例１の液晶表示装置の画素部及び駆動回路部の作製工程の断面図を示す。
【図１６】参考例１の液晶表示装置の画素部及び駆動回路部の作製工程の断面図を示す。
【図１７】参考例１の液晶表示装置の画素部及び駆動回路部の作製工程を示す。
【図１８】参考例２の液晶表示装置の画素部及び駆動回路部の作製工程の断面図を示す。
【図１９】参考例３の液晶表示装置の画素部及び駆動回路部の作製工程の断面図を示す。
【図２０】参考例６の電子機器の一例の斜視図を示す。
【図２１】参考例６の電子機器の一例の斜視図を示す。
【図２２】参考例６の電子機器の一例の斜視図を示す。
【図２３】従来例の単純マトリクス型の液晶表示装置の上面図を示す。
【図２４】従来例の強誘電性液晶の電圧―透過率特性を示す。
【図２５】参考形態１を説明する画素部の回路を示す。[0001]
BACKGROUND OF THE INVENTION
A manufacturing method of a liquid crystal display device in which a DC voltage is applied to monostabilize liquid crystal molecules in an active matrix liquid crystal display device will be described. In particular, a method for manufacturing a liquid crystal display device that monostabilizes a liquid crystal having a layer structure such as a smectic liquid crystal will be described.
[0002]
[Prior art]
The liquid crystal display device has the advantages of being thin, lightweight, and low power consumption. Liquid crystal display devices are also used in fields that require high-speed response at the moving image level, such as portable televisions and wall-mounted televisions. In addition, since a large screen can be displayed, there is an increasing demand for a projector panel such as a 50-inch rear projector.
[0003]
As a liquid crystal alignment mode, a TN (Twisted Nematic) mode having a cell gap of about 4 to 5 μm is widely used from the viewpoint of easy alignment control. However, in the TN mode, the response speed of the halftone display close to the white level is slow, and when a high-speed moving image is displayed, the liquid crystal does not respond and appears as flicker.
[0004]
Flicker is a phenomenon in which the response of the liquid crystal cannot follow the speed at which the image is switched in a halftone with a slow response speed of the liquid crystal, and a gradation different from the gradation of the video signal appears on the screen and appears to flicker. When the displayed object moves at high speed, the display gradation of the outline portion of the style changes greatly between the previous screen and the switched screen. For this reason, such flicker is easily seen in the contour portion.
[0005]
There is a liquid crystal having spontaneous polarization as a material replacing nematic liquid crystal, and switching is performed by the interaction of spontaneous polarization and an electric field, so that a high-speed response of microsecond level can be achieved. A smectic liquid crystal having spontaneous polarization has a large hysteresis. It is used for a liquid crystal display device of a simple matrix system utilizing a steep threshold characteristic.
[0006]
Among liquid crystals having spontaneous polarization, ferroelectric liquid crystal is known to be a bistable material having a memory property and exhibiting hysteresis in voltage-transmittance characteristics by thinning the cell gap. Conventionally, using these characteristics, a simple matrix type liquid crystal display device has been put to practical use.
[0007]
However, when displaying an image in this memory mode, it is necessary to represent the image in two states, light on and off. In order to realize a halftone such as a gray scale, it was necessary to control the shade by changing the display time.
[0008]
In order to perform this control, complex software processing of video signals and a large-scale circuit of complex hardware are required. Furthermore, a great amount of man-hours are required for software and hardware to take measures against display problems unique to time gradation such as blinking of the observer, pseudo contours and color breakup that appear depending on the operation. As described above, in addition to the actual panel, the peripheral circuit has a large burden on cost and design.
[0009]
Furthermore, even if liquid crystal that moves at high speed is used in the above method, a large number of subfields are required to control the lighting period in order to realize halftones, and the characteristics are fully utilized for displaying images. The situation was impossible.
[0010]
For this reason, an attempt has been made to realize means for displaying by applying an analog voltage to a liquid crystal capable of high-speed response.
[0011]
Recently, as a smectic liquid crystal capable of analog gradation, a polymer stabilized ferroelectric liquid crystal (PS) is obtained by mono-stabilizing a ferroelectric liquid crystal with a liquid crystalline polymer to obtain characteristics without hysteresis. FLC) is being developed. The polymer-stabilized ferroelectric liquid crystal is made by injecting a ferroelectric liquid crystal with a small amount (2 wt.%) Of a liquid crystalline polymer into the liquid crystal panel, and irradiating the entire surface of the liquid crystal panel with ultraviolet rays, and a DC voltage of about 1 to 15V Is applied, the hysteresis characteristic of the ferroelectric liquid crystal is suppressed, and a characteristic having analog gradation can be obtained.
[0012]
Note that polymer stabilization refers to a treatment in which light or heat is applied to a liquid crystal, a liquid crystal polymer, or the like to cause the liquid crystal polymer to undergo a polymerization reaction. Monostabilization refers to a process of obtaining an analog characteristic in which the transmittance is uniquely determined by an electric field by eliminating a bistable state and hysteresis found in a ferroelectric liquid crystal. It is thought that when a polymer is stabilized while applying a single polarity voltage, one of the orientation states of the ferroelectric liquid crystal exhibiting bistability is strongly stabilized and a monostable state is realized (monthly publication) FPD Intelligence 1999.2 p78-82)
[0013]
FIG. 24A shows the voltage-transmittance characteristics of the bistable ferroelectric liquid crystal, and FIG. 24B shows the characteristics of the monostable ferroelectric liquid crystal. The horizontal axis indicates voltage, and the vertical axis indicates transmittance. The bistable ferroelectric liquid crystal has a large hysteresis because the alignment state in which the orientation directions of spontaneous polarization formed by applying an electric field are uniformly aligned is stored. Monostable ferroelectric liquid crystal loses memory properties and hysteresis, and realizes an analog characteristic in which the transmittance gradually increases when a voltage is applied.
[0014]
FIG. 23 is a top view of a simple matrix liquid crystal display device. A simple matrix type liquid crystal display device has a scanning line (Y ₁ ~ Y ₈ ) In the row direction and a signal line (X ₁ ~ X ₈ ) Are arranged so that the signal lines and the scanning lines are orthogonal to each other and the liquid crystal is filled between the substrates.
[0015]
As shown in FIG. 23, a polymer-stabilized ferroelectric liquid crystal is a field sequential method in a liquid crystal display device comprising transparent electrodes patterned in eight columns in the vertical direction and transparent electrodes patterned in eight rows in the horizontal direction. This is expected as an orientation method capable of high-speed response (Semicon-news FORUM21 Preliminary Proceedings p7-13 lecture date February 24, 2000).
[0016]
[Problems to be solved by the invention]
In the simple matrix type liquid crystal display device as shown in FIG. 23, when mono-stabilization processing is performed, a DC voltage is applied between a rectangular patterned conductive film by a DC power source so that the alignment axis of liquid crystal molecules is unidirectional. Align.
[0017]
However, in the simple matrix type liquid crystal display device, there is a problem that the display contrast is remarkably lowered when the number of scanning lines increases. Recently, in an active matrix type liquid crystal display device capable of realizing high definition and high contrast, it has been realized that an image is controlled by applying an analog signal to obtain an image quality with good display performance.
[0018]
However, an active matrix type liquid crystal display device was originally designed with a focus on AC driving, and a method for polymer stabilization using a DC power source or DC voltage has not been proposed.
[0019]
In an active matrix liquid crystal display device, since the pixel electrode is independent via the pixel TFT, a signal necessary for monostabilization cannot be directly applied to the pixel electrode from the outside.
[0020]
In a conventional active matrix type liquid crystal display device, there is a demand for a method for polymer stabilization treatment by applying a single polarity voltage to a liquid crystal over a long period of time using a simple method.
[0021]
[Means for Solving the Problems]
The present invention discloses a means for curing a polymerizing agent by a chemical reaction by applying energy while applying an electric field to a mixture of a liquid crystal and a polymer material to which a polymerizing agent is added in an active matrix type liquid crystal display device. It is.
[0022]
Methods for applying energy include light irradiation and heating. When the photopolymerization agent is added to the polymer material, the polymerization agent may be chemically reacted by light irradiation. For materials that absorb i-line, g-line, and h-line, the photoreaction can be initiated by irradiating the polymerization agent with ultraviolet rays. When the thermal polymerizer is added to the polymer material, the chemical reaction of the thermal polymerizer is started by heating.
[0023]
First, a polymer material to which a polymerizing agent is added will be described. When the added polymerizing agent is photopolymerizable or thermopolymerizable, it undergoes a crosslinking reaction by light or heat energy to stabilize the alignment of the liquid crystal. As a result, liquid crystal characteristics having different characteristics (for example, threshold characteristics) than before energy is applied can be obtained. As the polymer material, a liquid crystalline polymer may be used.
[0024]
When a liquid crystalline polymer is used as the polymer material, a crosslinking reaction of the liquid crystalline polymer occurs by applying energy to the added polymerizer. The liquid crystal is aligned along the side chain of the cross-linked liquid crystal polymer to obtain a stable alignment. When the alignment of the bistable liquid crystal is stabilized in one direction, the threshold characteristics, response time, etc. of the liquid crystal change compared to before energy is applied.
[0025]
As the liquid crystal, for example, a smectic liquid crystal such as a ferroelectric liquid crystal can be used as studied at Tokyo University of Science (Semicon-news FORUM21 Preliminary Proceedings p7-13 Lecture Date February 24, 2000) ).
[0026]
In the active matrix liquid crystal display device, the upper limit of the voltage value that can be applied to the liquid crystal layer can be set. However, according to the present invention, even in the circuit of the active matrix liquid crystal display device designed mainly for AC driving, the DC voltage is applied to the liquid crystal. Can be applied.
[0027]
The present invention applies an electric field to a mixture of a liquid crystal and a polymer material by using a transparent conductive film 510 formed on a substrate 508 and a conductive sheet 300 formed on the substrate 400 as shown in FIG. It is characterized by applying energy to a mixture of polymer materials. If an electric field is applied using a DC power supply, a DC voltage can be applied.
[0028]
FIG. 10 is a cross-sectional view of a pixel portion and a terminal portion of an active matrix liquid crystal display device. If the structure of FIG. 10 is used, a voltage of an arbitrary magnitude can be applied to the liquid crystal layer. A conductive sheet (conductive film) provided on the surface opposite to the surface on which the TFT of the substrate 400 is provided, and a transparent conductive film (counter electrode) facing the TFT with a liquid crystal in between are used. Therefore, since the electric field is applied to the liquid crystal, a DC voltage can be applied to the liquid crystal using a conventional liquid crystal display device as it is. However, in the configuration of FIG. 10, an arbitrary DC voltage can be applied to the liquid crystal layer. However, since a voltage is applied to the liquid crystal layer via the element substrate, a high voltage is applied to supply a predetermined voltage to the liquid crystal layer. It is necessary to apply. For this reason, devices such as a direct current high voltage power supply for supplying the same are also required.
[0029]
In addition, the present invention is characterized in that a conductive film 200 is formed on a substrate 400 of an element substrate as shown in FIG. 6, and then an element is formed. An electric field can be applied to the mixture of the liquid crystal and the polymer material by the transparent conductive film 510 and the conductive film 200 formed on the counter substrate 508, and at the same time, energy can be applied to the mixture of the liquid crystal and the polymer material. If a DC power source is used, the voltage applied to the mixture can be a DC voltage.
[0030]
FIG. 6 is a cross-sectional view of a pixel portion and a terminal portion of an active matrix liquid crystal display device. If the structure of FIG. 6 is used, an arbitrary voltage can be applied to the liquid crystal layer. In addition, since a voltage is applied to the liquid crystal layer through the first interlayer film 457, the second interlayer film 458, and the like between the conductive film 200 and the transparent conductive film 510 (counter electrode), a DC voltage is applied. The value of the DC power supply need not be so large. On the other hand, one electrode for applying a DC voltage to the liquid crystal layer is a conductive film 200 provided on the substrate 400 of the element substrate, and the TFT is formed in order to form the TFT above the conductive film. The temperature of the process is limited by the heat resistance of the conductive film.
[0031]
In addition, in the active matrix type liquid crystal display device according to the present invention, after the liquid crystal is caused to respond to a predetermined position while applying the same polarity voltage to the pixel electrode in a plurality of continuous frames as shown in FIG. Thus, energy is applied to the mixture of the liquid crystal and the polymer material while maintaining the voltage applied to the liquid crystal layer. As a result, the same effect can be obtained as when a voltage is applied to the liquid crystal layer by a DC power source.
[0032]
FIG. 2 shows a timing chart and an optical response of the liquid crystal layer when the liquid crystal display device is operated by line sequential driving. FIG. 2 illustrates external signals input to the liquid crystal display device, signals input to the pixel portion of the liquid crystal display device, and voltages applied to the pixels of the pixel portion. The gate start pulse 103 and the gate clock pulse 104 as external signals, the source driver output 112 and the gate pulse 106 as signals input to the pixel portion, and the gate line g as a voltage applied to the pixels in the pixel portion, respectively. ₁ ~ G _n The potential of the pixel connected to is shown.
[0033]
In the configuration of FIG. 2, the liquid crystal layer can be mono-stabilized by changing a signal input from the outside in a conventional liquid crystal display device. Although it is necessary to determine the external signal so that the signal output to the source wiring has the same polarity over a plurality of frames, on the other hand, the transparent conductive film (electrode paired with the pixel electrode) on the counter substrate and the element substrate With this pixel electrode, a DC voltage can be applied to the liquid crystal layer over a long period of time, so the value of the DC power supply for applying the DC voltage does not have to be so large. As long as the setting of the external signal is changed, a DC voltage can be applied to the liquid crystal layer by a conventional liquid crystal display device or a drive circuit of the conventional liquid crystal display device.
[0034]
Further, in the active matrix type liquid crystal display device according to the present invention, the gate start pulse 114 input from the outside to the gate driver is held at a constant level in a plurality of continuous frames as shown in FIG. In addition, the electric charge can be constantly supplied. Thereby, even if there is a leakage of current such as a storage capacitor, it is possible to prevent fluctuations in voltage applied to the liquid crystal layer. Then, energy is applied to the mixture of the liquid crystal and the polymer material while applying a voltage of the same polarity to the pixel electrode. As a result, the same effect can be obtained as when a voltage is applied to the liquid crystal layer by a DC power source.
[0035]
FIG. 1 shows a timing chart and an optical response of a liquid crystal layer when the liquid crystal display device is operated by line sequential driving. FIG. 1 illustrates an external signal input to the liquid crystal display device, a signal input to the pixel portion of the liquid crystal display device, and a signal input to the pixel. 2 differs from FIG. 2 in that a gate start pulse 114 input to the liquid crystal display device as an external signal, a gate pulse 115 input to the pixel portion, and a gate line g ₁ ~ G _n And the potential of the pixel connected to.
[0036]
In the configuration of FIG. 1, it is necessary to change the gate start pulse of the external signal with respect to FIG. However, as in the configuration of FIG. 2, a DC voltage can be applied to the liquid crystal with the configuration of the conventional liquid crystal display device or the drive circuit of the conventional liquid crystal display device.
[0037]
The advantages and disadvantages of each configuration of the present invention were compared. As a method of applying a DC voltage to the liquid crystal in the active matrix type liquid crystal display device, a more versatile method is a liquid crystal as shown in FIGS. The configuration of the display device is the same as the conventional method, and an external signal input to the liquid crystal display device is made appropriate.
[0038]
DETAILED DESCRIPTION OF THE INVENTION
The first to fourth means can be applied to the present invention. Details will be described below.
[0039]
[ reference Form 1] reference Form 1 discloses the first means.
[0040]
The first means is shown below. FIG. 2 shows a timing chart of line sequential driving and an optical response of the liquid crystal layer. The active matrix liquid crystal display device includes gate lines provided in n rows in the row direction and source lines provided in m rows in the column direction.
[0041]
FIG. 25 shows a circuit of the pixel portion 600. The pixel portion includes a pixel TFT 602, a storage capacitor 604, and a liquid crystal cell 603 for each pixel 601. A liquid crystal cell is a cell having a configuration in which a liquid crystal layer is sandwiched between two electrodes via an alignment film. The gate electrode of the pixel TFT is g ₁ ~ G _n Is connected to any one of the gate wirings 605 having the following addresses. One of the source and drain of the pixel TFT is s ₁ ~ S _n Is connected to any one of the source wirings 606 having the address of, and the other is connected to one electrode of the storage capacitor and the liquid crystal cell.
[0042]
An element substrate of a liquid crystal display device includes a pixel portion and a drive circuit portion provided around the pixel portion.
[0043]
The drive circuit unit uses a CMOS circuit combined with the drive circuit TFT as a basic circuit. As the external signal, a gate pulse, a gate clock pulse, and the like are input to the gate driver, and an original image signal, a horizontal synchronization signal, a divided clock, and the like are input to the source driver. The original image signal is selected and held by these signals and applied to a predetermined pixel.
[0044]
FIG. 3 is a block diagram for explaining the operation of the gate driver. Of the signals input to the gate driver 101 from the outside, the gate start pulse 103 is a vertical synchronization signal indicating the start point of one screen of the original image signal. The gate clock pulse 104 is a clock of the shift register 102 and shifts the gate start pulse 103.
[0045]
A selection pulse is formed based on the gate start pulse 103 and the gate clock pulse 104 input to the shift register 102. The selection pulse is supplied to the gate wiring of a predetermined row according to the pulse width, and determines a period during which the source and drain of the pixel TFT are in a conductive state.
[0046]
This selection pulse is converted into a voltage necessary for bringing the pixel TFT into a conductive state via the level shifter 105. This pulse is called a gate pulse 106. The gate pulse is g ₁ ~ G _n Is output to the gate wiring having the address.
[0047]
The operation of the gate driver will be described with reference to FIGS. As shown in FIG. 3, a gate start pulse 103 and a gate clock pulse 104 are input to the shift register 102 of the gate driver 101 as external signals. As shown in FIG. 2, the gate start pulse 103 has a pulse with a predetermined amplitude at the beginning of one frame for displaying the screen. The gate clock pulse 104 has a pulse having a predetermined amplitude at a section for each row (gate wiring). A selection pulse (not shown) designates selection of one gate wiring in the same period as the period 115 between the pulses of the gate clock pulse 104.
[0048]
The voltage level of the selection pulse is converted by the level shifter 105 connected to the shift register, and a voltage sufficient to switch the active layer of the TFT element is applied to the gate wiring as the gate pulse 106. Gate lines are sequentially selected from the top of the screen by the gate pulse.
[0049]
When the gate start pulse 103 is output only for a predetermined period at the beginning of one frame, the period 114 for selecting one gate wiring is equal to the period 115 in which the gate clock pulse is output.
[0050]
FIG. 4 is a block diagram of the source driver. The divided clock 117 and the horizontal synchronizing signal 118 are input to the shift register 108, and the shift register correctly extracts a signal to be applied to the pixels per row from the original image signal 119 (C ₁ ~ C _m ).
[0051]
The original image signal 109 selected by the sampling signal becomes pixel data for one row, and is transferred to the hold circuit 111 by the transfer signal (TR) 120.
[0052]
A voltage to be applied to each pixel is held in the hold circuit 111. When the pixel TFT is turned on by a gate pulse, a voltage equal to the held level is output to the source wiring. A signal output from the source driver to the source wiring is referred to as a source driver output 112 for convenience.
[0053]
The operation of the source driver 107 will be described with reference to FIG. In the source driver shift register 108, the sampling signal (C ₁ ~ C _m ), The original picture signal 109 is divided into data for each gate wiring. The divided data is held in the sampling circuit 110. After the data is held for a certain period, the transfer signal (TR) is input and the divided data is held in the hold circuit 111. Then, in synchronization with the gate pulse, the source driver output 112 (S ₁ ~ S _m ) Is output. Source driver output 112 (S ₁ ~ S _m ), Which outputs data for one row at the same time is called line sequential driving.
[0054]
As shown in FIG. 2, a voltage corresponding to the source driver output 112 is applied to the pixel electrode. A voltage 113 applied to the liquid crystal layer when line-sequential driving is performed with the source driver output set to + 5V is shown. Since all the source driver outputs in the pixel are set to + 5V, all the pixels of the selected gate wiring have a constant potential.
[0055]
In a period 114 in which the gate wiring is selected, a charge for generating a potential difference corresponding to the source driver output is supplied to the liquid crystal cell and the storage capacitor connected to the pixel TFT in the conductive state. Further, even if the spontaneous polarization of the ferroelectric liquid crystal is reversed, a charge sufficient to compensate for the voltage drop due to the reversal of the spontaneous polarization is supplied to the liquid crystal cell. Therefore, the potentials of the liquid crystal cell and the storage capacitor are kept constant during this period.
[0056]
After the gate selection period 114 ends, a voltage drop occurs due to the reversal of the spontaneous polarization of the ferroelectric liquid crystal, and the voltage applied to the liquid crystal layer decreases. In this case, the liquid crystal is caused to respond by applying a potential having the same polarity to the pixel electrode over several frames.
[0057]
When a potential of the same polarity is applied to the pixel electrode for a predetermined time to cause the liquid crystal to make a cumulative response, the inversion of the spontaneous polarization of the liquid crystal is completed, and the alignment direction of the liquid crystal is uniformly determined. Then, charge consumption due to the reversal of spontaneous polarization is eliminated, and the potential of the liquid crystal cell and the potential of the storage capacitor are almost the same between the period for selecting the gate wiring and the period for selecting the gate wiring.
[0058]
By making the cumulative response, the potential of the liquid crystal layer and the storage capacitor finally becomes + 5V. Then, when the inversion of the spontaneous polarization is completed, the ferroelectric liquid crystal may be mono-stabilized by irradiating with ultraviolet rays.
[0059]
The order of steps is shown in the flowchart of FIG. The alignment film formation (1) to the sealing (3) of the liquid crystal panel inlet are completed. Then, after attaching the flexible printed wiring board with an anisotropic conductive film (10), a voltage is applied to the liquid crystal while driving the liquid crystal display device (11), and when the response of the liquid crystal is completed, the potential is retained. The ferroelectric liquid crystal is mono-stabilized by ultraviolet irradiation (12) while being held by the above.
[0060]
That is, the element substrate having the rubbed alignment film and the counter substrate are bonded so that the surfaces on which the alignment film is formed face each other, bonded by curing the sealant, and then divided into individual panels. . A liquid crystal material is injected between the element substrate and the counter substrate, the injection port is sealed with a sealant, and an FPC (Flexible Print Circuit) is attached on the external terminal. An external signal is input to the liquid crystal display device formed in this way through a flexible printed wiring board and a voltage is applied to the liquid crystal to mono-stabilize the ferroelectric liquid crystal.
[0061]
[ reference Form 2] reference Form 1 discloses the first means.
[0062]
The second means of the present invention is an extension of the first means.
[0063]
Some active matrix display devices do not have a storage capacitor. Moreover, there is a case where the capacity cannot be sufficiently secured due to the balance with the aperture ratio. We propose a liquid crystal monostabilization method in such a case.
[0064]
As shown in FIG. 2, in the line sequential driving, the liquid crystal layer is charged only during the period 114 in which the gate wiring is selected. However, in an active matrix liquid crystal display device, the voltage applied to the liquid crystal layer varies when the voltage holding ratio of the liquid crystal layer is poor or due to leakage of current in the storage capacitor. As a result, the voltage for stabilizing the polymer fluctuates.
[0065]
During the period when the gate wiring is selected, the pixel TFT is in a conductive state, and charges are supplied from the source wiring to the storage capacitor and the liquid crystal cell via the pixel TFT. For this reason, even if charges are consumed due to current leakage of the storage capacitor, etc., charges sufficient to compensate the consumed charge are supplied via the pixel TFT, and the potentials of the storage capacitor and the liquid crystal cell become constant.
[0066]
However, in the configuration without a storage capacitor or when the storage capacitor cannot be sufficiently secured, the potential applied to the liquid crystal of the pixel due to the off-leak characteristics of the pixel TFT, the current leakage of the liquid crystal layer, etc. during the non-selection period of the gate wiring Will fluctuate.
[0067]
If the polymer stabilization treatment is performed in this state, the orientation of the liquid crystal after the polymer stabilization may become unstable.
[0068]
However, according to the second means, it is possible to apply a constant voltage to the liquid crystal layer even if there is leakage of the storage capacitor or the current in the liquid crystal layer.
[0069]
FIG. 1 shows a timing chart of line sequential driving and a voltage applied to the liquid crystal layer. An active matrix liquid crystal display device includes a gate wiring provided in the row direction and a source wiring provided in the column direction. 1, the same elements as those in FIG. 2 are denoted by the same reference numerals.
[0070]
The difference from FIG. 2 will be described in detail. The gate start pulse 114 is always output at a constant level when the ferroelectric liquid crystal is stabilized in a polymer. As a result, the gate pulse 115 is always selected when the polymer is stabilized, and charges can be supplied to the liquid crystal layer and the storage capacitor during the polymer stabilization process.
[0071]
When the gate start pulse 114 is output at a constant voltage over a plurality of frames, the gate pulse 115 is held at a constant voltage level over a plurality of frames regardless of the pulse period of the gate clock pulse 104. Therefore, the gate wiring is always selected, and by supplying a constant original image signal, all the pixel TFTs become conductive over a plurality of frames, and the liquid crystal in the pixel portion has the same level voltage. Can be applied constantly.
[0072]
Thereby, it is possible to apply a constant voltage to the liquid crystal layer while suppressing the potential of the liquid crystal layer from fluctuating due to current leakage when stabilizing the polymer.
[0073]
Looking at the voltage 116 applied to the liquid crystal layer, the electric potential is constantly charged in the storage capacitor and the liquid crystal layer, so that the potential is stable.
[0074]
The process is shown in the flowchart of FIG. After the alignment film formation (1) to the sealing of the liquid crystal panel inlet (9) is completed and the flexible printed wiring board is attached with an anisotropic conductive film (10), the active matrix type liquid crystal display device is driven. While applying a constant potential to the liquid crystal (11), the ferroelectric liquid crystal is mono-stabilized by irradiating with ultraviolet rays (12).
[0075]
The element substrate and the counter substrate having the rubbed alignment film are bonded so that the surfaces on which the alignment film is formed face each other, and the element substrate and the counter substrate are bonded to each other by curing the sealing agent. Is divided. A liquid crystal material such as a ferroelectric liquid crystal or a liquid crystalline polymer is injected between the element substrate and the counter substrate, the injection port is sealed with a sealant, and FPC (Flexible Print Circuit: flexible) is formed on the external terminal. Printed wiring board). A liquid crystal display device thus formed is monostable with a ferroelectric liquid crystal while inputting a signal from an external terminal via an FPC, applying a constant voltage to the liquid crystal of a predetermined pixel portion, and irradiating ultraviolet rays. Turn into.
[0076]
The gate start pulse input from the FPC to the liquid crystal display device as an external signal maintains a constant voltage value. As a result, the gate pulse input to the gate wiring maintains a constant voltage over a plurality of frames, and the pixel TFT becomes conductive over the plurality of frames. As a result, a charge sufficient to compensate for the weak potential fluctuation accompanying the current leakage and the movement of impurity ions in the liquid crystal is always supplied to the liquid crystal cell, and the voltage applied to the liquid crystal during monostabilization is kept constant. Can be.
[0077]
[Embodiment 1 In the present embodiment, the ferroelectric liquid crystal is polymerized using a third means.
[0078]
The third means adds an electrode for monostabilization on the active matrix substrate. That is, in the active matrix type liquid crystal display device, the absolute value of the direct current voltage that can be applied when the polymer stabilization process is performed from the withstand voltage of the element is about 5 to 7 V, and the polymer stabilization process is performed. The maximum DC voltage is limited. However, according to the third means, there is no limitation on the DC voltage value, and a voltage can be applied to the liquid crystal layer.
[0079]
A manufacturing process of the third means will be described with reference to FIGS. A chain line CC ′ in FIG. 6 corresponds to a cross section taken along a chain line CC ′ in the top view of FIG. 6 and 7 corresponds to a cross section obtained by cutting the top view of FIG. 8 along a chain line BB ′. 6-8 and FIG. 14, the same element is shown with the same number. FIG. 9 shows the order of the steps for stabilizing the polymer. Details of the manufacturing process of the element substrate of FIGS.
[0080]
FIG. 14 is a top view of the liquid crystal display device. A transparent conductive film 510 and a light shielding film 509 are formed on the counter substrate. The common pad 520 of the counter substrate has a stacked structure of a transparent conductive film 510 and a light shielding film 509. A gate driver 521 and a source driver 522 are formed on the element substrate. The element substrate and the counter substrate are bonded to each other with a sealant 513. A flexible printed wiring board 519 is bonded to the element substrate.
[0081]
The common pad is a pad for conducting the element substrate and the counter substrate through a conductive material, and has a size of 100 μm to 1000 μm square.
[0082]
The feature of the third means is that the conductive film 200 is formed on the substrate 400 of the element substrate as shown in FIG. As the conductive film 200, for example, an indium tin oxide (ITO) film can be used.
[0083]
On the conductive film 200, a silicon dioxide film and a silicon oxynitride film are formed as a film 201 having a low relative dielectric constant in a thickness of 1 to 6 μm, and a parasitic capacitance generated between the element wiring and the conductive film 200 is obtained. Reduce.
[0084]
The base film 401 prevents impurities such as alkali metal flowing out from the glass substrate from contaminating the semiconductor layer. For the base film, silicon nitride, silicon dioxide, or the like can be used. For example, a silicon nitride film (SiN) film is formed with a thickness of 10 to 100 nm.
[0085]
Further, a semiconductor layer 405, a gate insulating film 432, a gate electrode 436, a capacitor electrode 437, a first interlayer film 457, a second interlayer film 458, a source wiring 465, and a pixel electrode 467 are formed, whereby an element substrate can be formed. Furthermore, lead wires 517 for bonding the flexible printed wiring board are formed on the element substrate. When the liquid crystal display device is a transmissive type, the pixel electrode 467 is made of a transparent conductive film. In the case of the reflection type, the pixel electrode is made of a conductive thin film having a function of reflecting light.
[0086]
A light shielding film 509 is formed on the substrate 508 of the counter substrate. Chrome or the like can be used for the light shielding film.
[0087]
A transparent conductive film 510 is formed over the light shielding film 509. As the transparent conductive film, an indium tin oxide (ITO) film can be used.
[0088]
Alignment films 511 and 512 are formed on the element substrate and the counter substrate. In order to satisfactorily align the ferroelectric liquid crystal, the alignment film is preferably a material having good surface flatness and a low pretilt angle. In displaying an image, the thickness of the alignment film is preferably 30 nm to 80 nm in order to suppress voltage loss due to the alignment film.
[0089]
The alignment films 511 and 512 are rubbed. Make the rubbing direction parallel.
[0090]
A conductive paste is formed on the common pad of the counter substrate. The conductive paste is obtained by mixing a conductive spacer 516 with a sealant 515. The conductive spacer is obtained by coating the surface of a particulate spacer with gold powder. A lead wire 517 for bonding the transparent conductive film 510 of the counter substrate and the flexible printed wiring board is electrically connected by a conductive paste.
[0091]
The conductive paste uses a sealant 515 as a main material, but some sealants can be compressed only about 2.5 μm depending on the material. It is difficult to form a cell gap of 1 to 2 μm necessary for the alignment of the ferroelectric liquid crystal. For this reason, in the region where the conductive paste is formed, it is preferable that the low dielectric constant film 201 or the second interlayer film 458 be removed by etching so that the cell gap of the pixel portion can be reduced.
[0092]
The counter substrate and the element substrate are bonded together by the sealant 513. In the region where the sealant 513 is formed, the low dielectric constant film 201 or the second interlayer film 458 may be removed by etching so that the cell gap of the pixel portion can be reduced.
[0093]
The counter substrate and the element substrate are divided.
[0094]
The liquid crystal material 514 is heated to the isotropic phase and injected. After confirming that the liquid crystal material is injected over the entire surface of the liquid crystal panel, it is gradually cooled to room temperature at 0.01 to 3 ° C./min. Good orientation can be obtained by slow cooling.
[0095]
As the liquid crystal material 514, a mixture of a ferroelectric liquid crystal, a liquid crystal polymer, and a polymerization initiator is used. For example, Felix M4851 / 100 manufactured by Clariant is used as the ferroelectric liquid crystal. As the liquid crystalline polymer, a polymer obtained by adding 2 to 3 wt.% Of a polymerization initiator to a liquid crystalline acrylate monomer UCL-001 manufactured by Dainippon Ink & Chemicals, Inc. is used. This liquid crystal acrylate monomer is added in a small amount (2 wt.%) To the ferroelectric liquid crystal.
[0096]
The flexible printed wiring board 518 is bonded to the lead wire 517 by the anisotropic conductive film 519. Thereby, the liquid crystal material 514 can be subjected to polymer stabilization treatment by applying a DC voltage between the flexible printed wiring board 518 and the conductive film 200.
[0097]
The transparent conductive film 510 of the counter substrate is connected to the lead wire 517 of the element substrate through the conductive spacer 516. For this reason, by applying a single polarity voltage to the flexible printed wiring board connected to the lead wire 517 of the element substrate via the anisotropic conductive film and the conductive film 200 on the element substrate, A voltage is applied to the liquid crystal layer, and the polymer can be stabilized with a single polarity.
[0098]
For example, a function generator “MODEL275” manufactured by Wavetech may be used as a device for applying a DC voltage.
[0099]
A DC voltage is applied between the conductive film 200 and the transparent conductive film 510 formed on the counter substrate. The value of the DC voltage of the power supply varies depending on the relative dielectric constant of the liquid crystal material, the film thickness of the interlayer film of the element substrate, and the voltage to be applied to the liquid crystal layer. The value of the DC voltage of the power supply is determined in consideration of the film thickness of the interlayer film, the cell gap, and the like.
[0100]
As shown in FIG. 7, in an active matrix liquid crystal display device using polysilicon as a semiconductor layer of a switching element, the driver circuit portion 506 and the pixel portion 507 are placed on the same substrate because of the high mobility of polysilicon. Can be formed.
[0101]
In such a liquid crystal display device, when the transparent conductive film 510 is formed on the counter substrate, the transparent conductive film 510 above the drive circuit portion is preferably removed by etching so that the drive circuit portion does not have parasitic capacitance. .
[0102]
Further, the conductive film 200 is preferably removed in the driver circuit portion so that parasitic capacitance is not formed.
[0103]
According to this embodiment, when a single polarity voltage is applied to the liquid crystal layer, one electrode is the transparent conductive film 510 provided on the counter substrate, and the other electrode is a conductive film provided on the element substrate. A single polarity voltage can be applied to the liquid crystal between the two electrodes. Since a single polarity voltage is applied to the liquid crystal without using the pixel TFT, the absolute value of the voltage can be freely changed.
[0104]
According to the present embodiment, the ultraviolet curable sealant that seals the injection port and the liquid crystal material are irradiated with ultraviolet rays at once, so that the photocurable treatment of the sealant and the polymer stabilization treatment of the liquid crystal material are performed. And simultaneously. Since the liquid crystal material is exposed to ultraviolet rays for the first time in the polymer stabilization treatment step, a good polymer stabilization treatment can be performed.
[0105]
[Embodiment 2 Embodiment 2 Is a polymer stabilization treatment using a fourth means.
[0106]
Here, the third means places an upper limit on the temperature of the process for forming the element due to the heat resistance of the conductive film 200 formed on the element substrate. According to the fourth means, the process temperature of the element substrate can be arbitrarily set.
[0107]
The fourth means will be described with reference to FIGS. A chain line AA ′ in FIG. 10 corresponds to a cross section taken along a chain line AA ′ in the top view of FIG. A chain line DD ′ and a chain line EE ′ in FIGS. 10 and 11 correspond to a cross section taken along the chain line DD ′ and the chain line EE ′ in the top view of FIG. 10-12 and FIG. 14, the same element is shown with the same number. FIG. 13 shows a flowchart for polymer stabilization. The manufacturing process of the element substrate and the liquid crystal display device shown in FIGS.
[0108]
As shown in FIG. 10, the element substrate includes a first semiconductor layer 484, a second semiconductor layer 491, a gate insulating film 432, a gate electrode 485 that also serves as a capacitor electrode, a first interlayer film 472, a second interlayer film 473, A source wiring 483 and a pixel electrode 482 are formed. Furthermore, lead wires 517 for bonding the flexible printed wiring board are formed on the element substrate. When the liquid crystal display device is a transmissive type, the pixel electrode 482 is made of a transparent conductive film. In the reflection type, the pixel electrode 482 is formed of a conductive thin film having a function of reflecting light.
[0109]
A light shielding film 509 is formed on the substrate 508 of the counter substrate. Chrome or the like can be used for the light shielding film.
[0110]
A transparent conductive film 510 is formed over the light shielding film 509. As the transparent conductive film, an indium tin oxide (ITO) film can be used.
[0111]
Alignment films 511 and 512 are formed on the element substrate and the counter substrate. The liquid crystal is aligned in parallel by rubbing.
[0112]
A conductive paste is formed on the common pad 520 of the counter substrate. The conductive paste is obtained by mixing a conductive spacer 516 with a sealant 515. The conductive spacer is obtained by coating the surface of a particulate spacer with gold powder. A lead wire 517 for bonding the transparent conductive film 510 of the counter substrate and the flexible printed wiring board is electrically connected by a conductive paste.
[0113]
Sealing agent 515 is used for the conductive paste, but depending on the material, there is a sealing agent that can only compress about 2.5 μm, and forms a cell gap of 1 to 2 μm necessary for the alignment of the ferroelectric liquid crystal. Is difficult. Therefore, it is preferable that a region where the conductive paste is formed be removed from the first interlayer film 472 and the second interlayer film 473 by etching so that the cell gap of the pixel portion can be reduced.
[0114]
The counter substrate and the element substrate are bonded together by the sealant 513. In the region where the sealant 513 is formed, the first interlayer film 472 and the second interlayer film 473 are preferably removed by etching so that the cell gap of the pixel portion can be reduced.
[0115]
The counter substrate and the element substrate are divided.
[0116]
A liquid crystal material 514 is injected. As the liquid crystal material 514, a mixture of a ferroelectric liquid crystal, a liquid crystal polymer, and a polymerization initiator is used. For example, Felix M4851 / 100 manufactured by Clariant is used as the ferroelectric liquid crystal. As the liquid crystalline polymer, liquid crystalline acrylate monomer UCL-001 manufactured by Dainippon Ink & Chemicals, Inc. is used. The polymerization initiator is added to the liquid crystal acrylate monomer by 2 to 3 wt.%. A small amount (2 wt.%) Of the liquid crystalline acrylate monomer is added to the ferroelectric liquid crystal.
[0117]
The flexible printed wiring board 519 is bonded by the anisotropic conductive film 518. The conductive sheet 300 and the flexible printed wiring board are connected to a DC power source, and a DC voltage is applied between the transparent conductive film 510 formed on the substrate 508 of the counter substrate and the conductive sheet 300. The conductive sheet 300 may be formed on the substrate 400 by film formation. A metal plate may be formed in contact with the substrate 400. A conductive and adhesive tape may be formed on the substrate 400.
[0118]
As the conductive and sticky tape, a conductive tape in which an adhesive layer and a conductive layer are laminated can be used.
[0119]
The value of the DC voltage of the power supply varies depending on the relative dielectric constant of the liquid crystal material, the glass thickness of the element substrate, the voltage applied to the liquid crystal layer, and the like. The DC voltage value of the power supply is determined by the following formula.
[0120]
[Expression 1]

[0121]
In Equation 1, V is the DC voltage value of the power source, V _LC Is the voltage applied to the liquid crystal material, ε _rLC Is the dielectric constant of the ferroelectric liquid crystal, d _LC Is the cell gap, ε _rs Is the relative dielectric constant of the element substrate, d _s Indicates the thickness of the element substrate.
[0122]
The cell gap is 2.0 μm, the dielectric constant of the glass of the element substrate is 3.0, and the voltage applied to the liquid crystal layer is 5V. Among the liquid crystal materials, when the relative permittivity of the ferroelectric liquid crystal is 10 to 30 and the glass thickness of the element substrate is 300 to 1100 μm, the DC voltage value of the power source is 2.5 to 27.5 kV. Most of the DC voltage of the power supply is applied to the glass.
[0123]
In order to reduce the thickness of the liquid crystal display device, the applied DC voltage can be reduced by etching the glass of the element substrate and reducing the thickness of the glass.
[0124]
Irradiation of ultraviolet light from the vertical direction to the entire surface of the substrate while applying a DC voltage results in monostabilization of the ferroelectric liquid crystal.
[0125]
After completion of mono-stabilization of the ferroelectric liquid crystal, the conductive sheet 300 is peeled off from the back surface of the substrate 400 of the element substrate.
[0126]
In addition to using the conductive sheet 300, a transparent conductive film can be formed on the back surface of the substrate 400 of the element substrate. In the case of a reflective liquid crystal display device, a metal electrode having a reflection function may be formed on the back surface of the element substrate.
[0127]
With the above method, a desired DC voltage can be applied to a desired region.
The present invention can be applied regardless of the temperature of the element substrate thermal process.
[0128]
As shown in FIG. 11, in an active matrix liquid crystal display device using polysilicon as a semiconductor layer of a switching element, the driver circuit portion 506 and the pixel portion 507 are placed on the same substrate because of the high mobility of polysilicon. Can be formed.
[0129]
In such a liquid crystal display device, when the transparent conductive film 510 is formed on the substrate 508 of the counter substrate, the transparent conductive film 510 above the drive circuit portion is etched by etching so that parasitic capacitance is not applied to the drive circuit portion. It is good to remove.
[0130]
Further, when the polymer is stabilized, the conductive sheet 300 may be formed on the back surface of the substrate 400 of the element substrate with the drive circuit portion therebetween.
[0131]
According to the present embodiment, one of the electrodes for applying a single polarity voltage to the liquid crystal layer is the transparent conductive film 510 of the counter substrate, and the other is the conductive sheet 300 provided on the back surface of the element substrate. Therefore, an electrode for monostabilizing the liquid crystal layer can be provided regardless of the temperature of the step of forming the element.
[0132]
[ reference Example]
[ Reference example 1 ] (Example of manufacturing process of element substrate used for reflective liquid crystal display device)
Of the present invention reference Examples will be described with reference to FIGS. 15 to 17 and FIG. A chain line BB ′ in the cross-sectional view of FIG. 17 corresponds to that of FIG. 8 cut along the chain line BB ′. Here, a method for simultaneously manufacturing the pixel TFT and the storage capacitor of the pixel portion and the TFT of the driver circuit provided in the periphery of the display region will be described in detail according to the process.
[0133]
Book reference In the example, a method for manufacturing a pixel TFT which is a switching element of a pixel portion and a TFT of a driver circuit (a signal line driver circuit, a scanning line driver circuit, or the like) provided around the pixel portion over the same substrate will be described according to steps. . However, in order to simplify the description, a CMOS circuit which is a basic configuration circuit is illustrated in the drive circuit portion, and an n-channel TFT is illustrated in a cross section along a certain path in the pixel TFT of the pixel portion. To do.
[0134]
First, as shown in FIG. 15A, a silicon oxide film on a substrate 400 made of glass such as barium borosilicate glass represented by Corning # 7059 glass or # 1737 glass, or aluminoborosilicate glass, A base film 401 made of an insulating film such as a silicon nitride film or a silicon oxynitride film is formed. For example, SiH by plasma CVD method ₄ , NH ₃ , N ₂ A silicon oxynitride film 401a made of O is formed to 10 to 200 nm (preferably 50 to 100 nm) and similarly SiH ₄ , N ₂ A silicon oxynitride silicon film 401b formed from O is stacked to a thickness of 50 to 200 nm (preferably 100 to 150 nm). Book reference Although the base film 401 is shown as a two-layer structure in the example, it may be formed as a single layer film of the insulating film or a structure in which two or more layers are stacked.
[0135]
The island-shaped semiconductor layers 402 to 405 are formed using a crystalline semiconductor layer in which a semiconductor layer having an amorphous structure is formed using a laser crystallization method or a known thermal crystallization method. The island-like semiconductor layers 402 to 405 are formed with a thickness of 25 to 80 nm (preferably 30 to 60 nm). There is no limitation on the material of the crystalline semiconductor layer, but it is preferably formed of silicon or a silicon germanium (SiGe) alloy.
[0136]
In order to fabricate a crystalline semiconductor film by laser crystallization, a pulse oscillation type or continuous emission type excimer laser, YAG laser, YVO _Four Use a laser. When these lasers are used, it is preferable to use a method in which laser light emitted from a laser oscillator is linearly collected by an optical system and irradiated onto a semiconductor film. Crystallization conditions are appropriately selected by the practitioner. When an excimer laser is used, the pulse oscillation frequency is 30 Hz and the laser energy density is 100 to 400 mJ / cm. ² (Typically 200-300mJ / cm ² ). When a YAG laser is used, the second harmonic is used and the pulse oscillation frequency is 1 to 10 kHz, and the laser energy density is 300 to 600 mJ / cm. ² (Typically 350-500mJ / cm ² ) Then, laser light condensed linearly with a width of 100 to 1000 μm, for example, 400 μm, is irradiated over the entire surface of the substrate, and the superposition ratio (overlap ratio) of the linear laser light at this time is 80 to 98%.
[0137]
Next, a gate insulating film 407 is formed to cover the island-shaped semiconductor layers 402 to 405. The gate insulating film 407 is formed of an insulating film containing silicon with a thickness of 40 to 150 nm by using a plasma CVD method or a sputtering method. Book reference In the example, a silicon oxynitride film having a thickness of 120 nm is formed. Needless to say, the gate insulating film is not limited to such a silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure. For example, in the case of using a silicon oxide film, TEOS (Tetraethyl Orthosilicate) and O ₂ The reaction pressure is 40 Pa, the substrate temperature is 300 to 400 ° C., and the high frequency (13.56 MHz) power density is 0.5 to 0.8 W / cm. ² And can be formed by discharging. The silicon oxide film thus manufactured can obtain good characteristics as a gate insulating film by subsequent thermal annealing at 400 to 500 ° C.
[0138]
Then, a first conductive film 408 and a second conductive film 409 for forming a gate electrode are formed over the gate insulating film 407. Book reference In the example, the first conductive film 408 is formed with TaN to a thickness of 50 to 100 nm, and the second conductive film 409 is formed with W to a thickness of 100 to 300 nm.
[0139]
When forming a W film, it is formed by sputtering using W as a target. In addition, tungsten hexafluoride (WF ₆ It can also be formed by a thermal CVD method using In any case, in order to use as a gate electrode, it is necessary to reduce the resistance, and the resistivity of the W film is desirably 20 μΩcm or less. The resistivity of the W film can be reduced by increasing the crystal grains. However, when there are many impurity elements such as oxygen in W, crystallization is hindered and the resistance is increased. Therefore, in the case of sputtering, the resistivity is obtained by using a W target with a purity of 99.9999% and forming a W film with sufficient consideration so that impurities are not mixed in the gas phase during film formation. 9-20 μΩcm can be realized.
[0140]
Book reference In the example, TaN is used for the first conductive film 408 and W is used for the second conductive film 409. However, any of the elements selected from Ta, W, Ti, Mo, Al, and Cu, or the element as a main component. It may be formed of an alloy material or a compound material. Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus may be used. Book reference As a combination other than the example, the first conductive film is made of tantalum (Ta), the second conductive film is made of W, the first conductive film is made of tantalum nitride (TaN), and the second conductive film There are a combination in which the conductive film is Al, a combination in which the first conductive film is formed of tantalum nitride (TaN), and the second conductive film is Cu.
[0141]
Next, resist masks 410 to 415 and a resist 417 are formed, and a first etching process for forming electrodes and wirings is performed. Book reference In the example, ICP (Inductively Coupled Plasma) etching method is used, etching gas is mixed, and 500 W RF (13.56 MHz) power is applied to the coil type electrode at a pressure of 1 Pa to generate plasma. And do it. 100 W RF (13.56 MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. By appropriately selecting the etching gas, the W film and the TaN film are etched to the same extent.
[0142]
Under the above etching conditions, by making the shape of the resist mask suitable, the end portions of the first conductive layer and the second conductive layer have an angle of taper of 15 due to the effect of the bias voltage applied to the substrate side. It becomes a taper shape of ˜45 °. In order to perform etching without leaving a residue on the gate insulating film, it is preferable to increase the etching time at a rate of about 10 to 20%. Since the selection ratio of the silicon oxynitride film to the W film is 2 to 4 (typically 3), the surface where the silicon oxynitride film is exposed is etched by about 20 to 50 nm by the over-etching process. Thus, the first shape conductive layers 419 to 425 (the first conductive layers 419a to 425a and the second conductive layers 419b to 425b) formed of the first conductive layer and the second conductive layer by the first etching treatment. Form. Reference numeral 418 denotes a gate insulating film, and a region which is not covered with the first shape conductive layers 419 to 425 is etched and thinned by about 20 to 50 nm.
[0143]
Then, a first doping process is performed, and an impurity element imparting n-type conductivity is added. (FIG. 15B) The doping method may be an ion doping method or an ion implantation method. The condition of the ion doping method is a dose of 1 × 10 ¹³ ~ 5x10 ¹⁴ atoms / cm ² The acceleration voltage is set to 60 to 100 keV. As an impurity element imparting n-type, an element belonging to Group 15, typically phosphorus (P) or arsenic (As), is used here, but phosphorus (P) is used. In this case, the conductive layers 419 to 423 serve as a mask for the impurity element imparting n-type, and the first impurity regions 427 to 430 are formed in a self-aligning manner. The first impurity regions 427 to 430 have 1 × 10 ²⁰ ~ 1x10 ^{twenty one} atomic / cm ^Three An impurity element imparting n-type is added in a concentration range of.
[0144]
Next, a second etching process is performed as shown in FIG. Using an ICP etching method, a reactive gas is introduced into the chamber, a predetermined RF power (13.56 MHz) is supplied to the coil-type electrode, and plasma is generated. Lower RF (13.56 MHz) power is applied to the substrate side (sample stage), and a lower self-bias voltage is applied than in the first etching process. The W film is anisotropically etched to obtain second-shaped conductive layers 494 to 499.
[0145]
Further, a second doping process is performed as shown in FIG. In this case, an impurity element imparting n-type conductivity is doped as a condition of a high acceleration voltage by lowering the dose than in the first doping process. For example, the acceleration voltage is 70 to 120 keV and 1 × 10 ¹³ /cm ² A new impurity region is formed inside the first impurity region formed in the island-shaped semiconductor layer in FIG. Doping is performed using the second shape conductive layers 494 to 498 as masks against the impurity elements so that the impurity elements are also added to the regions below the first conductive layers 494 a to 498 a. Thus, second impurity regions 608 to 612 overlapping with the first conductive layers 494a to 498a are formed. The impurity element imparting n-type conductivity is 1 × 10 6 in the second impurity region. ¹⁷ ~ 1x10 ¹⁸ atoms / cm ^Three So that the concentration becomes.
[0146]
As shown in FIG. 16A, when the gate insulating film 432 is etched, TaN which is the first conductive layer is etched and receded at the same time, so that the third shape conductive layers 433 to 438 (first conductive layer) 433a to 438a and second conductive layers 433b to 438b) are formed. Reference numeral 432 denotes a gate insulating film, and a region not covered with the third shape conductive layers 433 to 438 is further etched by about 20 to 50 nm to form a thinned region.
[0147]
16A, third impurity regions 441 to 444 overlapping with the first conductive layers 433a to 437a and fourth impurity regions 446 to 449 outside the third impurity region are formed. Accordingly, the concentration of the impurity element imparting n-type in the third impurity region and the fourth impurity region is substantially equal to the concentration of the impurity element imparting n-type in the second impurity region.
[0148]
Then, as shown in FIG. 16B, a fifth impurity region 455 and a sixth impurity region 456 having a conductivity type opposite to the one conductivity type are formed in the island-shaped semiconductor layer 403 forming the p-channel TFT. To do. Using the third shape conductive layer 434 as a mask for the impurity element, an impurity region is formed in a self-aligning manner. At this time, the island-like semiconductor layers 402, 404, and 405 forming the n-channel TFT are covered with resist masks 451 to 453 over the entire surface. Although phosphorus is added to the fifth impurity region 455 and the sixth impurity region 456 at different concentrations, diborane (B ₂ H ₆ The impurity concentration is 2 × 10 2 in any region by ion doping using ²⁰ ~ 2x10 ^{twenty one} atoms / cm ^Three To be.
[0149]
Through the above steps, an impurity region is formed in each island-shaped semiconductor layer. Conductive layers 433 to 436 overlapping with the island-like semiconductor layers function as TFT gate electrodes. Reference numeral 437 functions as a capacitor wiring, and 438 functions as a wiring in the driver circuit.
[0150]
Since the capacitor wiring 437 is formed between the pixels, there is a region that overlaps with the island-shaped semiconductor layer 405 and forms a storage capacitor, and a region that functions as a wiring that connects the storage capacitors.
[0151]
Thus, for the purpose of controlling the conductivity type, as shown in FIG. 16C, a step of activating the impurity element added to each island-like semiconductor layer is performed. This step is performed by a thermal annealing method using a furnace annealing furnace. In addition, a laser annealing method or a rapid thermal annealing method (RTA method) can be applied. In the thermal annealing method, the oxygen concentration is 1 ppm or less, preferably 0.1 ppm or less in a nitrogen atmosphere at 400 to 700 ° C., typically 500 to 600 ° C. reference In the example, heat treatment is performed at 500 ° C. for 4 hours. However, when the wiring material used for 433 to 438 is weak against heat, activation is preferably performed after an interlayer insulating film (mainly composed of silicon) is formed in order to protect the wiring and the like.
[0152]
Further, a heat treatment is performed at 300 to 450 ° C. for 1 to 12 hours in an atmosphere containing 3 to 100% hydrogen to perform a step of hydrogenating the island-shaped semiconductor layer. This step is a step of terminating dangling bonds in the semiconductor layer with thermally excited hydrogen. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) may be performed.
[0153]
Next, as shown in FIG. 17, the first interlayer insulating film 457 is formed with a thickness of 100 to 200 nm from a silicon oxynitride film. A second interlayer insulating film 458 made of an organic insulating material is formed thereon. Next, an etching process for forming a contact hole is performed.
[0154]
Then, source wirings 459 to 461 that form contacts with the source region of the island-shaped semiconductor layer and drain wirings 462 to 464 that form contacts with the drain region are formed in the driver circuit portion. In the pixel portion, a source wiring 465 and drain electrodes 466 to 467 are formed. The drain electrode 466 is formed on an adjacent pixel. The drain electrode functions as a pixel electrode of a reflective liquid crystal display device. The chain line BB ′ in FIG. 17 corresponds to the broken line BB ′ in the top view of FIG.
[0155]
The drain electrode 465 is electrically connected to the island-shaped semiconductor layer 405 corresponding to the active layer of the pixel TFT, and the drain electrode 467 is electrically connected to the island-shaped semiconductor layer 405 forming the storage capacitor 505.
[0156]
As described above, the driver circuit portion 506 including the n-channel TFT 501, the p-channel TFT 502, and the n-channel TFT 503, and the pixel portion 507 including the pixel TFT 504 and the storage capacitor 505 can be formed over the same substrate. it can. In this specification, such a substrate is referred to as an active matrix substrate for convenience.
[0157]
The n-channel TFT 501 in the driver circuit portion includes a channel formation region 468, a third impurity region 441 (GOLD region) overlapping with the conductive layer 433 forming the gate electrode, and a fourth impurity region 446 (outside of the gate electrode). LDD region) and a first impurity region 427 functioning as a source region or a drain region. The p-channel TFT 502 includes a channel formation region 469, a fifth impurity region 456 which overlaps with the conductive layer 434 which forms a gate electrode, and a sixth impurity region 455 which functions as a source region or a drain region. The n-channel TFT 503 includes a channel formation region 470, a third impurity region 443 (GOLD region) overlapping with the conductive layer 435 forming the gate electrode, and a fourth impurity region 448 (LDD region) formed outside the gate electrode. And a first impurity region 429 functioning as a source region or a drain region.
[0158]
The pixel TFT 504 in the pixel portion includes a channel formation region 471, a third impurity region 444 (GOLD region) overlapping with the conductive layer 436 forming the gate electrode, and a fourth impurity region 449 (LDD region) formed outside the gate electrode. ) And a first impurity region 430 functioning as a source region or a drain region. Further, an impurity element imparting n-type conductivity is added to the semiconductor layer 405 functioning as one electrode of the storage capacitor 505. The capacitor wiring 437 and the insulating layer therebetween (the same layer as the gate insulating film) form a storage capacitor.
[0159]
Also book reference If the process shown in the example is followed, the number of photomasks necessary for the production of the active matrix substrate is five (island-like semiconductor layer pattern, first wiring pattern (gate wiring, capacitor electrode), second wiring pattern (source wiring, Drain electrode), contact hole pattern, n channel region mask pattern). As a result, the process can be shortened, and the manufacturing cost can be reduced and the yield can be improved.
[0160]
As shown in the top view of the pixel portion in FIG. 8, a large storage capacitor is required to drive a liquid crystal having spontaneous polarization such as a ferroelectric liquid crystal. Book reference In the case of a reflective liquid crystal display device as in the example, the storage capacitor 505 can be increased without impairing the aperture ratio.
[0161]
[ reference Example 2] (Example of manufacturing process of element substrate used for reflection type liquid crystal display device)
Book reference An example will be described with reference to FIGS. A chain line DD ′ and a chain line EE ′ in FIG. 18 indicate cross sections of FIG. 12 taken along the chain line DD ′ and the chain line EE ′. FIG. 18 is produced by adding the following steps to the substrate produced in the steps of FIGS. 15A to 16C of Example 1. The layout of the pixel portion shown in the top view of FIG. reference Compared to Example 1 (FIG. 8), the pixel electrode can be formed so as to overlap with the source wiring, so that the aperture ratio can be increased.
[0162]
Note that a difference from FIG. 16C is that an electrode that applies a negative voltage in most of one frame as the gate electrode 485 is used as the first electrode of the storage capacitor 505 as shown in the cross-sectional view of FIG. Therefore, p-type impurities are added to the second semiconductor layer 491 used as the second electrode of the storage capacitor.
[0163]
A manufacturing process of the element substrate will be described with reference to a cross-sectional view of FIG. First, a first interlayer insulating film 472 is formed using a silicon oxynitride film with a thickness of 100 to 200 nm. A second interlayer insulating film 473 made of an organic insulating material is formed thereon. Next, an etching process for forming a contact hole is performed.
[0164]
Then, source wirings 474 to 476 that form contacts with the source region of the island-shaped semiconductor layer and drain wirings 477 to 479 that form contacts with the drain region are formed in the driver circuit portion.
[0165]
In the pixel portion, a connection electrode 480, a gate wiring 481, and a drain electrode 482 are formed. The film thickness is desirably 0.3 μm to 0.75 μm. The drain electrode 482 functions as a pixel electrode of a reflective liquid crystal display device.
[0166]
The connection electrode 480 is electrically connected to the source wiring 483 and the first semiconductor layer 484. Although not shown, the gate wiring 481 is electrically connected to the gate electrode 485 through a contact hole. The drain electrode 482 is electrically connected to the second semiconductor layer 491 and functions as an electrode of the storage capacitor 505.
[0167]
As described above, by adding a process to the element substrate shown in the cross-sectional view of FIG. 16C, a driver circuit portion including an n-channel TFT 501, a p-channel TFT 502, and an n-channel TFT 503, a pixel TFT 504, A pixel portion having the storage capacitor 505 can be formed over the same substrate. In this specification, such a substrate is referred to as an active matrix substrate for convenience.
[0168]
The element substrate will be described with reference to the top view of FIG. As shown in FIG. 12, the element substrate has a gate wiring arranged in the row direction, a source wiring 483 arranged in the column direction, a pixel portion having a pixel TFT in the vicinity of the intersection of the gate wiring and the source wiring, n And a driver circuit having a channel type TFT or a p-channel type TFT.
[0169]
Note that the gate wiring in FIG. 12 indicates a connection between the gate electrode 485 and the gate wiring 481 arranged in the row direction. The gate wiring 485 is provided in contact with the second interlayer insulating film (not shown).
[0170]
The first semiconductor layer 484 and the second semiconductor layer 491 are patterned. The first semiconductor layer 484 is an active layer of the TFT element. The second semiconductor layer 491 functions as a capacitor electrode of a storage capacitor described later.
[0171]
A source wiring 483 and a gate electrode 485 are formed so as to be in contact with a gate insulating film (not shown).
[0172]
After forming the first interlayer insulating film and the second interlayer insulating film (not shown), contact holes 486 to 490 reaching the first semiconductor layer 484, the second semiconductor layer 491, and the source wiring 483 are opened. Next, a connection electrode 480, a drain electrode 482, and a gate wiring 485 are formed by patterning.
[0173]
Through the contact hole 486 and the contact hole 488, the first semiconductor layer 484 and the source wiring 483 are electrically connected through the connection electrode 480.
[0174]
Through the contact hole 489, the first semiconductor layer 484 and the drain electrode 482 are electrically connected.
[0175]
The contact hole 487 electrically connects the second semiconductor layer 491 and the drain electrode 482. Accordingly, the drain electrode 482 applies a potential to the second semiconductor layer 491 that functions as an electrode of the storage capacitor. A storage capacitor is formed by the gate electrode 485 and the second semiconductor layer 491. The gate insulating film functions as an insulating film for the storage capacitor.
[0176]
Through the contact hole 490, the gate electrode 485 and the gate wiring 481 are electrically connected.
[0177]
reference Example 1 and book reference According to the manufacturing process of the element substrate of the example, the number of masks required for forming the element substrate having the pixel portion having the pixel structure shown in FIGS. 18 and 12 and the driver circuit may be five.
[0178]
That is, the first is a mask for patterning the first semiconductor layer 484 and the second semiconductor layer 491, the second is a mask for patterning the source wiring 483 and the gate electrode 485, and the third is an n-channel region. The mask pattern is a mask that forms contact holes that reach the first semiconductor layer 484, the second semiconductor layer 491, the source wiring 483, and the gate electrode 485, respectively. The fifth pattern is a connection electrode 480 and a drain electrode. 482 is a mask for patterning the gate wiring 481.
[0179]
Book reference The example shows a manufacturing process of a reflective liquid crystal display device. As shown in FIG. 12 in the top view, the pixel electrode having the function of the drain electrode can be formed over the source wiring 483 so that the aperture ratio can be increased. In addition, since the reflective liquid crystal display device can reduce the distance between the pixel electrodes as compared with the transmissive liquid crystal display device, the outline of the pixel is inconspicuous.
[0180]
[ reference Example 3] (Example of manufacturing process of element substrate used for transmission type liquid crystal display device)
reference The active matrix substrate manufactured in Examples 1 and 2 can be applied to a reflective liquid crystal display device as it is. On the other hand, in the case of a transmissive liquid crystal display device, a pixel electrode provided in each pixel of the pixel portion may be formed using a transparent electrode. Book reference In the example, a method for manufacturing an active matrix substrate corresponding to a transmissive liquid crystal display device will be described with reference to FIGS.
[0181]
Active matrix substrate reference Prepared as in Example 1. In FIG. 19A, a conductive metal film is formed by a sputtering method or a vacuum evaporation method for the source wiring and the drain wiring. This is because a Ti film is formed to a thickness of 50 to 150 nm, a contact is formed with a semiconductor layer that forms a source or drain region of an island-like semiconductor layer, and aluminum (Al) 300 to 300 is stacked on the Ti film. The film was formed to a thickness of 400 nm, and a Ti film or a titanium nitride (TiN) film was formed to a thickness of 100 to 200 nm to form a three-layer structure. Thereafter, a transparent conductive film is formed over the entire surface, and a pixel electrode 491 is formed by patterning processing and etching processing using a photomask. The pixel electrode 491 is formed over the second interlayer insulating film 458, and a portion overlapping the drain wiring 492 of the pixel TFT is provided to form a connection structure. A pixel electrode 493 of an adjacent pixel is also illustrated.
[0182]
In FIG. 19B, a transparent conductive film is first formed over the second interlayer insulating film 458, a patterning process and an etching process are performed to form the pixel electrode 491, and then the drain wiring 492 overlaps with the pixel electrode 491. It is an example formed by providing. In the drain wiring 492, a Ti film is formed to a thickness of 50 to 150 nm, a contact is formed with a semiconductor layer that forms the source or drain region of the island-like semiconductor layer, and aluminum (Al) 300 is overlaid on the Ti film. It is formed with a thickness of ˜400 nm. With this configuration, the pixel electrode 491 is in contact with only the Ti film that forms the drain wiring 492. As a result, the reaction between the transparent conductive film material and Al can be prevented. A pixel electrode 493 of an adjacent pixel is also illustrated.
[0183]
The material of the transparent conductive film is indium oxide (In ₂ O _Three ) Or indium tin oxide alloy (In ₂ O _Three -SnO ₂ ; ITO) or the like can be formed using a sputtering method, a vacuum deposition method, or the like. Etching treatment of such a material is performed with a hydrochloric acid based solution. However, in particular, etching of ITO is likely to generate a residue, so in order to improve etching processability, an indium oxide-zinc oxide alloy (In ₂ O _Three —ZnO) may also be used. Since the indium oxide-zinc oxide alloy has excellent surface smoothness and thermal stability with respect to ITO, the corrosion reaction with Al contacting with the end face of the drain wiring 492 can be prevented. Similarly, zinc oxide (ZnO) is also a suitable material, and zinc oxide (ZnO: Ga) to which gallium (Ga) is added to further increase the transmittance and conductivity of visible light can be used.
[0184]
In this manner, an active matrix substrate corresponding to a transmissive liquid crystal display device can be completed. Book reference In the example reference Although described as a process similar to Example 1, such a configuration is reference The present invention can be applied to the active matrix substrate shown in Example 2.
[0185]
As described above, the driver circuit portion 506 including the n-channel TFT 501, the p-channel TFT 502, and the n-channel TFT 503, and the pixel portion 507 including the pixel TFT 504 and the storage capacitor 505 can be formed over the same substrate. .
[0186]
[Example 1 ] (Example of manufacturing method of liquid crystal display device)
In this example reference A method for manufacturing a reflective liquid crystal display device using the element substrate manufactured in Example 2 will be described. This embodiment will be described with reference to FIG. A chain line DD ′ and a chain line EE ′ in the cross-sectional view of FIG. 11 indicate the top view of FIG. 12 cut by the chain line DD ′ and the chain line EE ′.
[0187]
Quartz is preferably used for the substrate 400 of the element substrate in FIG. Quartz has a UV transmittance of 92%, which is the same as that of visible light, and therefore absorbs less irradiation light when mono-stabilized by UV irradiation described later.
[0188]
A light shielding film (not shown) is formed on the substrate 508 in order to obtain a good black level. Chrome or the like can be used for the light shielding film.
[0189]
A transparent conductive film 510 is formed on the light shielding film. An ITO film can be used as the transparent conductive film. The transparent conductive film 510 is formed in the pixel portion. Since the orientation of the ferroelectric liquid crystal is affected by the surface smoothness of the transparent conductive film 510, it is necessary to select a film forming temperature, a film thickness, and a material. The above configuration is referred to as a counter substrate.
[0190]
Alignment films 511 and 512 are formed on the element substrate and the counter substrate. An alignment film RN1286 manufactured by Nissan Chemical Industries, Ltd. was formed, pre-baked at 90 ° C. for 5 minutes, and then post-baked at 250 ° C. for 1 hour. The film thickness after post-baking was 40 nm. The alignment film may be formed by flexographic printing or spinner coating. Since RN1286 has poor adhesion to the sealant, the alignment film is removed at the position where the sealant is disposed. Further, an alignment film is not formed on the contact pads that electrically connect the element substrate and the counter substrate and on the lead wires that connect the flexible printed circuit board (FPC).
[0191]
The alignment films 511 and 512 are rubbed. The rubbing direction when the counter substrate and the element substrate are bonded is made parallel. For rubbing treatment, YA-20R manufactured by Yoshikawa Chemical Co., Ltd. was used as a rubbing cloth. A rubbing apparatus manufactured by Joyo Engineering Co., Ltd. was used for rubbing with an indentation amount of 0.25 mm, a roll rotation speed of 100 rpm, a stage speed of 10 mm / sec, and a rubbing number of one. The diameter of the rubbing roll is 130 mm.
[0192]
The alignment film was washed after rubbing. First, it was immersed in an alkali developer for 60 seconds. The alkali developer used was a 20-fold diluted MIF developer manufactured by Fuji Film Orin Co., Ltd. having a tetramethylammonium hydroxide (TMAH) concentration of 5.48%.
[0193]
Then 50-100kgf / cm ² The alignment film was cleaned by irradiating the substrate surface with a high-pressure water stream.
[0194]
Good alignment was obtained by using a combination of cleaning with an alkaline solution and cleaning with a high-pressure water stream for cleaning the alignment film.
[0195]
Next, a sealing agent 513 was formed. The sealing agent can be formed into a pattern in which an inlet for liquid crystal material is provided at one place and can be injected under vacuum. Alternatively, a pattern in which liquid crystal material can be injected under normal pressure by providing a gap through which air is discharged is provided on the side opposite to the side where the liquid crystal material injection port is provided.
[0196]
In this embodiment, an injection port for injecting liquid crystal and a gap through which air is discharged are provided in the sealant pattern so that the liquid crystal material can be injected by utilizing capillary action under normal pressure.
[0197]
A sealant was formed on the counter substrate using a seal dispenser manufactured by Hitachi Chemical. XN-21S manufactured by Mitsui Chemicals was used as the sealant. The sealing agent was calcined at 90 ° C. for 30 minutes and then gradually cooled in the next 15 minutes.
[0198]
It has been found that the sealing agent XN-21S can only obtain a cell gap of 2.3 to 2.6 μm even if hot pressing is performed. Therefore, in order to form a cell gap of 1.0 μm, it is preferable to provide a sealant in a region where the thickness of the laminated film is 1.5 μm or thinner than that of the pixel portion. In this embodiment, a sealing material 513 is disposed in a region where the first interlayer insulating film 472 and the second interlayer insulating film 473 are removed by etching.
[0199]
At the same time as forming the sealant, a conductive spacer (not shown) is formed.
[0200]
Spacers (not shown) are formed on the counter substrate or the element substrate. The spacer may be sprinkled with spherical beads. Alternatively, photosensitive resin may be patterned in a dot shape or a stripe shape in the display region. The spacer prevents the liquid crystal material from having alignment defects.
[0201]
In a reflective liquid crystal display device, the cell gap is preferably 0.5 to 1.5 μm because of retardation. In this embodiment, the cell gap is set to 1.0 μm in the pixel portion.
[0202]
Thereafter, the counter substrate and the element substrate were aligned by a bonding apparatus manufactured by Newtom, and bonded.
[0203]
Next, 0.3 to 1.0 kgf / cm ² While applying the above pressure in a direction perpendicular to the substrate plane and over the entire surface of the substrate, heat curing is performed in a clean oven at 160 ° C. for 3 hours to cure the sealant and bond the counter substrate and the element substrate.
[0204]
A pair of substrates formed by bonding the counter substrate and the element substrate is divided.
[0205]
As the liquid crystal material 514, a mixture of a ferroelectric liquid crystal, a liquid crystal polymer, and a polymerization initiator is used. As a liquid crystal polymer material, a liquid crystal acrylate monomer UCL-001 to which a photopolymerization agent manufactured by Dainippon Ink & Chemicals was added was used. For the ferroelectric liquid crystal, Felix M4851 / 100 manufactured by Clariant was used. A liquid crystalline acrylate monomer to which a polymerization initiator was added was mixed with 2 wt% ferroelectric liquid crystal, and stirred for 20 minutes with a stirrer in an isotropic phase at 80 ° C.
[0206]
The stirred and mixed liquid crystal material is heated to an isotropic phase having a low viscosity and easy to be injected, and is injected into the gap between the substrate of the liquid crystal panel composed of the element substrate fixed by the sealant and the counter substrate.
[0207]
The liquid crystal material is heated to the isotropic phase (80 ° C.) and injected. The liquid crystal panel was heated on a hot plate to 80 ° C., and a mixture of ferroelectric liquid crystal and liquid crystal acrylate monomer was injected. After injecting the liquid crystal material over the entire surface of the liquid crystal panel, the liquid crystal panel was transported to a clean oven, heated at 80 ° C. for 30 minutes, and then gradually cooled to room temperature at 0.1 ° C./min.
[0208]
As a sealant, an ultraviolet curable resin (not shown) is applied by a small dispenser so as to cover the injection port. When UV light is irradiated to cure the UV curable resin, it is expected that the UV light will pass through the quartz, causing unnecessary polymer stabilization treatment to the liquid crystal material. Does not cure.
[0209]
A flexible printed wiring board (not shown) is bonded by an anisotropic conductive film (not shown).
[0210]
Finally, an example 2-3 The polymer stabilization treatment is performed by applying a DC voltage by any one of the methods shown in FIG. In the process sequence of this embodiment, when the ultraviolet rays are irradiated, the ferroelectric liquid crystal is mono-stabilized and at the same time, the ultraviolet curing of the sealant is completed.
[0211]
If the pixel electrode of the element substrate is a transparent conductive film, a transmissive liquid crystal display device can be manufactured by the process of this embodiment. In the transmissive liquid crystal display device, the cell gap is preferably set to 1.0 to 2.5 μm for the purpose of suppressing retardation and the spiral structure of the ferroelectric liquid crystal.
[0212]
According to the present embodiment, the ultraviolet curable sealant that seals the injection port and the liquid crystal material are irradiated with ultraviolet rays at once, so that the photocurable treatment of the sealant and the polymer stabilization treatment of the liquid crystal material are performed. And simultaneously. Since the liquid crystal material is exposed to ultraviolet rays for the first time in the polymer stabilization treatment step, a good polymer stabilization treatment can be performed.
[0213]
[ reference Example 4 ] (An example of a method for polymer stabilization treatment)
A method for mono-stabilizing a ferroelectric liquid crystal with a liquid crystalline polymer in a reflective liquid crystal display device or a transmissive liquid crystal display device will be described below. Book reference An example will be described with reference to FIGS.
[0214]
After the flexible printed wiring board is attached to the liquid crystal display device, the gate start pulse 114 and the gate clock pulse 104 shown in FIG. The gate start pulse 114 always maintains a constant level while mono-stabilizing the ferroelectric liquid crystal. As a result, the voltage value of the gate pulse 115 becomes a constant level while mono-stabilizing the ferroelectric liquid crystal, and charges are always supplied to the liquid crystal layer.
[0215]
Thereby, the voltage 116 applied to the liquid crystal layer shows a constant voltage. Compared with the case where the liquid crystal layer is caused to respond by an electric field by line sequential driving, since the electric charge is always supplied, the voltage level of the liquid crystal layer can be kept constant.
[0216]
That is, when an electric field is applied to the liquid crystal layer by line-sequential driving, the voltage applied to the liquid crystal cell differs depending on the current leakage of the liquid crystal cell and the storage capacitor between the period when the gate wiring is selected and the period when it is not. . But book reference According to the example, during the polymer stabilization process, the gate pulse is always at a constant voltage level, and the pixel TFT is made conductive, so that the charge consumed by the current leakage is retained in the liquid crystal cell and the liquid crystal cell via the pixel TFT. Supplyed to the capacitor, the potential of the liquid crystal cell is kept constant.
[0217]
When the voltage applied to the liquid crystal layer becomes constant in the pixel portion, the entire surface of the substrate is irradiated with ultraviolet rays from the vertical direction for 10 seconds. The ultraviolet ray irradiated to the liquid crystal panel is 10 mW / cm as measured at the light incident surface. ² Met.
[0218]
As described above, even in an active matrix liquid crystal display device, it is possible to perform the polymer stabilization treatment of the ferroelectric liquid crystal.
[0219]
Example 1 Liquid crystal display device manufacturing process and book reference An example process sequence will be described with reference to FIG. An alignment film is formed to a flexible printed wiring board (FPC), and an external signal is input from the flexible printed wiring board. By making the voltage level of the gate start pulse of the external signal constant, a stable liquid crystal response of the voltage applied to the liquid crystal is performed.
[0220]
The element substrate having the rubbed alignment film and the counter substrate are bonded together with a sealant and divided into individual panels after the sealant is cured. A liquid crystal material containing a ferroelectric liquid crystal or a liquid crystalline polymer is injected into the panel, and after sealing the injection port, an FPC is attached. The liquid crystal responds by an external signal input from the FPC, and after the response of the liquid crystal is completed, the ferroelectric liquid crystal is mono-stabilized by irradiating with ultraviolet rays.
[0221]
[Example 2 ] (An example of a method for polymer stabilization treatment)
A method for mono-stabilizing a ferroelectric liquid crystal with a liquid crystalline polymer in a reflective liquid crystal display device or a transmissive liquid crystal display device will be described below. This embodiment will be described with reference to FIGS. A chain line AA ′ in FIG. 10 is a cross section obtained by cutting FIG. 14 along a chain line AA ′. Also, a chain line DD ′ and a chain line EE ′ in FIG. 10 are cross sections obtained by cutting FIG. 12 along the chain line DD ′ and the chain line EE ′.
[0222]
FIG. 14 is a top view of a reflective liquid crystal display device or a transmissive liquid crystal display device. A gate driver 521 and a source driver 522 are formed on the element substrate of the liquid crystal display device of FIG.
[0223]
The position of the flexible printed wiring board 519 and the position of the common pad 520 are the same in both the reflective liquid crystal display device and the transmissive liquid crystal display device. FIG. 14 shows the appearance of an active matrix type liquid crystal display device. The appearance of the liquid crystal display device is the same for both the reflective liquid crystal display device and the transmissive liquid crystal display device.
[0224]
As shown in FIG. 1 After the flexible printed wiring board is attached to the reflection type liquid crystal display device obtained in the step, a conductive sheet 300 is disposed on the back surface of the element substrate in the pixel portion. As the conductive sheet, for example, a conductive film may be formed. Further, a metal plate may be provided in contact with the substrate 400. Further, a conductive and sticky tape may be attached so that an electric field is applied to the pixel portion.
[0225]
A transparent conductive film 510 is formed on the counter substrate 508.
[0226]
The conductive paste is dispensed on the common contact pad 520 of the counter substrate. The conductive paste is obtained by mixing a conductive spacer 516 with a sealant 515. The conductive spacer is obtained by coating the surface of a particulate spacer with gold powder. By arranging the conductive paste on the common pad 520, the lead wire 517 for bonding the transparent conductive film 510 of the counter substrate and the flexible printed wiring board is electrically connected.
[0227]
The counter substrate and the element substrate are bonded together by the sealant 513. Thereafter, a liquid crystal material 514 is injected. The liquid crystal material 514 represents a mixture of a ferroelectric liquid crystal and a liquid crystal polymer.
[0228]
The flexible printed wiring board 518 is bonded by the anisotropic conductive film 519. As a result, the flexible printed wiring board 518 and the transparent conductive film 510 of the counter substrate have the same potential. The polymer stabilization process can be performed by applying a DC voltage between the flexible printed wiring board 518 and the conductive sheet 300. The value of the direct current voltage of the power source is calculated by the above-mentioned formula 1.
[0229]
The cell gap is 2.5 μm, the dielectric constant of the glass of the element substrate is 3.0, and the voltage applied to the liquid crystal material is 4V. Among the liquid crystal materials, when the relative permittivity of the ferroelectric liquid crystal is 18 and the glass thickness of the element substrate is 300 μm, the DC voltage value is 2.9 kV. Most of the DC voltage applied is applied to the glass.
[0230]
The DC voltage is supplied by a regulated DC power supply. For example, a regulated DC power supply model number C3350 manufactured by Hamamatsu Photonics Co., Ltd. can apply a DC voltage of 0 to ± 3.0 kV.
[0231]
While applying a DC voltage, the entire surface of the substrate is irradiated with ultraviolet rays from the vertical direction. Irradiate ultraviolet rays from the vertical direction to the entire surface of the substrate for 10 seconds. The ultraviolet ray irradiated to the liquid crystal panel is 10 mW / cm as measured at the light incident surface. ² Met.
[0232]
Thereby, mono-stabilization of the ferroelectric liquid crystal is performed. The conductive sheet 300 may be peeled after the monostabilization is completed.
[0233]
When polysilicon is used as a semiconductor layer as shown in FIG. 11, the driver circuit portion 506 and the pixel portion 507 can be formed over the same substrate. The conductive sheet 300 may be bonded only to the pixel portion so that a DC voltage is not applied to the driver circuit portion.
[0234]
Example 1 FIG. 13 summarizes the order of the steps of this example. After applying the alignment film formation (1) to the liquid crystal inlet sealing agent (9) and attaching the flexible printed wiring board (10), the conductive sheet is attached to the back surface of the element substrate (11). It is characterized in that a DC voltage can be applied (12) between the transparent conductive film of the counter substrate and the conductive sheet.
[0235]
Since the conductive sheet can be peeled after mono-stabilization, the liquid crystal material can be mono-stabilized with a single polarity voltage at an arbitrary voltage by a simple process.
[0236]
[Example 3 ] (An example of a method for polymer stabilization treatment)
A method for mono-stabilizing a ferroelectric liquid crystal with a liquid crystalline polymer in a reflective liquid crystal display device or a transmissive liquid crystal display device will be described below. This embodiment will be described with reference to FIGS. 6 is a cross section obtained by cutting FIG. 14 along a chain line CC ′. Moreover, the chain line BB 'of FIGS. 6-7 is the cross section which cut | disconnected FIG. 8 by the chain line BB'.
[0237]
FIG. 14 is a top view of a reflective liquid crystal display device or a transmissive liquid crystal display device. A gate driver 521 and a source driver 522 are formed on the element substrate of the liquid crystal display device of FIG.
[0238]
As shown in FIG. 6, an ITO film is formed as a conductive film 200 on a substrate 400 with a thickness of 100 to 120 nm only on the pixel portion. The ITO film disposed on the drive circuit portion may be removed by patterning. In order to protect the semiconductor layer, the ITO film may be removed from the region where the semiconductor layer is disposed.
[0239]
By providing the conductive film on the substrate so as to avoid the region where the semiconductor layer is disposed, it is possible to prevent a DC voltage from being applied to the semiconductor layer when the liquid crystal is mono-stabilized.
[0240]
The dielectric constant and film thickness of the insulating film used in FIG. 6 will be described below.
[0241]
A film 201 having a low relative dielectric constant is formed to a thickness of 1 to 6 μm to reduce the parasitic capacitance generated between the element wiring and the conductive film 200. In this embodiment, silicon dioxide (SiO2) having a relative dielectric constant of 4.0 is used as the film 201 having a low relative dielectric constant. ₂ ) A film is formed with a thickness of 1.0 μm.
[0242]
The base film 401 prevents impurities such as alkali metal flowing out from the glass substrate from contaminating the semiconductor layer. For the base film, silicon nitride, silicon dioxide, or the like can be used. For example, a silicon nitride film (SiN) film 401 having a relative dielectric constant of 6.5 is formed with a thickness of 10 nm.
[0243]
As the gate insulating film 432, a silicon oxynitride film having a relative dielectric constant of 4.0 is formed with a thickness of 100 nm. A silicon oxynitride film having a relative dielectric constant of 4.0 is formed as the first interlayer film 457 with a thickness of 150 nm. An acrylic resin having a relative dielectric constant of 4.0 is formed as the second interlayer film 458 with a thickness of 2.0 μm.
[0244]
The liquid crystal material 514 represents a ferroelectric liquid crystal, a liquid crystal polymer, and a polymerization initiator. The relative permittivity of the ferroelectric liquid crystal used in this embodiment is 30. The cell gap is a reflection type liquid crystal display device having a thickness of 1.0 μm. The alignment films 511 to 512 have a thickness of 40 nm and a relative dielectric constant of 4.0.
[0245]
In the above configuration, when it is desired to apply a DC voltage of 10 V to the liquid crystal material 514 by calculation, a voltage of 260 V is applied between the conductive film 200 and a transparent conductive film 510 formed on a substrate 508 of a counter substrate described later. It can be seen that it may be applied.
[0246]
Next, a method of applying a DC voltage will be described with reference to FIGS.
[0247]
As shown in FIG. 6, a light shielding film 509 is formed on the glass substrate 508 of the counter substrate. Chrome or the like can be used for the light shielding film.
[0248]
A transparent conductive film 510 is formed over the light shielding film 509. An ITO film can be used as the transparent conductive film.
[0249]
As shown in FIGS. 6 and 14, there is a contact pad 520 formed by laminating a transparent conductive film 510 and a light shielding film 509 of the counter substrate in two layers. A conductive paste is formed on the contact pad 520.
[0250]
The conductive paste is obtained by mixing a conductive spacer 516 with a sealant 515. The conductive spacer is obtained by coating the surface of a particulate spacer with gold powder. By arranging the conductive paste on the common pad 520, the lead wire 517 for bonding the transparent conductive film 510 of the counter substrate and the flexible printed wiring board is electrically connected.
[0251]
The liquid crystal material 514 is aligned by the alignment films 511 to 512. A sealant 513 is formed.
[0252]
The flexible printed wiring board 518 is bonded by the anisotropic conductive film 519. Thereby, a polymer stabilization process can be performed by applying a DC voltage between the flexible printed wiring board 518 and the conductive film 200 formed on the element substrate 400.
[0253]
Example 1 FIG. 9 summarizes the order of the steps of this example. Alignment film formation (1) to flexible printed wiring board (FPC) is attached (10), and between the flexible printed wiring board and the conductive film formed on the element substrate, the conductive film is connected to the common pad of the counter substrate. It is characterized in that a DC power supply is applied to.
[0254]
[ reference Example 5 ] (Semiconductor layer crystallization method using catalytic elements)
Book reference In the example reference Another method for manufacturing a crystalline semiconductor layer for forming a TFT semiconductor layer of the active matrix substrate shown in Example 1 will be described. Book reference For example, a crystallization method using a catalyst element disclosed in Japanese Patent Application Laid-Open No. 7-130552 can be applied. An example in that case will be described below.
[0255]
reference In the same manner as in Example 1, a base film and an amorphous semiconductor layer are formed on a glass substrate with a thickness of 25 to 80 nm. For example, an amorphous silicon film is formed with a thickness of 55 nm. Then, an aqueous solution containing 10 ppm of the catalyst element in terms of weight is applied by a spin coating method to form a layer containing the catalyst element. Catalyst elements include nickel (Ni), germanium (Ge), iron (Fe), palladium (Pd), tin (Sn), lead (Pb), cobalt (Co), platinum (Pt), copper (Cu), gold (Au). For the layer 170 containing the catalytic element, the catalytic element layer may be formed to a thickness of 1 to 5 nm by a sputtering method or a vacuum deposition method in addition to the spin coating method.
[0256]
In the crystallization step, first, heat treatment is performed at 400 to 500 ° C. for about 1 hour, so that the amount of hydrogen contained in the amorphous silicon film is 5 atoms% or less. Then, using a furnace annealing furnace, thermal annealing is performed at 550 to 600 ° C. for 1 to 8 hours in a nitrogen atmosphere. Through the above steps, a crystalline semiconductor layer made of a crystalline silicon film can be obtained.
[0257]
If an island-like semiconductor layer is produced from the crystalline semiconductor layer thus produced, reference The active matrix substrate can be completed in the same manner as in Example 1. However, when a catalyst element that promotes crystallization of silicon is used in the crystallization step, a small amount (1 × 10 10) is contained in the island-shaped semiconductor layer. ¹⁷ ~ 1x10 ¹⁹ atoms / cm ³ Degree) catalyst element remains. Of course, it is possible to complete the TFT even in such a state, but it is more preferable to remove at least the remaining catalyst element from the channel formation region. One means for removing this catalytic element is a means that utilizes the gettering action of phosphorus (P).
[0258]
The gettering process using phosphorus (P) for this purpose can be performed simultaneously in the activation step described with reference to FIG. The concentration of phosphorus (P) necessary for gettering may be approximately the same as the impurity concentration of the high-concentration n-type impurity region, and the catalyst from the channel formation region of the n-channel TFT and the p-channel TFT is formed by thermal annealing in the activation process. The element can be segregated to an impurity region containing phosphorus (P) at that concentration. As a result, the impurity region is 1 × 10 ¹⁷ ~ 1x10 ¹⁹ atoms / cm ^Three About a catalytic element segregated. The TFT manufactured in this manner has a low off-current value and good crystallinity, so that high field-effect mobility can be obtained and good characteristics can be achieved.
[0259]
Book reference Examples are Examples 1 through 3 Any one of these can be combined freely.
[0260]
[ reference Example 6 The CMOS circuit and the pixel portion formed by implementing the present invention can be used for various semiconductor devices (active matrix liquid crystal display, active matrix EC display). That is, the present invention can be implemented in all electronic devices in which these semiconductor devices are incorporated in the display portion. In order to reduce power consumption in the following devices, a sensor may be incorporated to detect the external brightness and reduce the brightness in a dark place.
[0261]
FIG. 20A illustrates a mobile phone, which includes a display panel 9001, an operation panel 9002, a connection portion 9003, a display device 9004, an audio output portion 9005, operation keys 9006, a power switch 9007, an audio input portion 9008, and an antenna 9009. It is configured. The present invention can be applied to a display device 9004 including an active matrix substrate.
[0262]
FIG. 20B illustrates a video camera which includes a main body 9101, a display device 9102, an audio input portion 9103, operation switches 9104, a battery 9105, and an image receiving portion 9106. The present invention can be applied to a display device 9102 provided with an active matrix substrate.
[0263]
FIG. 20C illustrates a mobile computer or a portable information terminal, which includes a main body 9201, a camera portion 9202, an image receiving portion 9203, operation switches 9204, and a display device 9205. The present invention can be applied to a display device 9205 including an active matrix substrate.
[0264]
FIG. 20D illustrates a head mounted display which includes a main body 9301, a display device 9302, and an arm portion 9303. The present invention can be applied to the display device 9302.
[0265]
FIG. 20E illustrates a television set including a main body 9401, speakers 9402, a display device 9403, a receiving device 9404, an amplifying device 9405, and the like. The present invention can be applied to the display device 9403.
[0266]
FIG. 20F illustrates a portable book which includes a main body 9501, display devices 9502 and 9503, a storage medium 9504, operation switches 9505, and an antenna 9506, and data stored in a minidisc (MD) or DVD, The data received by the antenna is displayed. The display devices 9502 and 9503 are direct-view type display devices to which the present invention can be applied.
[0267]
FIG. 21A illustrates a personal computer which includes a main body 9601, an image input portion 9602, a display device 9603, and a keyboard 9604.
[0268]
FIG. 21B shows a player that uses a recording medium (hereinafter referred to as a recording medium) on which a program is recorded, and includes a main body 9701, a display device 9702, a speaker portion 9703, a recording medium 9704, and operation switches 9705. This apparatus uses a DVD (Digital Versatile Disc), CD, or the like as a recording medium, and can perform music appreciation, movie appreciation, games, and the Internet.
[0269]
FIG. 21C illustrates a digital camera, which includes a main body 9801, a display device 9802, an eyepiece unit 9803, an operation switch 9804, and an image receiving unit (not illustrated).
[0270]
FIG. 22A illustrates a front type projector, which includes a projection device 9901 and a screen 9902. The present invention can be applied to a display device.
[0271]
FIG. 22B illustrates a rear projector, which includes a main body 10001, a projection device 10002, a mirror 10003, and a screen 10004. The present invention can be applied to a display device.
[0272]
Note that FIG. 22C is a diagram illustrating an example of the structure of the projection devices 9901 and 10002 in FIGS. 22A and 22B. The projection devices 9901 and 12002 include a light source optical system 10101, mirrors 10102 and 10104 to 10106, a dichroic mirror 10103, a prism 10107, a liquid crystal display device 10108, a phase difference plate 10109, and a projection optical system 10110. The projection optical system 10110 is composed of an optical system including a projection lens. Book reference Although the example showed the example of a three plate type, it is not specifically limited, For example, a single plate type may be sufficient. In addition, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarization function, a film for adjusting a phase difference, or an IR film in the optical path indicated by an arrow in FIG. Good.
[0273]
FIG. 22D illustrates an example of the structure of the light source optical system 10201 in FIG. Book reference In the example, the light source optical system 10201 includes a reflector 10211, a light source 10212, lens arrays 10213 and 10214, a polarization conversion element 10215, and a condenser lens 10216. Note that the light source optical system illustrated in FIG. 22D is an example and is not particularly limited. For example, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarization function, a film for adjusting a phase difference, or an IR film in the light source optical system.
[0274]
【The invention's effect】
By using the present invention, the polymer stabilization processing of the ferroelectric liquid crystal can be performed even in the active matrix substrate.
[0275]
In an active matrix liquid crystal display device, the voltage necessary for mono-stabilization is applied to the liquid crystal that is independent of the pixel TFT by changing the external input signal without changing the source and gate driver circuit in the panel. Proposed means to do.
[0276]
When line-sequential driving is performed, the voltage applied to the liquid crystal layer fluctuates due to the storage capacitor or current leakage of the liquid crystal layer, and the voltage when the ferroelectric liquid crystal is subjected to polymer stabilization processing becomes unstable. According to this, the polymer stabilization treatment can be performed at a constant voltage.
[0277]
In the active matrix type liquid crystal display device, the voltage applied to the liquid crystal layer is limited due to the withstand voltage characteristics of the element, but according to the present invention, a DC voltage of about 10 V is applied to the liquid crystal layer to stabilize the polymer. Can do.
[Brief description of the drawings]
[Figure 1] reference The drive method when performing the polymer stabilization treatment of Form 2 is shown.
[Figure 2] reference The drive method when performing the polymer stabilization process of the form 1 is shown.
[Fig. 3] reference The circuit structure of the gate driver of form 1 is shown.
[Fig. 4] reference The circuit structure of the source driver of form 1 is shown.
[Figure 5] reference Form 1 and reference The order of the process when performing the polymer stabilization treatment of Form 2 is shown.
FIG. 6 is an embodiment. 1 Sectional drawing of the liquid crystal display device of this is shown.
FIG. 7 is an embodiment. 1 Sectional drawing of the pixel part and drive circuit part of the liquid crystal display device of FIG.
[Fig. 8] reference 2 is a top view of a pixel portion of the liquid crystal display device of Example 1.
FIG. 9 is an embodiment. 1 The order of the steps when performing the polymer stabilization treatment is shown.
FIG. 10 shows an embodiment. 1 Sectional drawing of the pixel part and drive circuit part of the liquid crystal display device of FIG.
FIG. 11 reference Sectional drawing of the liquid crystal display device of Example 3 is shown.
FIG. reference FIG. 6 shows a top view of a pixel portion of a liquid crystal display device of Example 2.
FIG. 13 shows the sequence of steps when performing polymer stabilization treatment.
FIG. 14 is a top view of a liquid crystal display device.
FIG. 15 reference Sectional drawing of the manufacturing process of the pixel part and drive circuit part of the liquid crystal display device of Example 1 is shown.
FIG. 16 reference Sectional drawing of the manufacturing process of the pixel part and drive circuit part of the liquid crystal display device of Example 1 is shown.
FIG. 17 reference A manufacturing process of a pixel portion and a driver circuit portion of the liquid crystal display device of Example 1 is shown.
FIG. 18 reference Sectional drawing of the manufacturing process of the pixel part of the liquid crystal display device of Example 2, and a drive circuit part is shown.
FIG. 19 reference Sectional drawing of the manufacturing process of the pixel part of the liquid crystal display device of Example 3, and a drive circuit part is shown.
FIG. 20 reference Example 6 The perspective view of an example of the electronic device of is shown.
FIG. 21 reference Example 6 The perspective view of an example of the electronic device of is shown.
FIG. 22 reference Example 6 The perspective view of an example of the electronic device of is shown.
FIG. 23 is a top view of a conventional simple matrix liquid crystal display device.
FIG. 24 shows voltage-transmittance characteristics of a conventional ferroelectric liquid crystal.
FIG. 25 reference 3 shows a circuit of a pixel portion for explaining Embodiment 1;

Claims (5)

A voltage is applied to the ferroelectric liquid crystal by using a conductive film provided below the TFT with an insulating film and a counter electrode facing the TFT with a ferroelectric liquid crystal and a polymer material interposed therebetween. A method of manufacturing a liquid crystal display device in which the ferroelectric liquid crystal is mono-stabilized by irradiating the polymer material with ultraviolet rays while applying
A method for producing an active matrix liquid crystal display device, wherein a photopolymerizable polymerizing agent is added to the polymer material. A voltage is applied to the ferroelectric liquid crystal by using a conductive film provided below the TFT with an insulating film and a counter electrode facing the TFT with a ferroelectric liquid crystal and a polymer material interposed therebetween. A method of manufacturing a liquid crystal display device that heats the polymer material while monostable, and monostabilizes the ferroelectric liquid crystal,
A method for manufacturing an active matrix liquid crystal display device, wherein a thermal polymerizable polymer is added to the polymer material. Using a conductive film provided on a surface opposite to the surface on which the TFT is provided of a substrate having TFTs, and a counter electrode facing the TFT with a ferroelectric liquid crystal and a polymer material interposed therebetween , A method of manufacturing a liquid crystal display device, wherein a voltage is applied to the ferroelectric liquid crystal while the polymer material is irradiated with ultraviolet rays to monostabilize the ferroelectric liquid crystal,
A method for producing an active matrix liquid crystal display device, wherein a photopolymerizable polymerizing agent is added to the polymer material. Using a conductive film provided on a surface opposite to the surface on which the TFT is provided of a substrate having TFTs, and a counter electrode facing the TFT with a ferroelectric liquid crystal and a polymer material interposed therebetween A method of manufacturing a liquid crystal display device in which the polymer material is heated while applying a voltage to the ferroelectric liquid crystal to monostabilize the ferroelectric liquid crystal,
A method for manufacturing an active matrix liquid crystal display device, wherein a thermal polymerizable polymer is added to the polymer material. In claim 1 or claim 3,
By irradiating the ultraviolet ray to the sealing agent that seals the injection port together with the polymer material , the sealing agent that seals the injection port is cured together with monostabilization of the ferroelectric liquid crystal. A method for manufacturing an active matrix liquid crystal display device.

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