JP2001324723A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the conventional problem that a narrow cell gap (1-2 μm) is indispensable in an active matrix driving unistable ferroelectric liquid crystal, a reflection type liquid crystal display device or the like, and decrease in yield is incurred due to a shortcircuit between an upper and lower substrate sides in the manufacture of the liquid crystal display device having the narrow cell gap. SOLUTION: The shortcircuit between the upper and lower substrate sides is prevented by anodizing a reflection electrode to form an insulating film or providing an oxidized film formed by anodic oxidation on the surface of a pixel electrode.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a circuit constituted by thin film transistors (hereinafter, referred to as TFTs) and a method for manufacturing the same. For example, the present invention relates to an electro-optical device typified by a liquid crystal display device and an electronic apparatus equipped with such an electro-optical device as a component.

[0002] In this specification, a semiconductor device generally refers to a device that can function by utilizing semiconductor characteristics, and an electro-optical device, a semiconductor circuit, and an electronic device are all semiconductor devices.

[0003]

2. Description of the Related Art In recent years, a technique of forming a thin film transistor (hereinafter, referred to as a TFT) using a semiconductor thin film (having a thickness of about several to several hundred nm) formed on a substrate having an insulating surface has attracted attention. TFTs are widely applied to electronic devices such as ICs and electro-optical devices, and their development is particularly urgent as switching elements for liquid crystal display devices.

In order to obtain a high-quality image in a liquid crystal display device, an active matrix type liquid crystal display device in which pixel electrodes are arranged in a matrix and a TFT is used as a switching element connected to each of the pixel electrodes has attracted attention. ing.

Active matrix type liquid crystal display devices are roughly classified into two types, a transmission type and a reflection type.

[0006] In particular, a reflective liquid crystal display device has an advantage that it consumes less power because it does not use a backlight, as compared with a transmissive liquid crystal display device. The demand as a direct-view display is increasing.

In a liquid crystal display device, a TFT using amorphous silicon or polysilicon as a semiconductor is used.
Are arranged in a matrix, and a liquid crystal material is disposed between an element substrate on which pixel electrodes, source lines, and gate lines connected to each TFT are formed, respectively, and an opposing substrate having an opposing electrode disposed opposite thereto. Is pinched. A color filter for color display is attached to the opposite substrate. Then, a polarizing plate is arranged on each of the element substrate and the counter substrate, and a color image is displayed.

[0008] The liquid crystal display device has an electric,
Utilizing optical anisotropy, transmission of light emitted from a light source,
By using a mechanism that can control the non-transmission as an electric shutter or valve, the electric image signal applied to the display device can be visualized.

In order to visualize the electric signal applied to the liquid crystal material, the liquid crystal molecules are oriented in a predetermined state in the liquid crystal cell so that the optical anisotropy of the liquid crystal material can be effectively used. The method of applying an electric signal and the orientation of liquid crystal molecules are closely related, and several methods have been proposed so far. Generally, these operation modes are collectively called an operation mode. Typical of the proposed operation modes are those using a nematic liquid crystal, and a twisted nematic (TN) mode, a vertical alignment (VA) mode, and a lateral electric field drive (IPS) mode are known and widely used. .

In the case of using a smectic liquid crystal such as a ferroelectric liquid crystal (FLC) and an antiferroelectric liquid crystal (AFLC), a surface stabilized type ferroelectric liquid crystal (SSFLC) mode and a tristable switching (TSS) mode are used. , Thresholdless antiferroelectric liquid crystal mode, polymer-stabilized ferroelectric liquid crystal (PS) by ferroelectric liquid crystal and liquid crystalline polymer with polymerization initiator added
FLC) mode and the like are known.

In any of the liquid crystal display devices using these operation modes, in order to realize and maintain the uniformity of the image quality, the in-plane uniformity of the transmission characteristics of the liquid crystal panel with respect to the applied voltage is improved. In order to improve the uniformity of the response characteristics of the liquid crystal to the applied voltage in the entire liquid crystal display device, the distance between the pair of substrates, that is, the cell gap is maintained uniformly.

A smectic liquid crystal typified by a thresholdless antiferroelectric liquid crystal and a monostable ferroelectric liquid crystal requires an extremely narrow cell gap (1-2 μm).

For example, for a thresholdless antiferroelectric liquid crystal,
Horizontally aligned cells with different gaps were fabricated, antiferroelectric liquid crystals having a large phase transition precursor were injected, and their electro-optical properties were measured. When the cell gap is widened to 5.0 μm, the electro-optical characteristics approach those of the tristable antiferroelectric liquid crystal, while when the cell gap is narrowed to 1.5 μm, the electro-optical characteristics are suppressed in hysteresis essential for active matrix driving. Approaching V-shaped characteristics (Monthly LCD Intell
igence 1997.12.).

The mono-stabilized ferroelectric liquid crystal refers to a liquid crystal in which a resin having liquid crystallinity is added to a side chain of the ferroelectric liquid crystal and UV-cured to eliminate zigzag defects of the ferroelectric liquid crystal. In addition, since it is monostable without having a memory property, it can be applied to active matrix driving. However, in order to manufacture a cell, a cell gap of 1 to 2 μm is required to suppress the spiral structure of the ferroelectric liquid crystal.

Further, the reflection type liquid crystal display device tends to have a smaller cell gap than the transmission type liquid crystal display device due to the retardation of the liquid crystal layer. In particular, when a smectic liquid crystal having a relatively large refractive index anisotropy as compared with a nematic liquid crystal is used as the liquid crystal, a liquid crystal having a cell gap of 1.5 μm or less may be required.

The production of such a cell having a narrow gap is as follows.
This has led to a decrease in yield due to short circuits on the upper and lower substrates.

[0016]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a reflective liquid crystal display device in which a reflective electrode (pixel electrode) is anodically oxidized to provide an anodized film on a surface thereof to prevent a short circuit between the upper and lower substrates. I do. Oxidation of the pixel electrode is formed on the surface of the pixel electrode by anodic oxidation.

Further, a dense insulating film may be formed by forming anodizable metal or the like on the pixel electrode and performing the anodization. That is, a metal, a metal alloy, or a stacked film thereof is formed on the pixel electrode, and the metal, the metal alloy, or the stacked film thereof may be anodized to have a function of preventing a short circuit between the upper and lower substrates. . When at least one of tantalum, aluminum, and valve metal is used as the metal, metal alloy, or a laminated film thereof, anodic oxidation can be performed.

By using a metal mainly composed of aluminum or tantalum or a valve metal as the pixel electrode, it is possible to anodize the pixel electrode. For example, aluminum oxide (Al ₂ O ₃ ) having a relative dielectric constant as high as 7 to 8 by anodic oxidation
Alternatively, tantalum pentoxide (Ta) having a relative dielectric constant of about 20
₂ O ₅ ) is formed. Since the dielectric constant is high, voltage loss due to the anodic oxide film is small.

Anodization may be performed using a valve metal for the pixel electrode. The valve metal is such that an anodic oxide film formed by anodic oxidation exhibits non-linearity in current-voltage characteristics. Tantalum (T
a), zirconium (Zr), titanium (Ti), niobium (Nb), and hafnium (Hf).

In a configuration in which an anodic oxide film is provided only on a reflection electrode of a reflection type liquid crystal display device, the threshold characteristics of the liquid crystal are shifted. In order to prevent this phenomenon, it is preferable to provide an insulating film also on the transparent conductive film formed on the opposite substrate.

In order to prevent a shift in the threshold characteristics of the liquid crystal, it is preferable that the material of the insulating film and the material of the anodic oxide film, that is, the main component, be equal. Further, the ratio of the thickness of the insulating film to the thickness of the anodic oxide film is preferably set to 70 to 130%.

Of course, a film having the same components as the anodic oxide film
It may be formed on a transparent conductive film formed on a counter substrate.

The present invention can be applied to a reflection type liquid crystal display device using a nematic liquid crystal, but is not limited thereto.
This is particularly effective for the purpose of preventing a short circuit between the upper and lower substrates of a reflection type liquid crystal display device using a smectic liquid crystal, which needs to narrow the cell gap in order to suppress the spiral structure. Examples of the smectic liquid crystal include a ferroelectric liquid crystal and an antiferroelectric liquid crystal.

Further, the anodic oxide film on the reflection electrode may be flattened by chemical mechanical polishing (CMP). In the smectic liquid crystal, if the flatness of the alignment surface is poor, alignment defects are induced and the contrast is reduced. However, the alignment surface can be flattened by CMP.

The semiconductor device of the present invention can be used for a personal computer, a video camera, a portable information terminal, a digital camera, a digital video disc player, or an electronic game machine.

[0026]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below.

FIG. 1 shows the configuration of the present invention. Here, a reflection type liquid crystal display device using a polymer stabilized ferroelectric liquid crystal will be described as an example.

Since this is an example of a reflection type liquid crystal display device, the light incident on the pixel openings passes through the single colored layer 16 and then passes through the liquid crystal layer 7 to the pixel electrode 160 having a reflection function. Reflected, again the liquid crystal layer 7 and the single colored layer 16
And light of each color is extracted and perceived by the observer.

Also, in a self-luminous display device using a white light emitting element, an anodic oxide film 166 may be provided on the pixel electrode 160 having a reflective function as in the present invention.

The present invention having the above-described structure will be described in more detail with reference to the following embodiments.

[0031]

[Embodiment 1] (Method of Manufacturing Liquid Crystal Display) One embodiment of the present invention will be described below by taking the manufacture of an active matrix type liquid crystal display as an example. FIG. 1 is a view schematically showing an active matrix type liquid crystal display device formed according to the present invention. FIG. 6 is a top view of the present embodiment. In this embodiment, a process of manufacturing an active matrix liquid crystal display device using the active matrix substrate manufactured in Embodiment 2 and the counter substrate manufactured in Embodiment 4 will be described below.

First, an active matrix substrate having a drain electrode 160 and an anodic oxide film 166 shown in FIG.

Further, according to a fourth embodiment described later, a light-shielding film 92 (not shown in FIG. 1) is formed on a substrate 91 shown in FIG.
Colored layer 93, flattening film 96, transparent conductive film 94, insulating film 9
5 is obtained.

Next, alignment films 10 to 11 are formed on the active matrix substrate and the counter substrate, and rubbing is performed.

The alignment films 10 to 11 are RN1 manufactured by Nissan Chemical Industries, Ltd.
286 are used. The alignment films 10 to 11 are printed on predetermined regions on the active matrix substrate by flexographic printing. The thickness of the alignment films 10 to 11 is 40 n in thickness after firing.
m. The orientation film is prebaked for 90 seconds on a hot plate at 80 ° C., and then baked in a clean oven at 250 ° C. for 1.5 hours.

The rubbing directions when the active matrix substrate and the counter substrate are bonded to each other are set to be parallel. The rubbing treatment used YA-20R manufactured by Yoshikawa Kako Co., Ltd. as a rubbing cloth. The indentation amount is 0.25m
m, roll rotation speed is 100 rpm, stage speed is 10
Rubbing is performed at a rate of 1 mm / sec.

In this embodiment, before the alignment films 10 to 11 are formed, an organic resin film such as an acrylic resin film is patterned to maintain a space between the substrates by patterning an organic resin film (shown in FIG. 6). (Not shown in FIG. 1)
Is formed at a desired position. This height, after overlapping,
It was set to be 1 μm. In addition, the columnar spacer 1
Instead of 2, a spherical spacer may be scattered over the entire surface of the substrate.

Then, the active matrix substrate on which the pixel portion and the driving circuit are formed and the opposing substrate are bonded to each other with the sealing material 13. With a UV-curable sealing material TB3025G manufactured by ThreeBond, a cell gap of 1 to 2 μm can be formed. The two substrates are bonded to each other at a uniform interval by the columnar spacers 12.

Thereafter, both substrates are cut into a desired size. By the division, an injection port (not shown) is formed, and the liquid crystal 14 is injected from the injection port and completely sealed with a sealing agent (not shown).

As the liquid crystal 14, a mixture of a ferroelectric liquid crystal and a liquid crystalline polymer is used. Liquid crystalline acrylate monomer UCL-0 manufactured by Dainippon Ink and Chemicals, Ltd. as a liquid crystalline polymer material
Use 01. 2w for liquid crystalline acrylate monomer
t.% of a polymerizing agent is added. The ferroelectric liquid crystal material includes Felix M4851 / 100 manufactured by Clariant.
It was used. A liquid crystalline acrylate monomer is mixed with 2 wt% ferroelectric liquid crystal, and the mixture is stirred for 20 minutes with a stirrer in an isotropic phase at 80 ° C.

Next, the liquid crystal 14 is heated to an isotropic phase (80 ° C.). Thereafter, liquid crystal is injected by a vacuum injection method. The panel after division is prepared in a vacuum container, and the inside of the vacuum container is set to 1.33 × 10 ⁻⁵ to 1.33 × 10 ⁻⁷ Pa by a vacuum pump.
After a certain degree of vacuum is applied, the inlet is immersed in a liquid crystal dish (not shown) on which liquid crystal is provided.

After injecting the liquid crystal 14 over the entire surface of the liquid crystal panel,
Transfer the liquid crystal panel to a clean oven,
The mixture was heated for 0 minutes and gradually cooled to room temperature at 0.1 ° C./min.

Thereafter, an FPC is attached to the external lead-out wiring portion according to a fifth embodiment which will be described later.

Next, an ultraviolet curing resin (not shown) is applied to the injection port. In this state, a voltage of 4 V was applied to the liquid crystal 14, the ultraviolet curing resin 113 was cured by ultraviolet irradiation (10 mW / cm ² , 30 seconds), and the injection port was sealed. At the same time, the ferroelectric liquid crystal is mono-stabilized by irradiating ultraviolet rays while applying a voltage.

Thus, the active matrix type liquid crystal display device shown in FIG. 1 is completed.

The polymer-stabilized ferroelectric liquid crystal can suppress the hysteresis of the ferroelectric liquid crystal and realize monostabilization. For this reason, halftone display, which has been conventionally difficult due to having bistability, becomes possible. Also, RN with good surface smoothness is used for the alignment film.
Since 1286 is used, a dark state with few zigzag defects is obtained only by a normal rubbing process.

In this embodiment, the substrates manufactured in Embodiments 2 to 4 are bonded together to complete the liquid crystal display device of the present invention. In order to suppress the shift of the threshold characteristic of the liquid crystal,
It is desirable that the material of the anodic oxide film 166 and the insulating film 95 shown in FIG.

The liquid crystal display device may be completed by bonding the active matrix substrate manufactured in the second embodiment and the counter substrate manufactured by a known method. Also,
The liquid crystal display device may be completed by bonding the counter substrate manufactured in the fourth embodiment and an active matrix substrate manufactured by a known method.

In this embodiment, the filler is not mixed in the sealing material 13, but the sealing material 13 in which the filler is mixed may be used. However, the filler diameter is 3 μm
The following has not been developed, and therefore, when a filler is used, the insulating film at the position where the sealant of the counter substrate or the active matrix substrate is applied is removed by etching to form a groove having a depth of about 2 μm. Good.

In this embodiment, a polymer stable ferroelectric liquid crystal display device has been described. However, the present invention is not limited to this and can be applied to a liquid crystal display device using a smectic liquid crystal or a cholesteric liquid crystal. Further, the present invention can be applied to a display device using an active matrix, for example, an EL display device.

Embodiment 2 (One Example of Manufacturing Method of Active Matrix Substrate) In this embodiment, a method of manufacturing an active matrix substrate to be bonded to the counter substrate obtained in Embodiment 4 will be described. Here, a method for simultaneously manufacturing a pixel portion and a TFT (an n-channel TFT and a p-channel TFT) of a driver circuit provided around the pixel portion over the same substrate will be described in detail.

First, as shown in FIG. 2A, in this embodiment, a substrate 100 made of glass such as barium borosilicate glass represented by Corning # 7059 glass or # 1737 glass, or aluminoborosilicate glass is used. Used. Note that the substrate 100 is not limited as long as it is a light-transmitting substrate, and a quartz substrate may be used. Further, a plastic substrate having heat resistance enough to withstand the processing temperature of this embodiment may be used.

In this embodiment, the substrate 100 is made of quartz. Quartz can have a transmittance of 92% for ultraviolet light as well as visible light, so that when monostabilized by irradiation with ultraviolet light described later, absorption of irradiation light by glass is small.

Next, a silicon oxide film is formed on the substrate 100,
A base film 101 made of an insulating film such as a silicon nitride film or a silicon oxynitride film is formed. Although a two-layer structure is used as the base film 101 in this embodiment, a single-layer film of the insulating film or a structure in which two or more insulating films are stacked may be used. For the first layer of the base film 101, a plasma CVD
iH _4, NH _3, a and N ₂ O silicon oxynitride film 101a is formed as the reaction gas 10 to 200 nm (preferably 50 to 100 nm) is formed. In this embodiment, the film thickness 5
0 nm silicon oxynitride film 101a (composition ratio Si = 3
2%, O = 27%, N = 24%, H = 17%). Next, as the second layer of the base film 101, a silicon oxynitride film 101 b formed using SiH ₄ and N ₂ O as a reaction gas by plasma CVD is used to form a 50-200 layer.
nm (preferably 100 to 150 nm). In this embodiment, a 100-nm-thick silicon oxynitride film 101b (composition ratio: Si = 32%, O = 59%, N =
7%, H = 2%).

Next, the semiconductor layers 102 to 10 are formed on the base film.
5 is formed. The semiconductor layers 102 to 105 are formed by forming a semiconductor film having an amorphous structure by a known means (sputtering method, LPCV
D method or plasma CVD method)
A crystalline semiconductor film obtained by performing a known crystallization treatment (such as a laser crystallization method, a thermal crystallization method, or a thermal crystallization method using a catalyst such as nickel) is patterned and formed into a desired shape. . The thickness of the semiconductor layers 102 to 105 is 2
It is formed with a thickness of 5 to 80 nm (preferably 30 to 60 nm). The material of the crystalline semiconductor film is not limited, but is preferably silicon or silicon germanium (SiGe).
It is good to form with an alloy etc. In this embodiment, the plasma C
After forming a 55 nm amorphous silicon film by the VD method, a solution containing nickel was held on the amorphous silicon film. Dehydrogenation (500 ° C., 1
After that, thermal crystallization (550 ° C., 4 hours) was performed, and further, a laser annealing treatment for improving crystallization was performed to form a crystalline silicon film. Then, semiconductor layers 102 to 105 were formed by patterning the crystalline silicon film using a photolithography method.

After the formation of the semiconductor layers 102 to 104, a slight amount of impurity element (boron or phosphorus) may be doped to control the threshold value of the TFT.

When a crystalline semiconductor film is formed by a laser crystallization method, a pulse oscillation type or continuous emission type excimer laser, a YAG laser, or a YVO ₄ laser can be used. In the case of using these lasers, it is preferable to use a method in which laser light emitted from a laser oscillator is linearly condensed by an optical system and irradiated on a semiconductor film. The crystallization conditions are appropriately selected by the practitioner. When an excimer laser is used, the pulse oscillation frequency is 30 Hz, and the laser energy density is 100 to 40.
(Typically ^{200~300mJ / cm 2) 0mJ / cm} 2 to. When a YAG laser is used, its second harmonic is used, the pulse oscillation frequency is set to 1 to 10 kHz, and the laser energy density is set to 300 to 600 mJ / cm ² (typically 35 to
0 to 500 mJ / cm ² ). And width 100-1
A laser beam condensed linearly at 000 μm, for example 400 μm, is irradiated over the entire surface of the substrate, and the superposition rate (overlap rate) of the linear laser light at this time is 80 to 98%.
What should be done.

Next, a gate insulating film 106 covering the semiconductor layers 102 to 104 is formed. The gate insulating film 107 has a thickness of 40 to 40
The insulating film containing silicon is formed to have a thickness of 150 nm. In this embodiment, a silicon oxynitride film (composition ratio: Si = 32%, O = 59) having a thickness of 110 nm by a plasma CVD method.
%, N = 7%, H = 2%). Needless to say, the gate insulating film is not limited to the silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure.

When a silicon oxide film is used,
TEOS (Tetraethyl Orthosilica) by plasma CVD
te) and O ₂ , a reaction pressure of 40 Pa, and a substrate temperature of 30
It can be formed by discharging at a high-frequency (13.56 MHz) power density of 0.5 to 0.8 W / cm ² at 0 to 400 ° C. The silicon oxide film thus manufactured can obtain good characteristics as a gate insulating film by subsequent thermal annealing at 400 to 500 ° C.

Next, as shown in FIG. 7A, a first conductive film 107 having a thickness of 20 to 100 nm and a second conductive film 10 having a thickness of 100 to 400 nm are formed on the gate insulating film 106.
8 are laminated. In this embodiment, a 30 nm-thick T
a first conductive film 107 made of an aN film and a film thickness of 370 nm
The second conductive film 108 made of the W film was formed by lamination. T
The aN film was formed by a sputtering method, and was sputtered using a Ta target in an atmosphere containing nitrogen. The W film was formed by a sputtering method using a W target. In addition, thermal CV using tungsten hexafluoride (WF ₆ )
It can also be formed by Method D. In any case, it is necessary to lower the resistance in order to use it as a gate electrode,
It is desirable that the resistivity of the W film be 20 μΩcm or less. The resistivity of the W film can be reduced by enlarging the crystal grains. However, when the W film contains a large amount of impurity elements such as oxygen, crystallization is inhibited and the resistance is increased. Therefore, in this embodiment, the W film is formed by a sputtering method using a high-purity W (purity of 99.9999%) target, and further taking care not to mix impurities from the gas phase during film formation. By forming, a resistivity of 9 to 20 μΩcm could be realized.

In this embodiment, the first conductive film 107
Is TaN, and the second conductive film 108 is W. However, the present invention is not particularly limited, and any of Ta, W, Ti, Mo, Al, Cu,
It may be formed of an element selected from Cr and Nd, or an alloy material or a compound material containing the element as a main component.
Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus may be used. Also, A
A gPdCu alloy may be used. A first conductive film formed of a tantalum (Ta) film, a second conductive film formed of a W film, a first conductive film formed of a titanium nitride (TiN) film, and a second conductive film formed of a titanium nitride (TiN) film; As a W film, the first
The first conductive film is formed of a tantalum nitride (TaN) film, the second conductive film is formed of a tantalum nitride (TaN) film, the second conductive film is formed of a tantalum nitride (TaN) film, and the second conductive film is formed of a Cu film. May be combined.

Next, masks 109 to 112 made of resist are formed by photolithography, and a first etching process for forming electrodes and wirings is performed. The first etching process is performed under the first and second etching conditions. In this embodiment, the first etching condition is I
Using a CP (Inductively Coupled Plasma) etching method, using CF ₄ , Cl _2, and O _{2 as} etching gases, and using a gas flow ratio of 25/2.
At 5/10 (sccm), 500 W RF (13.56 MHz) power was applied to the coil-type electrode at a pressure of 1 Pa to generate plasma and perform etching. Here, a dry etching apparatus (Model E645- □ ICP) using ICP manufactured by Matsushita Electric Industrial Co., Ltd. was used. A 150 W RF (13.56 MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. The W film is etched under the first etching conditions to form the first film.
Of the conductive layer is tapered. Note that the etching under the first etching condition here corresponds to the first etching step (FIG. 1B) described in the embodiment.

Thereafter, the masks 109 to 109 made of resist are formed.
The second etching condition was changed without removing 112, CF ₄ and Cl ₂ were used as etching gases, the respective gas flow ratios were 30/30 (sccm), and the pressure was 1 Pa to form a coil-type electrode. RF (13.56 MHz) power of 500 W was applied to generate plasma, and etching was performed for about 30 seconds. The substrate side (sample stage) also has a 20 W RF (13.56
MHz) power is applied and a substantially negative self-bias voltage is applied. Under the second etching condition in which CF ₄ and Cl ₂ are mixed, the W film and the TaN film are etched to the same extent. Note that in order to perform etching without leaving a residue on the gate insulating film, the etching time is preferably increased by about 10 to 20%.

In the first etching process, the shape of the resist mask is made appropriate so that
The ends of the first conductive layer and the second conductive layer are tapered due to the effect of the bias voltage applied to the substrate side. The angle of the tapered portion is 15 to 45 °. Thus, by the first etching process, the first shape conductive layers 113 to 116 (the first conductive layers 113 a to 116 a and the second conductive layers 113 b to 113 b) including the first conductive layer and the second conductive layer are formed.
6b) is formed. Reference numeral 117 denotes a gate insulating film,
The region not covered with the conductive layers 113 to 116 having the
A region that is etched and thinned by about 50 nm is formed.

Then, the resist mask is removed.
The first doping process without adding an n-type semiconductor layer.
The added impurity element is added. (Fig. 2 (B)) Dopin
Can be done by ion doping or ion implantation
Good. The condition of the ion doping method is that the dose amount is 1 × 10¹³
~ 5 × 10^Fifteenatoms / cm^TwoAnd the acceleration voltage is 60 to 100
Performed as keV. In this embodiment, the dose is 1.5 × 1
0^Fifteenatoms / cm^TwoAnd the acceleration voltage is set to 80 keV.
Was. Element belonging to Group 15 as an impurity element imparting n-type
Using arsenic, typically phosphorus (P) or arsenic (As)
However, phosphorus (P) was used here. In this case, the conductive layer 1
13 to 116 are masses for the impurity element imparting n-type.
And the high-concentration impurity regions 118 to 12 are self-aligned.
1 is formed. In the high concentration impurity regions 118 to 121,
1 × 10²⁰~ 1 × 10^{twenty one}atoms / cm ^ThreeN type in the concentration range of
An impurity element to be added is added.

Next, a second etching process is performed without removing the resist mask. Here, the W film is selectively etched using CF ₄ , Cl ₂ and O _{2 as} an etching gas. By this second etching process, the second
Of conductive layers 122b to 125b are formed. On the other hand, the first conductive layers 113a to 116a are hardly etched to form first conductive layers 122a to 125a.

Next, a second doping process is performed to obtain a state shown in FIG. Doping is performed on the second conductive layer 12
Using 2b to 125b as a mask for the impurity element, doping is performed so that the impurity element is added to the semiconductor layer below the tapered portion of the first conductive layer. Thus, the low-concentration impurity regions 126 to 129 overlapping with the first conductive layer are formed in a self-aligned manner. The concentration of phosphorus (P) added to the impurity region has a gentle concentration gradient according to the thickness of the tapered portion of the first conductive layer. Note that in the semiconductor layer overlapping with the tapered portion of the first conductive layer, the impurity concentration is slightly reduced from the end of the tapered portion of the first conductive layer toward the inside, but is approximately the same. . Further, an impurity element is also added to the high-concentration impurity regions 118 to 121 to form the high-concentration impurity regions 130 to 133.

Next, a third etching process is performed without removing the resist mask. In the third etching treatment, the tapered portion of the first conductive layer is partially etched to reduce a region overlapping with the semiconductor layer. In the third etching process, CH gas is used as an etching gas.
This is performed using a reactive ion etching method (RIE method) using F ₃ . In this embodiment, the chamber pressure is 6.7P
a, RF power 800 W, CHF ₃ gas flow rate 35 sccm
A third etching process was performed. By the third etching, first conductive layers 138 to 142 are formed. (FIG. 3 (A))

At the time of the third etching process, the insulating film 117 is also etched at the same time, so that the high-concentration impurity region 130 is removed.
To 133 are exposed, and the insulating films 143a to 143d,
144 are formed. In this embodiment, the etching conditions in which a part of the high-concentration impurity regions 130 to 133 are exposed are used. However, if the thickness of the insulating film and the etching conditions are changed, a thin insulating film may be left. it can.

By the third etching, impurity regions (LDD regions) 134a to 137a which do not overlap with the first conductive layers 138 to 142 are formed. Note that the impurity regions (GOLD regions) 134b to 137b remain overlapped with the first conductive layers 138 to 142.

Further, an electrode formed by the first conductive layer 138 and the second conductive layer 122b becomes a gate electrode of an n-channel TFT of a driving circuit formed in a later step, and The electrode formed by the transistor 139 and the second conductive layer 123b serves as a gate electrode of a p-channel TFT of a driver circuit formed in a later step. Similarly, the first conductive layer 1
The electrode formed by the first conductive layer 141 and the second conductive layer 12b becomes a gate electrode of an n-channel TFT of a pixel portion formed in a later step.
5b becomes one electrode of the storage capacitor of the pixel portion formed in a later step.

In this manner, the present embodiment provides the first
Region (GOLD) overlapping conductive layers 138 to 142 of
Region) 134b to 137b and the first
Impurity regions that do not overlap with the conductive layers 138 to 142 (LD
The difference from the impurity concentration in the D regions 134a to 137a can be reduced, and the TFT characteristics can be improved.

Next, after removing the mask made of resist, masks 145 and 146 made of resist are newly formed, and a third doping process is performed. Due to this third doping process, the semiconductor layer serving as the active layer of the p-channel TFT has a conductivity type (p-type) opposite to the one conductivity type (n-type).
Region 14 to which an impurity element for imparting (type) is added
7 to 152 are formed. (FIG. 3B) First conductive layer 1
39 and 142 are used as masks for impurity elements,
An impurity element imparting p-type is added to form an impurity region in a self-aligned manner. In this embodiment, the impurity regions 147 to
152 is formed by an ion doping method using diborane (B ₂ H ₆ ). In the third doping process,
The semiconductor layer forming the n-channel TFT is covered with masks 145 and 146 made of resist. Phosphorus is added at different concentrations to the impurity regions 145 and 146 by the first doping process and the second doping process, and the concentration of the impurity element imparting p-type is 2 × in each of the regions. 10 ^{20 to} 2 × 10 ²¹ atom
By doping to s / cm ³ ,
There is no problem because it functions as the source and drain regions of the channel type TFT. In this embodiment,
Since the third etching treatment exposes a part of the semiconductor layer serving as the active layer of the p-channel TFT, there is an advantage that an impurity element (boron) can be easily added.

Through the above steps, impurity regions are formed in the respective semiconductor layers.

Next, a mask 145 made of resist is used.
146 is removed to form a first interlayer insulating film 153.
The first interlayer insulating film 153 is formed by plasma CVD.
Thickness of 100 to 200 nm by using a sputtering method or a sputtering method
As an insulating film containing silicon. In this embodiment, a 150-nm-thick silicon oxynitride film is formed by a plasma CVD method. Of course, the first interlayer insulating film 153
Is not limited to a silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure.

Next, as shown in FIG. 3C, a step of activating the impurity element added to each semiconductor layer is performed. This activation step is performed by a thermal annealing method using a furnace annealing furnace. As the thermal annealing method, the oxygen concentration is 400 to 700 ° C. in a nitrogen atmosphere having an oxygen concentration of 1 ppm or less, preferably 0.1 ppm or less, typically 500 to
The activation treatment may be performed at 550 ° C. In this embodiment, the activation treatment is performed by heat treatment at 550 ° C. for 4 hours. Note that, other than the thermal annealing method, a laser annealing method or a rapid thermal annealing method (RTA method) can be applied.

In this embodiment, at the same time as the activation process, the impurity regions (130, 132, 147,
The nickel concentration in the semiconductor layer which is gettered 150) and mainly becomes a channel formation region is reduced. A TFT having a channel formation region manufactured in this manner has a low off-current value and high crystallinity, so that a high field-effect mobility can be obtained and favorable characteristics can be achieved.

The activation treatment may be performed before forming the first interlayer insulating film. However, when the wiring material used is weak to heat, after forming an interlayer insulating film (an insulating film containing silicon as a main component, for example, a silicon nitride film) for protecting the wiring and the like as in this embodiment, the active material is activated. It is preferable to carry out a chemical treatment.

Further, a heat treatment is performed at 300 to 550 ° C. for 1 to 12 hours in an atmosphere containing 3 to 100% of hydrogen to hydrogenate the semiconductor layer. In this embodiment, heat treatment was performed at 410 ° C. for one hour in a nitrogen atmosphere containing about 3% of hydrogen. In this step, dangling bonds in the semiconductor layer are terminated by hydrogen contained in the interlayer insulating film. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) may be performed.

When a laser annealing method is used as the activation treatment, it is desirable to irradiate a laser beam such as an excimer laser or a YAG laser after the above-mentioned hydrogenation.

Next, as shown in FIG. 4A, a second interlayer insulating film 154 made of an organic insulating material is formed on the first interlayer insulating film 153. In this embodiment, an acrylic resin film having a thickness of 1.6 μm was formed. Next, each impurity region 13
Patterning is performed to form contact holes reaching 0, 132, 147, and 150.

Then, in the driver circuit 205, an electrode 167 electrically connected to the impurity regions 130 and 147 is formed. Note that the electrode 167 has a thickness of 50 n.
A laminated film of a m-thick Ti film and a 500-nm-thick alloy film (an alloy film of Al and Ti) is formed by patterning. In the pixel portion 206, the electrode 167 is in contact with the impurity regions 132 and 150.

Next, the electrode 167 is used as an anode with an electrolytic solution,
Anodization is performed using platinum as a cathode, and the surface of the electrode 167 to be electrically connected is oxidized to form an anodic oxide film 169. As the electrolytic solution, a solution obtained by neutralizing a 3% solution of tartaric acid in ethylene glycol with aqueous ammonia and adjusting the pH to 6.92 is used.

Further, the platinum is treated with the cathode at a formation current of 5 mA and a reaching voltage of 15 V.

According to this step, a dense anodic oxide film 169 is formed on the electrode 168 as shown in FIG. The thickness of the formed aluminum oxide was 20 nm. The thickness of this oxide film is proportional to the applied voltage.

In order to improve the orientation of the smectic liquid crystal, after anodic oxidation, CMP (Chemical Mechanical
Polish), the surface of the anodic oxide film may be flattened.

When performing anodic oxidation, as shown in FIG. 8, a resist is covered on the wiring on which the flexible printed wiring board (FPC) is arranged, so that an anodic oxide film is not formed. This will be described in detail in a sixth embodiment.

Then, as shown in FIG. 5, in the drive circuit 205, the electrodes 155 to 158 electrically connected to the impurity regions 130 or 147 are formed by patterning.

In the pixel portion 206, a source wiring 159 in contact with the impurity region 132 is formed, and a drain electrode 160 in contact with the impurity region 150 is formed. Further, the drain electrode 160 functions as a pixel electrode. The pixel electrode of the adjacent pixel is indicated by 161. Drain electrode 1
An electrical connection 60 is formed with a semiconductor layer (impurity region 150) functioning as one electrode forming a storage capacitor.

In order to use the drain electrode 160 as a pixel electrode of a reflective liquid crystal display device, it is preferable to form the pixel electrode using a highly reflective conductive material. As a material of the pixel electrode, it is desirable to use a material having excellent reflectivity, such as a film containing Al or Ag as a main component or a stacked film thereof.

The electrodes 155 to 158, the source wiring 159,
On the drain electrodes 160 to 161 are anodic oxide films 162 to 166 formed by anodic oxidation.

As described above, the n-channel TFT 20
Drive circuit 20 having 1 and p-channel type TFT 202
5 and a pixel portion 206 having a pixel TFT 203 and a storage capacitor 204 can be formed over the same substrate. In this specification, such a substrate is referred to as an active matrix substrate for convenience.

The n-channel TFT 20 of the drive circuit 205
Reference numeral 1 denotes a low-concentration impurity region 13 overlapping the channel formation region 163 and the first conductive layer 138 forming a part of the gate electrode.
4b (GOLD region), a low concentration impurity region 134a (LDD region) formed outside the gate electrode, and a high concentration impurity region 1 functioning as a source region or a drain region.
30. The p-channel type TFT 202 includes a channel forming region 164 and a first part forming a part of a gate electrode.
Impurity region 149 overlapping with the conductive layer 139, an impurity region 148 formed outside the gate electrode, and an impurity region 147 functioning as a source or drain region.

In the pixel TFT 203 of the pixel portion 206, the channel formation region 165 and the low concentration impurity region 136b (GOLD) overlapping the first conductive layer 140 forming the gate electrode are formed.
Region), a low-concentration impurity region 136a (LDD region) formed outside the gate electrode, and a high-concentration impurity region 132 functioning as a source or drain region. Further, an impurity element imparting n-type is added to the high-concentration impurity region 150 of the semiconductor layer 170 functioning as one electrode of the storage capacitor 204. Storage capacity 204
Is formed of the electrode 142 and the semiconductor layer 170 using the insulating film 144 as a dielectric.

FIG. 6 is a top view of the pixel portion of the active matrix substrate manufactured in this embodiment. 2 to 5
The same reference numerals are used for portions corresponding to. The dashed line AA ′ in FIG. 5 corresponds to the cross-sectional view taken along the dashed line AA ′ in FIG.

According to the steps shown in this embodiment, the number of photomasks required for manufacturing the active matrix substrate is six (the semiconductor layer pattern mask, the first wiring pattern mask, the source region and the drain region of the p-type TFT). A pattern mask for forming, a pattern mask for forming contact holes, a pattern mask for preventing an anodic oxide film from being formed on wiring for a flexible printed wiring board, and the like.
(Second wiring pattern mask). As a result, the process can be shortened, which can contribute to a reduction in manufacturing cost and an improvement in yield.

[Embodiment 3] In this embodiment, another method for manufacturing a crystalline semiconductor layer for forming a semiconductor layer of a TFT of an active matrix substrate shown in Embodiment 2 will be described. In this embodiment, a crystallization method using a catalytic element disclosed in Japanese Patent Application Laid-Open No. Hei 7-130652 can be applied.
An example in that case will be described below.

As in the second embodiment, a base film and an amorphous semiconductor layer are formed on a glass substrate to a thickness of 25 to 80 nm. For example, an amorphous silicon film is formed with a thickness of 55 nm. Then, an aqueous solution containing 10 ppm by weight of a catalytic element is applied by spin coating to form a layer containing the catalytic element. The catalytic elements include nickel (Ni), germanium (Ge), iron (Fe), palladium (Pd), tin (Sn), lead (Pb), cobalt (Co), and platinum (P
t), copper (Cu), gold (Au) and the like. This catalyst element-containing layer may be formed by sputtering or vacuum evaporation in addition to spin coating to a thickness of 1 to 5 nm.

In the crystallization step, first, 400 to
A heat treatment is performed at 500 ° C. for about 1 hour to reduce the hydrogen content of the amorphous silicon film to 5 atom% or less. Then, using a furnace annealing furnace, 550-600 in a nitrogen atmosphere.
Thermal annealing is performed at 1 ° C. for 1 to 8 hours. Through the above steps, a crystalline semiconductor layer made of a crystalline silicon film can be obtained.

When an island-shaped semiconductor layer is manufactured from the crystalline semiconductor layer manufactured as described above, an active matrix substrate can be completed in the same manner as in the second embodiment. However, when a catalyst element that promotes crystallization of silicon is used in the crystallization step, a small amount (about 1 × 10 ¹⁷ to 1 × 10 ¹⁹ atoms / cm ³ ) of a catalyst element remains in the island-shaped semiconductor layer. I do. Of course, the TFT can be completed in such a state, but it is more preferable to remove the remaining catalyst element from at least the channel formation region. One of the means for removing this catalytic element is phosphorus (P).
There is a means for utilizing the gettering action by

The gettering process using phosphorus (P) for this purpose can be performed simultaneously in the activation step described with reference to FIG. Phosphorus required for gettering (P)
May be substantially the same as the impurity concentration of the high-concentration n-type impurity region.
The catalyst element can be segregated from the channel formation region of the FT and the p-channel TFT to the impurity region containing phosphorus (P) at the concentration. As a result, about 1 × 10 ¹⁷ to 1 × 10 ¹⁹ atoms / cm ³ of a catalytic element segregated in the impurity region. The TFT thus manufactured has a low off-current value and high crystallinity, so that a high field-effect mobility can be obtained and good characteristics can be achieved.

This embodiment can be combined with the first embodiment.

Embodiment 4 (Method for Manufacturing Counter-Substrate) Hereinafter, an embodiment of the present invention will be described with reference to an example of manufacturing a counter-substrate used in an active matrix liquid crystal display device. FIG. 7 is a diagram schematically showing an opposing substrate provided with a colored layer formed according to the present invention.

First, as shown in FIG.
To form First, a metal thin film is sputtered on the substrate 91. In this embodiment, the metal thin film is chromium (Cr).
Is used. Apply a positive resist on chrome (Cr),
After the exposure, development is performed using an alkaline aqueous solution, and then baking is performed. Using this positive resist as a mask, the chromium film was etched (using an aqueous solution of cerium nitrate ammonium and perchloric acid), and the positive resist was finally stripped to form a light-shielding film 92.

A pigment-dispersed photosensitive acrylic resin in which a red pigment is dispersed in acryl is applied to a substrate 91 provided with a light-shielding film 92, and dried. After that, when exposure is performed through the formed photomask, a portion irradiated with light is solidified.
Next, after developing using an alkali developer and baking, a colored layer 93a having a red pattern (indicated by R in FIG. 7) was obtained. Green (indicated by G in FIG. 7),
For the blue (indicated by B in FIG. 7) pattern, a similar photolithography method is used to form a colored layer 93b having a green pattern and a colored layer 93 having a blue pattern.
c was obtained. Using the above method, a colored layer 93 having a pattern of a color filter (RGB) of three primary colors of red, blue and green was obtained.

A flattening film 96 is formed to flatten the overlap or gap between the colored layer 93b having a green pattern and the colored layer 93c having a blue pattern. At this time, spinner coating of epoxy acrylate material,
What is necessary is just to heat-harden at 200-250 degreeC, and just to form an overcoat layer.

Further, a transparent conductive film 94 is formed with a thickness of 120 nm. The material of the transparent conductive film is indium oxide (In ₂ O ₃ ) or an indium oxide tin oxide alloy (In ₂ O ₃
—SnO ₂ ; ITO film) or the like can be formed using a sputtering method, a vacuum evaporation method, or the like. The etching of such a material is performed using a hydrochloric acid-based solution. However, in particular, since residues are easily generated in the etching of the ITO film, an indium oxide-zinc oxide alloy (In ₂ O ₃ —ZnO) may be used to improve the etching processability. Indium oxide zinc oxide alloy has excellent surface smoothness,
Excellent thermal stability to the film. Similarly, zinc oxide (ZnO) is a suitable material, and zinc oxide (ZnO: Ga) to which gallium (Ga) is added in order to increase the transmittance and conductivity of visible light can be used. The transparent conductive film above the drive circuit portion is removed by patterning using a photomask and etching to prevent parasitic capacitance. The transparent conductive film 94 functions as a counter electrode.

In the active matrix substrate shown in FIG. 5 of the second embodiment, the drain electrode 160 functioning as a pixel electrode
An anodic oxide film 166 is formed thereon. The asymmetric thickness and dielectric constant of the insulating film formed on the electrode means that the capacitance of the insulating film formed so as to sandwich the liquid crystal in the series structure of the pair of insulating films, the pair of alignment films, and the liquid crystal. It means different. As a result, the voltage applied to the liquid crystal becomes asymmetric, and the threshold characteristic shifts. In order to prevent the threshold value from shifting, an insulating film having the same dielectric constant and film thickness ratio as the anodic oxide film 166 of FIG. 5 must be formed on the transparent conductive film 94 of the counter substrate shown in FIG. desirable.

In this embodiment, a colloidal solution in which particles of an inorganic material are dispersed in an organic solvent is applied by a spinner, and the organic solvent is volatilized by baking to form an insulating film 94. The anodic oxide film formed on the pixel electrode of the active matrix substrate is aluminum oxide (Al ₂ O ₃ ) having a relative dielectric constant of 8.5.
Since the film is formed to a thickness of 20 nm, the transparent conductive film 94 shown in FIG.
Is AT-902 manufactured by Nissan Chemical Co., Ltd.
It is formed with a thickness of nm. As a result, the voltage loss caused by the anodic oxide film and the insulating film 94 becomes equal, and the potential applied to the liquid crystal becomes symmetric.

A colloidal solution in which aluminum oxide (Al ₂ O ₃ ) as inorganic material particles is dispersed is applied by a spinner, and the organic solvent is volatilized by baking, whereby the anode on the pixel electrode of the active matrix substrate shown in FIG. The insulating film 94 can be formed using the same main component as the oxide film 166.

Further, the insulating film 94 on the common contact and the common pad is removed by etching.

In this specification, such a substrate is called a counter substrate.

In this embodiment, the insulating film 14 is applied to the opposing substrate by a spinner. However, a metal film is also formed on the transparent conductive film 93 of the opposing substrate, and the insulating film 94 is formed by anodizing the metal film. good. At this time, it is necessary to select a combination such that the transparent conductive film and the metal film on the transparent conductive film are not in contact with each other.

Example 5 (Storage Capacity Required for Driving a Liquid Crystal Having Spontaneous Polarization) In order to drive a liquid crystal having spontaneous polarization, a larger storage capacity than a nematic liquid crystal was needed to invert the spontaneous polarization. Required. In this embodiment, a storage capacity required for driving a liquid crystal having spontaneous polarization is estimated.

The switching operation of a liquid crystal having spontaneous polarization in an active matrix type liquid crystal display device having no storage capacitor will be described below. First, during the period when the gate line is selected, charge is injected into the liquid crystal layer, and the spontaneous polarization of the liquid crystal starts to be inverted. Even if the liquid crystal display device is driven by line-sequential driving, the period during which the gate line is selected is 16 μsec for the SXGA pixels and 70 μsec for the QVGA pixels.
Therefore, the gate line is deselected in a state in which the spontaneous polarization is not sufficiently inverted, and after the gate line is deselected, the potential of the liquid crystal layer decreases with the reversal of the spontaneous polarization.

On the other hand, when a storage capacitor is added and a gate line is selected, charges are injected into the liquid crystal layer and the storage capacitor. After the gate line is deselected, the spontaneous polarization is inverted using the charge stored in the storage capacitor. When this relationship is expressed by a theoretical equation, it becomes Equation 1.

[0117]

(Equation 1)

In Equation 1, the dimension of the left side and the right side is Coulomb (C). V is the value of the video voltage, V _x is the value of the voltage after the spontaneous polarization is reversed, P _s is the value of the spontaneous polarization of the liquid crystal,
S is the value of the area of the pixel electrode, C _s is the value of the capacitance of the storage capacitor,
C _LC is the value of the capacity of the liquid crystal.

In Equation 1, it is assumed that the inversion of the spontaneous polarization of the liquid crystal during the gate selection period can be ignored. In addition, the charge required for reversing the spontaneous polarization of the ferroelectric liquid crystal is estimated to a maximum value. Further, voltage loss due to an alignment film or the like is not considered.

Incidentally, when Equation 1 is summarized with respect to V _x , Equation 2 is obtained.
become.

[0121]

(Equation 2)

Equation 2 shows that the electric charge stored in the liquid crystal layer and the electric charge charged in the storage capacitor are consumed by the reversal of the spontaneous polarization, so that the potential of the liquid crystal layer decreases. Further, it can be seen that the decrease in the potential of the liquid crystal layer can be made less noticeable by increasing the storage capacitance.

For example, in FIG. 1, an active matrix substrate in which an anodic oxide film 166 having a relative dielectric constant of 8.5 and a film thickness of 20 nm is provided on the pixel electrode 160 by anodic oxidation, A case will be considered in which a reflection type liquid crystal display device of the present invention, which is formed by laminating a counter substrate provided with an insulating film 95 having the same ratio of 8.5 and a thickness of 20 nm, is used.

Each of the alignment films 10 to 11 has a thickness of 40 nm and a relative dielectric constant of 3.8. The liquid crystal 14 has a cell gap of 1.0 μm and a relative permittivity of 30 for a reflection type liquid crystal display device. Assuming that the voltage (video voltage) directly applied to the pixel electrode is 5 V, the effective voltage applied to the liquid crystal is calculated to be 3.7 V due to the voltage loss of the alignment films 10 to 11, the anodic oxide film 166, and the insulating film 95. It can be understood by:

Further, the voltage hardening due to the reversal of spontaneous polarization is estimated by using the equation (2). The value of the video voltage of Equation 2 is V
The alignment films 10 to 11, the anodic oxide film 166, the insulating film 95
As a result of considering the voltage loss of the above, 3.7 V is substituted as the effective voltage applied to the liquid crystal. 20nC / c spontaneous polarization of liquid crystal
and m ^2. The dielectric constant of the storage capacitor is 4.0.
It is assumed that silicon oxynitride having a thickness of 50 nm is used. When the area of the pixel electrode is calculated as 42 μm × 126 μm,
If a storage capacitor having an area corresponding to about 40% of the area of the pixel electrode is used, reversal of spontaneous polarization and voltage drop due to the alignment films 10 to 11, the anodic oxide film 166, and the insulating film 95 during the period when the gate line is not selected. It can be seen that the liquid crystal can be driven at the saturation voltage (3 V) of the threshold characteristic even when considering the above.

When driving a liquid crystal having a large spontaneous polarization,
In a transmissive liquid crystal display device, an increase in the storage capacity causes a decrease in the aperture ratio. However, in a reflective liquid crystal display device as in the present invention, an increase in the storage capacitance does not cause a problem in the aperture ratio. .

The active matrix substrate manufactured by combining Examples 2 and 3 has a write current of 1 μm.
A, which is large, and the storage capacitor estimated in this embodiment and the charge for charging the liquid crystal layer can be sufficiently supplied.

[Embodiment 6] (Configuration of active matrix type liquid crystal display device) The configuration of an active matrix type liquid crystal display device (FIG. 1) obtained by using Embodiment 1 is shown in a top view of FIG. 9 and a cross section of FIG. This will be described with reference to the drawings. The same reference numerals are used for corresponding parts in FIGS.

The top view shown in FIG. 9 shows a pixel portion, a driving circuit,
FPC (Flexible Printed Wiring Board: Flexible Print
An active matrix substrate 201 on which an external input terminal 203 to which an ed circuit is attached, a wiring 204 for connecting the external input terminal to an input portion of each circuit, and the like, and a counter substrate 202 on which a coloring layer and the like are formed are sealed. Lumber 568
Are pasted together.

On the upper surface of the gate wiring side driving circuit 205 and the source wiring side driving circuit 206, a light shielding portion 207 is provided on the opposite substrate side.
Are formed. The coloring layer 208 formed on the counter substrate side over the pixel portion 407 is red (R), green (G),
A coloring layer of each color of blue (B) is provided corresponding to each pixel. In actual display, a red (R) colored layer,
A color display is formed by three colors of a green (G) colored layer and a blue (B) colored layer, and the arrangement of the colored layers of these colors is arbitrary.

FIG. 8A shows the external input terminal 2 shown in FIG.
FIG. 3 shows a cross-sectional view taken along line EE ′ of FIG. The external input terminal is formed on the active matrix substrate side, and is provided with a gate wiring via an interlayer insulating film 210 by a wiring 209 formed in the same layer as the pixel electrode in order to reduce interlayer capacitance and wiring resistance and prevent a failure due to disconnection. Is connected to the wiring 211 formed in the same layer.

Further, the base film 2 is connected to the external input terminal.
12 and wiring 213 are anisotropic conductive resin 2
14 are pasted together. Further, the mechanical strength is enhanced by the reinforcing plate 215.

FIG. 8 (B) shows a detailed view of FIG.
2A is a cross-sectional view of the external input terminal shown in FIG. An external input terminal provided on the active matrix substrate side has a wiring 211 formed in the same layer as a gate wiring and a capacitor electrode.
And a wiring 209 formed in the same layer as the drain electrode (pixel electrode). Of course, this is an example showing the configuration of the terminal portion, and the terminal portion may be formed with only one of the wires. For example, when the wiring 211 is formed using the same layer as the gate wiring and the capacitor electrode, it is necessary to remove the interlayer insulating film formed thereon. The wiring 209 formed in the same layer as the pixel electrode is a Ti film 209
a, an alloy film (alloy film of Al and Ti) 209b. The FPC is formed from a base film 212 and a wiring 213, and the wiring 213 and the wiring 209 formed in the same layer as the pixel electrode are made of a thermosetting adhesive 214 and conductive particles 216 dispersed therein. To form an electrical connection structure.

The active matrix type liquid crystal display device manufactured as described above can be used as a display portion of various electronic devices.

[Embodiment 7] The TFT formed by carrying out any one of the above embodiments 1 to 6 can be used for various electro-optical devices (active matrix liquid crystal display, active matrix EC display). Can be. That is, the invention of the present application can be applied to all electronic devices in which these electro-optical devices are incorporated in a display unit.

Such electronic devices include a video camera, digital camera, projector (rear or front type), head mounted display (goggle type display), car navigation, car stereo,
Examples include a personal computer and a portable information terminal (a mobile computer, a mobile phone, an electronic book, or the like). Examples of these are shown in FIGS.

FIG. 10A shows a personal computer, which includes a main body 2001, an image input section 2002, and a display section 20.
03, a keyboard 2004 and the like. Display unit 2 of the present invention
003 can be applied.

FIG. 10B shows a video camera, which includes a main body 2101, a display portion 2102, an audio input portion 2103, operation switches 2104, a battery 2105, and an image receiving portion 210.
6 and so on. The present invention can be applied to the display portion 2102.

FIG. 10C shows a mobile computer (mobile computer), which includes a main body 2201, a camera section 2202, an image receiving section 2203, operation switches 2204, a display section 2205, and the like. The present invention can be applied to the display portion 2205.

FIG. 10D shows a goggle type display, which includes a main body 2301, a display section 2302, and an arm section 230.
3 and so on. The present invention can be applied to the display portion 2302.

FIG. 10E shows a player that uses a recording medium (hereinafter, referred to as a recording medium) on which a program is recorded, and includes a main body 2401, a display section 2402, and a speaker section 240.
3, a recording medium 2404, an operation switch 2405, and the like. This player uses a DVD (D
digital Versatile Disc), CD
And the like, it is possible to perform music appreciation, movie appreciation, games, and the Internet. The present invention can be applied to the display portion 2402.

FIG. 10F shows a digital camera, which includes a main body 2501, a display section 2502, an eyepiece section 2503, operation switches 2504, an image receiving section (not shown), and the like. The present invention can be applied to the display portion 2502.

FIG. 11A shows a mobile phone,
01, audio output unit 2902, audio input unit 2903, display unit 2904, operation switch 2905, antenna 2906
And so on. The present invention can be applied to the display portion 2904.

FIG. 11B shows a portable book (electronic book), which includes a main body 3001, display portions 3002 and 3003, a storage medium 3004, operation switches 3005, and an antenna 3006.
And so on. The present invention can be applied to the display units 3002 and 3003.

FIG. 11C shows a display, which includes a main body 3101, a support 3102, a display portion 3103, and the like.
The present invention can be applied to the display portion 3103. The display of the present invention is particularly advantageous when the screen is enlarged, and is advantageous for a display having a diagonal of 10 inches or more (particularly 30 inches or more).

As described above, the applicable range of the invention of this specification is extremely wide, and can be applied to electronic devices in all fields. Further, the electronic apparatus of the present embodiment is the same as those of the first to sixth embodiments.
It can also be realized by using a configuration composed of any combination of the above.

[0147]

According to the present invention, by providing an insulating film formed by anodic oxidation on the surface of a pixel electrode of a reflection type liquid crystal display device, it is possible to more reliably prevent a vertical short circuit of a substrate.

[Brief description of the drawings]

FIG. 1 is a diagram showing a sectional structural view of a liquid crystal display device of the present invention.

FIG. 2 is a diagram showing a manufacturing process of a pixel TFT and a driving circuit TFT.

FIG. 3 is a view showing a manufacturing process of a pixel TFT and a driving circuit TFT.

FIG. 4 is a view showing a manufacturing process of a pixel TFT and a driving circuit TFT.

FIG. 5 is a diagram showing a manufacturing process of a pixel TFT and a driving circuit TFT.

FIG. 6 is a diagram illustrating a top view of a pixel.

FIG. 7 is a diagram showing a cross-sectional structure diagram of a counter substrate of the present invention.

FIG. 8 illustrates a terminal portion of an active matrix liquid crystal display device.

FIG. 9 illustrates an appearance of an active matrix liquid crystal display device.

FIG. 10 illustrates an example of an electronic device.

FIG. 11 illustrates an example of an electronic device.

Continuation of the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) H01L 21/336 H01L 29/78 612C 5F110 // G02F 1/1333 505 616A 1/141 617K G02F 1/137 510F Term ( 2H088 EA02 EA12 EA25 GA04 HA08 HA21 JA17 JA20 2H090 HA03 HB04X HC05 HC09 HC12 HC15 HC17 HC18 HD05 JB02 JD14 KA14 KA15 MA05 2H091 FA14Y FB08 FC02 FC10 FC26 FC28 FC29 FC30 FD04 FD12 GA25 HA12 LA12 GA25 JA42 JA44 JA46 JB13 JB23 JB32 JB33 JB38 JB42 JB51 JB57 JB63 JB69 KA04 KA07 MA05 MA07 MA14 MA15 MA16 MA18 MA19 MA20 MA24 MA27 MA30 MA32 MA35 MA37 MA41 NA16 NA25 NA27 PA02 PA06 PA12 QA13 QA14 HA05 BA10 HA05 BA05 HA05 5F110 AA16 AA26 BB02 BB04 CC02 DD01 DD02 DD03 DD13 DD14 DD15 DD17 EE01 EE02 EE03 EE04 EE06 EE09 EE14 EE23 EE44 EE45 FF02 FF04 FF09 FF28 FF30 FF36 GG01 GG02 GG13 J04 H23 GG43 J04 L11 HL27 HM13 HM15 NN03 NN04 NN22 NN24 NN34 NN35 NN72 NN73 PP03 PP06 PP10 PP13 PP29 PP34 PP35 QQ04 QQ11 QQ24 QQ25 QQ28

Claims (20)

[Claims] 2. A semiconductor device comprising: a pixel electrode; and an insulating film provided in contact with the pixel electrode, wherein the insulating film is an oxide of the pixel electrode. 2. A first substrate comprising a first pixel electrode and said first pixel electrode.
And a first insulating film made of an oxide of the first pixel electrode provided in contact with the pixel electrode of the second type.
A pixel electrode, and a second insulating film provided in contact with the second pixel electrode. 3. The semiconductor device according to claim 2, wherein a main component of the first insulating film is the same as a main component of the second insulating film. 4. The semiconductor device according to claim 3, wherein a ratio of a thickness of said second insulating film to said first insulating film is in a range of 0.7 to 1.3. 5. The semiconductor device according to claim 1, wherein the oxide contains at least one of valve metal oxides as a main component. 6. The semiconductor device according to claim 1, wherein the oxide contains tantalum oxide or aluminum oxide as a main component. 7. The semiconductor device according to claim 1, further comprising an alignment film on the oxide, and a smectic liquid crystal on the alignment film. 8. The semiconductor device according to claim 1, wherein the smectic liquid crystal is a ferroelectric liquid crystal or an antiferroelectric liquid crystal. 9. The semiconductor device according to claim 1, wherein said pixel electrode is a reflective electrode. 10. The semiconductor device according to claim 2, wherein said pixel electrode is a reflective electrode. 11. The semiconductor device according to claim 1, wherein the semiconductor device is a personal computer, a video camera, a portable information terminal, a digital camera, a digital video disc player, or an electronic game machine. Semiconductor device. 12. A method for manufacturing a semiconductor device, comprising: anodizing a pixel electrode; and forming an oxide film on a surface of the pixel electrode. 13. A first pixel electrode is formed on a first substrate,
Forming an oxide film on the surface of the first pixel electrode by anodizing the first pixel electrode, forming a second pixel electrode on a second substrate, and insulating on the second pixel electrode A method for manufacturing a semiconductor device, comprising a step of forming a film. 14. The method according to claim 13, wherein a main component of the first insulating film is the same as a main component of the second insulating film. 15. The method according to claim 14, wherein a ratio of a thickness of the insulating film to the oxide film is in a range of 0.7 to 1.3. 16. A method for manufacturing a semiconductor device according to claim 12, wherein said oxide contains at least one of valve metal oxides as a main component. 17. The method for manufacturing a semiconductor device according to claim 12, wherein said oxide contains tantalum oxide or aluminum oxide as a main component. 18. A method according to claim 12, wherein said oxide film is planarized by CMP. 19. A semiconductor device according to claim 1, wherein a metal film, a metal alloy film or a laminated film thereof is formed on the pixel electrode, and the metal film, the metal alloy film or the laminated film thereof is anodized. Production method. 20. A method of manufacturing a semiconductor device according to claim 19, wherein tantalum or aluminum is used as said metal film, metal alloy film or a laminated film thereof.