JP4848943B2 - Pachinko machine - Google Patents

Description

  The present invention relates to a pachinko gaming machine configured to display an image of a symbol game in which an identification symbol is sequentially displayed in a variable state and a variable stop state on a display.

Some of the pachinko gaming machines have a configuration in which the update result of the special prize counter value is acquired based on the game ball entering the start opening, and the update result of the special prize counter value is recorded in the special prize counter recording means. . In this configuration, when the start timing of the symbol game arrives, a special prize counter recording means detects the special counter value recording result, and the special prize counter value detection result is compared with a predetermined special prize value. It is determined whether or not it is in a state. When the determination result is a special prize state, a special prize game is performed in which the variable entrance is opened after notifying the player that the special prize state has been determined in the symbol game.
JP 2004-113294 A

  Patent Document 1 discloses a process for notifying that a special prize game will be performed. In this patent document 1, it is determined whether or not a special prize state is obtained based on a comparison between a special prize counter value acquisition result and a special prize value. The determination result of whether or not the special game state is recorded is recorded in the special counter recording means when the start timing of the symbol game is reached, and the determination result of the special prize state is determined. Is recorded in advance when a special game is to be played. However, it is not preferable to determine in advance whether or not the special game state is reached before the start timing of the symbol game arrives, and to record the determination result as to whether or not the special game state is in the special prize counter recording means.

  The present invention has been made in view of the above circumstances, and its purpose is to protect a process for determining whether or not a special game is in a special state based on the result of recording a special game counter value when the start timing of the symbol game arrives. However, there is a need to provide a pachinko gaming machine that can give advance notice that a special prize game will be held.

1-1. Description of pachinko gaming machine according to claim 1 The pachinko gaming machine according to claim 1 is characterized in that it includes [1] gaming board to [26] notice means.
[1] The game board has a game area in which a game ball can roll. Reference numeral 18 in FIG. 2 is an example of a game board, and reference numeral 22 in FIG. 2 is an example of a game area.
[2] The start port is provided in the game board, and a game ball can be entered therein. Reference numeral 24 in FIG. 2 is an example of a starting port.
[3] The display is provided on the game board, and displays an image of a symbol game that sequentially displays the identification symbols in a variable state and a variable stop state. The decorative symbol display 32 in FIG. 2 is an example of a display.
[4] The variable entrance is provided in the game board and is switched between an open state in which the game ball can enter and a closed state in which the game ball cannot enter. The winning opening base plate 26 in FIG. 2 holds a special winning opening. This special winning opening is switched between an open state where game balls can enter and a closed state where game balls cannot enter, and corresponds to a variable entrance.
[5] The special prize counter updating means updates the special prize counter value by a fixed value every time a predetermined time elapses. The special prize counter value is updated after updating the special prize counter value from a preset initial value to a preset limit value. Return to value and update cyclically. Step S5 in FIG. 5 is an example of the special prize counter updating means, and the random counter R1 updated by the special prize counter updating means in step S5 corresponds to a special prize counter value. This special prize counter value R1 is updated by a constant value “1” every time a fixed time “4 msec” elapses, and is updated from a preset initial value “0” to a preset limit value “1191”. After that, the initial value is reset to “0” and updated cyclically.
[6] The command transmission means transmits a ball entering command based on the game ball entering the starting port. Step S35, step S38, step S41, and step S44 in FIG. 8 are examples of command transmission means. The hold command 1 transmitted in step S35, the hold command 2 transmitted in step S38, and the hold transmitted in step S41. Each of the command 3 and the hold command 4 transmitted in step S44 corresponds to a pitching command.
[7] The special prize counter acquisition means is for acquiring the update result of the special prize counter value based on the game ball entering the start opening. When the update result of the special prize counter value is acquired, the acquisition result of the special prize counter value is obtained. Is recorded in the special prize counter recording means. Step S32 in FIG. 8 is an example of a special prize counter acquisition means. The special prize counter acquisition means in step S32 records the update result of the special prize counter value R1 in the RAM 53, and the RAM 53 corresponds to the special prize counter recording means.
[8] The guess counter updating means updates the guess counter value at a constant time interval that is the same as or not identical to the special prize counter updating means. Step S231 in FIG. 26 is an example of a guess counter updating unit, and the timer T11 updated by the guess counter updating unit in step S231 corresponds to a guess counter value.
[9] The estimation counter acquisition means acquires the update result of the estimation counter value based on receiving the incoming command from the command transmission means. When the update result of the estimation counter value is acquired, the estimation counter value The acquisition result is recorded in the estimation counter recording means. Step S234, step S239, step 243, and step S247 in FIG. 26 are an example of an estimation counter acquisition unit. The estimation counter acquisition means in step S234 to step S247 records the update result of the estimation counter value T11 in the RAM 73, and the RAM 73 corresponds to the estimation counter recording means.
[10] The special prize counter detecting means detects the result of recording the special prize counter value from the special prize counter recording means based on the arrival of the start timing of the symbol game. One special prize counter value is stored in the special prize counter recording means. When it is recorded, the recording result of the special prize counter value is detected, and when a plurality of special prize counter values are recorded in the special prize counter recording means, the one having the oldest acquisition order is detected from the plurality of special prize counter values. Step S55 in FIG. 10 is an example of a special prize counter detection means. The special prize counter detecting means in step S55 detects the recording result of the special prize counter value R1 from the reserved data area 1 of the special prize counter recording means 53, and the reserved data area 1 acquires the result of acquisition of the special prize counter value R1. The one with the oldest order is recorded.
[11] The special value recording means has a plurality of special values recorded in advance, and each of the special values has a different interval from the special value to another special value. The ROM 52 in FIG. 3 is an example of a special prize value recording unit. In the special prize value recording means 52, as shown in the column of the normal mode in FIG. 12A, the big hit value “7,313,1069” is recorded in advance. Each of these jackpot values “7,313,1069” corresponds to a special prize value, and the interval from the jackpot value to another jackpot value is set to a different size as shown in FIG. Yes.
[12] The special prize state determination means is a plurality of special prize values recorded in the special prize value recording means based on the special prize counter detection means detecting the special counter value recording result from the special prize counter recording means. When the detection result of the special prize counter value is the same as any one of the plurality of special prize values, it is determined that the variable entrance is in a special prize state, and the detection result of the special prize counter value is determined. Is different from any of the plurality of special prize values, it is determined that the special prize state is not established. Step S56 in FIG. 10 is an example of the special prize state determination means. In the normal mode, the special state determination means in step S56 determines that the big prize is obtained when the detection result of the special prize counter value R1 is the same as any one of the multiple big prize values “7, 313, 1069”. In the mode, when the detection result of the special prize counter value R1 is different from any of the plurality of jackpot values “7,313,1069”, it is not determined to be a jackpot. This jackpot is to open the special prize opening and corresponds to a special prize state.
[13] The special prize counter erasing means, from the special prize counter recording means, records the result of the special prize counter value used for judging whether or not it is in the special prize state when the special prize state judging means judges whether or not it is in the special prize state. It is to be erased. Step S100 in FIG. 14 is an example of the special prize counter erasing means. When the special prize state judging means judges whether or not the big hit is made, the recorded result of the special prize counter value R1 in the reserved data area 1 is erased from the reserved data area 1. .
[14] The first counter data setting means detects the recording result of the estimated counter value from the estimated counter recording means when the special condition determination means determines that the special prize state is in the special prize state. When the estimated counter value is recorded, the recording result of the estimated counter value is detected and set as the first counter data. When a plurality of estimated counter values are recorded in the estimated counter recording means, a plurality of estimated counter values are recorded. Among them, the oldest acquisition order is detected and set as the first counter data. Step S361 in FIG. 33 is an example of first counter data setting means. The first counter data setting means in step S361 obtains the recording result of the estimated data 1 from the estimated data area 1 of the estimated counter recording means 73 when the big hit is determined in the normal mode. Is recorded with the estimated counter value T11 having the oldest acquisition order as the estimated data 1. Step S362 in FIG. 33 is an example of first counter data setting means, and the recording result of the estimated data 1 is set in the counter No1 as the first counter data.
[15] The guess counter erasing means erases the guess counter value corresponding to the special counter value erased from the prize counter recording means by the prize counter erasing means from the guess counter recording means, and the first counter data setting means guesses. When the counter value is set to the first counter data, the first counter data setting means sets the estimated counter value to the first counter data, and then erases the estimated counter value. Step S425 in FIG. 40 is an example of a guess counter erasing unit. The estimated counter erasing means in step S425 is to erase the recording result of the estimated counter value T11 from the estimated data area 1 of the estimated counter recording means 73, and the estimated data area 1 is acquired from the acquired results of the estimated counter value T11. The one with the oldest order is recorded.
[16] When the first counter data setting means newly determines that the special prize state determining means is in the special prize state after the first counter data setting means has set the first counter data, the second counter data setting means determines from the estimated counter recording means to the estimated counter. The value recording result is detected. When one guess counter value is recorded in the guess counter recording means, the record result of the guess counter value is detected and set as the second counter data, and the guess counter When a plurality of estimated counter values are recorded in the recording means, the oldest acquisition order is detected from the plurality of estimated counter values and set as the second counter data. When the second counter data setting means sets the detection result of the estimated counter value to the second counter data, the estimated counter erasing means detects the estimated counter value after the time difference data detecting means detects one or more time difference data. Perform erasure processing. Step S364 in FIG. 33 is an example of the second counter data setting means, and the recording result of the estimated data 1 is acquired from the estimated data area 1 of the estimated counter recording means 73 when the big hit is determined in the normal mode. Step S365 in FIG. 33 is an example of the second counter data setting means, and the recording result of the estimated data 1 is set in the counter No. 2 as the second counter data.
[17] The interval data setting means, when the second counter data setting means sets the second counter data, the estimated counter value that is the setting result of the second counter data and the estimation that is the setting result of the first counter data The interval data is set on the basis of the difference between the counter values, and the interval data is the interval between the special value determined by the special condition determination means for the first time and the special value determined for the second time. It is data for guessing. Step S370 in FIG. 33 is an example of interval data setting means, and the big hit value estimation data ΔR1 corresponds to the interval data. The interval data ΔR1 calculates the difference ΔNt between the second counter No2 and the first counter No1 (step S366), divides the difference calculation result ΔNt by the update time ΔT (step S367), and divides the difference ΔNt. When the result ΔNo is larger than the update cycle Rmax, it is obtained by performing one subtraction process or a plurality of subtraction processes for subtracting the update cycle Rmax from the division result ΔNo so that the division result ΔNo is equal to or less than the update cycle Rmax. The difference ΔNt corresponds to the time interval from the first determination that the special status determination means is in the special status to the second determination, and the update time ΔT is updated by a fixed value of the special counter value R1. The update cycle Rmax corresponds to the number of updates until the special prize counter value R1 is returned from the initial value to the initial value.
[18] The special prize data value recording means records a plurality of special prize data values that are the same as each of the plurality of special prize values recorded in the special prize value recording means. The ROM 72 in FIG. 3 is an example of a special prize data value recording means. FIG. 34 shows the recorded contents of the special prize data value recording means 72. In the special prize data value recording means 72, the big hit value “7, 313, 1069” for the normal mode is recorded as the special prize data value.
[19] The interval data recording means has a reference value corresponding to an interval from the special prize data value to the special prize data value different from the special prize data value corresponding to each of the plurality of special prize data values, or a reference range including the reference value. Each of the reference value and the reference range is used for estimating a special prize value when the special prize state determination unit determines that the special prize state is in the second time. The ROM 72 in FIG. 3 is an example of interval data recording means, and FIG. 34 shows the reference range recorded in the interval data recording means 72. In the data of FIG. 34, the special prize data value “7” is associated with the reference range “130-α to 130 + α”, the special prize data value “313” is associated with the reference range “306-α to 306 + α”, and the reference range “436” is obtained. The special prize data value “313” is associated with “−α˜436 + α”, the special prize data value “1069” is associated with the reference range “756-α˜756 + α”, and the special prize data value “306” is associated with the reference range “886-α˜886 + α”. 7 ”, the special prize data value“ 1069 ”is associated with the reference range“ 1062-α to 1062 + α ”, and the reference range“ 130-α to 130 + α ”is different from the special prize data value“ 1069 ”. The reference range “306-α to 306 + α” is set from the special prize data value “7” to another special prize data value “313”. The reference range “436-α to 436 + α” is set including the interval “436” from the special prize data value “1069” to another special prize data value “313”. The range “756-α to 756 + α” is set including an interval “756” from the special prize data value “313” to another special prize data value “1069”, and the reference range “886-α to 886 + α” is the special prize data. An interval “886” from the value “313” to another special prize data value “7” is set, and the reference range “1062-α to 1062 + α” is set from the special prize data value “7” to another special prize data value “7”. An interval “1062” up to “1069” is set.
[20] The special data value selection means compares the setting result of the interval data with each of a plurality of reference values or a plurality of reference ranges, and the setting result of the interval data is either a plurality of reference values or a plurality of reference ranges. If it is determined that the special prize data value is recorded, the special prize status value is determined by selecting the special prize data value corresponding to the standard value or the standard range from a plurality of special prize data values recorded in the special prize data value recording means. It is estimated which of the plurality of special prize data values is the special prize value when it is determined for the second time that the means is in the special prize state. Step S373 in FIG. 33 is an example of a special data value selection unit. When the interval data setting result ΔR1 belongs to “130−α to 130 + α”, the special data value “7” is selected and the interval data setting result is obtained. The special data value “313” is selected when ΔR1 belongs to the reference range “306−α to 306 + α”, and the special data value is selected when the interval data setting result ΔR1 belongs to the reference range “436−α to 436 + α”. When “313” is selected and the interval data setting result ΔR1 belongs to the reference range “756-α to 756 + α”, the special prize data value “1069” is selected, and the interval data setting result ΔR1 is set to the reference range “886-”. When it belongs to “α to 886 + α”, the special prize data value “7” is selected, and the interval data setting result ΔR1 is the reference range “1062-α to 1062+”. When it belongs to “α”, the special prize data value “1069” is selected, and in any case, it is estimated that the selection result of the special prize data value is the special prize value when it is determined that it is in the special prize state for the second time. .
[21] The determination data setting unit is a determination value corresponding to an interval from the selection result of the special data value to at least one of the plurality of special data values when the special data value selection unit selects the special data value or the determination A determination range including a value is set, and each of the determination value and the determination range is used as determination data for estimating whether or not a recording result of the special prize counter recording means includes a new special prize state. used. Steps S387 and S388 in FIG. 35 are an example of determination data setting means. As shown in FIG. 36, when the selection result of the special prize data value is “7”, the special prize data value “7” is changed from the special prize data value “7”. And a determination reference value 2 corresponding to an interval from the special prize data value “7” to the special prize data value “313”, “306 * ΔT”. When the criterion value 3 “1062 * ΔT” corresponding to the interval from the special prize data value “7” to the special prize data value “1069” is selected and the selection result of the special prize data value is “313”, the special prize data value The determination reference value 1 “886 * ΔT” corresponding to the interval from “313” to the special prize data value “7” and the interval from the special prize data value “313” to the special prize data value “313” The determination criterion value 2 “1192 * ΔT” and the determination criterion value 3 “756 * ΔT” corresponding to the interval from the special prize data value “313” to the special prize data value “1069” are selected, and the special prize data value When the selection result is “1069”, the determination reference value 1 “130 * ΔT” corresponding to the interval from the special prize data value “1069” to the special prize data value “7” and the special prize data value “1069” is used as the special prize data value. Judgment reference value 2 “436 * ΔT” corresponding to the interval up to “313” and judgment reference value 3 “11926 * ΔT” corresponding to the interval from the special prize data value “1069” to the special prize data value “1069” ”Is selected. Each of the determination reference value 1 to the determination reference value 3 corresponds to the determination value. When the determination reference value 1 to the determination reference value 3 is selected, the determination reference value 1 is included based on the determination reference value 1. The determination ranges Tmin21 to Tmax21 are set, the determination ranges Tmin22 to Tmax22 including the determination reference value 2 are set based on the determination reference value 2, and the determination ranges Tmin23 to Tmax23 including the determination reference value 3 are set based on the determination reference value 3. Set.
[22] The time difference data detecting means detects time difference data on the condition that a plurality of estimated counter values are recorded in the estimated counter recording means when the prize data value selecting means selects a prize data value. One or more time difference data is detected based on the difference between the recording results of the remaining estimation counter values except the recording results of the estimation counter values with the oldest order and the recording results of the estimation counter values with the oldest acquisition order. . Each of step S384, step S396, and step S402 in FIG. 35 is an example of time difference data detection means. The time difference data detecting means in step S384 detects the estimated data 1 and the estimated data 2 as the recording result of the estimated counter value T11 from the estimated counter recording means 73, and calculates the time difference data 1 by subtracting the estimated data 1 from the estimated data 2. To do. The time difference data detecting means in step S396 detects the estimated data 1 and the estimated data 3 as the recording result of the estimated counter value T11 from the estimated counter recording means 73, and calculates the time difference data 2 by subtracting the estimated data 1 from the estimated data 3. To do. The time difference data detection means in step S402 detects the estimated data 1 and the estimated data 4 as the recording result of the estimated counter value T11 from the estimated counter recording means 73, and calculates the time difference data 3 by subtracting the estimated data 1 from the estimated data 4. To do. The estimated data 1 is a cumulative recording result of the estimated counter value T11 according to the acquisition timing of the special prize counter R1 when the special prize state determining means determines the big hit in the normal mode for the second time. 3 is a time difference from when the guess counter acquisition means receives any of the hold commands 1 to 4 until it receives any of the new hold commands 1 to 4, and the special prize state determination means is a big hit in the normal mode. This is equivalent to time difference information based on the recording result of the estimated counter value T11 corresponding to the acquisition timing of the special prize counter value R1 that is determined for the second time.
[23] The special prize state estimation means compares the detection result of the time difference data with the determination value setting result or the determination range setting result, and adds the determination value setting result or the determination range setting result to the time difference data detection result. When it is determined that a response is included, it is estimated that the recording result of the special prize counter recording means includes a new special prize state. Steps S389, S390, and S391 in FIG. 35 are examples of the special prize state estimation means, and the calculation result of the time difference data 1 belongs to any one of “Tmin21 to Tmax21”, “Tmin22 to Tmax22”, and “Tmin23 to Tmax23”. If it is determined that the special prize counter value R1 in the reserved data area 2 is newly in the special prize state. Steps S397, S398, and S399 in FIG. 35 are examples of the special prize state estimation means, and the calculation result of the time difference data 2 belongs to any one of “Tmin21 to Tmax21”, “Tmin22 to Tmax22”, and “Tmin23 to Tmax23”. If it is determined that the special prize counter value R1 in the reserved data area 3 is newly in the special prize state. Steps S403, S404, and S405 in FIG. 35 are examples of the special prize state estimation means, and the calculation result of the time difference data 3 belongs to any one of “Tmin21 to Tmax21”, “Tmin22 to Tmax22”, and “Tmin23 to Tmax23”. If it is determined that the special prize counter value R1 in the reserved data area 4 is newly in the special prize state.
[24] The symbol game means displays the symbol game video on the display based on the arrival of the symbol game start timing, and notifies the player of the determination result of the special prize state determination means with the symbol game video. To do. The symbol control circuit 80 in FIG. 3 is an example of symbol game means. Each of FIG. 41 and FIG. 42 shows an example of a decorative symbol game image displayed on the display 32 by the symbol game means 80, and the decorative symbol game image corresponds to a graphic game image.
[25] When the special prize game means determines that the special prize state determination means is in the special prize state, the graphic game means informs the player that the special game is in the special game state and then opens the variable entrance. Special prize game. Step S12 of FIG. 5 is an example of a special prize game means, and a big hit game is performed in which the special prize opening is opened when the recording result of the special prize counter R1 is the same as any one of a plurality of big hit values. This jackpot game is equivalent to a special prize game.
[26] The notice means provides a notice effect for notifying that the special prize game is to be performed based on the fact that the special prize state estimating means estimates that the recorded result of the special prize counter recording means includes a new special prize state. Is generated. The symbol control circuit 80 in FIG. 3 is an example of a notice means, and as shown in FIG. 43, the player is notified that a special prize game will be performed by performing a notice effect that displays the spectators' patterns 211 to 214 on the display 32. To notice.
1-2. Description of the operation of the pachinko gaming machine according to claim 1 When the game ball enters the start opening, the update result of the special prize counter value is acquired, and the acquisition result of the special prize counter value is recorded in the special prize counter recording means. When a game ball enters the start opening, an update result of the estimated counter value is acquired based on the transmitted ball command, and the acquired result of the estimated counter value is recorded in the estimated counter recording means. The recording result of the estimated counter value functions as timing data corresponding to the acquisition timing of the special prize counter value. When the acquisition results of a plurality of special prize counter values are recorded in the special prize counter recording means, the estimated counter recording means The same number of estimated counter value acquisition results as the special prize counter value acquisition results are recorded. In this state, when the start timing of the symbol game arrives, the recording result of the special prize counter value with the oldest acquisition order is detected from the special prize counter recording means, and the detection result of the special prize counter value is compared with each of the plurality of special prize values. Each of the plurality of special prize values is set such that the interval from the special prize value to another special prize value is different from each other, and when the detection result of the special prize counter value is the same as any one of the plurality of special prize values It is determined that the status is in the state, and the recording result of the special prize counter value with the oldest acquisition order is deleted from the special prize counter recording means.

  When the special prize state is determined, the record of the estimated counter value with the oldest acquisition order is detected from the estimated counter recording means. When the estimated counter value recording result is detected, the estimated counter value detected result is set to the first counter data, and when the first counter data is set, the estimated counter whose acquisition order is the oldest from the estimated counter recording means is set. The recorded value is deleted. When the special prize state is next determined in the setting state of the first counter data, the recording result of the estimated counter value with the oldest acquisition order is detected from the estimated counter recording means, and the detected result of the estimated counter value is the second counter. Set to data.

  When the second counter data is set, the interval data is set based on the difference between the setting result of the second counter data and the setting result of the first counter data. This interval data is data for inferring the interval between the special value determined for the first time and the special value determined for the second time as being in the special prize state. When the interval data is set, the interval data is set. The result is compared with each of a plurality of reference values or a plurality of reference ranges. Each of the plurality of reference values and the plurality of reference ranges is data for estimating a special prize value when it is determined for the second time that the special prize state is determined. It corresponds to an interval until reaching a value, and each reference range is a range including a reference value. The special prize data value is the same value as the special prize value, and is set corresponding to each of the plurality of special prize values.

  Each of the plurality of reference values and the plurality of reference ranges is associated with a special prize data value, and it is determined that the setting result of the interval data corresponds to one of the plurality of reference values or the plurality of reference ranges. Is selected as the special value when it is determined for the second time that the special value data corresponding to the reference value or the reference range is in the special prize state. When this special prize data value is selected, a determination value or a determination range is set. The judgment value corresponds to an interval from the selection result of the special prize data value to any one of the plurality of special prize data values, the judgment range includes the judgment value, and each of the judgment value and the judgment range is a special prize counter. This is used as data for inferring whether or not the recording result of the recording means newly includes a special prize state.

When a special prize data value is selected, time difference data is detected based on the recording result of the estimation counter recording means. This time difference data detection process is performed on the condition that a plurality of estimated counter values are recorded in the estimated counter recording means. When two estimated counter values are recorded in the estimated counter recording means, When the time difference data is detected based on the difference between the recording results of the estimated counter values and the three estimated counter values are recorded in the estimated counter recording means, the recording result and the acquiring order of the oldest estimated counter values are recorded. The time difference data is detected based on the difference between the recording results of the second oldest estimated counter value, and the recording result of the estimated counter value with the oldest acquisition order and the recorded result of the estimated counter value with the newest acquisition order are detected. Time difference data is detected based on the difference. This time difference data corresponds to the time difference from the time when the game ball that has been in the special prize state for the second time enters the start port until a new game ball enters the start port, and time difference data was detected. Sometimes the detection result of the time difference data is compared with the determination value setting result or the determination range setting result, and the detection result of the time difference data includes a result corresponding to the determination value setting result or the determination range setting result. When it is determined, it is presumed that the record result of the special prize counter recording means newly includes a special prize state, and a notice effect for notifying that a special game that opens the variable entrance is performed is generated.
1-3. 2. Description of the effect of the pachinko gaming machine according to claim 1 Based on the recording result of the estimation counter recording means, it is estimated which of the plurality of special prize values the special prize state is determined, and the recording result of the estimation counter recording means is the special prize value. The special effect counter recording means estimates the recording result by processing based on the estimation result, and when it is presumed that the recording result of the special prize counter recording means newly includes a special prize state, a notice effect is given. Since it is generated, it is possible to generate a notice effect while protecting the process of determining whether or not the special game is in the special prize state based on the result of recording the special prize counter value when the start timing of the symbol game arrives. In addition, since an error can be naturally made in the estimation result as to whether or not the special prize state is set, the special prize game is not performed even though the notice effect is generated. For this reason, it is not necessary to perform a dedicated process for making the notice effect nondeterministic, and the processing content is simplified in this respect.
2. Description of pachinko gaming machine according to claim 2 The pachinko gaming machine according to claim 2 is characterized in that it is provided with a counter data shift means. The counter data shift means sets the second counter data setting result to the first counter data when the special prize data value selection means selects the special prize data value. The second counter data setting means When the data shift means sets the second counter data setting result to the first counter data and the special prize state determination means newly determines that it is in the special prize state, the detection result of the estimated counter value is used as the second counter data. Perform the setting process. Step S376 in FIG. 33 is an example of counter data shift means.
2-1. Description of operation and effect of pachinko gaming machine according to claim 2 When a special prize data value is selected, the setting result of the second counter data is set to the first counter data, and it is newly determined that the special prize state is set. In such a case, the detection result of the estimated counter value is set in the second counter data. Therefore, the time interval between the first counter data setting result and the second counter data setting result is always kept at the shortest value, so that the special prize counter value update process and the estimated counter value update process are mutually exclusive. Even when there is a time lag, the time lag between the two is minimized. Accordingly, since the accuracy of estimating the special prize value is increased, the accuracy of estimating whether or not the result of recording of the special prize counter recording means newly includes a special prize state is also improved.

[1] Description of Mechanical Configuration and Electrical Configuration As shown in FIG. 1, an outer frame 1 is installed on the Taijima island of the pachinko hall. The outer frame 1 has a rectangular tube shape with front and rear surfaces open, and a front frame 2 is attached to the front end surface of the outer frame 1. A horizontally long rectangular upper plate 3 and a horizontally long rectangular lower plate 4 are mounted on the front end surface of the front frame 2 in two upper and lower stages, and an upper surface opens on the front surface of the upper plate 3. An upper plate 5 is fixed, and a lower plate 6 whose upper surface is open is fixed to the front surface of the lower plate 4.

  A handle base 7 is fixed to the front surface of the lower plate 4 at the right end, and a firing handle 8 is mounted on the handle base 7 so as to be rotatable about an axis extending in the front-rear direction. A firing solenoid 9 is fixed to the rear of the handle base 7, and a ball striking rod 10 is connected to the firing solenoid 9. The firing solenoid 9 corresponds to a driving source of the hitting ball 10, and when the shooting handle 8 is rotated, a driving power is supplied to the firing solenoid 9, and the upper plate is driven based on the driving of the hitting ball 10. Play the game balls in 5 out of the upper plate 5.

  A window frame 11 is mounted on the front surface of the front frame 2. This window frame 11 has a circular hole-shaped window portion 12, and a transparent glass window 13 is fixed to the inner peripheral surface of the window portion 12. Speakers 14 are fixed to the rear surface of the window frame 11 at the upper left corner and the upper right corner, respectively, and a net-like speaker cover 15 is disposed in front of each speaker 14. Each speaker cover 15 is fixed to the window frame 11, and the sound effect reproduced by each speaker 14 is emitted through the front speaker cover 15. Two lamp covers 16 are fixed to the window frame 11 below the speaker covers 15, and a plurality of illumination LEDs 17 (see FIG. 3) are arranged behind the lamp covers 16. . Each of these illumination LEDs 17 is fixed to the window frame 11, and each lamp cover 16 is illuminated based on the fact that the illumination LEDs 17 on the rear side emit light.

  As shown in FIG. 2, a game board 18 is mounted on the front frame 2, and the game board 18 is covered with a glass window 13 of the window frame 11 so as to be visually recognizable from the front. An outer rail 19 and an inner rail 20 are fixed to the front surface of the game board 18. An arc-shaped launch passage 21 is formed between the outer rail 19 and the inner rail 20, and the game ball bounced by the hitting ball 10 is discharged into the game area 22 through the launch passage 21. A plurality of obstacle nails 23 are fixed in the game area 22, and the game balls released into the game area 22 fall in the game area 22 while hitting the obstacle nails 23. This game area 22 refers to a circular area excluding the launch passage 21 among areas surrounded by the outer rail 19 and the inner rail 20, and corresponds to a rolling area that is the maximum range in which the game ball can roll. To do.

  A start port 24 is fixed in the game area 22. The start port 24 has a pocket shape with an upper surface opened, and a game ball rolling in the game area 22 can be won in the start port 24 from the upper surface. A start port sensor 25 (see FIG. 3) is fixed in the start port 24, and the start port sensor 25 detects that a game ball has won in the start port 24 and outputs a start signal. As shown in FIG. 2, a prize opening base plate 26 is fixed in the game area 22, and a square cylindrical special winning opening whose front surface is open is fixed to the prize opening base plate 26. A count sensor 27 (see FIG. 3) is fixed in the special winning opening, and the count sensor 27 detects that the game ball has won the special winning opening and outputs a count signal.

  As shown in FIG. 2, a door 28 is attached to the winning prize base plate 26 so as to be rotatable about a horizontal axis at the lower end. The door 28 is connected to a special prize opening solenoid 29 (see FIG. 3). The special prize opening solenoid 29 is operated by rotating the door 28 in a vertical state so that a game ball wins the front of the special prize opening. The game ball is opened in such a way that the front of the special winning opening can be won based on the closing of the door 28 and turning the door 28 in a horizontal state where the door 28 is tilted forward. That is, the special winning opening is switched to a closed state in which the game ball cannot be won and an open state in which the game ball can be won, and corresponds to a variable winning opening.

  As shown in FIG. 2, a special symbol display 30 is fixed to the winning prize base plate 26. The special symbol indicator 30 is composed of an LED indicator, and the special symbol indicator 30 displays a special symbol. A display frame 31 is fixed in the game area 22, and a decorative symbol display 32 corresponding to a display is fixed to the display frame 31. The decorative symbol display 32 is composed of a color liquid crystal display having a display area larger than that of the special symbol display 30, and the decorative symbol display 32 displays the decorative symbol. This decorative symbol is composed of a combination symbol of three columns, that is, a symbol element in the left column, a symbol element in the middle column, and a symbol element in the right column, and corresponds to an identification symbol for identifying the big hit and miss.

  The main control circuit 50 in FIG. 3 is the highest-level control means for controlling game contents, and includes a CPU 51, ROM 52, and RAM 53. A control program and control data are recorded in the ROM 52 of the main control circuit 50, and the CPU 51 executes a control operation based on the control program and control data in the ROM 52 using the RAM 53 as a work area. The output circuit 54 forms a waveform of each of the start signal from the start port sensor 25 and the count signal from the count sensor 27 and outputs it to the main control circuit 50. The main control circuit 50 outputs the start signal from the output circuit 54. And a prize ball command is set based on detecting either of the count signals. The timer circuit 55 outputs a pulse signal to the main control circuit 50 at a constant time interval (4 msec). The main control circuit 50 executes a timer interrupt process every time a pulse signal from the timer circuit 55 is detected. .

  The solenoid circuit 56 cuts off the special prize opening solenoid 29, and the main control circuit 50 opens and closes the special prize opening door 28 based on driving control of the solenoid circuit 56. The LED circuit 57 displays a special symbol on the special symbol display 30, and the main control circuit 50 controls the display content of the special symbol display 30 based on driving control of the LED circuit 57. The main control circuit 50 includes a special prize counter updating means, a command transmission means, a special prize counter recording means, a special prize counter obtaining means, a special prize value recording means, a special prize counter detecting means, a special prize state determining means, a special prize counter erasing means, and a special prize game means. It is equivalent to.

  The payout control circuit 60 controls the payout operation of the prize balls, and has a CPU 61, a ROM 62, and a RAM 63. A control program and control data are recorded in the ROM 62 of the payout control circuit 60, and the CPU 61 executes a prize ball payout operation based on the control program and control data in the ROM 62 using the RAM 63 as a work area. The payout control circuit 60 receives a result of setting a prize ball command from the main control circuit 50, and sets a drive signal based on receiving the result of setting a prize ball command. The motor circuit 64 is provided with a drive signal setting result from the payout control circuit 60 and drives the payout motor 65 based on the drive signal from the payout control circuit 60. The payout motor 65 corresponds to a drive source of a prize ball payout device for paying out game balls as prize balls into the upper plate 5, and prize balls are driven into the upper plate 5 based on driving of the payout motor 65. The number of prize balls according to the command is paid out.

  The effect control circuit 70 comprehensively controls the effect contents of the decorative symbol game, and includes a CPU 71, a ROM 72, and a RAM 73. A control program and control data are recorded in the ROM 72 of the effect control circuit 70, and the CPU 71 executes processing operations based on the control program and control data in the ROM 72 using the RAM 73 as a work area. The effect control circuit 70 receives a command from the main control circuit 50 and sets the command based on receiving the command from the main control circuit 50. The timer circuit 74 outputs a pulse signal to the effect control circuit 70 at a constant time interval (4 msec). The effect control circuit 70 executes a timer interrupt process every time a pulse signal from the timer circuit 74 is detected. . The effect control circuit 70 is mounted on a control board different from the main control circuit 50. The effect control circuit 70 includes an estimation counter updating unit, an estimation counter recording unit, an estimation counter acquisition unit, a first counter data setting unit, a second counter data setting unit, an interval data setting unit, an award data value recording unit, and an interval data. This corresponds to a recording means, a special prize data value selection means, a determination data setting means, a time difference data detection means, an estimation counter erasure means, a special prize state estimation means, and a counter data shift means.

  The symbol control circuit 80 includes a CPU 81, a ROM 82, a RAM 83, a VDP 84, a VROM 85, and a VRAM 86. The CPU 81 of the symbol control circuit 80 sets the control data based on the command from the effect control circuit 70, and instructs the VDP 84 to reproduce the video data in accordance with the control data setting result. The corresponding video data is detected from the VROM 85, and a display signal is set based on the detection result of the video data. The VDP 84 outputs a display signal setting result to the LCD circuit 87, and the LCD circuit 87 displays an image corresponding to the display signal from the VDP 84 on the decorative design display 32. These series of operations are executed by the CPU 81 based on the control program and control data recorded in the ROM 82, and the RAM 83 functions as a work memory of the CPU 81. The symbol control circuit 80 corresponds to each of symbol game means and notice means.

  The sound control circuit 90 includes a CPU 91, a ROM 92 and a RAM 93. The CPU 91 of the sound control circuit 90 detects sound data corresponding to the command from the effect control circuit 70 from the ROM 92, sets a sound signal based on the detection result of the sound data, and outputs the sound signal to the speaker circuit 94. The speaker circuit 94 outputs sound corresponding to the sound signal setting result from both speakers 14. The series of operations of the CPU 91 is performed based on the control program and control data recorded in the ROM 92, and the RAM 93 functions as a work memory for the CPU 91.

The illumination control circuit 100 includes a CPU 101, a ROM 102, and a RAM 103. The CPU 101 of the illumination control circuit 100 detects illumination data corresponding to the command from the effect control circuit 70 from the ROM 102, sets an illumination signal based on the detection result of the illumination data, and outputs it to the LED circuit 104. Therefore, the LED circuit 104 causes the plurality of illumination LEDs 17 to emit light according to the setting result of the illumination signal. A series of operations of the CPU 101 are performed based on a control program and control data recorded in the ROM 102, and the RAM 103 functions as a work memory of the CPU 101.
[2] Description of Game Function [2-1] Special Symbol Game Function When a player inserts a game ball into the upper plate 5 and rotates the launch handle 8, the game ball enters the game area 22 of the game board 18. Is fired and falls while hitting the obstacle nail 23. When this game ball wins in the start opening 24, a predetermined number of game balls are paid out as prize balls into the upper plate 5 from the prize ball payout device, and a special symbol game is started. In this special symbol game, special symbols are displayed in order on the special symbol display 30 in a variable state and a variable stop state. As shown in FIG. Usually, four types are set: a big hit mode, a probabilistic big hit mode, and a small hit mode.
[2-2] Jackpot Game Function When the special symbol is stopped and displayed on the special symbol display 30 in either the normal jackpot mode or the probability variation jackpot mode, the jackpot game is started. This jackpot game is to open a special winning opening and generate an advantageous state for a player to allow a game ball to win in the special winning opening. The special winning opening has an upper limit (for example, 10) game balls. Is maintained in an open state until either the number condition for winning or the time condition for reaching the upper limit value (for example, 30 sec) is satisfied. The opening / closing operation based on the number condition and the time condition of the special prize opening is called a big hit round, and the big hit round is repeated a fixed number of times (for example, 15 times). The repetition of the big hit round is equivalent to the big hit game. During the big hit game, the big hit game display for visualizing the big hit game is performed on the decorative symbol display 32, and the big hit game is displayed from both speakers 14. A sound effect that produces sound is output, and the plurality of illumination LEDs 17 emit light according to the effect content of the big hit game display. This jackpot game is equivalent to a special prize game.
[2-3] Small hit game function When the special symbol is stopped and displayed in the special symbol display 30 in the small hit mode, the small hit game is started. This small hit game opens a special winning opening and generates a player's advantageous state that allows a game ball to win in the special winning opening, and the special winning opening has an upper limit (for example, 10 games). The ball is held in the open state until either the number condition for winning the ball or the time condition for reaching the upper limit (for example, 1.2 sec) is satisfied. During the execution of the small hit game, a small hit game display for visualizing the small hit game is performed on the decorative design display 32, and sound effects for directing the small hit game are outputted from both speakers 14. The plurality of illumination LEDs 17 emit light according to the content of the small hit game display.
[2-4] Special symbol game hold function Special symbol game cannot be started immediately. When a game ball wins in the start opening 24 during special symbol game, big hit game, or small hit game, special symbol game is Deferred. An upper limit value (for example, 4 times) is set for the number of times that the special symbol game is held, and the special symbol game is not held when the game ball is won in the start port 24 while the number of times the hold has reached the upper limit value. A winning of a game ball in which the special symbol game is not held is referred to as an invalid winning, and a winning in which the special symbol game is held is referred to as an effective winning.
[2-5] Decorative Symbol Game Function When the game ball wins in the start opening 24, the decorative symbol game is started in conjunction with the special symbol game. In this decorative symbol game, an image is displayed on the decorative symbol display 32, sound effects corresponding to the image on the decorative symbol display 32 are output from both speakers 14, and a plurality of illumination LEDs 17 are displayed on the decorative symbol display 32. It is composed by emitting light accordingly. This decorative symbol game video displays the decorative symbols in order in a variable state and in a variable stop state, and the game shows whether the off, normal big hit, probable big hit, or small hit is judged based on the mode of the decorative symbol when the fluctuation stops. It informs the person. The decorative symbol variation start is performed in time synchronization with the special symbol variation start, and the decorative symbol variation stop is performed in synchronization with the special symbol variation stop in time. When the variation stops, the decorative symbol stops variably in either the combination of complete detachment or the combination of detachment reach, and when the special symbol stops variably in the normal big hit mode, the decorative symbol stops variably in the normal big hit combination. When the special symbol stops variably in the probable big hit mode, the decorative symbol stops variably in the probable big hit combination, and when the special symbol stops variably in the small hit mode, the decorative symbol has a specific perfect combination (small hit Fluctuation stop at combination). This decorative symbol game is equivalent to the symbol game, and the big hit game is started immediately after the decorative symbol is stopped and displayed in one of the combination of the normal big hit and the combination of the probable big hit in the decorative symbol game. It starts immediately after the decorative symbol is stopped and displayed in a combination of small hits in the decorative symbol game. This decorative symbol game corresponds to a symbol game.
[2-6] Stochastic Fluctuation Function The stochastic fluctuation mode is a high probability mode in which the big hit is determined with a high constant probability compared to the invalid state of the probability fluctuation mode. This probability variation mode is validated based on the special symbol being stopped and displayed in a probabilistic big hit mode, and is invalidated based on the special symbol being normally fluctuated and stopped in a big jackpot mode.
[2-7] Notice Function The notice function is a function for notifying in advance that the decoration symbol will be either a normal jackpot combination or a promising jackpot combination by displaying a notice effect video during the decoration symbol game. . As shown in the figure, the notice effect includes three images: an image in which only one of the audience's patterns 214 rises, an image in which two of the audience's patterns 213 to 214 stand up, and an audience's patterns 212 to 214. There are 4 types of images that rise, 4 images of the audience's designs 211 to 214 are set up, and the next time the decoration pattern game displays an image where only 1 of the audience's designs 214 rises, the next time In the decorative pattern game, two images of the audience's patterns 213 to 214 are displayed, and in the next decorative pattern game, the images of the three of the audience's patterns 212 to 214 are displayed, and the decorative patterns are displayed one after the other. After an image in which the four of the spectators' patterns 211 to 214 rise in the game, the decorative symbol becomes either a normal jackpot combination or a probable jackpot combination. This notice function is referred to as continuous notice, and is a non-deterministic function that is generated when the effect control circuit 70 estimates the determination result of the main control circuit 50.
[3] Description of Internal Process of Main Control Circuit 50 [3-1] Main Process When the power of the CPU 51 of the main control circuit 50 is turned on, all data in the RAM 53 is initialized by the power-on process in step S1 of FIG. In step S2, the setting state of the timer interrupt flag is determined. The timer interrupt flag is turned on by timer interrupt processing based on the CPU 51 receiving a pulse signal from the timer circuit 55. When the CPU 51 detects the timer interrupt flag being turned on in step S2, the CPU 51 executes step S3. Migrate to Here, the timer interrupt flag is turned off, and the input process of step S4 to the data acquisition process of step S6 are executed in order. When the data acquisition process of step S6 is completed, the big hit determination process of step S7 to the small hit game process of step S13 are alternatively executed based on the set state of the main control flag, and the big hit determination process of step S7 to step When any of the small hit game processing of S13 is completed, the process returns to step S2. The main control flag is initially set to the jackpot determination process in the power-on process in step S1, and the CPU 51 proceeds to step S3 based on newly detecting the timer interrupt flag being turned on when returning to step S2. Transition.
[3-2] Input Processing FIG. 7 shows details of the input processing in step S4 of FIG. 5, and the CPU 51 determines the output state of the start signal from the output circuit 54 in step S21 of FIG. If it is determined that there is no start signal, the start signal flag is turned off in step S22. If it is determined that there is a start signal, the start signal flag is turned on in step S23. That is, when the game ball wins in the start port 24, a start signal is output from the output circuit 54, and the start signal flag is turned on.
[3-3] Counter Update Processing When the CPU 51 proceeds to the counter update processing in step S5 of FIG. 5, the CPU 51 adds “1” to each of the measured value of the random counter R1 to the measured value of the random counter R4. The addition contents of these random counters R1 to R4 are as follows.
(1) The random counter R1 corresponds to a random value for lottery or not for big hits or small hits, and as shown in FIG. After being added to “1191,” it is cyclically added back to the initial value “0”. This random counter R1 corresponds to a special prize counter.
(2) The random counter R2 corresponds to a random number value for drawing a special symbol type when it is determined that the jackpot is a big hit, and is added after the initial value “0” is added to the upper limit value “19”. It returns to the value “0” and is added cyclically.
(3) The random counter R3 corresponds to a random number value for determining whether or not it is out of reach when neither big hit nor small hit is determined (at the time of out determination). After the initial value “0” is added to the upper limit value “49”, the initial value “0” is returned to and added cyclically.
(4) The random counter R4 corresponds to a random value for drawing a variation pattern, and is added to the initial value “0” from the initial value “0” and then cyclically added to the initial value “0”. The
[3-4] Data Acquisition Process FIG. 8 shows details of the data acquisition process in step S6 of FIG. 5, and the CPU 51 determines the setting state of the start signal flag in step S31 of FIG. For example, when a game ball wins in the start port 24, the start signal flag is turned on in the input process of FIG. In this case, the CPU 51 determines that the start signal flag is turned on in step S31 of FIG. 8, and acquires each of the measured value of the random counter R1 to the measured value of the random counter R4 in step S32.

  In the RAM 53 of the main control circuit 50, the reserved data area 1 to the reserved data area 4 are set as shown in FIG. Each of the hold data area 1 to the hold data area 4 records the acquisition results of the random counters R1 to R4. When the CPU 51 proceeds to step S33 in FIG. It is determined whether or not the acquisition result of R4 is recorded. When it is determined that the acquisition results of the random counters R1 to R4 are not recorded in the hold data area 1, the process proceeds to step S34, and the acquisition results of the random counters R1 to R4 are recorded in the hold data area 1. Then, the process proceeds to step S35 to notify that the execution of the special symbol game is suspended based on the transmission of the suspension command 1 to the effect control circuit 70. This hold command 1 corresponds to a pitching command.

  When the CPU 51 determines in step S33 in FIG. 8 that the acquisition results of the random counters R1 to R4 are recorded in the hold data area 1, the acquisition results of the random counters R1 to R4 are recorded in the hold data area 2 in step S36. Judge whether or not. If it is determined that the acquisition results of the random counters R1 to R4 are not recorded in the hold data area 2, the process proceeds to step S37, and the acquisition results of the random counters R1 to R4 are recorded in the hold data area 2. And it transfers to step S38 and notifies that execution of the special symbol game was suspended based on transmitting the suspension command 2 to the effect control circuit 70. This hold command 2 corresponds to a pitching command.

  If the CPU 51 determines that the acquisition results of the random counters R1 to R4 are recorded in the hold data area 2 in step S36, whether or not the acquisition results of the random counters R1 to R4 are recorded in the hold data area 3 in step S39. Determine whether. If it is determined that the acquisition results of the random counters R1 to R4 are not recorded in the hold data area 3, the process proceeds to step S40, and the acquisition results of the random counters R1 to R4 are recorded in the hold data area 3. And it transfers to step S41 and notifies that execution of the special symbol game was suspended based on transmitting the suspension command 3 to the effect control circuit 70. The hold command 3 is equivalent to a ball entry command.

  If the CPU 51 determines that the acquisition results of the random counters R1 to R4 are recorded in the reserved data area 3 in step S39, whether or not the acquisition results of the random counters R1 to R4 are recorded in the reserved data area 4 in step S42. Determine whether. If it is determined that the acquisition results of the random counters R1 to R4 are not recorded in the hold data area 4, the process proceeds to step S43, and the acquisition results of the random counters R1 to R4 are recorded in the hold data area 4. And it transfers to step S44 and notifies that the execution of the special symbol game was suspended based on transmitting the suspension command 4 to the effect control circuit 70. This hold command 4 is equivalent to a ball entry command.

  That is, the random data R1 to R4 having the oldest acquisition order are recorded in the reserved data area 1, the random counters R1 to R4 having the second oldest acquisition order are recorded in the reserved data area 2, and the reserved data area 3 is stored in the reserved data area 3. The random counters R1 to R4 having the third oldest acquisition order are recorded, and the random counters R1 to R4 having the newest acquisition order are recorded in the reserved data area 4.

When the CPU 51 determines that the acquisition results of the random counters R1 to R4 are recorded in the reserved data area 4 in step S42, the CPU 51 clears the acquisition results of the random counters R1 to R4 in step S45. That is, the upper limit value “4 sets” is set for the number of records of the random counters R 1 to R 4, and the game ball wins in the start port 24 with the upper limit set of random counters R 1 to R 4 recorded in the RAM 53. When the game is performed, the recording process of the random counters R1 to R4 and the transmission process of the hold command are not performed, and it is invalidated that the game ball is won in the start port 24.
[3-5] Big-hit determination process When the CPU 51 determines that the main control flag is set to the big-hit determination process, the CPU 51 proceeds from the data acquisition process in step S6 in FIG. 5 to the big-hit determination process in step S7. 10 and 11 show details of the jackpot determination process in step S7 of FIG. 5, and the CPU 51 records the acquisition results of the random counters R1 to R4 in the reserved data area 1 in step S51 of FIG. Determine whether or not. When it is determined that the acquisition results of the random counters R1 to R4 are recorded in the hold data area 1, the process proceeds to step S52, and the setting state of the probability variation flag is determined. This probability variation flag indicates the setting state of the probability variation mode. In the probability variation mode valid state, the CPU 51 determines that the probability variation flag is turned on in step S52 and proceeds to step S53. In step S52, it is determined that the probability variation flag is off, and the process proceeds to step S54.

  In the ROM 52 of the main control circuit 50, as shown in FIG. 12A, 40 jackpot values “7 to 1170” for the probability variation mode and three jackpot values “7, 313, for the normal mode are stored. 1069 "is recorded in advance. The normal mode refers to an invalid state of the probability variation mode in which the probability variation flag is turned off, and each of the three big hit values “7 to 1069” for the normal mode is common to the big hit value for the probability variation mode. Is set to FIG. 13 shows the interval from the big hit value to the big hit value for the normal mode, the interval from the big hit value “7” to the big hit value “7” is “0”, and the big hit value “7” to the big hit value The interval from “313” is “306”, the interval from jackpot value “7” to jackpot value “1069” is “1062”, and the interval from jackpot value “313” to jackpot value “7” is “ 886 ”, the interval from the jackpot value“ 313 ”to the jackpot value“ 313 ”is“ 0 ”, the interval from the jackpot value“ 313 ”to the jackpot value“ 1069 ”is“ 756 ”, and the jackpot value“ The interval from 1069 "to the big hit value" 7 "is" 130 ", the interval from the big hit value" 1069 "to the big hit value" 313 "is" 436 ", and the big hit value" 1069 "to the big hit value" 1069 " The interval until "It is. Each of the big hit values “7, 313, 1069” for the normal mode corresponds to a special prize value.

  When the CPU 51 proceeds to step S53 in FIG. 10, it selects 40 jackpot values “7-11170” for the probability variation mode from the ROM 52. In step S55, the acquisition result of the random counter R1 is detected from the reserved data area 1, and in step S56, the detection result of the random counter R1 is compared with each of the 40 jackpot values “7-1170” for the probability variation mode. . Here, when it is determined that the detection result of the random counter R1 is the same as any of the 40 jackpot values “7 to 1170” for the probability variation mode, it is determined that the jackpot is hit. In step S57, the jackpot flag is turned on. In S58, the small hit flag is turned off, and in step S59, the disengagement reach flag is turned off.

  In step S54, the CPU 51 selects three big hit values “7 to 1069” for the normal mode from the ROM 52. In step S55, the acquisition result of the random counter R1 is detected from the reserved data area 1. In step S56, the detection result of the random counter R1 is compared with each of the three big hit values “7 to 1069” for the normal mode. Here, when it is determined that the detection result of the random counter R1 is the same as any of the three big hit values “7 to 1069” for the normal mode, the big hit is determined, the big hit flag is turned on in step S57, and step S58. In step S59, the small hit flag is turned off. This jackpot is equivalent to a special prize state. In the effective state of the probability variation mode, the jackpot is determined with a high probability of “40/1192”, and in the invalid state of the probability variation mode, the jackpot is a low probability of “3/1192”. It is determined by.

  When the off-reach flag is turned off in step S59, the CPU 51 detects the acquisition result of the random counter R2 from the reserved data area 1 in step S60, and the detection result of the random counter R2 is detected as ten probability variation values “0, 1, 2, 3, 4, 5, 6, 7, 8, 9 ". Each of these ten probability variation values “0-9” is recorded in advance in the ROM 52, and the CPU 51 determines whether the detection result of the random counter R2 is any of the ten probability variation values “0-9” in step S60. When it is determined that they are the same, the process proceeds to step S61, and the special symbol is set to the probability variation big hit mode (see FIG. 4). Then, the probability variation mode is validated based on turning on the probability variation flag in step S62 in FIG. 10, the probability variation big hit command is transmitted to the effect control circuit 70 in step S63, and the variation pattern is set in the main control flag in step S64. Set processing.

  When the CPU 51 determines in step S60 that the detection result of the random counter R2 is different from any of the ten probability variation values “0 to 9”, the special symbol is a normal jackpot in step S65 (see FIG. 4). Set to. Then, the probability variation mode is invalidated based on turning off the probability variation flag in step S66 in FIG. 10, a normal jackpot command is transmitted to the effect control circuit 70 in step S67, and a variation pattern is set in the main control flag in step S64. Set processing. In other words, the probability variation mode is validated with a probability of “½” and invalidated with a probability of “½” on condition that the big hit is determined.

  When the CPU 51 determines in step S56 in FIG. 10 that the detection result of the random counter R1 is different from any of the 40 jackpot values “7-11170” for the probability variation mode, and the detection result of the random counter R1 is If it is determined that any of the three big hit values “7 to 1069” for the normal mode is different, the process proceeds to step S68 in FIG. 11 and the big hit flag is turned off.

  In the ROM 52 of the main control circuit 50, as shown in FIG. 12B, one small hit value “439” is recorded in advance. The small hit value “439” is different from any of the 40 big hit values “7-1170” for the probability variation mode and the three big hit values “7-1069” for the normal mode. When the big hit flag is turned off in step S68 of step 11, the process proceeds to step S69. Here, the small hit value “439” is selected from the ROM 52, and the detection result of the random counter R1 in step S55 of FIG. 10 is compared with the small hit value “439”. When it is determined in this step S69 that the detection result of the random counter R1 is the same as the small hit value “439”, it is determined as a small hit, the small hit flag is turned on in step S70, and the outreach flag is turned off in step S71. To do. In step S72, the special symbol is set to the small hit mode (see FIG. 4), the small hit command is transmitted to the effect control circuit 70 in step S73 in FIG. 11, and the main control flag is changed in step S64 in FIG. Set the pattern setting process. That is, the small hit determination process is performed under the condition that the big hit is not determined, and the small hit is a common of “1/1192” regardless of whether the probability variation mode is valid or invalid. Judged by probability.

  When the CPU 51 determines that the detection result of the random counter R1 is different from the small hit value “439” in step S69 of FIG. 11, the small hit flag is turned off in step S74, and the special symbol is removed in step S75. (See FIG. 4). In step S76 of FIG. 11, the acquisition result of the random counter R3 is detected from the reserved data area 1, and in step S77, the detection result of the random counter R3 is detected as five outlier reach values “0, 1, 2, 3, 4”. Compare with each of the above. Each of these five outreach values “0-4” is recorded in advance in the ROM 52, and the CPU 51 determines whether the detection result of the random counter R3 is any of the five outreach values “0-4” in step S77. If it is determined that they are the same, it is determined that the reach is out of reach, and the out reach reach flag is turned on in step S78. Next, an outreach command is transmitted to the effect control circuit 70 in step S79, and the variation pattern setting process is set in the main control flag in step S64 of FIG.

When the CPU 51 determines in step S77 in FIG. 11 that the detection result of the random counter R3 is different from any of the five outreach reach values “0 to 4”, the CPU 51 determines that it is completely out. Then, the release reach flag is turned off in step S80, a complete release command is transmitted to the effect control circuit 70 in step S81, and the variation pattern setting process is set in the main control flag in step S64 of FIG.
[3-6] Fluctuation Pattern Setting Processing When the CPU 51 detects that the main control flag is set in the variation pattern setting processing, the CPU 51 proceeds from the data acquisition processing in step S6 in FIG. 5 to the variation pattern setting processing in step S8. FIG. 14 shows the details of the variation pattern setting process in step S8 of FIG. 5, and the CPU 51 determines the setting state of the big hit flag in step S91 of FIG. For example, when it is determined in the last big hit determination process whether the probability change big hit or the normal big hit is determined, it is determined in step S91 that the big hit flag is turned on, and the process proceeds to step S92.

  In the ROM 52 of the main control circuit 50, a variation pattern table for big hits, a variation pattern table for detachment reach, and a variation pattern table for complete detachment are recorded in advance. Each of these variation pattern tables indicates the correlation between the random counter R4, the variation pattern, and the variation display time. When the CPU 51 proceeds to step S92, the variation pattern table for big hit is selected from the ROM 52. FIG. 15A shows the recording contents of the big hit variation pattern table. Variation patterns P1 to P4 are set in the big hit variation pattern table, and each of the variation patterns P1 to P4 has a random counter. Each of R4 and variable display time is set.

  When the CPU 51 selects the big hit variation pattern table in step S92 in FIG. 14, the CPU 51 detects the acquisition result of the random counter R4 from the reserved data area 1 in step S96, and detects the random counter R4 detection result from the big hit variation pattern table. Select a variation pattern for jackpot according to the response. Then, the process proceeds to step S97, and the variation display time corresponding to the variation pattern selection result is selected from the variation pattern table for big hits. For example, when the detection result of the random counter R4 is “40”, the variation pattern P1 is selected, and when the variation pattern selection result is P1, the variation display time “60.0 sec” is selected.

  When the CPU 51 determines a missed reach in the previous jackpot determining process, it determines in step S91 in FIG. 14 whether the jackpot flag is off, and in step S93 determines the set state of the missed reach flag. In this case, it is determined in step S93 that the outreach flag is turned on, and a variation pattern table for outreach is selected from the ROM 52 in step S94. FIG. 15B shows the recorded contents of the variation pattern table for outreach reach, and variation patterns P5 to P8 different from the variation pattern table for big hit are set in the variation pattern table for outreach reach. Each of the variation patterns P5 to P8 is set with a random counter R4 and a variation display time.

  When the CPU 51 selects the fluctuation pattern table for outreach in step S94 in FIG. 14, the CPU 51 detects the acquisition result of the random counter R4 from the reserved data area 1 in step S96, and detects the random counter R4 from the fluctuation pattern table for outlier reach. A variation pattern for outreach according to the result is selected. Then, the process proceeds to step S97, and the variation display time corresponding to the variation pattern selection result is selected from the variation pattern table for outlier reach. For example, when the detection result of the random counter R4 is “40”, the variation pattern P7 is selected, and when the variation pattern selection result is P7, the variation display time “40.0 sec” is selected.

  When the CPU 51 determines that the big hit is detected in the last big hit determination process, it determines whether the big hit flag is turned off in step S91 in FIG. Select the pattern table. FIG. 15C shows the recorded contents of the variation pattern table for complete detachment. The variation pattern table for complete detachment is different from both the variation pattern table for big hit and the variation pattern table for detachment reach. Variation patterns P9 to P10 are set, and a random counter R4 and a variation display time are set for each of the variation patterns P9 to P10.

  When the CPU 51 selects the variation pattern table for complete deviation in step S95 in FIG. 14, the CPU 51 detects the acquisition result of the random counter R4 from the reserved data area 1 in step S96, and detects the random counter R4 from the variation pattern table for complete deviation. A variation pattern for complete deviation according to the result is selected. Then, the process proceeds to step S97, and the variation display time corresponding to the variation pattern selection result is selected from the variation pattern table for complete deviation. For example, when the detection result of the random counter R4 is “40”, the variation pattern P9 is selected, and when the variation pattern selection result is P9, the variation display time “4.0 sec” is selected.

  When the CPU 51 determines the small hit in the previous big hit determination process, it determines whether the big hit flag is turned off in step S91 in FIG. 14, determines whether the outreach flag is turned off in step S93, and changes for complete removal from the ROM 52 in step S95. Select the pattern table. Then, the acquisition result of the random counter R4 is detected from the reserved data area 1 in step S96, and the variation pattern for complete deviation corresponding to the detection result of the random counter R4 is selected from the variation pattern table for complete deviation, and in step S97. A variation display time corresponding to the variation pattern selection result is selected from the variation pattern table for complete deviation. That is, when determining the small hit and determining the complete loss, a common variation pattern for complete loss is selected.

  When the CPU 51 selects the fluctuation display time in step S97 of FIG. 14, the CPU 51 transmits the fluctuation pattern selection result to the effect control circuit 70 as a fluctuation pattern command in step S98. In step S99, the selection result of the variable display time is set in the timer T1, and each of the acquisition results of the random counters R1 to R4 recorded in the reserved data area 1 is cleared in step S100.

  When the CPU 51 clears the random counters R1 to R4 of the reserved data area 1 in step S100, the CPU 51 determines whether or not the acquisition results of the random counters R1 to R4 are recorded in the reserved data area 2 in step S101. If it is determined that the acquisition results of the random counters R1 to R4 are not recorded in the reserved data area 2, the process proceeds to step S107, and the special symbol variation start process is set in the main control flag.

  If the CPU 51 determines that the acquisition results of the random counters R1 to R4 are recorded in the hold data area 2 in step S101, the CPU 51 stores the acquisition results of the random counters R1 to R4 in the hold data area 2 in the hold data area in step S102. Shift to 1. And it transfers to step S103 and it is judged whether the acquisition result of random counter R1-R4 is recorded on the pending | holding data area 3. FIG. Here, when it is determined that the acquisition results of the random counters R1 to R4 are not recorded in the reserved data area 3, the process proceeds to step S107, and the special symbol variation start process is set in the main control flag.

  When the CPU 51 determines in step S103 that the acquisition results of the random counters R1 to R4 are recorded in the hold data area 3, in step S104, each of the acquisition results of the random counters R1 to R4 in the hold data area 3 is stored in the hold data area. Shift to 2. And it transfers to step S105 and it is judged whether the acquisition result of random counter R1-R4 is recorded on the pending | holding data area 4. FIG. When it is determined that the acquisition results of the random counters R1 to R4 are not recorded in the reserved data area 4, the process proceeds to step S107, and the special symbol variation start process is set in the main control flag.

When the CPU 51 determines in step S105 that the acquisition results of the random counters R1 to R4 are recorded in the hold data area 4, the CPU 51 stores the acquisition results of the random counters R1 to R4 in the hold data area 4 in the hold data area. Shift to 3. Then, the process proceeds to step S107, and a special symbol variation start process is set in the main control flag.
[3-7] Special symbol variation start process When the CPU 51 detects that the main control flag is set in the special symbol variation start process, the process proceeds from the data acquisition process in step S6 in FIG. 5 to the special symbol variation start process in step S9. Transition. FIG. 16 shows details of the special symbol variation start process in step S9 of FIG. 5, and the CPU 51 outputs a special symbol variation start signal to the LED circuit 57 in step S111 of FIG. Then, the LED circuit 57 starts the special symbol variation display in synchronization with the detection of the special symbol variation start signal. In this special symbol variation display, the special symbol is set in the order of "probability big hit mode"->"normal big hit mode"->"small hit mode"->"outgoingmode"->"probability big hit mode" ... The variable display is cyclically variable.

When the CPU 51 outputs the special symbol variation start signal in step S111, the CPU 51 transmits a decorative symbol game start command to the effect control circuit 70 in step S112. And it transfers to step S113 and sets a special symbol fluctuation | variation stop process to a main control flag. This decorative symbol game start command corresponds to a decorative symbol game start command, and the production control circuit 70 starts the visual production of the decorative symbol game based on receiving the decorative symbol game start command. The design control circuit 80 is instructed, the sound control circuit 90 is instructed to start the sound design of the decorative design game, and the design control circuit 100 is instructed to start the electrical design of the design design game. To do.
[3-8] Special Symbol Fluctuation Stop Process When the CPU 51 detects that the main control flag is set in the special symbol fluctuation stop process, the process proceeds from the data acquisition process in step S6 in FIG. 5 to the special symbol fluctuation stop process in step S10. Transition. FIG. 17 shows the details of the special symbol fluctuation stopping process in step S10 of FIG. 5. The CPU 51 subtracts the unit value ΔT (4 msec) recorded in advance in the ROM 52 from the measured value of the timer T1 in step S121 of FIG. The remaining time of the special symbol game is updated based on what is done. Then, the process proceeds to step S122, and the subtraction result of the timer T1 is compared with “0”. This special symbol game is performed in time synchronization with the decorative symbol game, and the remaining time of the special symbol game is the same as the remaining time of the decorative symbol game.

  When the CPU 51 detects that the subtraction result of the timer T1 is “0” in step S122, it determines the end of the special symbol game. Then, the process proceeds to step S123, and a special symbol variation stop signal is output to the LED circuit 57. This special symbol fluctuation stop signal instructs that the fluctuation display of the special symbol is stopped by the selection result of the big hit determination processing. The special symbol is stopped and displayed in the normal big hit mode of FIG. 4 when the normal big hit is determined in the big hit determination process, and the special symbol is small in FIG. 4 is stopped and displayed in a winning manner, and the special symbol is stopped and displayed in the manner of losing in FIG.

  When the CPU 51 outputs a special symbol fluctuation stop signal to the LED circuit 57 in step S123 of FIG. 17, the CPU 51 transmits a decorative symbol game stop command to the effect control circuit 70 in step S124. This decoration symbol game stop command corresponds to a stop command of the decoration symbol game, and the effect control circuit 70 stops the visual effect of the decoration symbol game based on detecting the decoration symbol game stop command. Instruct the symbol control circuit 80 to instruct the sound control circuit 90 to stop the sound effect of the decorative symbol game, and instruct the electrical control circuit 100 to stop the electrical effect of the decorative symbol game. To do. That is, the decorative symbol game starts in synchronization with the start of variation of the special symbol and ends in synchronization with the stop of variation of the special symbol, and the variation display time of the special symbol corresponds to the time required for the decorative symbol game.

When the CPU 51 transmits the decorative symbol game stop command in step S124, the CPU 51 sets a wait time (for example, 2.0 sec) in the timer T2 in step S125. Then, the process proceeds to step S126, and wait processing is set in the main control flag. This wait time is recorded in advance in the ROM 52, and when the special symbol game is put on hold, the next special symbol game is started after the wait time has elapsed since the end of the current special symbol game. .
[3-9] Wait Process When the CPU 51 detects that the main control flag is set to the wait process, the CPU 51 proceeds from the data acquisition process in step S6 in FIG. 5 to the wait process in step S11. FIG. 18 shows details of the wait process in step S11 of FIG. 5. The CPU 51 subtracts the unit value ΔT (4 msec) recorded in advance in the ROM 52 from the measured value of the timer T2 in step S131 of FIG. Based on this, the remaining wait time is updated. Then, the process proceeds to step S132, and the subtraction result of the timer T2 is compared with “0”.

  When the CPU 51 detects that the subtraction result of the timer T2 is “0” in step S132, it determines the set state of the big hit flag in step S133. For example, when the special symbol is stopped variably in either the normal jackpot mode or the probabilistic jackpot mode in the immediately preceding special symbol game, it is determined in step S133 that the jackpot flag is turned on, and in the step S134 the accessory linked operation flag is turned on. . In step S135, the big hit game process is set in the main control flag, and in step S136, the big hit flag is turned off.

  When the CPU 51 turns off the big hit flag in step S136, the big hit round number (for example, 15) recorded in advance in the ROM 52 is set in the counter N1 in step S137. The counter N1 measures the remaining number of repetitions of the big hit round. When the CPU 51 sets the counter N1 in step S137, the CPU 51 turns off the release flag in step S138, and sends a big hit game start command to the effect control circuit 70 in step S139. Send. This jackpot game start command informs the effect control circuit 70 that the jackpot game is to be started, and the effect control circuit 70 starts the video effect of the jackpot game based on the reception of the jackpot game start command. To the symbol control circuit 80, to instruct the sound control circuit 90 to start the sound effect of the big hit game, and to instruct the electric control circuit 100 to start the electric effect of the big hit game. .

  When the CPU 51 determines that the big hit flag is turned off in step S133, the CPU 51 determines the setting state of the small hit flag in step S140. For example, when the special symbol is fluctuated and stopped in a small hit state in the immediately preceding special symbol game, it is determined in step S140 that the small hit flag is turned on, and in step S141, the small hit game process is set in the main control flag. Then, the small hit flag is turned off in step S142, the release flag is turned off in step S143, and a small hit game start command is transmitted to the effect control circuit 70 in step S144. This small hit game start command informs the effect control circuit 70 that the small hit game is to be started, and the effect control circuit 70 receives the small hit game start command to produce a visual effect of the small hit game. The symbol control circuit 80 is instructed to start, the sound control circuit 90 is instructed to start a sound effect of the small hit game, and the electric effect of starting the small hit game is started. The control circuit 100 is instructed.

When the CPU 51 causes the special symbol to fluctuate and stop in a state of losing in the immediately preceding special symbol game, the CPU 51 determines in step S140 that the small hit flag is off, and proceeds to step S145. Here, the big hit determination processing is set to the main control flag, and the outreach reach flag is turned off in step S146.
[3-10] Jackpot Game Process When the CPU 51 detects that the main control flag is set to the jackpot game process, the CPU 51 proceeds from the data acquisition process in step S6 in FIG. 5 to the jackpot game process in step S12. FIG. 19 shows the details of the big hit game process in step S12 of FIG. 5, and the CPU 51 determines the set state of the release flag in step S151 of FIG. This release flag is turned on when the special prize opening is opened and turned off when the special prize opening is closed. The CPU 51 determines that the release flag is turned off in step S151 before the first big hit round is started. Then, the process proceeds to step S152.

  When the CPU 51 proceeds to step S152, the winning limit number (for example, 10) recorded in advance in the ROM 52 is set in the counter N2. This maximum number of winnings indicates the maximum number of game balls that can be won in the special winning opening in each big hit round. When the counter 51 is set in step S152, the CPU 51 proceeds to step S153, and the timer T3. Is set to the opening limit time (for example, 30.0 sec). This open limit time indicates the maximum time during which the special winning opening can be opened in each big hit round. When the timer T3 is set in step S153, the CPU 51 proceeds to step S154.

  In step S154, the CPU 51 outputs an open signal to the solenoid circuit 56. Then, the process proceeds to step S155, and the release flag is turned on. Then, the solenoid circuit 56 turns on the special prize opening solenoid 29 when the release signal is given, and starts the first big hit round based on opening the special prize opening.

  When the first big hit round is started, the CPU 51 determines that the release flag is turned on in step S151, and in step S156, the CPU 51 performs special processing based on subtracting the unit value (4 msec) recorded in advance in the ROM 52 from the measured value of the timer T3. Update the remaining opening time of the winning opening. Then, the process proceeds to step S157, and the subtraction result of the timer T3 is compared with the limit value “0” recorded in advance in the ROM 52. If “T3 = 0” is determined here, the process proceeds to step S161, and a closing signal is output to the solenoid circuit 56. Next, the process proceeds to step S162, and the release flag is turned off. Then, the solenoid circuit 56 turns off the special winning opening solenoid 29 when the closing signal is given, and finishes the first big hit round based on closing the special winning opening.

  When the CPU 51 determines “T3> 0” in step S157, it determines whether or not there is a count signal from the count sensor 27 in step S158. When it is determined that there is a count signal from the count sensor 27, the process proceeds to step S159, and the unit number “1” recorded in advance in the ROM 52 is subtracted from the measured value of the counter N2. Then, the process proceeds to step S160, and the subtraction result of the counter N2 is compared with the limit value “0” recorded in advance in the ROM 52. If "N2 = 0" is determined here, the process proceeds to step S161, and the first big hit round is completed based on closing the special winning opening. Next, the process proceeds to step S162, and the release flag is turned off.

  When the release flag is turned off in step S162, the CPU 51 updates the remaining number of big hit rounds based on subtracting the unit value “1” recorded in advance in the ROM 52 from the counter N1 in step S163. Then, the process proceeds to step S164, and the subtraction result of the counter N1 is compared with a limit value “0” recorded in advance in the ROM 52. When the first big hit round is completed, the CPU 51 determines “N1> 0” in step S164, and repeats steps S151 to S163. In other words, each big hit round ends when the opening time of the special winning opening reaches the opening limit value or the number of winning game balls reaches the winning limit value.

When finishing the final 15th big hit round, the CPU 51 determines “N1 = 0” in step S164. In step S165, a big hit game stop command is transmitted to the effect control circuit 70. In step S166, the accessory continuous operation flag is turned off. In step S167, the main control flag is set to the big hit determination process. This jackpot game stop command informs the effect control circuit 70 that the jackpot game has ended, and the effect control circuit 70 stops the video effect of the jackpot game based on receiving the jackpot game stop command. To the symbol control circuit 80, to instruct the sound control circuit 90 to stop the sound effect of the big hit game, and to instruct the electric control circuit 100 to stop the electric effect of the big hit game. .
[3-11] Small hit game process When the CPU 51 detects that the main control flag is set to the small hit game process, the CPU 51 proceeds from the data acquisition process in step S6 of FIG. 5 to the small hit game process in step S13. FIG. 20 shows details of the small hit game process in step S13 of FIG. 5, and the CPU 51 determines the set state of the release flag in step S171 of FIG. For example, before the start of the small hit game with the special prize opening closed, it is determined in step S171 that the release flag is turned off, and the process proceeds to step S172.

  When proceeding to step S172, the CPU 51 sets the winning limit number (for example, 10) recorded in advance in the ROM 52 in the counter N3. This maximum number of winnings indicates the maximum number of game balls that can be won in the special winning opening in the small win game. When the CPU 51 sets the counter N3 in step S172, the process proceeds to step S173, and the timer T4 is set. An opening limit time (for example, 1.2 sec) is set. This open limit time indicates the maximum time during which the special winning opening can be opened in the small hit game, and when the timer T4 is set in step S173, the CPU 51 proceeds to step S174. Here, based on the output of the opening signal to the solenoid circuit 56, the special winning opening is opened and the small hit game is started. Next, in step S175, the release flag is turned on to record that the small hit game has started.

  When starting the small hit game, the CPU 51 determines that the release flag is turned on in step S171, and subtracts the unit value (4 msec) recorded in advance in the ROM 52 from the measured value of the timer T4 in step S176. Update remaining time for. Then, the process proceeds to step S177, and the subtraction result of the timer T4 is compared with the limit value “0” recorded in advance in the ROM 52. Here, when “T4 = 0” is determined, the process proceeds to step S181 where the special winning opening is closed based on the output of the closing signal to the solenoid circuit 56, and the small hit game is finished.

  When the CPU 51 determines “T4> 0” in step S177, it determines whether or not there is a count signal from the count sensor 27 in step S178. When it is determined that there is a count signal from the count sensor 27, the process proceeds to step S179, and the unit number “1” recorded in advance in the ROM 52 is subtracted from the measured value of the counter N3. Then, the process proceeds to step S180, and the subtraction result of the counter N3 is compared with the limit value “0” recorded in advance in the ROM 52. Here, when “N3 = 0” is determined, the process proceeds to step S181, and the small hit game is finished based on closing the special winning opening. In other words, the small winning game ends when the opening time of the special winning opening reaches the opening limit value or the number of winning game balls reaches the winning limit value, and the small winning game wins the special winning opening. The number of game balls that can be played is set to be smaller than the number of game balls that can be won in the special winning opening in the big hit game.

When the CPU 51 finishes the small hit game in step S181, the CPU 51 turns off the release flag in step S182. In step S183, a small hit game stop command is transmitted to the effect control circuit 70, and in step S184, a big hit determination process is set in the main control flag. This small hit game stop command informs the effect control circuit 70 that the small hit game has ended, and the effect control circuit 70 receives the small hit game stop command and displays the visual effect of the small hit game. The symbol control circuit 80 is instructed to finish the game, the sound control circuit 90 is instructed to finish the sound effect of the small hit game, and the electric control circuit 100 finishes the electric effect of the small hit game. To instruct.
[4] Description of Internal Process of Effect Control Circuit 70 [4-1] Main Process When the power of the CPU 71 of the effect control circuit 70 is turned on, all data in the RAM 73 is initialized by the power-on process of step S201 in FIG. To do. Then, the process proceeds to step S202, and the setting state of the timer interrupt flag is determined. This timer interrupt flag is turned on by timer interrupt processing based on the CPU 71 receiving a pulse signal from the timer circuit 74. When the CPU 71 detects that the timer interrupt flag is turned off in step S202, step S203 is executed. If the timer interrupt flag is detected to be on in step S202, the process proceeds to step S204. In step S204, the timer interrupt flag is turned off, and the counter update process 2 in step S205, the hold command process in step S206, and the command process in step S207 are executed in order.
[4-2] INT Interrupt Processing When receiving the strobe signal (INT signal) from the main control circuit 50, the CPU 71 of the effect control circuit 70 starts the INT interrupt processing. The strobe signal is transmitted together with the command by the main control circuit 50. When the CPU 71 starts the INT interrupt process, the CPU 71 receives the command in step S211 in FIG. 22, and records the command reception result in the RAM 73 in step S212. . Then, the process proceeds to step S213, and the command processing flag is set according to the command reception result. This command processing flag is initially set in the command waiting process in the power-on process in step S201. FIG. 23 shows the relationship between the type of command transmitted from the main control circuit 50 and the setting contents of the command processing flag. ing.

The CPU 71 sets the command processing flag to the winning command processing and receives the variation pattern command when it receives any of the probable variation big hit command, the normal big hit command, the small hit command, the miss reach command and the complete miss command from the main control circuit 50. The command processing flag is set to the variation pattern command processing, when the decoration symbol game start command is received, the command processing flag is set to the decoration symbol game start command processing, and when the decoration symbol game stop command is received, the command processing flag is set. Set to decorative symbol game stop command processing. Also, when the big hit game start command is received, the command processing flag is set to the big hit game start command processing, and when the big hit game stop command is received, the command processing flag is set to the big hit game stop command processing, and the small hit game start command is set. When received, the command processing flag is set to the small hit game start command processing, and when the small hit game stop command is received, the command processing flag is set to the small hit game stop command processing and any one of the pending commands 1 to 4 is received. When this happens, the command processing flag is set to command waiting processing.
[4-3] Counter update process 1
FIG. 24 shows details of the counter update process 1 in step S203 of FIG. 21, and the CPU 71 adds “1” to the current measurement value of the random counter R11 in step S221 of FIG. This random counter R11 is for setting a symbol element of each column of decorative symbols, and is composed of a three-digit counter. As shown in FIG. 25, the first digit of the random counter R11 is added from “0” to “7”, then returned to “0” and added cyclically, and the second digit is “1”. “1” is added for each carry added from “7” to “0”, and “1” is added for the third digit every time the carry is added from “7” to “0”. The

  When the CPU 71 updates the random counter R11 in step S221 in FIG. 24, the first digit and the third digit of the update result of the random counter R11 are compared in step S222. If it is detected that the two are different from each other, the process proceeds to step S223, and the update result of the random counter R11 is stored in the completely out of symbol area of the RAM 73. That is, as shown in FIG. 25, the complete out symbol area stores basic data of complete out symbols with different left and right columns, and the stored data in the complete out symbol area is stored in the next step S223. Updated.

When the CPU 71 detects that the first digit and the third digit of the random counter R11 are the same in step S222 of FIG. 24, the CPU 71 compares the first digit and the second digit of the random counter R11 in step S224. If it is detected that the two are different, the process proceeds to step S225, and the update result of the random counter R11 is stored in the outlier reach symbol area of the RAM 73. That is, as shown in FIG. 25, the outreach symbol area stores basic data of outreach symbols in which the left column and the right column are the same and the middle column is different. The data is updated in the next step S225.
[4-4] Counter update process 2
When the CPU 71 proceeds to the counter update process 2 in step S205 of FIG. 21, the CPU 71 adds “1” to the measurement value of the random counter R12. This random counter R12 corresponds to a random value for setting the decorative symbol to each of the normal jackpot combination and the probability variation jackpot combination, and is added after the initial value “0” to the upper limit value “7”. It returns to the value “0” and is added cyclically.
[4-5] Hold Command Processing FIG. 26 shows details of the hold command processing in step S206 of FIG. 21, and the CPU 71 timers the unit time ΔT (4 msec) recorded in advance in the ROM 72 in step S231 of FIG. It adds to the measured value of T11. This timer T11 directly measures the passage of time with respect to when the power is turned on, and is accumulated without being reset after being initially set to “0” in the power-on process of step S201 in FIG. Is added to This timer T11 corresponds to each of a special prize value estimation counter and a special prize state estimation counter.

  When adding the timer T11 in step S231 of FIG. 26, the CPU 71 determines whether or not the reception result of the hold command 1 is recorded in the RAM 73 in step S232. The hold command 1 is transmitted by the data acquisition process of FIG. 8 based on the main control circuit 50 recording the acquisition results of the random counters R1 to R4 in the hold data area 1, and the CPU 71 executes step S232 of FIG. When it is determined that the reception result of the hold command 1 is recorded in the RAM 73, the process proceeds to step S233. Here, the hold display command 1 is transmitted to the symbol control circuit 80, and the addition result of the timer T11 is acquired in step S234. When the CPU 81 of the symbol control circuit 80 receives the hold display command 1, it transmits the hold display command 1 to the VDP 84. When the VDP 84 receives the hold display command 1, the VDP 84 detects display data corresponding to the hold display command 1 from the VROM 85 and displays it in the hold display area 33 of the decorative symbol display 32 as shown in FIG. Based on the display of one hold picture 201 based on the data detection result, the number of hold times “1” is notified.

  As shown in FIG. 28, the estimated data area 1 to the estimated data area 4 are set in the RAM 73 of the effect control circuit 70. Each of these estimated data area 1 to estimated data area 4 is for recording the acquisition result of timer T11 as estimated data, and when CPU 71 acquires the addition result of timer T11 in step S234 of FIG. In S235, the acquisition result of the timer T11 is recorded as the estimated data 1 in the estimated data area 1. Then, the process proceeds to step S236, and the reception result of the hold command 1 recorded in the RAM 73 is cleared.

  If the CPU 71 determines that the reception result of the hold command 1 is not recorded in the RAM 73 in step S232, the CPU 71 determines whether or not the reception result of the hold command 2 is recorded in the RAM 73 in step S237. The hold command 2 is transmitted by the data acquisition process of FIG. 8 based on the main control circuit 50 recording the acquisition results of the random counters R1 to R4 in the hold data area 2, and the CPU 71 executes step S237 of FIG. When it is determined that the reception result of the hold command 2 is recorded in the RAM 73, the process proceeds to step S238. Here, the hold display command 2 is transmitted to the symbol control circuit 80, and the addition result of the timer T11 is acquired in step S239. When receiving the hold display command 2, the CPU 81 of the symbol control circuit 80 transmits the hold display command 2 to the VDP 84. When the VDP 84 receives the hold display command 2, the VDP 84 detects display data corresponding to the hold display command 2 from the VROM 85, and displays it in the hold display area 33 of the decorative symbol display 32 as shown in FIG. Based on the display of the two reserved pictures 201 based on the detection result of the data, the number of times of holding “2” is notified.

  When the CPU 71 acquires the addition result of the timer T11 in step S239 in FIG. 26, the acquisition result of the timer T11 is recorded as the estimated data 2 in the estimated data area 2 of the RAM 73 in step S240. Then, the process proceeds to step S236, and the reception result of the hold command 2 recorded in the RAM 73 is cleared.

  If the CPU 71 determines that the reception result of the hold command 2 is not recorded in the RAM 73 in step S237, the CPU 71 determines whether or not the reception result of the hold command 3 is recorded in the RAM 73 in step S241. The hold command 3 is transmitted by the data acquisition process of FIG. 8 based on the main control circuit 50 recording the acquisition results of the random counters R1 to R4 in the hold data area 3, and the CPU 71 performs step S241 of FIG. When it is determined that the reception result of the hold command 3 is recorded in the RAM 73, the process proceeds to step S242. Here, the hold display command 3 is transmitted to the symbol control circuit 80, and the addition result of the timer T11 is acquired in step S243. When the CPU 81 of the symbol control circuit 80 receives the hold display command 3, it transmits the hold display command 3 to the VDP 84. When the VDP 84 receives the hold display command 3, the VDP 84 detects display data corresponding to the hold display command 3 from the VROM 85, and displays it in the hold display area 33 of the decorative design indicator 32 as shown in FIG. Based on the display of the three reserved pictures 201 based on the data detection result, the number of times of holding “3” is notified.

  When the CPU 71 acquires the addition result of the timer T11 in step S243 in FIG. 26, the CPU 71 records the acquisition result of the timer T11 as the estimated data 3 in the estimated data area 3 of the RAM 73 in step S244. Then, the process proceeds to step S236, and the reception result of the hold command 3 recorded in the RAM 73 is cleared.

  If the CPU 71 determines that the reception result of the hold command 3 is not recorded in the RAM 73 in step S241, the CPU 71 determines whether the reception result of the hold command 4 is recorded in the RAM 73 in step S245. The hold command 4 is transmitted by the data acquisition process of FIG. 8 based on the main control circuit 50 recording the acquisition results of the random counters R1 to R4 in the hold data area 4, and the CPU 71 performs step S245 of FIG. When it is determined that the reception result of the hold command 4 is recorded in the RAM 73, the process proceeds to step S246. Here, the hold display command 4 is transmitted to the symbol control circuit 80, and the addition result of the timer T11 is acquired in step S247. When the CPU 81 of the symbol control circuit 80 receives the hold display command 4, it sends the hold display command 4 to the VDP 84. When the VDP 84 receives the hold display command 4, the VDP 84 detects display data corresponding to the hold display command 4 from the VROM 85, and displays it in the hold display area 33 of the decorative symbol display 32 as shown in FIG. Based on the display of the four reserved pictures 201 based on the data detection result, the number of times of reservation “4” is notified.

When the CPU 71 acquires the addition result of the timer T11 in step S247 of FIG. 26, the CPU 71 records the acquisition result of the timer T11 as the estimated data 4 in the estimated data area 4 of the RAM 73 in step S248. Then, the process proceeds to step S236, and the reception result of the hold command 4 recorded in the RAM 73 is cleared. That is, in the estimated data area 1, the recording timing at which the main control circuit 50 records each of the random counters R1 to R4 in the reserved data area 1 is recorded as the estimated data 1, and the estimated data area 2 is recorded in the main control circuit 50. The recording timing at which each of the random counters R1 to R4 is recorded in the reserved data area 2 is recorded as the estimated data 2. In the estimated data area 3, the main control circuit 50 stores the random counters R1 to R4 in the reserved data area 3. Is recorded as the estimated data 3. In the estimated data area 4, the recording timing at which the main control circuit 50 records each of the random counters R 1 to R 4 in the reserved data area 4 is the estimated data 4. Is recorded as
[4-6] Command Processing FIG. 29 shows the details of the command processing in step S207 in FIG. 21, and the CPU 71 performs command processing in step S301 in FIG. 29 to step S309 in the command processing in step S207 in FIG. The small hit game stop command processing is alternatively executed based on the setting state of the command processing flag.
[4-6-1] Command Waiting Processing When the CPU 71 detects that the command processing flag is set in the command waiting processing, the CPU 71 returns to step S202 in FIG. 21 through the command waiting processing in step S301 in FIG. This command waiting process is a process of waiting for a command from the main control circuit 50, and no substantial processing operation is performed.
[4-6-2] Winning Command Processing The main control circuit 50 performs the big hit determination processing of FIGS. 10 and 11 to the effect control circuit 70 for the normal big hit command, the probable variable big hit command, the small hit command, the outreach command, and the complete out command. When either one is transmitted, the CPU 71 of the effect control circuit 70 rewrites the command processing flag from the command waiting processing to the winning command processing. In a state where this command processing flag is set in the winning command processing, the CPU 71 executes the winning command processing in step S302 in the command processing of FIG.

  FIG. 30 shows details of the winning command process in step S302, and the CPU 71 detects the reception result of the command from the RAM 73 in step S311 in FIG. Then, the process proceeds to step S312, and the command detection result is compared with the normal jackpot command. If it is determined that the command detection result is a normal jackpot command, the process proceeds to step S313, and the decoration symbol is set to a combination of the normal jackpot.

  FIG. 31A shows a symbol table recorded in advance in the ROM 72 of the effect control circuit 70. In this symbol table, the correlation between the random counter R12 and symbol elements is recorded, and the CPU 71 obtains the measured value of the random counter R12 in step S313 in FIG. 30, and the random counter is obtained from the symbol table in FIG. The symbol element corresponding to the acquisition result of R12 is selected, and each of the symbol element in the left column, the symbol element in the middle column, and the symbol element in the right column is set as the symbol element selection result. For example, when the acquisition result of the random counter R12 is “6”, “8” is selected as the symbol element, and the symbol element in the left column, the symbol element in the middle column, and the symbol element in the right column are all set to “8”. The decorative symbol is set to the jackpot combination “888”. In this symbol table, four types of symbol elements “2”, “4”, “6”, “8” are set, and when the main control circuit 50 determines a normal big hit, a combination “ 222 "," 444 "," 666 ", or" 888 ".

  When the CPU 71 determines in step S312 of FIG. 30 that the command detection result is different from the normal jackpot command, the CPU 71 compares the command detection result with the probability change jackpot command in step S314. If it is determined that the command detection result is a probability variation jackpot command, the process proceeds to step S315 to set the decorative symbol to a combination of probability variation jackpot. FIG. 31B shows a symbol table recorded in advance in the ROM 72 of the effect control circuit 70. In this symbol table, the correlation between the random counter R12 and the symbol elements is recorded, and the CPU 71 acquires the measured value of the random counter R12 in step S315 of FIG. 30, and the random counter is obtained from the symbol table of FIG. The symbol element corresponding to the acquisition result of R12 is selected, and each of the symbol element in the left column, the symbol element in the middle column, and the symbol element in the right column is set as the symbol element selection result. For example, when the acquisition result of the random counter R12 is “6”, “7” is selected as the symbol element, and the symbol element in the left column, the symbol element in the middle column, and the symbol element in the right column are all set to “7”. The decorative symbol is set to the jackpot combination “777”. In this symbol table, four types of symbol elements “1”, “3”, “5”, and “7” are set, and when the main control circuit 50 determines a probable big hit, a combination “ 111 ”,“ 333 ”,“ 555 ”, and“ 777 ”.

  When the CPU 71 determines in step S314 in FIG. 30 that the command detection result is different from the probability change big hit command, the CPU 71 compares the command detection result with the small hit command in step S316. If it is determined that the command detection result is a small hit command, the process moves to step S317, the symbol element in the left column is set to “1”, the symbol element in the middle column is set to “3”, Set the symbol element of the column to “5”. Each of the symbol elements in each row is pre-recorded in the ROM 72 of the effect control circuit 70, and when the main control circuit 50 determines the small hit, the combination of small hits in which the decorative symbol is a combination of specific complete deviations. It is set to “135”.

  If the CPU 71 determines in step S316 in FIG. 30 that the command detection result is different from the small hit command, the CPU 71 removes the command detection result and compares the reach command in step S318. If it is determined that the command detection result is an outreach command, the process proceeds to step S319, and the measurement value of the random counter R11 is acquired from the outreach symbol area of the RAM 73. Then, “1” is added to each of the third digit, the second digit, and the first digit of the detection result of the random counter R11, the symbol element of the left column is set as the addition result of the third digit, and the symbol of the middle column is set. The element is set to the addition result of the second digit, and the symbol element in the right column is set to the addition result of the first digit. For example, when the third digit of the random counter R11 is “1”, the symbol element in the left column is set to “2”, and when the second digit of the random counter R11 is “0”, the symbol element in the middle column is “1”. When the first digit of the random counter R11 is “1”, the symbol element in the right column is set to “2”, and the decorative symbol is set to the combination “212” of the outlier.

  When the CPU 71 determines in step S318 that the command detection result is different from the outlier reach command, in step S320, the CPU 71 acquires the measured value of the random counter R11 from the complete out symbol area of the RAM 73. Then, “1” is added to each of the third digit, the second digit, and the first digit of the detection result of the random counter R11, the symbol element of the left column is set as the addition result of the third digit, and the symbol of the middle column is set. The element is set to the addition result of the second digit, and the symbol element in the right column is set to the addition result of the first digit. For example, when the third digit of the random counter R11 is “1”, the symbol element of the left column is set to “2”, and when the second digit of the random counter R11 is “7”, the symbol element of the middle column is “8”. When the first digit of the random counter R11 is “3”, the symbol element in the right column is set to “4”, and the decoration symbol is set to the completely out-of-combination combination “284”.

  When the CPU 71 sets the decoration symbol to any one of the probable big hit combination, the normal big hit combination, the small hit combination, the disengagement reach combination, and the complete disengagement combination, the setting result of the left column and the middle row are set in step S321. The symbol element setting result and the symbol element setting result in the right column are transmitted to the symbol control circuit 80, respectively. In step S322, the command detection result is compared with the small hit command, and when it is determined that the command detection result is the small hit command, the process proceeds to the big hit estimation process 1 in step S323.

  FIG. 32 shows details of the jackpot estimation process 1 in step S323. The big hit estimation process 1 is executed when the main control circuit 50 transmits a small hit command to the effect control circuit 70 in the big hit determination process of FIG. Sent when a small hit is determined based on the recording result of the random counter R1 for determining a big hit. In other words, when the big hit estimation process of FIG. 32 is performed, the estimated data 1 corresponding to the acquisition timing of the big hit determination random counter R1 is recorded in the estimated data area 1 of the effect control circuit 70.

  When the CPU 71 proceeds to step S341 in FIG. 32, the setting result of the counter N11 is compared with the limit value “0” recorded in advance in the ROM 72. The counter N11 is set with the number of continuous repetitions of the notice effect based on the determination that the continuous notice is given. When the counter N11 is set to “1”, the decorative symbol game of this time is set. At the end of the game, it is announced at the start of the present decorative symbol game that the decorative symbol will be a combination of a normal jackpot and a probable big hit, and when the counter N11 is set to “2”, at the end of the next decorative symbol game. The decoration symbol will be either a normal jackpot combination or a probabilistic jackpot combination at the start of this decorative symbol game and at the start of the next decorative symbol game, and the counter N11 is set to “3”. When the game is done, the decoration symbol will be either a normal jackpot combination or a promiscuous jackpot combination at the end of the next round of decorative game. Are notified in advance at the start of the current decorative symbol game, at the start of the next decorative symbol game, and at the start of the next decorative symbol game, and one after another when the counter N11 is set to “4”. At the end of this decorative symbol game, the decorative symbol will be either a normal jackpot combination or a probabilistic jackpot combination at the start of this decorative symbol game, at the start of the next decorative symbol game, and one after another It will be noticed at the beginning and at the start of one after another decorative symbol game. This counter N11 is initially set to “0” in the power-on process in step S201 of FIG. 21, and the CPU 71 determines “N11 = 0” in step S341 of FIG. 32 when it is not determined to perform continuous notice. And the process proceeds to step S342.

  In step S342, the CPU 71 determines whether or not the estimated data 2 is recorded in the estimated data area 2 of the RAM 73. The estimated data 2 indicates the acquisition timing of each of the random counters R1 to R4 in the reserved data area 2. When the acquisition results of the random counters R1 to R4 are recorded in the reserved data area 2, the estimated data 2 is stored in the estimated data area 2. Presumed data 2 is recorded.

  If the CPU 71 determines in step S342 that the estimated data 2 is recorded in the estimated data area 2 of the RAM 73, the CPU 71 calculates the time difference data 1 in step S343. This time difference data 1 is obtained by detecting the estimated data 1 from the estimated data area 1, detecting the estimated data 2 from the estimated data area 2, and calculating “estimated data 2 -estimated data 1”. When the time difference data 1 is calculated in step S343, the process proceeds to step S344, and the calculation result of the time difference data 1 is compared with the lower limit value Tmin11 recorded in advance in the ROM 72 and the upper limit value Tmax11 recorded in advance in the ROM 72.

  The small hit is determined when the main control circuit 50 acquires the small hit value “439” as the random counter R1. The time difference from the small hit value “439” to the big hit value “7” for the normal mode is “760 * 4 msec”, and the time difference from the small hit value “439” to the big hit value “313” for the normal mode is “ 1066 * 4 msec ”, the time difference from the small hit value“ 439 ”to the big hit value“ 1069 ”for the normal mode is“ 630 * 4 msec ”, and the lower limit value Tmin11 is the error ΔTg (for example, from the time difference“ 760 * 4 msec ”) The upper limit value Tmax11 is set by adding an error ΔTg (for example, 4 msec * 2) to the time difference “760 * 4 msec”. Therefore, when the time difference data 1 belongs to the range between the lower limit value Tmin11 and the upper limit value Tmax11, the probability that either the normal big hit or the probable big hit is determined based on the random counter R1 of the reserved data area 2 is relatively high. When the time difference data 1 does not belong to the range between the lower limit value Tmin11 and the upper limit value Tmax11, the probability that either the normal big hit or the probable big hit is determined based on the random counter R1 of the reserved data area 2 is relatively low.

  If the CPU 71 determines that “Tmin11 ≦ time difference data 1 ≦ Tmax11” in step S344 in FIG. 32, the CPU 71 determines to execute the continuous notice. Then, the process proceeds to step S347, and “2” is set to the counter N11. That is, when there is a relatively high probability that either the normal big hit or the probable big hit is determined based on the random counter R1 of the next pending data area 2, the number of consecutive notices is set to “2”, and this decorative symbol game In addition, a continuous notice is executed in each of the next decorative symbol games.

  When the CPU 71 determines in step S344 that “Tmin11 ≦ time difference data 1 ≦ Tmax11”, in step S345, the lower limit value Tmin12 recorded in advance in the ROM 72 and the upper limit value Tmax12 recorded in advance in the ROM 72. Compare with each of the above. The lower limit value Tmin12 is set by subtracting the error ΔTg (eg, 4 msec * 2) from the time difference “1066 * 4 msec”, and the upper limit value Tmax12 is obtained by adding the error ΔTg (eg, 4 msec * 2) to the time difference “1066 * 4 msec”. Is set in Therefore, when the time difference data 1 belongs to the range between the lower limit value Tmin12 and the upper limit value Tmax12, the probability that one of the normal big hit and the probable big hit is determined based on the random counter R1 of the reserved data area 2 is relatively high. When the time difference data 1 does not belong to the range between the lower limit value Tmin12 and the upper limit value Tmax12, the probability that one of the normal big hit and the probable big hit is determined based on the random counter R1 of the reserved data area 2 is relatively low.

  When the CPU 71 determines that “Tmin12 ≦ time difference data 1 ≦ Tmax12” in step S345 of FIG. 32, the CPU 71 determines to execute the continuous notice. In step S347, "2" is set to the counter N11, and it is recorded that continuous notice is performed in each of the present decorative symbol game and the next decorative symbol game.

  If the CPU 71 determines that “Tmin12 ≦ time difference data 1 ≦ Tmax12” is not satisfied in step S345, the calculation result of the time difference data 1 is recorded in advance in the ROM 72 in step S346 and the upper limit value Tmax13 recorded in the ROM 72 in advance. Compare with each of the above. The lower limit value Tmin13 is set by subtracting an error ΔTg (eg, 4 msec * 2) from the time difference “630 * 4 msec”, and the upper limit value Tmax13 is obtained by adding an error ΔTg (eg, 4 msec * 2) to the time difference “630 * 4 msec”. Is set in Therefore, when the time difference data 1 belongs to the range between the lower limit value Tmin13 and the upper limit value Tmax13, the probability that either the normal big hit or the probable big hit is determined based on the random counter R1 of the reserved data area 2 is relatively high. When the time difference data 1 does not belong to the range between the lower limit value Tmin13 and the upper limit value Tmax13, the probability that one of the normal big hit and the probable big hit is determined based on the random counter R1 of the reserved data area 2 is relatively low.

  If the CPU 71 determines that “Tmin13 ≦ time difference data 1 ≦ Tmax13” in step S346 of FIG. 32, the CPU 71 determines to execute the continuous notice. In step S347, "2" is set to the counter N11, and it is recorded that continuous notice is performed in each of the present decorative symbol game and the next decorative symbol game.

  If the CPU 71 determines that “Tmin13 ≦ time difference data 1 ≦ Tmax13” is not satisfied in step S346, the CPU 71 determines whether or not the estimated data 3 is recorded in the estimated data area 3 of the RAM 73 in step S348. The estimated data 3 indicates the acquisition timing of each of the random counters R1 to R4 in the reserved data area 3. When the acquisition results of the random counters R1 to R4 are recorded in the reserved data area 3, the estimated data 3 is stored in the estimated data area 3. Presumed data 3 is recorded.

  When the CPU 71 determines that the estimated data 3 is recorded in the estimated data area 3 of the RAM 73 in step S348 of FIG. 32, the CPU 71 calculates the time difference data 2 in step S349. This time difference data 2 is obtained by detecting the estimated data 1 from the estimated data area 1 of the RAM 73, detecting the estimated data 3 from the estimated data area 3 of the RAM 73, and calculating “estimated data 3−estimated data 1”. When the CPU 71 calculates the time difference data 2 in step S349, the CPU 71 proceeds to step S350, and compares the calculation result of the time difference data 2 with each of the lower limit value Tmin11 and the upper limit value Tmax11.

  When CPU 71 determines in step S350 that “Tmin11 ≦ time difference data 2 ≦ Tmax11”, CPU 71 sets “3” in counter N11 in step S353. That is, the number of consecutive notices is set to “3” when the probability that one of the normal big hit and the probable big hit is determined based on the random counter R1 of the next held data area 3 is relatively high. A continuous notice is executed in each of the next decorative symbol game and the next decorative symbol game.

  If the CPU 71 determines that “Tmin11 ≦ time difference data 2 ≦ Tmax11” is not satisfied in step S350, the CPU 71 compares the calculation result of the time difference data 2 with the lower limit value Tmin12 and the upper limit value Tmax12 in step S351. Here, when it is determined that “Tmin12 ≦ time difference data 2 ≦ Tmax12”, the process proceeds to step S353, and the present decorative symbol game and the next decorative symbol game are successively repeated based on setting “3” to the counter N11. Record the continuous notice in each of the decorative pattern games.

  If the CPU 71 determines that “Tmin12 ≦ time difference data 2 ≦ Tmax12” is not satisfied in step S351, the CPU 71 compares the calculation result of the time difference data 2 with the lower limit value Tmin13 and the upper limit value Tmax13 in step S352. Here, when it is determined that “Tmin13 ≦ time difference data 2 ≦ Tmax13”, the process proceeds to step S353, and the present decorative symbol game and the next decorative symbol game are repeated one after another based on setting “3” to the counter N11. Record the continuous notice in each of the decorative pattern games.

  When the CPU 71 determines that “Tmin13 ≦ time difference data 2 ≦ Tmax13” is not satisfied in step S352, the CPU 71 determines whether or not the estimated data 4 is recorded in the estimated data area 4 of the RAM 73 in step S354. The estimated data 4 indicates the acquisition timing of each of the random counters R1 to R4 in the reserved data area 4. When the acquisition results of the random counters R1 to R4 are recorded in the reserved data area 4, the estimated data 4 is stored in the estimated data area 4. Presumed data 4 is recorded.

  When the CPU 71 determines that the estimated data 4 is recorded in the estimated data area 4 of the RAM 73 in step S354 of FIG. 32, the CPU 71 calculates the time difference data 3 in step S355. This time difference data 3 is obtained by detecting the estimated data 1 from the estimated data area 1 of the RAM 73, detecting the estimated data 4 from the estimated data area 4 of the RAM 73, and calculating “estimated data 4−estimated data 1”. When the CPU 71 calculates the time difference data 3 in step S355, the CPU 71 proceeds to step S356, and compares the calculation result of the time difference data 3 with the lower limit value Tmin11 and the upper limit value Tmax11.

  If the CPU 71 determines in step S356 that “Tmin11 ≦ time difference data 3 ≦ Tmax11”, it sets “4” to the counter N11 in step S359. That is, the number of consecutive notices is set to “4” when the probability that one of the normal big hit and the probable big hit is determined based on the random counter R1 of the pending data area 4 one after another is relatively high, and this decoration Continuous notice is executed in each of the symbol game, the next decorative symbol game, the subsequent decorative symbol game, and the successive decorative symbol game.

  If the CPU 71 determines that “Tmin11 ≦ time difference data 3 ≦ Tmax11” is not satisfied in step S356, the CPU 71 compares the calculation result of the time difference data 3 with the lower limit value Tmin12 and the upper limit value Tmax12 in step S357. Here, when it is determined that “Tmin12 ≦ time difference data 3 ≦ Tmax12”, the process proceeds to step S359, and on the basis of setting “4” to the counter N11, the present decorative symbol game and the next decorative symbol game are repeated one after another. It is recorded that continuous notices are made in each of the decorative symbol games and the decorative symbol games one after another.

  When CPU 71 determines in step S357 that “Tmin12 ≦ time difference data 3 ≦ Tmax12” is not satisfied, it compares the operation result of time difference data 3 with lower limit value Tmin13 and upper limit value Tmax13 in step S358. Here, when it is determined that “Tmin13 ≦ time difference data 3 ≦ Tmax13”, the process proceeds to step S359, and based on the setting of “4” to the counter N11, the present decorative symbol game and the next decorative symbol game are repeated one after another. It is recorded that continuous notices are made in each of the decorative symbol games and the decorative symbol games one after another.

  If the CPU 71 determines in step S322 in FIG. 30 that the command detection result is not a small hit command, the CPU 71 determines the setting state of the normal mode flag in step S324. This normal mode flag indicates the setting state of the probability variation mode when the main control circuit 50 determines whether or not it is a big hit in step S56 in FIG. 10, and the main control circuit 50 in step S56 in FIG. It is turned on when it is determined in the normal mode whether or not it is a big hit, and it is turned off when it is determined in the probability variation mode.

  When the CPU 71 determines whether or not the main control circuit 50 is a big hit in step S56 of FIG. 10 in the probability variation mode, the CPU 71 determines that the normal mode flag is turned off in step S324 of FIG. 30, and the command detection result in step S325. Compare with the probable jackpot command. If it is determined that the command detection result is a probable big hit command, the normal mode flag is turned off in step S326, and the process proceeds to step S332. If it is determined in step S325 that the command detection result is not a probability change jackpot command, the process proceeds to step S335, and the command detection result is compared with the normal jackpot command. If it is determined that the command detection result is a normal big hit command, the normal mode flag is turned on in step S336, and the process proceeds to step S332. This normal mode flag is initially set to the on state in the power-on process in step S201 of FIG.

  When the CPU 71 determines in the normal mode whether or not the main control circuit 50 is a big hit in step S56 of FIG. 10, it determines that the normal mode flag is on in step S324 of FIG. Compare with jackpot command. If it is determined that the command detection result is a normal jackpot command, the process proceeds to the jackpot value estimation process in step S330 and the jackpot estimation process 2 in step S331.

  If the CPU 71 determines in step S327 that the command detection result is not a normal jackpot command, the CPU 71 compares the command detection result with a probability change jackpot command in step S328. If it is determined that the command detection result is a probable big hit command, the process proceeds to step S329, and the normal mode flag is turned off. Then, the process proceeds in turn to the jackpot value estimation process in step S330 and the jackpot estimation process 2 in step S331. That is, each of the big hit value estimation processing and the big hit estimation processing 2 is performed when the main control circuit 50 sets the normal mode, the acquisition result of the big hit determination random counter R1 in step S56 of FIG. Is determined based on the fact that it is the same as any one of 313, 1069 "and is executed when either a normal jackpot command or a probable variation jackpot command is transmitted, the jackpot value estimation process and the jackpot estimation process 2 When each of these is performed, the estimated data 1 corresponding to one of the acquisition timings “7, 313, 1069” of the random counter R1 is recorded in the estimated data area 1 of the effect control circuit 70.

  FIG. 33 shows details of the jackpot value estimation process in step S330, and the CPU 71 determines the setting state of the counter flag in step S360 in FIG. This counter flag is initially set to the off state by the power-on process in step S201 in FIG. 21, and the CPU 71 proceeds to step S361 when it is determined in step S360 in FIG. 33 that the counter flag is off. Here, the recording result of the estimated data 1 is detected from the estimated data area 1 of the RAM 73, and the detected result of the estimated data 1 is set to the counter No1 in step S362. This counter No1 corresponds to the first counter data. When the CPU 71 sets the counter No1 in step S362, the process proceeds to step S363, and the counter flag is turned on. This estimated data 1 indicates the acquisition timing of the random counter R1 determined by the main control circuit 50 to be a big hit in step S56 of FIG. 10, and in the normal mode, either the normal big hit or the probable big hit is determined for the first time. When this is done, the estimated data 1 indicating the acquisition timing of the random counter R1 that is a big hit is set to the counter No1.

  When the CPU 71 determines that the counter flag is turned on in step S360 of FIG. 33, the CPU 71 detects the recording result of the estimated data 1 from the estimated data area 1 of the RAM 73 in step S364, and the detected result of the estimated data 1 in step S365. Set to counter No2. The estimated data 1 in the estimated data area 1 is cleared when the decorative symbol game is started. When the estimated data 1 is cleared from the estimated data area 1, the next timer T11 acquisition result is estimated. Recorded as data 1 in the data area 1. That is, in the normal mode in which the detection result of the estimated data 1 is set in the counter No. 1, when either the normal big hit or the probability variation big hit is newly determined, it is determined in step S360 that the counter flag is turned on, and the main control circuit 50 10 is set to the counter No. 2 in step S365 in FIG. 33. The estimated data 1 indicating the acquisition timing of the random counter R1 that is newly determined to be a big hit in step S56 in FIG. This counter No. 2 corresponds to the second counter data.

  When CPU 71 sets counter No. 2 in step S365, CPU 71 calculates time interval data ΔNt in step S366. This time interval data ΔNt is data for estimating the time difference from when the main control circuit 50 determines the big hit at the first time to the second time at step S56 in FIG. It is calculated by subtracting the setting result of counter No1 from the setting result.

  After calculating the time interval data ΔNt in step S366 of FIG. 33, the CPU 71 calculates the initial value of the interval value data ΔNo in step S367. This interval value data ΔNo is data for estimating the number of updates of the random counter R1 from the time when the main control circuit 50 determines the big hit at the first time to the second time at step S56 in FIG. This corresponds to the interval from the first determination to the second determination. This interval value data ΔNo is obtained by dividing the calculation result of the time interval data ΔNt by the update time ΔT (4 msec). This update time ΔT refers to a time interval at which the main control circuit 50 updates the random counter R1 for jackpot determination by the unit value “1”, and is recorded in advance in the ROM 72 of the effect control circuit 70.

  When the CPU 71 calculates the interval value data ΔNo in step S367, the CPU 71 compares the calculation result of the interval value data ΔNo with the update cycle Rmax (1192) determined in advance in the ROM 72 in step S368. This update cycle Rmax corresponds to the number of updates required for the main control circuit 50 to return the random counter R1 for determining the big hit from the lower limit value “0” to the lower limit value “0” via the upper limit value “1191”. For example, when the calculation result of the interval value data ΔNo in step S367 is equal to or less than the update cycle Rmax, the CPU 71 proceeds from step S368 to step S370, and sets the calculation result of the interval value data ΔNo in step S367 to the jackpot value estimation data ΔR1. To do.

  When the CPU 71 determines that the calculation result of the interval value data ΔNo in step S367 is larger than the update cycle Rmax, the CPU 71 proceeds from step S368 to step S369. Here, the update cycle Rmax is subtracted from the calculation result of the interval value data ΔNo, and both subtraction results are set in the interval value data ΔNo. And it returns to step S368 and repeats step S368 and step S369. When “ΔNo ≦ Rmax” is determined in step S368, the process proceeds to step S370, and the subtraction result of the interval value data ΔNo is set to the big hit value estimation data ΔR1. That is, the big hit value estimation data ΔR1 is random from the time when either the normal big hit or the probability variation big hit is determined for the first time in the normal mode until the time when either the normal big hit or the probability variation big hit is determined for the second time in the normal mode. This corresponds to the remainder of the counter R1 and corresponds to the interval data.

In the ROM 72 of the effect control circuit 70, as shown in FIG. 34, jackpot value determination data corresponding to the special prize value determination data is recorded in advance. This big hit value determination data is data for estimating the big hit value when the main control circuit 50 determines the big hit for the second time in the normal mode, and the interval from the big hit value “1069” to the big hit value “7”. For “130”, the big hit value “7” is assigned to the reference range “130−α to 130 + α” including the interval “130”, and the interval “306” from the big hit value “7” to the big hit value “313” is assigned. ”Is assigned a big hit value“ 313 ”to a reference range“ 306-α to 306 + α ”including an interval“ 306 ”, and an interval“ 436 ”from the big hit value“ 1069 ”to the big hit value“ 313 ”is assigned. On the other hand, the big hit value “313” is assigned to the reference range “436-α to 436 + α” including the interval “436”, and the interval “7” from the big hit value “313” to the big hit value “1069” is assigned. The big hit value “1069” is assigned to the reference range “756-α to 756 + α” including the interval “756” for “6”, and the interval “886” from the big hit value “313” to the big hit value “7” is assigned. Is assigned to the reference range “886-α to 886 + α” including the interval “886”, and the big hit value “7” is assigned to the reference range “1062” from the big hit value “7” to the big hit value “1069”. The jackpot value “1069” is assigned to the reference range “1062-α to 1062 + α” including the interval “1062”. The jackpot value judgment data is set based on the interval from the jackpot value for the normal mode to another jackpot value for the normal mode. As shown in the following (1) to (3), It is determined based on the setting result of the big hit value estimation data ΔR1 whether the second normal big hit or the probability variation big hit occurs at the big hit value “7,313,1069” for the normal mode.
(1) When the big hit value for the current normal mode is “7” and the big hit value for the previous normal mode is “313”, the interval between the two is “886” as shown in FIG. When the jackpot value for the normal mode is “7” and the jackpot value for the previous normal mode is “1069”, the interval between the two is “130”, so that “130−α ( For example, when 5) ≦ ΔR1 ≦ 130 + α ”and“ 886-α ≦ ΔR1 ≦ 886 + α ”, it is determined that the current normal big hit or the current probability variation big hit has occurred at the big hit value“ 7 ”for the normal mode. .
(2) When the current big jackpot value for the normal mode is “313” and the previous big jackpot value for the normal mode is “7”, the interval between them is “306” as shown in FIG. When the big hit value for the normal mode is “313” and the big hit value for the previous normal mode is “1069”, the interval between the two is “436”. Therefore, as shown in FIG. 34, “306−α ≦ When either of “ΔR1 ≦ 306 + α” and “436−α ≦ ΔR1 ≦ 436 + α”, it is determined that the current normal big hit or the current probability variation big hit has occurred at the big hit value “313” for the normal mode.
(3) When the big hit value for the current normal mode is “1069” and the big hit value for the previous normal mode is “7”, the interval between them becomes “1062” as shown in FIG. When the jackpot value for the normal mode is “1069” and the jackpot value for the previous normal mode is “313”, the interval between the two is “756”. Therefore, as shown in FIG. When either of “ΔR1 ≦ 756 + α” and “1062-α ≦ ΔR1 ≦ 1062 + α”, it is determined that the current normal big hit or probability variation big hit has occurred with the big hit value “1069” for the normal mode.

  When the CPU 71 sets the big hit value estimated data ΔR1 in step S370 of FIG. 33, the invalid lower limit value “0−α (1187)” and the invalid upper limit value recorded in advance in the ROM 72 as the setting results of the big hit value estimated data ΔR1 in step S371. Compare with each of “0 + α (5)”. Here, when it is determined that “0−α ≦ ΔR1 ≦ 0 + α”, the process proceeds to step S377, and the jackpot estimation flag is turned off. This big hit guess flag is initially set to the OFF state in the power-on process in step S201 in FIG. 20, and when the big hit guess flag is turned off in step S377 in FIG. 33, the CPU 71 proceeds to step S376, and this counter The setting result of No2 is set in the counter No1.

  That is, when the big hit value for the current normal mode and the big hit value for the previous normal mode are common “7”, the interval between them is “0”, and the big hit value for the normal mode and the previous normal mode When the mode jackpot value is “313”, the interval between the two is “0”. When the jackpot value for the current normal mode and the jackpot value for the previous normal mode are “1069”, Since the interval between the two becomes “0”, the big hit value “7,313,1069” for the normal mode cannot be distinguished from each other based on the setting result of the big hit value estimation data ΔR1. In this case, it is determined in step S371 that “0−α ≦ ΔR1 ≦ 0 + α”, and in step S376, the setting result of the counter No2 is set in the counter No1. When the setting result of the counter No. 2 is shifted to the counter No. 1, the detection result of the estimated data 1 is set in the counter No. 2 based on the fact that the big hit is newly determined in the normal mode, and the current estimated data 1 in the normal mode is set. And the difference between the most recent guess data 1 in the normal mode is calculated as the time interval data ΔNt.

  When the CPU 71 determines that “0−α ≦ ΔR1 ≦ 0 + α” is not satisfied in step S371 in FIG. 33, the reference ranges “130−α to 130 + α” and “306−α−” are determined from the big hit value determination data in FIG. 34 in step S372. "306 + α", "436-α to 436 + α", "756-α to 756 + α", "886-α to 886 + α" and "1062-α to 1062 + α" are detected, and the setting result of the jackpot value estimation data ΔR1 is the standard It is determined whether or not it belongs to any of the ranges “130−α to 130 + α” to “1062−α to 1062 + α”. Here, when it is determined that the setting result of the big hit value estimation data ΔR1 does not belong to any of the reference ranges “130−α to 130 + α” to “1062−α to 1062 + α”, the process proceeds from step S372 in FIG. 33 to step S377. , Turn off the jackpot guessing flag. And it transfers to step S376 and sets the setting result of counter No2 to counter No1. That is, based on the fact that the setting result of the counter No. 2 is shifted to the counter No. 1 and the big hit is newly determined in the normal mode in a state where the reference range corresponding to the setting result of the big hit value estimation data ΔR1 does not exist can be estimated. Thus, the detection result of the estimated data 1 is set in the counter No2. Therefore, the difference between the current estimated data 1 in the normal mode and the latest estimated data 1 in the normal mode is calculated as the time interval data ΔNt.

  If the CPU 71 determines in step Sstep S372 in FIG. 33 that the setting result of the big hit value estimation data ΔR1 belongs to any one of the reference ranges “130−α to 130 + α” to “1062−α to 1062 + α”, the CPU 71 sets 2 in step S373. It is estimated which of “7,313,1069” the second big hit has occurred. This estimation process is performed by selectively detecting the big hit value for the normal mode according to the setting result of the big hit value estimation data ΔR1 from the big hit value determination data of FIG. 34, and the CPU 71 executes the big hit value in step S373. Is detected, the big hit value detection result is recorded in the RAM 73 in step S374, the big hit estimation flag is turned on in step S375, and the setting result of the counter No2 is set in the counter No1 in step S376. For example, when “ΔR1 = 435”, it is estimated that the second big hit has occurred with a big hit value “313”, and when “ΔR1 = 888”, the second big hit has occurred with a big hit value “7”. Guessed. That is, when the big hit value estimation process is completed, the setting result of the counter No. 2 is shifted to the counter No. 1, and when the big hit is newly determined in the normal mode, the detection result of the estimated data 1 is set in the counter No. 2. The difference between the current estimated data 1 in the mode and the latest estimated data 1 in the normal mode is calculated as the time interval data ΔNt.

  When the CPU 71 finishes the jackpot value estimation process in step S330 of FIG. 30, the CPU 71 proceeds to the jackpot estimation process 2 in step S331. FIG. 35 shows details of the jackpot estimation process 2 in step S331. This jackpot estimation process 2 is executed subsequent to the jackpot value estimation process in step S330 when the main control circuit 50 determines a second hit based on the recording result of the random counter R1 in the reserved data area 1 when the normal mode is set. When the big hit estimation process 2 is performed, the estimation data 1 corresponding to the acquisition timing of the random counter R1 is recorded in the estimation data area 1 of the effect control circuit 70.

  When the CPU 71 proceeds to step S381 in FIG. 35, the CPU 71 determines the setting state of the big hit estimation flag. This jackpot estimation flag is turned on when a jackpot value estimation result is obtained in the previous jackpot value estimation process, and is turned off when it is not obtained. The CPU71 has a jackpot value for the normal mode of “7”. , 313, 1069 ", the process proceeds from step S381 to step S382, and the setting result of the counter N11 is compared with the limit value" 0 ". For example, when it is not determined to perform continuous notice, the CPU 71 determines “N11 = 0” in step S382, and proceeds to step S383.

  When proceeding to step S383, the CPU 71 determines whether or not the estimated data 2 is recorded in the estimated data area 2 of the RAM 73. For example, when the acquisition results of the random counters R1 to R4 are recorded in the reserved data area 2 of the main control circuit 50, it is determined in step S383 that the estimated data 2 is recorded in the estimated data area 2, and the time difference is determined in step S384. Data 1 is calculated. The time difference data 1 is obtained by detecting the estimated data 1 from the estimated data area 1 and detecting the estimated data 2 from the estimated data area 2 and calculating “estimated data 2−estimated data 1” in the same manner as the big hit estimating process 1. When the CPU 71 calculates the time difference data 1 in step S384, the process proceeds to step S385. Here, the estimation result of the jackpot value in step S374 of FIG. 33 is detected from the RAM 73, and the process proceeds to step S386.

  Determination reference value data is recorded in the ROM 72 of the effect control circuit 70. The determination reference value data sets determination data for estimating whether or not any of the reserved data areas 2 to 4 of the main control circuit 50 includes a big hit according to the estimation result of the big hit value. As shown in FIG. 36, the estimation result “7” of the big hit value includes the determination reference value 1 “1192 * ΔT”, the determination reference value 2 “306 * ΔT”, and the determination reference value 3 “1062 *”. ΔT ”is assigned, and judgment result“ 313 ”of jackpot value is assigned judgment reference value 1“ 886 * ΔT ”, judgment reference value 2“ 1192 * ΔT ”, and judgment reference value 3“ 756 * ΔT ”. The value estimation result “1069” is assigned the determination reference value 1 “130 * ΔT”, the determination reference value 2 “436 * ΔT”, and the determination reference value 3 “1192 * ΔT”.

  The criterion value 1 “1192 * ΔT” for the big hit value estimation result “7” is a criterion value corresponding to the interval from the jackpot value “7” to the jackpot value “7”, and the criterion value 2 “306” * ΔT ”is a judgment value corresponding to an interval from the big hit value“ 7 ”to the big hit value“ 313 ”, and the judgment reference value 3“ 1062 * ΔT ”is changed from the big hit value“ 7 ”to the big hit value“ 1069 ”. It is a judgment value corresponding to the interval until the end. The criterion value 1 “886 * ΔT” for the jackpot value estimation result “313” is a criterion value corresponding to the interval from the jackpot value “313” to the jackpot value “7”, and the criterion value 2 “1192”. * ΔT ”is a judgment value corresponding to an interval from the big hit value“ 313 ”to the big hit value“ 313 ”, and the judgment reference value 3“ 756 * ΔT ”is changed from the big hit value“ 313 ”to the big hit value“ 1069 ”. It is a judgment value corresponding to the interval until the end. The criterion value 1 “130 * ΔT” for the jackpot value estimation result “1069” is a criterion value corresponding to the interval from the jackpot value “1069” to the jackpot value “7”, and the criterion value 2 “436”. * ΔT ”is a judgment value corresponding to the interval from the big hit value“ 1069 ”to the big hit value“ 313 ”, and the judgment reference value 3“ 1192 * ΔT ”is changed from the big hit value“ 1069 ”to the big hit value“ 1069 ”. It is a judgment value corresponding to the interval until the end.

  When the CPU 71 proceeds to step S386 in FIG. 35, it selects the determination reference value 1, the determination reference value 2, and the determination reference value 3 according to the estimation result of the big hit value from the determination reference value data in FIG. For example, when the estimation result of the big hit value is “313”, “886 * ΔT” is selected as the determination reference value 1, “1192 * ΔT” is selected as the determination reference value 2, and “756 * ΔT” is determined as the determination reference value 3. Is selected. Note that ΔT (4 msec) is an update time for the main control circuit 50 to update the big hit determination random counter R1 by the unit value “1”, and is recorded in advance in the ROM 72 of the effect control circuit 70.

  When CPU 71 selects each of determination reference value 1 to determination reference value 3 in step S386 of FIG. 35, CPU 71 calculates lower limit value Tmin21, lower limit value Tmin22, and lower limit value Tmin23 in step S387. The lower limit value Tmin21 is set by subtracting the error ΔTg from the selection result of the determination reference value 1, and the lower limit value Tmin22 is set by subtracting the error ΔTg from the selection result of the determination reference value 2. Yes, the lower limit value Tmin23 is set by subtracting the error ΔTg from the selection result of the determination reference value 3. These errors ΔTg are recorded in advance in the ROM 72 of the effect control circuit 70, and specifically set to “4 msec * 2”.

  When CPU 71 calculates each of lower limit value Tmin21 to lower limit value Tmin23 in step S387 in FIG. 35, CPU 71 calculates upper limit value Tmax21, upper limit value Tmax22, and upper limit value Tmax23 in step S388. The upper limit value Tmax21 is set by adding the error ΔTg to the selection result of the determination reference value 1, and the upper limit value Tmax22 is set by adding the error ΔTg to the selection result of the determination reference value 2. Yes, the upper limit value Tmax23 is set by adding the error ΔTg to the selection result of the determination reference value 3. These errors ΔTg are recorded in advance in the ROM 72 of the effect control circuit 70, and specifically set to “4 msec * 2”. Each of these lower limit values Tmin21 to Tmin23 and upper limit values Tmax21 to Tmax23 corresponds to determination data.

  When the CPU 71 calculates each of the upper limit value Tmax21 to the upper limit value Tmax23 in step S388 of FIG. 35, in step S389, the calculation result of the time difference data 1 in step S384 is calculated as the calculation result of the lower limit value Tmin21 and the calculation result of the upper limit value Tmax21. Compare. Here, when it is determined that “Tmin21 ≦ time difference data 1 ≦ Tmax21”, it is determined that the continuous notice is executed, and “2” is set to the counter N11 in step S392. In step S393, the big hit estimation flag is turned off, and in step S394, the big hit value estimation result recorded in the RAM 73 is cleared. That is, when there is a relatively high probability that either the normal big hit or the probable big hit is determined based on the random counter R1 of the next pending data area 2, the number of consecutive notices is set to “2”, and this decorative symbol game In addition, a continuous notice is executed in each of the next decorative symbol games.

  When CPU 71 determines in step S389 in FIG. 35 that “Tmin21 ≦ time difference data 1 ≦ Tmax21” is not satisfied, in step S390, the calculation result of time difference data 1 in step S384 is calculated as the calculation result of lower limit value Tmin22 and the calculation result of upper limit value Tmax22. Compare with each of the above. Here, when it is determined that “Tmin22 ≦ time difference data 1 ≦ Tmax22”, it is determined that the continuous notice is executed, and based on the setting of “2” to the counter N11 in step S392, the present decorative symbol game and Record that the next notice will be given at each of the next decorative symbol games. In step S393, the big hit estimation flag is turned off, and in step S394, the big hit value estimation result in the RAM 73 is cleared.

  If the CPU 71 determines that “Tmin22 ≦ time difference data 1 ≦ Tmax22” is not satisfied in step S390, the calculation result of the time difference data 1 in step S384 is changed to the calculation result of the lower limit value Tmin23 and the calculation result of the upper limit value Tmax23 in step S391. Compare. Here, when it is determined that “Tmin23 ≦ time difference data 1 ≦ Tmax23”, it is determined that the continuous notice is executed, and based on setting “2” to the counter N11 in step S392, the present decorative symbol game and Record that the next notice will be given at each of the next decorative symbol games. In step S393, the big hit estimation flag is turned off, and in step S394, the big hit value estimation result in the RAM 73 is cleared.

  If the CPU 71 determines that “Tmin23 ≦ time difference data 1 ≦ Tmax23” is not satisfied in step S391, the CPU 71 determines whether or not the estimated data 3 is recorded in the estimated data area 3 of the RAM 73 in step S395. For example, when the acquisition results of the random counters R1 to R4 are recorded in the reserved data area 3 of the main control circuit 50, it is determined in step S395 that the estimated data 3 is recorded in the estimated data area 3, and the time difference is determined in step S396. Data 2 is calculated. This time difference data 2 detects the estimated data 1 from the estimated data area 1 of the RAM 73 and detects the estimated data 3 from the estimated data area 3 of the RAM 73 in the same manner as the jackpot estimation process 1, and detects “estimated data 3−estimated data 1”. When the CPU 71 calculates the time difference data 2 in step S396, the CPU 71 proceeds to step S397, and calculates the calculation result of the time difference data 2 as the calculation result of the lower limit value Tmin21 and the calculation result of the upper limit value Tmax21. Compare with Here, when it is determined that “Tmin21 ≦ time difference data 2 ≦ Tmax21”, it is determined that continuous notice is executed, and “3” is set to the counter N11 in step S40. In step S393, the big hit estimation flag is turned off, and in step S394, the big hit value estimation result in the RAM 73 is cleared. That is, the number of consecutive notices is set to “3” when the probability that one of the normal big hit and the probable big hit is determined based on the random counter R1 of the next held data area 3 is relatively high. A continuous notice is executed in each of the next decorative symbol game and the next decorative symbol game.

  When CPU 71 determines in step S397 that “Tmin21 ≦ time difference data 2 ≦ Tmax21”, it compares the operation result of time difference data 2 with the operation result of lower limit value Tmin22 and the operation result of upper limit value Tmax22 in step S398. Here, when it is determined that “Tmin22 ≦ time difference data 2 ≦ Tmax22”, it is determined that continuous notice is executed, and based on setting “3” to the counter N11 in step S400, It records that the preliminary announcement is performed in each of the next decorative symbol game and the next decorative symbol game. In step S393, the big hit estimation flag is turned off, and in step S394, the big hit value estimation result in the RAM 73 is cleared.

  If the CPU 71 determines that “Tmin22 ≦ time difference data 2 ≦ Tmax22” is not satisfied in step S398, the CPU 71 compares the operation result of the time difference data 2 with the operation result of the lower limit value Tmin23 and the operation result of the upper limit value Tmax23 in step S399. Here, when it is determined that “Tmin23 ≦ time difference data 2 ≦ Tmax23”, it is determined that the continuous notice is executed, and based on setting “3” to the counter N11 in step S400, It records that the preliminary announcement is performed in each of the next decorative symbol game and the next decorative symbol game. In step S393, the big hit estimation flag is turned off, and in step S394, the big hit value estimation result in the RAM 73 is cleared.

  If the CPU 71 determines that “Tmin23 ≦ time difference data 2 ≦ Tmax23” is not satisfied in step S399, it determines whether or not the estimated data 4 is recorded in the estimated data area 4 of the RAM 73 in step S401. For example, when the acquisition results of the random counters R1 to R4 are recorded in the reserved data area 4 of the main control circuit 50, it is determined in step S401 that the estimated data 4 is recorded in the estimated data area 4, and the time difference is determined in step S402. Data 3 is calculated. This time difference data 3 detects the estimated data 1 from the estimated data area 1 of the RAM 73 and detects the estimated data 4 from the estimated data area 4 of the RAM 73 in the same manner as the big hit estimating process 1, and detects “estimated data 4−estimated data 1”. When the CPU 71 calculates the time difference data 3 in step S402, the CPU 71 proceeds to step S403, and calculates the calculation result of the time difference data 3 as the calculation result of the lower limit value Tmin21 and the calculation result of the upper limit value Tmax21. Compare with Here, when it is determined that “Tmin21 ≦ time difference data 3 ≦ Tmax21”, it is determined that continuous notice is executed, and “4” is set to the counter N11 in step S406. In step S393, the big hit estimation flag is turned off, and in step S394, the big hit value estimation result in the RAM 73 is cleared. That is, the number of consecutive notices is set to “4” when the probability that one of the normal big hit and the probable big hit is determined based on the random counter R1 of the pending data area 4 one after another is relatively high, and this decoration Continuous notice is executed in each of the symbol game, the next decorative symbol game, the subsequent decorative symbol game, and the successive decorative symbol game.

  If the CPU 71 determines that “Tmin21 ≦ time difference data 3 ≦ Tmax21” is not satisfied in step S403, the CPU 71 compares the operation result of the time difference data 3 with the operation result of the lower limit value Tmin22 and the operation result of the upper limit value Tmax22 in step S404. Here, when it is determined that “Tmin22 ≦ time difference data 3 ≦ Tmax22”, it is determined that the continuous notice is to be executed, and based on setting “4” to the counter N11 in step S406, It records that a preliminary announcement is made in each of the next decorative symbol game, the subsequent decorative symbol game, and the successive decorative symbol game. In step S393, the big hit estimation flag is turned off, and in step S394, the big hit value estimation result in the RAM 73 is cleared.

  If the CPU 71 determines that “Tmin22 ≦ time difference data 3 ≦ Tmax22” is not satisfied in step S404, the CPU 71 compares the operation result of the time difference data 3 with the operation result of the lower limit value Tmin23 and the operation result of the upper limit value Tmax23 in step S405. Here, when it is determined that “Tmin23 ≦ time difference data 3 ≦ Tmax23”, it is determined that the continuous notice is executed, and based on setting “4” to the counter N11 in step S406, It records that the preliminary announcement is performed in each of the next decorative symbol game, the subsequent decorative symbol game, and the successive decorative symbol game. In step S393, the big hit estimation flag is turned off, and in step S394, the big hit value estimation result in the RAM 73 is cleared.

When the CPU 71 proceeds to step S332 in FIG. 30, the command reception result (probability big hit command, normal big hit command, small hit command, outreach command, complete out command) recorded in the RAM 73 is cleared. Then, the process proceeds to step S333, and the command waiting process is set in the command processing flag.
[4-6-3] Variation Pattern Command Processing When the main control circuit 50 transmits a variation pattern command to the effect control circuit 70 in the variation pattern setting process of FIG. 14, the CPU 71 of the effect control circuit 70 sets a command processing flag to a command waiting process. To change pattern command processing. In a state where this command processing flag is set in the variation pattern command processing, the CPU 71 executes the variation pattern command processing in step S303 in the command processing of FIG. FIG. 37 shows details of the variation pattern command processing in step S303 in FIG. 29. The CPU 71 detects the reception result of the variation pattern command from the RAM 73 in step S411 in FIG. 37, and proceeds to step S412.

  In the ROM 72 of the effect control circuit 70, an effect pattern table is recorded in advance as shown in FIG. This effect pattern table shows the correlation between the change pattern command and the effect pattern command. When the CPU 71 proceeds to step S412 in FIG. 37, the effect pattern command is selected from the effect pattern table according to the reception result of the change pattern command. To do. For example, when the reception result of the variation pattern command is “P1”, the effect pattern command C1 is selected from the effect pattern table.

  When the CPU 71 selects an effect pattern command in step S412 of FIG. 37, the selection result of the effect pattern command is transmitted to each of the symbol control circuit 80, the sound control circuit 90, and the illumination control circuit 100 in step S413. In step S414, the reception result of the variation pattern command recorded in the RAM 73 is cleared, and in step S415, the command processing flag is set to command waiting processing.

  In the VROM 85 of the symbol control circuit 80, video data V1 to V10 are recorded in advance as shown in FIG. Any of the effect pattern commands C1 to C10 is assigned to each of the video data V1 to V10, and the CPU 81 of the symbol control circuit 80 receives any of the effect pattern commands C1 to C10 from the effect control circuit 70. A type corresponding to the reception result of the effect pattern command is selected from the video data V1 to V10 and transmitted to the VDP 84. Then, the VDP 84 detects the video data V1 to V10 according to the selection result of the CPU 81, decompresses the video data detection result, and records it in the VRAM 86.

  Each of the video data V1 to V10 is started to be reproduced in synchronization with a decoration symbol game start command transmitted from the main control circuit 50, and in synchronization with a decoration symbol game stop command transmitted from the main control circuit 50. Reproduction is stopped, and the respective reproduction times of the video data V1 to V10 are the same value as the variable display time which is the time required from the transmission of the decorative symbol game start command to the transmission of the decorative symbol game stop command. Is set to For example, the video data V1 is selected when the effect control circuit 70 sets the effect pattern command C1. The effect pattern command C1 is selected when the main control circuit 50 sets the fluctuation pattern P1, and the reproduction time of the video data V1 is set to the same value “60.0 sec” as the fluctuation display time of the fluctuation pattern P1. Has been.

In the ROM 92 of the sound control circuit 90, a plurality of sound data for decorative design games are recorded. Any one of the production pattern commands C1 to C10 is assigned to each sound data, and when the CPU 91 of the sound control circuit 90 receives the production pattern command from the production control circuit 70, it corresponds to the reception result of the production pattern command. Sound data is detected from the ROM 92, and the sound data detection result is recorded in the RAM 93. In the ROM 102 of the illumination control circuit 100, a plurality of illumination data for decoration symbol games is recorded. Any one of the effect pattern commands C1 to C10 is assigned to each of the illumination data, and when the CPU 101 of the illumination control circuit 100 receives the effect pattern command from the effect control circuit 70, the reception result of the effect pattern command is displayed. The corresponding illumination data is detected from the ROM 102 and the detection result of the illumination data is recorded in the RAM 103.
[4-6-4] Decoration Symbol Game Start Command Processing When the main control circuit 50 transmits a decoration symbol game start command to the effect control circuit 70 in the special symbol variation start processing of FIG. 16, the CPU 71 of the effect control circuit 70 performs command processing. The flag is rewritten from the command waiting process to the decorative symbol game start command process. In a state where this command processing flag is set in the decorative symbol game start command processing, the CPU 71 executes the decorative symbol game start command processing in step S304 in the command processing of FIG.

  FIG. 40 shows details of the decorative symbol game start command processing in step S304 of FIG. 29. The CPU 71 decorates the symbol control circuit 80, the sound control circuit 90, and the illumination control circuit 100 in step S421 of FIG. A symbol game start command is transmitted, and the reception result of the decorative symbol game start command in the RAM 73 is cleared in step S422. Then, the process proceeds to step S423, and command waiting processing is set in the command processing flag. This decorative symbol game start command corresponds to a start command for starting a decorative symbol game, and when the CPU 91 of the sound control circuit 90 receives the decorative symbol game start command, the sound data recorded in the RAM 93 is reproduced, Sound effects corresponding to the sound data are output from both speakers 14. When the CPU 101 of the illumination control circuit 100 receives the decoration symbol game start command, it reproduces the illumination data recorded in the RAM 103 and blinks the plurality of illumination LEDs 17 in a pattern corresponding to the illumination data.

  When the CPU 81 of the symbol control circuit 80 receives the decorative symbol game start command, it transmits a reproduction start command to the VDP 84. Then, the VDP 84 displays a background effect image corresponding to the video data on the decorative design display 32 based on reproducing the decompression result of the video data recorded in the VRAM 86, and superimposes numeric data on the video data. Based on this, the three of the symbol elements in the left column of the decorative symbols, the symbol elements in the middle column, and the symbol elements in the right column are simultaneously displayed in a varying state. The variable display of the symbol elements in each column has a display range of eight symbol elements “1”, “2”, “3”, “4”, “5”, “6”, “7”, and “8” arranged in the vertical direction in the vertical direction. The symbol elements in each column are scrolled so as to move, and “1” → “2” → “3” → “4” → “5” → “6” → “7” while moving from top to bottom. ”→“ 8 ”→“ 1 ”... Cyclically change in the order. In this variable display of decorative symbols, VDP 84 stops in the order of (1) symbol elements in the left column (2) symbol elements in the right column (3) symbol elements in the middle column, and VDP 84 is the symbol in the final middle column. Each of the stop timing of the symbol elements in the left column to the stop timing of the symbol elements in the middle column is set so that the elements are variably stopped within the reproduction time of the video data. Each of the stop display of the symbol elements in the left column, the stop display of the symbol elements in the right column, and the stop display of the symbol elements in the middle column is performed by the VDP 84 according to the setting result of the effect control circuit 70. All three columns are stopped and displayed within the fluctuation display time corresponding to the fluctuation pattern selection result after starting the fluctuation display of the player, and the player usually has one of the big hit, the probable big hit, the small hit, the loss reach, and the complete loss Whether it has occurred is notified by a combination of the decorative symbols in a variable stop state.

  FIG. 41 shows an effect image displayed on the decorative symbol display 32 based on the VDP 84 reproducing the video data V1. In this case, as shown in FIG. 41 (a), a ring image is displayed, and the left row of symbol elements, the middle row of design elements, and the right row of design elements change simultaneously on the ring image. Start. Then, as shown in FIG. 41 (b), the left row of the symbol elements and the right column of the symbol elements are sequentially stopped on the ring image, and reach states in which the same numbers are arranged in the left and right columns. Occurs on the ring image. Then, as shown in FIG. 41 (c), the image of the wrestler R1 and the image of the wrestler R2 are displayed on the ring, respectively, and the wrestler R1 moves to the wrestler R2 as shown in FIG. 41, the reach effect A image is displayed in a reach state. As shown in FIG. 41 (e), the reach effect A image ends when the wrestler R1 defeats the wrestler R2, and the image of FIG. As shown, when the middle row of symbol elements stops varying, the three rows of symbol elements become either a normal jackpot combination or a probability variable jackpot combination. FIG. 41 also shows an effect image displayed on the decorative symbol display 32 based on the reproduction of the video data V5 by the VDP 84. During reproduction of the video data V5, as shown in FIG. When R1 cannot defeat the wrestler R2, the image of reach production A ends, and as shown in FIG. 41 (h), the middle row of design elements stops changing, and the third row of design elements comes off. It becomes a combination.

  FIG. 42 shows an effect image displayed on the decorative symbol display 32 based on the VDP 84 reproducing the video data V9. In this case, as shown in FIG. 42 (a), the ring image is displayed, and the symbol elements in the left column, the middle column, and the right column vary simultaneously on the ring image. Start. Then, as shown in FIG. 42 (b), the symbol elements in the left column and the symbol elements in the right column change and stop in order on the video of the ring, and as shown in FIG. 42 (c), the story-like reach is reached. All the design elements in the middle row are stopped without the effects A to D being displayed, so that the design elements in the third row are completely out of combination.

  When the CPU 71 sets a command waiting process in the command processing flag in step S423 of FIG. 40, the CPU 71 transmits a hold deletion command to the CPU 81 of the symbol control circuit 80 in step S424. This hold erasure command is for instructing to erase one hold picture 201 from the hold display area 33 of the decorative symbol display 32, and the CPU 81 of the symbol control circuit 80 receives the hold erase command from the effect control circuit 70. When received, a hold erase command is transmitted to the VDP 84, and when receiving a hold erase command from the CPU 81, the VDP 84 erases one hold picture 201 from the hold display area 33. That is, in the hold display area 33, the same number of hold patterns 201 as the random counter R1 recorded in the RAM 53 of the main control circuit 50 are displayed.

  When the CPU 71 transmits a hold deletion command in step S424, the CPU 71 clears the estimated data 1 recorded in the estimated data area 1 of the RAM 73 in step S425. The clear process of the estimated data area 1 is executed based on the main control circuit 50 transmitting a decorative symbol game start command. The main control circuit 50 determines whether the normal big hit and the probable big hit based on the random counter R1. A decorative symbol game start command is transmitted after determining each of the small hit, miss reach and complete miss. That is, the estimated data 1 in the estimated data area 1 is cleared after the main control circuit 50 determines each of the normal big hit and the complete miss.

  When the CPU 71 clears the estimated data 1 in step S425, the CPU 71 determines whether or not the estimated data 2 is recorded in the estimated data area 2 of the RAM 73 in step S426. When it is determined that the estimated data 2 is recorded in the estimated data area 2, the process proceeds to step S427, and the estimated data 2 is shifted to the estimated data area 1 as the estimated data 1. That is, the estimated data area 1 acquires the timer T11 of the estimated data area 2 in synchronization with each of the acquisition results of the random counters R1 to R4 being shifted from the reserved data area 2 of the main control circuit 50 to the reserved data area 1. The result will be shifted.

  In step S428, the CPU 71 determines whether or not the estimated data 3 is recorded in the estimated data area 3 of the RAM 73. If it is determined that the estimated data 3 is recorded in the estimated data area 3, the process proceeds to step S429, and the estimated data 3 is shifted to the estimated data area 2 as the estimated data 2. That is, the estimated data area 2 acquires the timer T11 of the estimated data area 3 in synchronization with each of the acquisition results of the random counters R1 to R4 being shifted from the reserved data area 3 of the main control circuit 50 to the reserved data area 2. The result will be shifted.

  In step S430, the CPU 71 determines whether or not the estimated data 4 is recorded in the estimated data area 4 of the RAM 73. When it is determined that the estimated data 4 is recorded in the estimated data area 4, the process proceeds to step S431, and the estimated data 4 is shifted to the estimated data area 3 as the estimated data 3. That is, the estimated data area 3 acquires the timer T11 of the estimated data area 4 in synchronization with each of the acquisition results of the random counters R1 to R4 being shifted from the reserved data area 4 of the main control circuit 50 to the reserved data area 3. The result will be shifted.

  In step S432, the CPU 71 compares the setting result of the counter N11 with “4”. If “N11 = 4” is determined here, the process proceeds to step S433, and the continuous notice command 4 is transmitted to the CPU 81 of the symbol control circuit 80. Then, the process proceeds to step S434, and “1” is subtracted from the setting result of the counter N11. This continuous notice command 4 instructs to give a notice in the present decorative symbol game that the decorative symbol will be one of a combination of a normal jackpot and a promiscuous jackpot in successive decorative symbol games. When the CPU 81 of the control circuit 80 receives the continuous notice command 4 from the effect control circuit 70, it transmits the continuous notice command 4 to the VDP 84. Then, the VDP 84 detects the continuous notice data 4 corresponding to the continuous notice command 4 from the VROM 85 and displays an image corresponding to the continuous notice data 4 on the decorative symbol display 32 at a predetermined timing. FIG. 43A shows an image in which the continuous notice data 4 is displayed in this decorative symbol game. This continuous notice data 4 displays an image in which the design 214 of the spectator rises, and is displayed immediately after the three elements of the left row of the symbol elements, the middle row of the symbol elements, and the right row of the symbol elements start to change simultaneously. The

  When CPU 71 determines in step S432 in FIG. 40 that “N11 = 4” is not true, it compares the setting result of counter N11 with “3” in step S435. When “N11 = 3” is determined here, the process proceeds to step S436, and the continuous notice command 3 is transmitted to the CPU 81 of the symbol control circuit 80. Then, the process proceeds to step S437, and “1” is subtracted from the setting result of the counter N11. This continuous notice command 3 is for instructing to give a notice in the present decorative symbol game that the decorative symbol will be either a combination of a normal jackpot or a combination of a probabilistic jackpot in successive decorative symbol games. When the CPU 81 of 80 receives the continuous notice command 3 from the effect control circuit 70, it transmits the continuous notice command 3 to the VDP 84. Then, the VDP 84 detects the continuous notice data 3 corresponding to the continuous notice command 3 from the VROM 85 and displays an image corresponding to the continuous notice data 3 on the decorative symbol display 32 at a predetermined timing. FIG. 43 (b) shows an image in which the continuous notice data 3 is displayed in this decorative symbol game. This continuous notice data 3 displays an image in which both the spectator pattern 214 and the spectator pattern 213 rise, and the left row, the middle row, and the right row of design elements are simultaneously displayed. Displayed immediately after starting to fluctuate.

  If the CPU 71 determines in step S435 in FIG. 40 that “N11 = 3” is not satisfied, the CPU 71 compares the setting result of the counter N11 with “2” in step S438. If “N11 = 2” is determined here, the process proceeds to step S439, and the continuous notice command 2 is transmitted to the CPU 81 of the symbol control circuit 80. Then, the process proceeds to step S440, and “1” is subtracted from the setting result of the counter N11. This continuous notice command 2 instructs to give a notice in the present decorative symbol game that the decorative symbol will be either a normal jackpot combination or a promiscuous jackpot combination in the next decorative symbol game. When the CPU 81 of 80 receives the continuous notice command 2 from the effect control circuit 70, it transmits the continuous notice command 2 to the VDP 84. Then, the VDP 84 detects the continuous notice data 2 corresponding to the continuous notice command 2 from the VROM 85 and displays an image corresponding to the continuous notice data 2 on the decorative symbol display 32 at a predetermined timing. FIG. 43 (c) shows an image in which the continuous notice data 2 is displayed in the present decorative symbol game. This continuous notice data 2 displays a video in which three of a spectator pattern 214, a spectator pattern 213, and a spectator pattern 212 stand up, and the left column, the middle column, and the right column. Displayed immediately after the three elements start to change at the same time.

When CPU 71 determines in step S438 in FIG. 40 that “N11 = 2” is not satisfied, it compares the setting result of counter N11 with “1” in step S441. If “N11 = 1” is determined here, the process proceeds to step S442, and the continuous notice command 1 is transmitted to the CPU 81 of the symbol control circuit 80. Then, the process proceeds to step S443, and “1” is subtracted from the setting result of the counter N11. This continuous notice command 1 instructs to give a notice in this decorative symbol game that the decorative symbol will be either a normal jackpot combination or a probable big hit combination in this decorative symbol game. When the CPU 81 of 80 receives the continuous notice command 1 from the effect control circuit 70, it transmits the continuous notice command 1 to the VDP 84. Then, the VDP 84 detects the continuous notice data 1 corresponding to the continuous notice command 1 from the VROM 85 and displays an image corresponding to the continuous notice data 1 on the decorative symbol display 32 at a predetermined timing. (D) of FIG. 43 shows the image | video on which the continuous notice data 1 was displayed by this decoration symbol game. This continuous notice data 1 is a display of images in which the four of the spectator design 214, the spectator design 213, the spectator design 212, and the spectator design 211 rise at the same time. It is displayed immediately after the three elements of the element and the symbol element in the right column start to change at the same time.
[4-6-5] Decoration Symbol Game Stop Command Processing When the main control circuit 50 transmits a decoration symbol game stop command to the effect control circuit 70 in the special symbol fluctuation stop processing of FIG. 17, the CPU 71 of the effect control circuit 70 performs command processing. The flag is rewritten from the command waiting process to the decorative symbol game stop command process. In a state where this command processing flag is set in the decorative symbol game stop command processing, the CPU 71 executes the decorative symbol game stop command processing in step S305 in the command processing of FIG.

  FIG. 44 shows details of the decorative symbol game stop command process in step S305 of FIG. 29. The CPU 71 decorates the symbol control circuit 80, the sound control circuit 90, and the electrical decoration control circuit 100 in step S451 of FIG. A symbol game stop command is transmitted, and the reception result of the decorative symbol game stop command recorded in the RAM 73 is cleared in step S452. Then, the process proceeds to step S453, and the command processing flag is set to command waiting processing.

The decorative symbol game stop command corresponds to an end command for instructing the stop of the decorative symbol game. When the CPU 81 of the symbol control circuit 80 receives the decorative symbol game stop command from the effect control circuit 70, the playback stop command is sent to the VDP 84. And the VDP 84 stops the reproduction process of the video data for the decorative symbol game based on the reception of the reproduction stop command. When the CPU 91 of the sound control circuit 90 receives the decoration symbol game stop command from the effect control circuit 70, the CPU 101 of the decoration control circuit 100 stops the reproduction processing of the sound data for the decoration symbol game. When the decoration symbol game stop command is received, the reproduction process of the decoration data for the decoration symbol game is stopped.
[4-6-6] Jackpot Game Start Command Processing When the main control circuit 50 transmits a jackpot game start command to the effect control circuit 70 in the wait process of FIG. 18, the CPU 71 of the effect control circuit 70 sets the command processing flag to a command waiting process. To jackpot game start command processing. In a state where this command processing flag is set to the jackpot game start command process, the CPU 71 executes the jackpot game start command process of step S306 in the command process of FIG.

  FIG. 45 shows the details of the jackpot game start command process in step S306 of FIG. 29. The CPU 71 receives the jackpot game in each of the symbol control circuit 80, the sound control circuit 90, and the illumination control circuit 100 in step S461 of FIG. Send a start command. In step S462, the reception result of the big hit game start command recorded in the RAM 73 is cleared, and in step S463, the command processing flag is set to the command waiting process.

The jackpot game start command is for instructing to start the effect of decorating the jackpot game. When the jackpot game start command is received, the CPU 81 of the symbol control circuit 80 reproduces video data for the jackpot game on the VDP 4. The VDP 84 displays the jackpot game effect video on the decorative symbol display 32 based on the reproduction of the video data for the jackpot game. When the CPU 91 of the sound control circuit 90 receives the jackpot game start command, it selects the jackpot game sound data from the ROM 92 and reproduces the jackpot game sound data from both speakers 14 based on the sound data for the jackpot game. Is output. When the CPU 101 of the lighting control circuit 100 receives the jackpot game start command, it selects the jackpot game lighting data from the ROM 102, and plays back the jackpot gaming lighting data to hit the plurality of lighting LEDs 17. Flashes with a game lighting pattern.
[4-6-7] Jackpot Game Stop Command Processing When the main control circuit 50 transmits a jackpot game stop command to the effect control circuit 70 in the jackpot game process of FIG. 19, the CPU 71 of the effect control circuit 70 waits for a command processing flag. Rewrite from processing to jackpot game stop command processing. In a state where this command processing flag is set to the jackpot game stop command process, the CPU 71 executes the jackpot game stop command process of step S307 in the command process of FIG. FIG. 46 shows the details of the big hit game stop command process in step S307 of FIG. 29. Send a stop command. In step S472, the reception result of the big hit game stop command recorded in the RAM 73 is cleared, and in step S473, the command processing flag is set to command waiting processing.

When the CPU 81 of the symbol control circuit 80 receives the jackpot game stop command, it instructs the VDP 84 to stop playing the video data for jackpot game, and the VDP 84 plays the video data for jackpot game based on the command to stop playing. Stop processing. When the CPU 91 of the sound control circuit 90 receives the jackpot game stop command, the CPU 91 of the jackpot game stops the reproduction processing of the sound data for the jackpot game, and when the jackpot game stop command is received, the CPU 101 of the jackpot game stops. Stop the data playback process.
[4-6-8] Small hit game start command processing When the main control circuit 50 transmits a small hit game start command to the effect control circuit 70 in the wait process of FIG. 18, the CPU 71 of the effect control circuit 70 sets the command processing flag as a command. The waiting process is rewritten to the small hit game start command process. In a state where this command processing flag is set to the small hit game start command process, the CPU 71 executes the small hit game start command process of step S308 in the command process of FIG.

  FIG. 47 shows details of the small hit game start command processing in step S308 of FIG. 29, and the CPU 71 performs small processing for each of the symbol control circuit 80, the sound control circuit 90, and the illumination control circuit 100 in step S481 of FIG. A hit game start command is transmitted. In step S482, the reception result of the small hit game start command recorded in the RAM 73 is cleared, and in step S483, the command processing flag is set to command waiting processing.

The small hit game start command is for instructing to start an effect for decorating the small hit game, and when the CPU 81 of the symbol control circuit 80 receives the small hit game start command, the video data for the small hit game is stored in the VDP 84. Reproduction is instructed, and the VDP 84 displays an effect video for the small hit game on the decorative symbol display 32 based on reproducing the video data for the small hit game. When the CPU 91 of the sound control circuit 90 receives the small hit game start command, it selects the small hit game sound data from the ROM 92 and reproduces the small hit game sound data from both speakers 14 based on the reproduction of the small hit game sound data. Output sound effects. When the CPU 101 of the lighting control circuit 100 receives a small hit game start command, the CPU 101 selects the small hit game lighting data from the ROM 102 and reproduces the small hit game lighting data. The LED 17 is blinked with a small hitting game lighting pattern.
[4-6-9] Small hit game stop command processing When the main control circuit 50 transmits a small hit game stop command to the effect control circuit 70 in the small hit game processing of FIG. 20, the CPU 71 of the effect control circuit 70 sets the command processing flag. Is changed from the command waiting process to the small hit game stop command process. In a state where this command processing flag is set in the small hit game stop command process, the CPU 71 executes the small hit game stop command process in step S309 in the command process of FIG. FIG. 48 shows details of the small hit game stop command processing in step S309 of FIG. 29. The CPU 71 performs small processing in each of the symbol control circuit 80, the sound control circuit 90, and the illumination control circuit 100 in step S491 of FIG. A hit game stop command is transmitted. In step S492, the reception result of the small hit game stop command recorded in the RAM 73 is cleared, and in step S493, the command processing flag is set to the command waiting process.

  When the CPU 81 of the symbol control circuit 80 receives the small hit game stop command, it instructs the VDP 84 to stop the reproduction of the video data for the small hit game, and the VDP 84 uses the video for the small hit game to stop the playback. Stop the data playback process. The CPU 91 of the sound control circuit 90 stops the reproduction processing of the sound data for the small hit game when the small hit game stop command is received, and the CPU 101 of the electrical control circuit 100 stops the small hit game when the small hit game stop command is received. Stop the process of replaying the illumination data.

According to the said Example 1, there exists the following effect.
The second big hit is in the normal mode based on the recording result of the estimated data area 1 when the effect control circuit 70 determines the big hit for the second time and the recorded result of the estimated data area 1 when the big hit is determined for the first time. The main control circuit 50 processes the record result of the estimated data area 2 when the big hit is determined for the second time based on the estimated result of the big hit value. The reserved data area of the main control circuit 50 is processed by estimating the recorded result of the reserved data area 2 and processing the recorded result of the estimated data area 3 when the jackpot is determined for the second time based on the estimated result of the jackpot value. 3 is processed, and the recording result of the estimated data area 4 when the big hit is determined for the second time is processed based on the estimated result of the big hit value. The record result of the hold data area 4 of the circuit 50 is estimated, and it is estimated that any of the record result of the hold data area 2 to the record result of the hold data area 4 includes a new random counter R1 that is a big hit. In some cases, a notice effect is generated. For this reason, when the start timing of the decorative symbol game arrives, the notice effect can be generated while protecting the process of determining the big hit based on the recording result of the random counter R1. Moreover, the estimation result of the effect control circuit 70 always includes an error. For this reason, it will naturally occur that the decorative symbol does not become a normal jackpot combination or a promiscuous jackpot combination despite the occurrence of the notice effect. There is no need to perform processing.

  When the big hit value estimation process is completed, the setting result of counter No. 2 is set to counter No. 1, and when the big hit is newly determined in the normal mode, the detection result of the estimated data 1 in the estimated data area 1 is set to the counter No. 2. For this reason, since the difference between the counter No2 and the counter No1 is always kept to the shortest value, even when the update processing of the random counter R1 and the update processing of the timer T11 are temporally shifted from each other, The time gap is minimized. Therefore, since the accuracy of estimating the big hit value is increased, the accuracy of estimating whether or not any of the reserved data areas 1 to 4 newly includes a big hit is improved.

  In the first embodiment, the setting result of the counter No. 2 is cleared instead of shifting the setting result of the counter No. 2 to the counter No. 1 in step S376 of FIG. 33, and when the big hit is newly determined in the normal mode, the estimated data It is good also as a structure which sets the detection result of the estimation data 1 of the area 1 to the counter No2.

  FIG. 49 shows details of the jackpot value estimation process executed by the CPU 71 of the effect control circuit 70 in place of the jackpot value estimation process of FIG. 33. The CPU 71 performs a step when the jackpot estimation flag is turned on in step S375 of FIG. The process proceeds to the timer correction process in S378. FIG. 50 shows details of the timer correction processing in step S378. The CPU 71 sets the lower limit “130−α” and the upper limit that are pre-recorded in the ROM 72 as the calculation result of the big hit value estimation data ΔR1 in step S501 of FIG. Compare with each of “130 + α”. When it is determined that “130−α ≦ ΔR1 ≦ 130 + α”, the process proceeds to step S502, and the timer is obtained by subtracting the reference value “130” recorded in advance in the ROM 72 from the calculation result of the jackpot value estimation data ΔR1. The correction value ΔH is calculated.

  When the CPU 71 determines in step S501 that “130−α ≦ ΔR1 ≦ 130 + α” is not satisfied, in step S503, the calculation result of the big hit value estimated data ΔR1 is stored in advance in the ROM 72 as the lower limit “306−α” and the upper limit “ 306 + α ”. When it is determined that “306−α ≦ ΔR1 ≦ 306 + α”, the process proceeds to step S504, and the timer is obtained by subtracting the reference value “306” recorded in advance in the ROM 72 from the calculation result of the jackpot value estimation data ΔR1. The correction value ΔH is calculated.

  If the CPU 71 determines that “306−α ≦ ΔR1 ≦ 306 + α” is not satisfied in step S503, the calculation result of the big hit value estimated data ΔR1 is stored in advance in the ROM 72 in step S505, and the upper limit value “436-α” and the upper limit value “ 436 + α ”. If it is determined that “436−α ≦ ΔR1 ≦ 436 + α”, the process proceeds to step S506, and the timer is obtained by subtracting the reference value “436” recorded in advance in the ROM 72 from the calculation result of the jackpot value estimation data ΔR1. The correction value ΔH is calculated.

  When the CPU 71 determines in step S505 that “436−α ≦ ΔR1 ≦ 436 + α” is not satisfied, in step S507, the calculation result of the big hit value estimated data ΔR1 is stored in advance in the ROM 72 as the lower limit value “756-α” and the upper limit value “ 756 + α ”. If it is determined that “756−α ≦ ΔR1 ≦ 756 + α”, the process proceeds to step S508, and the timer is obtained by subtracting the reference value “756” recorded in advance in the ROM 72 from the calculation result of the big hit value estimated data ΔR1. The correction value ΔH is calculated.

  If the CPU 71 determines that “756−α ≦ ΔR1 ≦ 756 + α” is not satisfied in step S507, the lower limit “886−α” and the upper limit “ 886 + α ". If it is determined that “886−α ≦ ΔR1 ≦ 886 + α”, the process proceeds to step S510, and the timer is obtained by subtracting the reference value “886” recorded in advance in the ROM 72 from the calculation result of the jackpot value estimation data ΔR1. The correction value ΔH is calculated. If it is determined in step S509 that “886−α ≦ ΔR1 ≦ 886 + α” is not established, the process proceeds to step S511, and the reference value “1062” recorded in advance in the ROM 72 is subtracted from the calculation result of the big hit value estimation data ΔR1. Thus, the timer correction value ΔH is calculated.

  When the CPU 71 calculates the timer correction value ΔH in any one of step S502, step S504, step S506, step S508, step S510, and step S511, the calculation value of the timer correction value ΔH is recorded in advance in the ROM 72 in step S512. Compare with "0". When it is determined that “ΔH = 0” is not satisfied, the process proceeds to step S513, and the correction time ΔHt is based on multiplying the calculation result of the timer correction value ΔH by the update time ΔT (4 msec) recorded in advance in the ROM 72. Is calculated. The update time ΔT corresponds to a unit time for the main control circuit 50 to update the random counter R1, and when the CPU 71 calculates the correction time ΔTt in step S513, the CPU 71 proceeds to step S514 and corrects the measurement result of the timer T11. The timer T11 is corrected based on adding the calculation result of the time ΔHt.

According to the said Example 2, there exist the following effects.
The timer correction value ΔH is calculated based on comparing the calculation result of the big hit value estimation data ΔR1 with the setting result of the interval from the big hit value for the normal mode to another big hit value for the normal mode, and the timer T11 is corrected by the timer. Since the correction is made based on the calculation result of the value ΔH, the deviation between the update process of the timer T11 and the update process of the random counter R1 is corrected. For this reason, since the estimation accuracy of the big hit value is increased, the estimation accuracy of whether or not any of the reserved data areas 1 to 4 newly includes a big hit is improved.

  In each of the first to second embodiments, the main control circuit 50 updates the random counter R1 by the unit value “1” and the presentation control circuit 70 updates the timer T11 by the unit value “1”. The intervals may be different.

  The CPU 71 of the effect control circuit 70 adds a predetermined value ΔT (for example, 1) predetermined in the ROM 72 to the timer T11 in step S231 in FIG. That is, the timer T11 is updated by the same value at the same update time (4 msec) as the random counter R1, and each of the estimated data area 1 to the estimated data area 4 has the same update time as the random counter R1. The timer T11 updated by the value is recorded as the guess data.

  The ROM 72 of the effect control circuit 70 records a time difference “760−ΔTg (for example, 2)” as the lower limit value Tmin11, a time difference “1066−ΔTg” as the lower limit value Tmin12, and a time difference “630−ΔTg” as the lower limit value Tmin13. Is recorded, the time difference “760 + ΔTg” is recorded as the upper limit value Tmax11, the time difference “1066 + ΔTg” is recorded as the upper limit value Tmax12, and the time difference “630 + ΔTg” is recorded as the upper limit value Tmax13. 1, the calculation result of the time difference data 1 is compared with each of the new lower limit values Tmin11 to Tmin13 and the new upper limit values Tmax11 to Tmax13, and the calculation result of the time difference data 2 is compared with the new lower limit values Tmin11 to Tmin13 and the new upper limit value Tma. Compared to the respective 11～Tmax13, comparing the calculation result of the time difference data 3 with each new lower limit Tmin11~Tmin13 and a new upper limit Tmax11～Tmax13.

  FIG. 51 shows details of the jackpot value estimation process executed by the CPU 71 in place of the jackpot value estimation process of FIG. 33. The CPU 71 does not divide the calculation result of the time interval data ΔNt by the update time ΔT in step S367. The interval value data ΔNo is set as it is.

  In the ROM 72 of the effect control circuit 70, the determination reference value data of FIG. 52 is recorded in advance instead of the determination reference value data of FIG. The determination reference value data sets determination data for estimating whether or not any of the reserved data areas 2 to 4 of the main control circuit 50 includes a big hit according to the estimation result of the big hit value. For this reason, the judgment value “1192”, the judgment reference value 2 “306”, and the judgment reference value 3 “1062” are assigned to the estimation result “7” of the jackpot value, and the estimation result “313” of the jackpot value is assigned. ”Is assigned a judgment reference value 1“ 886 ”, a judgment reference value 2“ 1192 ”, and a judgment reference value 3“ 756 ”, and the jackpot value estimation result“ 313 ”is judged as a judgment reference value 1“ 130 ”. The value 2 “436” and the determination reference value 3 “1192” are assigned.

  When the CPU 71 proceeds to step S386 in FIG. 35, it selects the determination reference value 1, the determination reference value 2, and the determination reference value 3 according to the estimation result of the big hit value from the determination reference value data in FIG. For example, when the estimation result of the jackpot value is “313”, “886” is selected as the determination reference value 1, “1192” is selected as the determination reference value 2, and “756” is selected as the determination reference value 3.

  When CPU 71 selects each of determination reference value 1 to determination reference value 3 in step S386 of FIG. 35, CPU 71 calculates lower limit value Tmin21, lower limit value Tmin22, and lower limit value Tmin23 in step S387. The lower limit value Tmin21 is set by subtracting the error ΔTg from the selection result of the determination reference value 1, and the lower limit value Tmin22 is set by subtracting the error ΔTg from the selection result of the determination reference value 2. Yes, the lower limit value Tmin23 is set by subtracting the error ΔTg from the selection result of the determination reference value 3. Each of these errors ΔTg is recorded in advance in the ROM 72 of the effect control circuit 70 and is specifically set to “2”.

  When the CPU 71 calculates each of the lower limit values Tmin21 to Tmin23 in step S387 of FIG. 35, the upper limit value Tmax21 is calculated by adding the error ΔTg to the selection result of the determination reference value 1 in step S388, and the selection of the determination reference value 2 is performed. The upper limit value Tmax22 is calculated by adding the error ΔTg to the result, and the upper limit value Tmax23 is calculated by adding the error ΔTg to the selection result of the determination reference value 3. Then, the calculation result of the time difference data 1 is compared with each of the new lower limit values Tmin21 to Tmin23 and the new upper limit values Tmax21 to Tmax23, and the calculation result of the time difference data 2 is compared with the new lower limit values Tmin21 to Tmin23 and the new upper limit value Tmax21. The time difference data 3 is compared with each of new lower limit values Tmin21 to Tmin23 and new upper limit values Tmax21 to Tmax23.

  FIG. 53 shows the details of the winning command process executed by the CPU 71 of the effect control circuit 70 in place of the winning command process of FIG. In the winning command process of FIG. 53, the jackpot estimation process 1 is abolished, and the jackpot estimation process 3 in step S334 is newly set.

  FIG. 54 shows details of the jackpot value estimation process executed by the CPU 71 in step S330 of FIG. 53, and the CPU 71 determines the setting state of the jackpot estimation flag in step S521 of FIG. The big hit estimation flag is turned on in step S375 based on the CPU 71 completing the big hit value estimation process in step S373. When the CPU 71 has not finished the big hit value estimation process, the big hit estimation flag is turned off in step S521. And the process proceeds to step S360.

  When proceeding to step S360, the CPU 71 determines the setting state of the counter flag. For example, when the first big hit is determined in the normal mode, the measurement result of the timer T11 is not set in the counter No1. In this case, the CPU 71 determines that the counter flag is turned off in step S360, and detects the recording result of the estimated data 1 (measurement result of the timer T11) from the estimated data area 1 of the RAM 73 in step S361. In step S362, the detection result of the estimated data 1 is set in the counter No1. In step S363, the counter flag is turned on. This timer T11 updates the unit value “1” recorded in advance in the ROM 72 every time the CPU 71 executes step S231 of the hold command processing of FIG. 26. The CPU 71 sets the lower limit recorded in the ROM 72 in advance to the timer T11. After adding the value “0” to the upper limit value “1191” recorded in advance in the ROM 72, the value is returned to “0” and added cyclically. That is, the timer T11 is added to the same upper limit value “1191” from the same lower limit value “0” at the same time interval “4 msec” as the big hit determination random counter R1, and then returned to the same lower limit value “0”. Are added cyclically.

  When the second big hit is determined in the normal mode, the CPU 71 determines that the counter flag is turned on in step S360 of FIG. 54, and detects the recording result of the estimated data 1 from the estimated data area 1 of the RAM 73 in step S364. To do. In step S365, the detection result of the estimated data 1 is set in the counter No2. In step S522, the interval from the setting result of the counter No1 to the setting result of the counter No2 is set in the big hit value estimated data ΔR1. For example, when “No2 ≧ No1”, “No2-No1” is calculated, and the calculation result of “No2-No1” is set as the big hit value estimation data ΔR1 as an interval. When “No2 <No1”, “1192-No1 + No2” is calculated, and the calculation result of “1192-No1 + No2” is set as the interval in the jackpot value estimation data ΔR1.

  When the big hit value estimated data ΔR1 is set in step S522 of FIG. 54, the CPU 71 compares the set result of the big hit value estimated data ΔR1 with the lower limit value “0−α” and the upper limit value “0 + α” in step S371. Here, when it is determined that “0−α ≦ ΔR1 ≦ 0 + α” is not established, the process proceeds to step S372, and the setting results of the big hit value estimation data ΔR1 are set to the reference ranges “130−α to 130 + α” and “306−α” in FIG. To 306 + α, 436-α to 436 + α, 756-α to 756 + α, 886-α to 886 + α, and 1066-2α to 1062 + α. If it is determined that the setting result of the big hit value estimation data ΔR1 does not belong to any of the reference ranges “130−α to 130 + α” to “1062−α to 1062 + α”, the big hit value estimation flag is set in step S377 of FIG. In step S376, the setting result of the counter No2 is set to the counter No1.

  When the CPU 71 determines in step S372 in FIG. 54 that the setting result of the big hit value estimation data ΔR1 belongs to any of the reference ranges “130−α to 130 + α” to “1062−α to 1062 + α”, the reference is determined in step S373. The jackpot value assigned to the jackpot value estimation data ΔR1 to which the jackpot value estimation data ΔR1 belongs in the range “130−α to 130 + α” to “1062-α to 1062 + α” is the jackpot value when the jackpot value is determined this time in the normal mode. Infer. In step S374, the estimation result of the big hit value is recorded in the RAM 73. In step S375, the big hit estimation flag is turned on, and the process proceeds to the timer correction process in step S523.

  FIG. 55 shows details of the timer correction process in step S523 of FIG. 54. The CPU 71 sets the big hit value estimated data ΔR1 in step S501 of FIG. 55 as the lower limit “130−α” and the upper limit “130 + α”. In step S503, the setting result of the jackpot value estimation data ΔR1 is compared with each of the lower limit value “306-α” and the upper limit value “306 + α”, and in step S505, the setting result of the jackpot value estimation data ΔR1 is compared with the lower limit value. Each of the value “436-α” and the upper limit value “436 + α” is compared. In step S507, the setting result of the big hit value estimated data ΔR1 is compared with each of the lower limit value “756-α” and the upper limit value “756 + α”. In S509, the setting result of the big hit value estimation data ΔR1 is changed to the values of the lower limit value “886-α” and the upper limit value “886 + α”. Compared with, respectively.

  When the CPU 71 determines in step S501 that “130−α ≦ ΔR1 ≦ 130 + α”, the big hit value “7” recorded in advance in the ROM 72 is set in the timer T11 in step S515, and “306−α ≦” in step S503. When it is determined that “ΔR1 ≦ 306 + α”, the big hit value “313” recorded in advance in the ROM 72 is set in the timer T11 in step S516, and in step S505, it is determined that “436−α ≦ ΔR1 ≦ 436 + α”. Sometimes the big hit value “313” is set in the timer T11 in step S517, and when it is determined that “756−α ≦ ΔR1 ≦ 756 + α” in step S507, the big hit value “1069” recorded in advance in the ROM 72 in step S518. Set to timer T11, and in step S509 If it is determined that “886−α ≦ ΔR1 ≦ 886 + α”, the big hit value “7” is set in the timer T11 in step S519, and if it is determined in step S509 that “886−α ≦ ΔR1 ≦ 886 + α” is not satisfied, step S519 is performed. In S520, the big hit value “1069” is set in the timer T11. That is, when the big hit is determined for the second time in the normal mode, the big hit value “7”, “313” and “1069” corresponding to the big hit value estimation result is set in the timer T11, and the big hit estimation timer T11 is corrected so as to measure the same value as the big hit determination random counter R1.

  FIG. 56 shows details of the jackpot estimation process 2 in step S331 of FIG. 53. When the CPU 71 records the jackpot value estimation result in the RAM 73 in the jackpot value estimation process, it determines in step S531 that the jackpot estimation flag is on. The process proceeds to step S532. If it is determined that the estimated data 2 is recorded in the estimated data area 2 of the RAM 73, the process proceeds to step S533, and the time difference data 1 is calculated. The time difference data 1 corresponds to an interval from the estimated data 1 to the estimated data 2, and the CPU 71 calculates “estimated data 2−estimated data 1” when “estimated data 2> estimated data 1”. Thus, the time difference data 1 is set. When “estimated data 2 ≦ estimated data 1”, the time difference data 1 is set by calculating “1192−estimated data 1 + estimated data 2”.

  When the CPU 71 calculates the time difference data 1 in step S533 in FIG. 56, the CPU 71 detects the estimation result of the big hit value from the RAM 73 in step S534. Then, the process proceeds to step S535, and each of determination reference value 1, determination reference value 2, and determination reference value 3 corresponding to the estimation result of the jackpot value is selected from the determination reference value data of FIG.

  When CPU 71 selects each of determination reference value 1 to determination reference value 3 in step S535 of FIG. 56, CPU 71 calculates lower limit value Tmin21, lower limit value Tmin22, and lower limit value Tmin23 in step S536. The lower limit value Tmin21 is set by subtracting the error ΔTg from the selection result of the determination reference value 1, and the lower limit value Tmin22 is set by subtracting the error ΔTg from the selection result of the determination reference value 2. Yes, the lower limit value Tmin23 is set by subtracting the error ΔTg from the selection result of the determination reference value 3. Each of these errors ΔTg is recorded in advance in the ROM 72 of the effect control circuit 70 and is specifically set to “2”.

  When CPU 71 calculates each of lower limit value Tmin21 to lower limit value Tmin23 in step S536 in FIG. 56, CPU 71 calculates upper limit value Tmax21, upper limit value Tmax22, and upper limit value Tmax23 in step S537. The upper limit value Tmax21 is set by adding the error ΔTg to the selection result of the determination reference value 1, and the upper limit value Tmax22 is set by adding the error ΔTg to the selection result of the determination reference value 2. Yes, the upper limit value Tmax23 is set by adding the error ΔTg to the selection result of the determination reference value 3. Each of these errors ΔTg is recorded in advance in the ROM 72 of the effect control circuit 70 and is specifically set to “2”.

  When the CPU 71 calculates each of the upper limit value Tmax21 to the upper limit value Tmax23 in step S537 of FIG. 56, in step S538, the CPU 71 compares the calculation result of the time difference data 1 with the calculation result of the lower limit value Tmin21 and the calculation result of the upper limit value Tmax21. In step S539, the calculation result of the time difference data 1 is compared with the calculation result of the lower limit value Tmin22 and the calculation result of the upper limit value Tmax22. In step S540, the calculation result of the time difference data 1 is compared with the calculation result of the lower limit value Tmin23 and the upper limit value Tmax23. Compare with each result. Here, when any one of “Tmin21 ≦ time difference data 1 ≦ Tmax21”, “Tmin22 ≦ time difference data 1 ≦ Tmax22” and “Tmin23 ≦ time difference data 1 ≦ Tmax23” is determined, the process proceeds to step S541 and the counter N11 counts the number of consecutive notices. Set “2”.

  When the CPU 71 determines that none of “Tmin21 ≦ time difference data 1 ≦ Tmax21”, “Tmin22 ≦ time difference data 1 ≦ Tmax22”, and “Tmin23 ≦ time difference data 1 ≦ Tmax23”, the CPU 71 stores the estimated data area 3 in the RAM 73 in step S542. It is determined whether or not the estimated data 3 is recorded. When it is determined that the estimated data 3 is recorded in the estimated data area 3, the process proceeds to step S543, and the time difference data 2 is calculated. The time difference data 2 corresponds to an interval from the estimated data 1 to the estimated data 3, and the CPU 71 calculates “estimated data 3−estimated data 1” when “estimated data 3> estimated data 1”. Thus, the time difference data 2 is set. When “estimated data 3 ≦ estimated data 1”, the time difference data 2 is set by calculating “1192−estimated data 1 + estimated data 3”.

  When calculating the time difference data 2 in step S543, the CPU 71 compares the calculation result of the time difference data 2 with the calculation result of the lower limit value Tmin21 and the calculation result of the upper limit value Tmax21 in step S544, and the calculation result of the time difference data 2 in step S545. Are compared with the calculation result of the lower limit value Tmin22 and the calculation result of the upper limit value Tmax22, and the calculation result of the time difference data 2 is compared with the calculation result of the lower limit value Tmin23 and the calculation result of the upper limit value Tmax23 in step S546. Here, when any one of “Tmin21 ≦ time difference data 2 ≦ Tmax21”, “Tmin22 ≦ time difference data 2 ≦ Tmax22”, and “Tmin23 ≦ time difference data 2 ≦ Tmax23” is determined, the process proceeds to step S547, and the continuous notice “ 3 ”is set.

  When the CPU 71 determines that none of “Tmin21 ≦ time difference data 2 ≦ Tmax21”, “Tmin22 ≦ time difference data 2 ≦ Tmax22”, and “Tmin23 ≦ time difference data 2 ≦ Tmax23”, the CPU 71 stores the estimated data area 4 in the RAM 73 in step S548. It is determined whether or not the estimated data 4 is recorded. If it is determined that the estimated data 4 is recorded in the estimated data area 4, the process proceeds to step S549, and the time difference data 3 is calculated. The time difference data 3 corresponds to an interval from the estimated data 1 to the estimated data 4, and the CPU 71 calculates “estimated data 4−estimated data 1” when “estimated data 4> estimated data 1”. Thus, the time difference data 3 is set. When “estimated data 4 ≦ estimated data 1”, the time difference data 3 is set by calculating “1192−estimated data 1 + estimated data 4”.

  When the CPU 71 calculates the time difference data 3 in step S549, the CPU 71 compares the calculation result of the time difference data 3 with the calculation result of the lower limit value Tmin21 and the calculation result of the upper limit value Tmax21 in step S550, and the calculation result of the time difference data 3 in step S551. Are compared with the calculation result of the lower limit value Tmin22 and the calculation result of the upper limit value Tmax22, and the calculation result of the time difference data 3 is compared with the calculation result of the lower limit value Tmin23 and the calculation result of the upper limit value Tmax23 in step S552. Here, when any one of “Tmin21 ≦ time difference data 3 ≦ Tmax21”, “Tmin22 ≦ time difference data 3 ≦ Tmax22” and “Tmin23 ≦ time difference data 3 ≦ Tmax23” is determined, the process proceeds to step S553, and the counter N11 counts the number of continuous notices. Set “4”.

  FIG. 57 shows details of the jackpot estimation process 3 in step S334 of FIG. 53, and the CPU 71 determines the setting state of the jackpot estimation flag in step S561 of FIG. For example, when the timer T11 has been estimated based on the jackpot value estimation result, the CPU 71 determines that the jackpot estimation flag is turned on in step S561, and compares the setting result of the counter N11 with “0” in step S562. To do. If “N11 = 0” is determined here, the process proceeds to step S563, where it is determined whether or not the estimated data is recorded in the estimated data area 2 of the RAM 73.

  When the CPU 71 determines in step S563 that the estimated data 2 is recorded in the estimated data area 2, the CPU 71 detects the recording result of the estimated data 2 from the estimated data area 2. In step S564, the detection result of the estimation data 2 is compared with each of the lower limit value “7−α” and the upper limit value “7 + α”. In step S565, the detection result of the estimation data 2 is compared with the lower limit value “313−α” and the upper limit value. Each of the values “313 + α” is compared, and the detection result of the estimated data 2 is compared with each of the lower limit value “1069−α” and the upper limit value “1069 + α” in step S566. Each of “7”, “313”, and “1069” corresponds to a big hit value for the normal mode, and the CPU 71 determines that “7−α ≦ estimated data 2 ≦ 7 + α” and “313−α ≦ estimated data 2”. When it is determined whether “≦ 313 + α” or “1069−α ≦ estimated data 2 ≦ 1069 + α”, it is determined that the acquisition result of the random counter R1 that is a big hit is recorded in the reserved data area 2 of the main control circuit 50. In this case, the process proceeds to step S567, and it is recorded that two notice effects are continuously generated by setting the number of consecutive notices “2” in the counter N11.

  If the CPU 71 determines that none of “7−α ≦ estimated data 2 ≦ 7 + α”, “313−α ≦ estimated data 2 ≦ 313 + α”, and “1069−α ≦ estimated data 2 ≦ 1069 + α”, the RAM 73 in step S568. It is determined whether or not the estimated data 3 is recorded in the estimated data area 3. For example, when it is determined that the estimated data 3 is recorded in the estimated data area 3, the recording result of the estimated data 3 is detected from the estimated data area 3, and the detection result of the estimated data 3 is set to the lower limit “7−α” in step S569. ”And the upper limit value“ 7 + α ”, and the detection result of the estimated data 3 is compared with each of the lower limit value“ 313-α ”and the upper limit value“ 313 + α ”in step S570, and the estimated data 3 is detected in step S571. The result is compared with each of the lower limit “1069−α” and the upper limit “1069 + α”. Here, when one of “7−α ≦ estimated data 3 ≦ 7 + α”, “313−α ≦ estimated data 3 ≦ 313 + α” and “1069−α ≦ estimated data 3 ≦ 1069 + α” is determined, the main control circuit 50 is suspended. It is determined that the acquisition result of the random counter R1 that is a big hit is recorded in the data area 3. In this case, the process proceeds to step S572, and it is recorded that the preliminary announcement number “3” is set in the counter N11 to continuously generate the preliminary announcement effect three times.

  When the CPU 71 determines that none of “7−α ≦ estimated data 3 ≦ 7 + α”, “313−α ≦ estimated data 3 ≦ 313 + α”, and “1069−α ≦ estimated data 3 ≦ 1069 + α”, the RAM 73 in step S573. It is determined whether or not the estimated data 4 is recorded in the estimated data area 4. For example, when it is determined that the estimated data 4 is recorded in the estimated data area 4, the recording result of the estimated data 4 is detected from the estimated data area 4, and the detected result of the estimated data 4 is set to the lower limit “7−α” in step S574. ”And the upper limit value“ 7 + α ”, the detection result of the estimated data 4 is compared with each of the lower limit value“ 313-α ”and the upper limit value“ 313 + α ”in step S575, and the estimated data 4 is detected in step S576. The result is compared with each of the lower limit “1069−α” and the upper limit “1069 + α”. Here, when one of “7−α ≦ estimated data 4 ≦ 7 + α”, “313−α ≦ estimated data 4 ≦ 313 + α” and “1069−α ≦ estimated data 4 ≦ 1069 + α” is determined, the main control circuit 50 is suspended. It is determined that the acquisition result of the random counter R1 that is a big hit is recorded in the data area 4. In this case, the process proceeds to step S577, and it is recorded that four notice effects are continuously generated by setting the number of consecutive notices “4” in the counter N11. That is, after the big hit value estimation process is performed based on the determination of the two big hits in the normal mode, every time the decorative symbol game is started, the reserved data area 2 to the reserved data area of the main control circuit 50 It is estimated whether or not the acquisition result of the random counter R1 that is a big hit is recorded in any of the four.

According to the said Example 4, there exists the following effect.
The effect control circuit 70 corrects the timer T11 based on the estimation result of the jackpot value, and the timer T11 is cyclically updated in the same pattern as the jackpot determination random counter R1. After the estimation process is completed, the main control circuit 70 records the estimated data 2 regardless of whether a normal big hit command, a probable change big hit command, a small hit command, a miss reach command, or a perfect miss command is transmitted. Based on the recorded result of the estimated data 3, it is possible to infer whether or not the acquisition result of the random counter R1 that is a big hit is recorded in the reserved data area 2, and the random counter R1 that is the big hit in the reserved data area 3 It is possible to infer whether or not the acquisition result is recorded, and based on the recording result of the estimation data 4 Acquisition result of the random counter R1 as a big hit pending data area 4 Te can be estimated whether it is recorded.

  In each of the first to fourth embodiments, the decorative symbol is either a normal jackpot combination or a probable jackpot combination based on the output of the sound effect from the speaker 14 during the decorative symbol game. You may do it.

  In each of the above-described Examples 1 to 4, a notice that the decorative symbol will be either a normal jackpot combination or a probable jackpot combination based on blinking the LED 17 during the decorative symbol game. Also good.

  In each of the first to fourth embodiments, the calculation result of the time difference data 1 is compared with each of the determination reference value 1 to the determination reference value 3 in the jackpot estimation process 2, and the calculation result of the time difference data 2 is determined as the determination reference value It may be compared with each of 1 to determination reference value 3, and the calculation result of time difference data 3 may be compared with each of determination reference value 1 to determination reference value 3. In this case, when the calculation result of the time difference data 1 matches or approximates any one of the determination reference value 1 to the determination reference value 3, the counter N11 is set to “2”, and the calculation result of the time difference data 2 is the determination reference value 1. When the value matches or approximates any one of the determination reference value 3, the counter N11 is set to “3”, and the calculation result of the time difference data 3 matches or approximates any of the determination reference value 1 to the determination reference value 3 Sometimes it is better to set "4" to the counter N11.

  In each of the above-described Examples 1 to 4, when it is estimated that the decorative symbol will be either a normal jackpot combination or a probable jackpot combination in the next decorative symbol game, the decorative symbol in the next decorative symbol game It is also possible to adopt a configuration in which a notice effect is generated before any of the normal jackpot combination and the probability variation jackpot combination.

  In each of the above-mentioned Examples 1 to 4, when it is estimated that the decorative symbols will be either a normal jackpot combination or a probable jackpot combination in the subsequent decorative symbol game, and the next decorative symbol game and the next It is good also as a structure which generates a notice effect by either one or two times of a decoration symbol game and a decoration symbol game of the next time.

  In each of the above-mentioned Examples 1 to 4, when it is estimated that the decorative symbol will be either a normal jackpot combination or a promiscuous jackpot combination in successive decorative symbol games, It may be configured such that the notice effect is generated at any one time, two times, or three times of the next decorative symbol game, the subsequent decorative symbol game, and the successive decorative symbol game.

  In each of the first to fourth embodiments, when a big hit value is estimated by the big hit value estimation process, one judgment value or one judgment range from the big hit value estimation result to one big hit value is obtained. The time difference data detection result is set and compared with one determination value or one determination range to determine whether or not a new big hit is recorded in the reserved data area of the main control circuit 50. May be. For example, when the estimation result of the jackpot value is “7”, one determination range Tmin22 to Tmax22 is set based on one determination reference value 2 from the jackpot value “7” to the jackpot value “313”, and the time difference data Are compared with one determination range Tmin22 to Tmax22.

  In each of the first to fourth embodiments, the effect control circuit 70 determines the criterion value 1 for the jackpot value “7” in FIG. 36 based on the jackpot value “7,313,1069” recorded in the ROM 72 in advance. -3, judgment criterion values 1 to 3 for the jackpot value "313", and judgment criterion values 1 to 3 for the jackpot value "1069" may be calculated.

The figure which shows Example 1 (the perspective view which shows the whole structure of a pachinko game machine) Front view showing game board Block diagram showing electrical configuration A diagram showing a list of special symbols Flow chart showing main processing of main control circuit Diagram showing update range of random counter Flow chart showing input processing of main control circuit Flow chart showing data acquisition processing of main control circuit Diagram showing the pending data area of the main control circuit The flowchart which shows the big hit judgment processing of the main control circuit The flowchart which shows the big hit judgment processing of the main control circuit (A) is a diagram showing a list of jackpot values, (b) is a diagram showing a list of jackpot values Figure showing a list of intervals from jackpot value to jackpot value Flow chart showing variation pattern setting process of main control circuit The figure which shows the control data for selecting the fluctuation pattern Flow chart showing special symbol variation start processing of main control circuit Flow chart showing special symbol fluctuation stop processing of main control circuit Flow chart showing wait processing of main control circuit The flowchart which shows the big hit game processing of the main control circuit Flow chart showing the small hit game processing of the main control circuit Flow chart showing main process of effect control circuit The flowchart which shows the INT interruption processing of the production control circuit The figure which shows the correlation of the command from a main control circuit, and a command processing flag The flowchart which shows the counter update process 1 of an effect control circuit Diagram for explaining the update contents of the random counter Flow chart showing hold command processing of effect control circuit The figure which shows the display contents of the decoration design indicator The figure which shows the guess data area of an effect control circuit Flow chart showing command processing of effect control circuit Flow chart showing winning command processing of effect control circuit The figure which shows the control data for setting the big hit design The flowchart which shows the jackpot estimation process 1 of an effect control circuit Flow chart showing the jackpot value estimation process of the production control circuit Diagram showing correlation between jackpot value estimation data and jackpot value The flowchart which shows the jackpot estimation process 2 of an effect control circuit Diagram showing correlation between jackpot value and criterion value Flow chart showing variation pattern command processing of effect control circuit The figure which shows the control data for selecting a production pattern command The figure which shows the control data for selecting video data Flow chart showing decoration symbol game start command processing of effect control circuit A figure showing an image of a decorative pattern game A figure showing an image of a decorative pattern game Figure showing video of continuous notice Flow chart showing decoration symbol game stop command processing of effect control circuit The flowchart which shows the big hit game start command processing of the production control circuit The flowchart which shows the big hit game stop command processing of the production control circuit The flowchart which shows the small hit game start command processing of the production control circuit The flowchart which shows the small hit game stop command processing of the production control circuit FIG. 33 equivalent diagram showing the second embodiment. Flow chart showing timer correction processing of effect control circuit FIG. 33 equivalent diagram showing the third embodiment. 36 equivalent diagram FIG. 30 equivalent diagram showing the fourth embodiment. 49 equivalent diagram Figure 50 equivalent Fig. 35 equivalent Flow chart showing the jackpot estimation process 3 of the effect control circuit

Explanation of symbols

  18 is a game board, 22 is a game area, 24 is a start port, 32 is a decorative symbol display, 50 is a main control circuit, 70 is an effect control circuit, and 80 is a symbol control circuit.

Claims (2)

A game board having a game area in which a game ball can roll;
A start opening provided in the game board and into which a game ball can enter;
A display provided on the game board, on which an image of a symbol game for displaying the identification symbol in a variable state and a variable stop state in order is displayed;
A variable entrance that is provided on the game board and can be switched between an open state in which a game ball can enter and a closed state in which a game ball cannot enter;
The special prize counter value is updated by a certain value every time a predetermined time elapses, and the special prize counter value is updated from a preset initial value to a preset limit value, and then returned to the initial value in a cyclic manner. Special prize counter updating means for updating,
Command transmission means for transmitting an incoming ball command based on a game ball entering the starting port;
An update result of the special prize counter value is acquired based on the game ball entering the start opening. When the update result of the special prize counter value is acquired, the acquisition result of the special prize counter value is stored in the special prize counter recording means. Special prize counter acquisition means for recording,
An estimation counter updating means for updating an estimation counter value at a constant time interval that is the same or non-identical as the special prize counter updating means;
An update result of the estimated counter value is acquired based on receiving the incoming command from the command transmitting means, and when the updated result of the estimated counter value is acquired, the acquired result of the estimated counter value is recorded in the estimated counter A guess counter acquisition means for recording in the means;
When a special game counter value is recorded from the special prize counter recording means based on the arrival of the start timing of the symbol game, and one special prize counter value is recorded in the special prize counter recording means A special counter detection means for detecting the result of recording the special prize counter value and detecting the oldest acquisition order among the plurality of special prize counter values when a plurality of special prize counter values are recorded in the special prize counter recording means; ,
A plurality of special prize values recorded in advance, and a special prize value recording means in which a plurality of special prize values having different intervals from the special prize value to another special prize value are recorded;
Based on the fact that the prize counter detecting means detects the result of recording the special prize counter value from the special prize counter recording means, the result of detection of the special prize counter value is compared with each of a plurality of special prize values recorded in the special prize value recording means. When the detection result of the special prize counter value is the same as any one of a plurality of special prize values, it is determined that the variable entrance is in a special prize state, and the detection result of the special prize counter value is plural. A special state determination means for determining that the state is not in a special state when it is different from any of the special values;
Special counter counter erasure means for erasing the result of recording of the special prize counter value used for determining whether or not the special prize state is determined when the special prize state determination means determines whether or not the special prize state is present. When,
When it is determined that the special prize state determination means is in the special prize state, a recording result of the estimated counter value is detected from the estimated counter recording means, and one estimated counter value is recorded in the estimated counter recording means. When the estimated counter value is recorded, the first counter data is detected and set as the first counter data, and when a plurality of estimated counter values are recorded in the estimated counter recording means, the acquisition order is selected from the plurality of estimated counter values. First counter data setting means for detecting the oldest and setting it as first counter data;
The award counter erasing unit erases the estimated counter value corresponding to the award counter value to be erased from the award counter recording unit from the estimated counter recording unit, and the first counter data setting unit sets the estimated counter value. A speculative counter erasure unit that performs an erasure process of the estimated counter value after the first counter data setting unit sets the estimated counter value to the first counter data when the first counter data is set;
When the first counter data setting means newly sets the estimated counter value in the first counter data and the special prize state determining means newly determines that the special prize state is in effect, the estimated counter value is recorded from the estimated counter recording means. When one guess counter value is recorded in the guess counter recording means, the record result of the guess counter value is detected and set as second counter data, and the guess counter recording is performed. Second counter data setting means for detecting the oldest acquisition order from the plurality of estimated counter values and setting the second counter data when a plurality of estimated counter values are recorded in the means;
When the second counter data setting means sets the second counter data, the difference between the estimated counter value which is the setting result of the second counter data and the estimated counter value which is the setting result of the first counter data is calculated. Interval data setting means for setting interval data based on the data;
A special prize data value recording means in which a plurality of special prize data values that are the same as each of a plurality of special prize values recorded in the special prize value recording means are recorded;
Interval data recording means for recording a reference value corresponding to an interval from a special prize data value to a special prize data value different from the special prize data value corresponding to each of the plurality of special prize data values or a reference range including the reference value; ,
The interval data setting result is compared with each of a plurality of reference values or a plurality of reference ranges, and the interval data setting result corresponds to one of a plurality of reference values or a plurality of reference ranges. A prize data value selection means for selecting a prize data value corresponding to the reference value or the reference range from a plurality of prize data values recorded in the prize data value recording means,
When the special prize data value selection means selects a special prize data value, a judgment value corresponding to an interval from the selection result of the special prize data value to at least one of the plurality of special prize data values or a judgment range including the judgment value is set. Determination data setting means to perform,
When the special prize data value selection means selects a special prize data value, the time difference data is detected on the condition that a plurality of estimation counter values are recorded in the estimation counter recording means, and the estimation order is the oldest. A time difference data detecting means for detecting one or more time difference data based on a difference between a record result of each remaining estimated counter value excluding a record result of the counter value and a record result of the estimated counter value having the oldest acquisition order; ,
Comparing the detection result of the time difference data with the determination result setting result or the determination range setting result, and including the time difference data detection result corresponding to the determination value setting result or the determination range setting result When it is determined that there is a special prize state estimation means for estimating that the recording result of the special prize counter recording means includes a new special prize state,
A graphic game means for displaying a graphic game image on the display based on the arrival of a graphic game start timing, wherein the determination result of the special prize state determination means is notified to the player by a graphic game image. When,
When the special prize state determining means determines that the special prize state is in effect, the special game means that the special game means informs the player that the special game state is in the special game image and then opens the variable entrance is performed. Special prize game means,
A notifying means for generating a notice effect for notifying that a special prize game is to be performed based on the fact that the special prize state estimating means estimates that the recording result of the special prize counter recording means includes a new special prize state. With
When the second counter data setting unit sets the estimated counter value to the second counter data, the estimated counter erasing unit is configured to detect the estimated counter value after the time difference data detecting unit detects one or more time difference data. A pachinko machine characterized by performing an erasing process. Counter data shift means for setting the second counter data setting result to the first counter data when the special prize data value selecting means selects the special prize data value;
When the second counter data setting means newly determines that the special prize state determination means is in the special prize state after the counter data shift means sets the second counter data setting result to the first counter data. The pachinko gaming machine according to claim 1, wherein a process of setting the detection result of the estimated counter value to the second counter data is performed.

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