JP4821948B2 - Method for measuring spread resistance of SOI layer and SOI chip - Google Patents

Description

  The present invention relates to an SOI layer spreading resistance measuring method that is hardly affected by a buried oxide film layer, and an SOI chip and an SOI substrate suitable for measuring spreading resistance.

  An SOI (Silicon On Insulator) substrate can be formed by adhering a support substrate having a silicon oxide film formed on a surface thereof and a silicon single crystal substrate for an SOI layer, followed by high-temperature heat treatment. After bonding, the silicon oxide film layer on the support substrate surface becomes a buried oxide film layer. By manufacturing a device using an SOI substrate, advantages such as high integration and high speed can be obtained, and a well process can be omitted.

In the clean room where the bonding is performed, the SOI substrate is likely to be contaminated with boron due to boron in the HEPA filter (High Efficiency Particulate Air filter).
In addition, when manufacturing a SOI substrate having a p-type SOI layer, an n-type inversion layer may be formed in the vicinity of the buried oxide film layer in the SOI layer (see Patent Document 1).

The impurity concentration distribution in the depth direction of the silicon single crystal can be measured by using a spreading resistance (SR) measuring method. However, in the case of an SOI substrate, there is a problem that the measured resistance value of the SOI layer becomes very high due to the influence of the buried oxide film layer, and it is difficult to obtain the inherent resistance value.
For these reasons, it is difficult to detect them by SR measurement unless boron contamination or n-type inversion layer formation of the SOI substrate occurs at a high concentration.

JP-A-6-177143

  The present invention has been made in view of the above problems, and is an SOI chip spreading resistance measuring method, an SOI chip and an SOI substrate used for measuring the spreading resistance of the SOI layer, and the influence of the buried oxide film layer is hardly affected. An object of the present invention is to provide an SOI layer spreading resistance measuring method, an SOI chip, and an SOI substrate, which can measure an SOI layer by using the spreading resistance measuring method without receiving.

  The present invention has been made in order to solve the above problems, and as a first method of measuring the spread resistance of the present invention, it is a method for measuring the spread resistance of an SOI layer, which includes a support substrate, an SOI layer, and the support substrate. And cutting out the SOI chip from the SOI substrate having the buried oxide film layer formed between the SOI layer and the SOI layer. The SOI chip and the buried oxide film layer are angle-wrapped at the end of the SOI chip. An angle wrapping process is performed to expose the surface of the SOI chip, and the angle-wrapped SOI chip is treated with hydrofluoric acid, and the buried oxide film layer under the SOI layer exposed in the angle wrapping process is removed by etching. And performing a process to measure a spreading resistance of the SOI layer portion in contact with the support substrate after the buried oxide film layer is removed. Providing spreading resistance measurement method OI layer (claim 1).

  In this way, when an SOI chip is cut out from an SOI substrate, an angle wrap is performed on the end portion, and after processing with hydrofluoric acid (HF aqueous solution or HF-containing water vapor), the spread resistance of the SOI layer is measured. The buried oxide film layer formed under the SOI layer exposed in the process is removed by etching with hydrofluoric acid, and the exposed SOI layer portion is in contact with the underlying support substrate. Since it is not affected by the layer, the spreading resistance value inherent to the SOI layer can be measured.

  At this time, it is desirable to perform a hole forming step of forming a hole that leads to at least the buried oxide film layer from the surface side of the SOI layer, and then perform a hydrofluoric acid treatment step.

  As described above, if the hydrofluoric acid treatment step is performed after the hole forming step of forming at least the hole leading to the buried oxide film layer from the surface side of the SOI layer, the portion where the SOI layer is thick and angle-wrapped becomes long. As a result, even if the buried oxide film layer portion to be removed by etching becomes longer than that, hydrofluoric acid enters the buried oxide film layer through the hole during the hydrofluoric acid treatment process, so that the angle wrapping is performed. From the surface side, it is possible to surely remove even the buried oxide film layer where hydrofluoric acid cannot reach. As a result, the SOI layer exposed in the angle wrapping process is in a state of being surely in contact with the support substrate immediately below, and is not affected by the buried oxide film layer. As a result, the spreading resistance value inherent to the SOI layer can be accurately measured.

  Next, as a second method of measuring the spread resistance of the present invention, a method for measuring the spread resistance of an SOI layer, which is a support substrate, an SOI layer, and an embedding formed between the support substrate and the SOI layer. An SOI substrate having an oxide film layer is subjected to a hole forming step of forming a hole extending at least from the surface side of the SOI layer to the buried oxide film layer, the SOI substrate is treated with hydrofluoric acid, and the holes and the holes Performing a hydrofluoric acid treatment step of etching away the buried oxide layer under the surrounding SOI layer, and measuring the spreading resistance of the surface of the SOI layer in contact with the support substrate after the buried oxide layer is removed An SOI layer spreading resistance measuring method is provided (claim 3).

  In this way, if a hole extending to at least the buried oxide film layer is formed in the SOI substrate from the surface side of the SOI layer and treated with hydrofluoric acid and then the resistance of the surface of the SOI layer is measured, Since the buried oxide film layer formed under the surrounding SOI layer is etched away by hydrofluoric acid, the SOI layer around the hole is in contact with the support substrate thereunder, and the buried oxide film Since it is not affected by the layer, the spreading resistance value inherent to the SOI layer can be measured.

  In the hole forming step, it is desirable to form the hole by irradiating the surface of the SOI layer with laser light or by performing sandblasting.

Formation of a hole in the SOI layer can also be performed by, for example, artificially damaging the surface of the SOI layer with a diamond pen. However, in this case, it is difficult to control the size and position of the hole. Therefore, it is desirable to perform the hole forming step by irradiating the surface of the SOI layer with laser light that can be controlled.
When forming a hole after the angle wrap process, it is only necessary to form a hole near the boundary between the angle wrap surface of the SOI layer and the surface of the SOI layer, and the position where the hole is to be formed is specified. When it takes a long time to form individual holes as in irradiation, the hole formation time can be shortened as a whole.

In addition, when the hole forming process for forming at least the hole leading to the buried oxide film layer from the surface side of the SOI layer is performed before the angle wrap process such as before the cutting process, the interface between the angle wrap surface and the SOI layer is specified in advance. Since it is difficult to do so, more holes need to be formed compared to forming holes after the angle wrapping process.
Also, when the resistance is measured by spreading the surface of the SOI layer, it is necessary to form many holes in order to previously remove the buried oxide film layer formed under the SOI layer in the entire measurement region.
In these cases, it is possible to form a hole by laser beam irradiation. However, when the area of the SOI layer where the hole is to be formed is large, the total laser beam irradiation time required for one sample is required. It will be long. Therefore, by subjecting the surface of the SOI layer to sandblasting, holes can be formed at once in a wide area, and the time for forming holes can be shortened.

  In the hole forming step, it is desirable to form the hole by performing sand blasting on the surface of the SOI layer and then performing selective etching.

  In the case where it is difficult to form a hole in the SOI layer by sandblasting because the SOI layer is relatively thick, the hole can be formed by further selective etching after the sandblasting. When sandblasting is performed, a damaged region is formed in the depth direction in the SOI layer. Therefore, by performing selective etching, the damaged region can be selectively removed by etching to form a hole.

An SOI chip having a support substrate, an SOI layer, and a buried oxide film layer formed between the support substrate and the SOI layer, wherein at least the SOI chip is cut out from the SOI substrate And an angle wrap surface for measuring resistance is formed at the end of the SOI chip , and the buried oxide film layer under the SOI layer in the portion constituting the angle wrap surface is lacking. In addition, an SOI chip is provided in which the SOI layer of the portion constituting the angle wrap surface and the support substrate are in contact with each other (claim 6).

  In the SOI chip of the present invention, the oxide film layer under the SOI layer in the portion constituting the angle wrap surface is absent, and the SOI layer in the portion constituting the angle wrap surface is in contact with the support substrate therebelow. In this state, since it is not affected by the buried oxide film layer, the spread resistance value in the depth direction inherent to this SOI layer can be measured.

  At this time, it is desirable that a hole is formed in the surface of the SOI layer adjacent to the angle wrap surface so as to communicate with the surface of the support substrate.

  As described above, if a hole is formed on the surface of the SOI layer adjacent to the angle wrap surface so as to reach the surface of the support substrate, the oxide layer below the portion of the SOI layer constituting the angle wrap surface is surely formed. Therefore, it is in a state where it is in contact with the supporting substrate and is not affected by the buried oxide film layer, so that the spread resistance value inherent to the SOI layer can be measured with higher accuracy.

Next, an SOI substrate having a support substrate, an SOI layer, and a buried oxide film layer formed between the support substrate and the SOI layer, at least the buried oxide film on the surface of the SOI layer A hole extending to the layer is formed, the buried oxide film layer under the SOI layer forming the hole and the periphery thereof is absent, and the SOI layer and the supporting substrate forming the periphery of the hole are it is those which are in contact that provides an SOI substrate according to claim.

  In the SOI substrate of the present invention, the buried oxide film layer under the SOI layer constituting the hole and the periphery thereof is absent, and the SOI layer constituting the periphery of the hole is in contact with the support substrate under the hole. Thus, since it is not affected by the buried oxide film layer, the spreading resistance value inherent to the surface of the SOI layer can be measured.

Further, the hole is desirably one which is formed by irradiation or sandblasting of the laser beam (claim 8).

Thus, if it is formed by laser light irradiation, since the size and position of the hole are controlled, the SOI chip or the SOI substrate provided with a desired hole accurately is obtained.
Also, if holes are formed by sandblasting, holes can be formed uniformly at a time even when the area where holes should be formed is wide, and many holes can be formed in a wide range in a short time. This is an SOI chip or an SOI substrate in which the holes are uniformly formed.

The hole is preferably formed by sandblasting and selective etching (claim 9) .

  In the case where it is difficult to form a hole in the SOI layer by sandblasting because the SOI layer is relatively thick, the hole can be formed by further selective etching after the sandblasting. When sandblasting is performed, a damaged region is formed in the depth direction in the SOI layer. Therefore, by performing selective etching, the damaged region can be selectively removed by etching to form a hole. Thus, an SOI chip or an SOI substrate in which a large number of holes are uniformly formed in a wide range even if the SOI layer is thick is obtained.

As in the present invention, as a method for measuring the spreading resistance of the SOI layer, if the SOI chip is cut out from the SOI substrate, angle wrapping is performed on the end portion, and processing with hydrofluoric acid is performed, then the spreading resistance measurement of the SOI layer is performed. Alternatively, if the SOI substrate is exposed from the angle wrap process by forming a hole in the SOI substrate at least from the surface of the SOI layer from the surface side of the SOI layer and measuring the SOI layer spreading resistance after treatment with hydrofluoric acid, Alternatively, the buried oxide layer under the SOI layer constituting the hole and the surrounding area thereof is etched away, and the exposed SOI layer or the SOI layer around the hole and the surrounding SOI layer is in contact with the underlying support substrate. Since this is in a state and is not affected by the buried oxide film layer, the spreading resistance value inherent to this SOI layer can be measured.
Further, the present invention has a support substrate, an SOI layer, a buried oxide film layer formed between the support substrate and the SOI layer, and an angle wrap surface is formed at least at an end portion. A buried oxide film layer below the SOI layer of the portion constituting the SOI layer, the SOI chip in which the SOI layer of the portion constituting the angle wrap surface and the support substrate are in contact, and the support substrate, the SOI layer, and the There is a buried oxide film layer formed between the support substrate and the SOI layer, and a hole is formed on the surface of the SOI layer so as to reach at least the buried oxide film layer. If the SOI substrate in which the lower buried oxide film layer is lacking and the SOI layer constituting the periphery of the hole is in contact with the support substrate, the spreading resistance value inherent to the SOI layer can be measured. Kill.
As a result, even the slight contamination of boron on the SOI substrate and the formation of the n-type inversion layer can be detected by the spread resistance measuring method of the present invention.

Hereinafter, embodiments of the present invention will be described, but the present invention is not limited thereto.
The impurity concentration distribution in the depth direction of the silicon single crystal can be measured by using a spread resistance measuring method. However, in the case of an SOI substrate, there is a problem that the measured resistance value of the spread of the SOI layer becomes very high due to the influence of the buried oxide film layer.
And unless boron contamination of the SOI substrate and n-type inversion layer formation occur at a high concentration, it is difficult to detect them by SR measurement.

  It is considered that the reason why the measured value of the spreading resistance of the SOI layer becomes very high is due to fixed charges formed in the buried oxide film layer. For example, when the SOI layer is composed of a p-type silicon single crystal, a negative charge is induced at the interface between the p-type SOI layer and the buried oxide film layer due to the positive charge formed in the buried oxide film layer. Therefore, a depletion layer spreads in the p-type SOI layer. For example, when the resistivity of the supporting substrate before bonding and the substrate to be the SOI layer are both about 10 Ω · cm, the depletion layer extends from the interface with the buried oxide film layer to about 1 μm in the p-type SOI layer. As a result, the measured resistance value of the SOI layer becomes so high that it is almost indistinguishable from the value of the buried oxide film layer.

Therefore, the present inventor, as a method for measuring the spreading resistance of the SOI layer, a method of measuring the spreading resistance of the SOI layer after cutting the SOI chip from the SOI substrate, performing an angle wrap at the end, treating with hydrofluoric acid, Alternatively, a method has been devised in which a hole extending to at least the buried oxide film layer in the SOI substrate is formed from the surface side of the SOI layer, and the resistance of the SOI layer is measured after treatment with hydrofluoric acid.
In such a measuring method, the buried oxide film layer exposed in the angle wrap process or the buried oxide film layer under the SOI layer constituting the hole and its periphery is removed by etching, and the SOI layer exposed in the angle wrap process is exposed. Alternatively, the SOI layer constituting the hole and its periphery is in contact with the underlying support substrate and is less susceptible to the influence of the buried oxide film layer, so the inherent spreading resistance value of this SOI layer is measured. The present invention has been completed.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a schematic process diagram showing a method for measuring the spreading resistance of an SOI layer according to the first embodiment of the present invention.
First, the SOI substrate 100 (FIG. 1A) having the support substrate 1, the SOI layer 3, and the buried oxide film layer 2 formed between the support substrate 1 and the SOI layer 3 is cleaved, and the SOI The chip 110 is cut out (cutout process: FIG. 1B).
Next, the end portion of the SOI chip 110 attached to a jig having a predetermined angle is angle-wrapped using diamond paste, and the SOI layer 3, the buried oxide film layer (BOX layer) 2, and the support substrate 1 are surfaced. It is exposed to (angle wrap surface 10) (angle wrap process: FIG. 1 (c)). Hereinafter, the surfaces of the SOI layer 3, the BOX layer 2, and the support substrate 1 exposed on the surface are referred to as an SOI wrap surface 13, a BOX wrap surface 12, and a substrate wrap surface 11, respectively. These constitute the angle wrap surface 10.

Further, near the boundary 14 between the surface of the SOI layer 3 and the angle wrap surface 10, for example, a laser beam is irradiated from the surface side of the SOI layer 3 to form a plurality of holes 21 that lead to at least the BOX layer 2 (hole forming step: FIG. 1 (d)). If there is no such hole, the BOX layer 2 is sandwiched between the support substrate 1 and the SOI layer 3, so that hydrofluoric acid can etch the BOX layer 2 only from the BOX lapping surface 12 side, and only about 50 μm. It cannot be removed. Therefore, it is desirable to form the hole 21 in order to reliably remove the BOX layer 2 formed under the SOI lapping surface 10 in the hydrofluoric acid treatment process.
You may perform a hole formation process before a cutting-out process (FIG.1 (b)) as needed. However, in this case, since the position of the boundary 14 cannot be specified in advance, it is necessary to form the hole 21 in a wide range. For example, by subjecting the surface of the SOI layer to sandblasting, holes can be uniformly formed in a wide area at once.

Subsequently, the SOI chip 110 is treated with hydrofluoric acid, and a part of the BOX layer 2 formed under the SOI layer 3 (SOI lapping surface 13) exposed in the angle lapping process is removed by etching (hydrofluoric acid treatment process). : FIG. 1 (e)). At this time, hydrofluoric acid etches the BOX layer 2 from the BOX wrap surface 12 side and the hole 21 side, and the BOX layer 2 located under the SOI wrap surface 13 and the hole 21 and the SOI layer 3 constituting the periphery thereof. Remove. As a result, the SOI layer in the region of the SOI wrap surface 13 is in contact with the support substrate 1, and the hole 21 formed from the surface side of the SOI layer 3 and leading to at least the BOX layer 2 naturally leads to the surface of the support substrate 1. become.
In this way, the present invention has a support substrate, an SOI layer, a BOX layer formed between the support substrate and the SOI layer, and an angle wrap surface is formed at least at an end portion. The BOX layer below the SOI layer in the portion constituting the surface is lacking, and an SOI chip in which the SOI layer in the portion constituting the angle wrap surface and the support substrate are in contact can be obtained.

Finally, the angle-wrapped portion (SOI wrap surface 13 and substrate wrap surface 11) of the SOI chip is measured using the two-probe 1000 of the spread resistance measuring device (spread resistance measuring step: FIG. 1 (f)).
When the angle wrap surface 10 of the SOI chip 110 is measured by using this spreading resistance measuring method, the BOX layer 2 is not present under the SOI wrap surface 13 and the hole 21 and the SOI layer 3 constituting the periphery thereof. The depletion layer that has spread in the SOI layer 3 from the interface with the BOX layer 2 disappears without being affected by the fixed charge therein, and the original spreading resistance value of the SOI wrap surface 13 can be obtained. . Therefore, the resistance distribution in the depth direction of the SOI layer can be measured more accurately.

FIG. 2 is a schematic process diagram showing a method for measuring the spreading resistance of the SOI layer according to the second embodiment of the present invention.
First, an SOI substrate 100 ′ having a supporting substrate 1 ′ and an SOI layer 3 ′ and a buried oxide film layer 2 ′ formed between the supporting substrate 1 ′ and the SOI layer 3 ′ (FIG. 2A). Then, a hole 221 leading to at least the BOX layer 2 ′ is formed from the surface side of the SOI layer 3 ′ (hole forming step: FIG. 2B).

The hole 221 may be formed only in the region where the spreading resistance is to be measured and in the vicinity thereof, or may be formed in the entire surface of the SOI layer 3 ′.
When the hole 221 is expanded and formed only in the resistance measurement region and the vicinity thereof, it is preferable to irradiate the surface of the SOI layer 3 ′ with a laser beam capable of accurately controlling the formation position of the hole 221.
In the case where the hole 221 is formed over the entire surface of the SOI layer 3 ′ or over a wide range, the surface of the SOI layer 3 ′ is subjected to sandblasting capable of forming minute holes over a wide range of the SOI layer 3 ′. It is preferable. However, when the SOI layer 3 ′ is relatively thick, it is difficult to form the hole 221 leading to the BOX layer 2 ′. Therefore, after sandblasting, for example, a mixed solution of hydrofluoric acid / nitric acid / acetic acid / water is used. Alternatively, the hole 221 may be formed by performing selective etching.

Subsequently, the SOI substrate 100 ′ is treated with hydrofluoric acid, and the BOX layer 2 ′ located under the SOI layer 3 ′ constituting the hole 221 and its periphery is removed (hydrofluoric acid treatment process: FIG. 2C). . When the holes 221 are formed by sandblasting, since the holes 221 are formed almost uniformly and densely, etching can be performed uniformly, so that the BOX layer 2 ′ can be completely removed without any etching residue. Further, the BOX layer 2 'can be left with a desired thickness in a portion where no hole is formed.
In this manner, the support substrate, the SOI layer, and the BOX layer formed between the support substrate and the SOI layer according to the present invention are formed, and at least a hole leading to at least the BOX layer is formed on the surface of the SOI layer. In this case, the BOX layer under the hole and the portion of the SOI layer surrounding the hole is lacking, and an SOI substrate in which the SOI layer and the supporting substrate that form the periphery of the hole are in contact can be obtained.

Finally, the surface of the SOI layer 3 ′ at the position where the BOX layer 2 ′ has been removed is measured using the two-probe 1000 ′ of the spread resistance measuring device (spreading resistance measuring step: FIG. 2D).
When the surface of the SOI substrate 100 ′ is measured using this spreading resistance measuring method, the BOX layer 2 ′ is missing under the SOI layer 3 ′, and is not affected by the fixed charge of the BOX layer 2 ′. The depletion layer spreading in the SOI layer 3 ′ from the interface with the BOX layer 2 ′ disappears, and the spreading resistance value inherent in the surface of the SOI layer 3 ′ can be obtained.

Hereinafter, the present invention will be described more specifically with reference to examples and comparative examples, but the present invention is not limited thereto.
(Example 1, Comparative Examples 1 and 2)
An SOI substrate in which a p-type support substrate 1 having a resistivity of 9 to 18 Ω · cm and a p-type SOI layer 3 having a resistivity of 9 to 18 Ω · cm and a thickness of 90 nm are bonded to each other with a BOX layer 2 having a thickness of 145 nm interposed therebetween. 100 was cleaved, and the SOI chip 110 was cut out. Next, the end portion of the SOI chip 110 attached to a jig having an angle of 0 ° 17 ′ was angle-wrapped using diamond paste.
First, the angle wrap surface 10 of the SOI chip 110 is measured using a two-probe of a spread resistance measuring device (Comparative Example 1).
Subsequently, near the boundary between the surface of the SOI layer 3 and the angle wrap surface 10, a laser beam is irradiated at an interval of 20 μm from the surface side of the SOI layer 3, and a hole 21 leading to at least the BOX layer 2 is formed in the width of the SOI chip 110. A plurality were formed in the direction.
Finally, the SOI chip 110 was treated with hydrofluoric acid having a concentration of 10% to 50%. Note that hydrofluoric acid having a concentration of 50% is the highest concentration usually available. When the hydrofluoric acid concentration is lower than 10%, the BOX layer 2 exposed on the surface of the angle wrap surface is removed by etching, but it takes a long time to remove the BOX layer 2 formed under the SOI layer 3 by etching. Is not preferable.
The SOI chip 110 prepared as described above is subjected to the hydrofluoric acid etching process, the BOX layer 2 is removed, and the angle-wrapped portion of the SOI layer 3 in contact with the support substrate 1 (the SOI wrap surface 13 and the substrate wrap surface 11). ) Is measured using the two probes of the spread resistance measuring device (Example 1).
In addition, an SOI chip was prepared under the same conditions as in Example 1, and the hole formation process was performed. In the hydrofluoric acid treatment process, treatment was performed with hydrofluoric acid at a concentration of 5% to expand the angle wrap surface and to detect two resistance measuring devices. Measurement is performed using a needle (Comparative Example 2).

The measurement result of the spreading resistance in Example 1 is shown in FIG.
In Example 1, the resistivity of the SOI layer 3 gradually increases in the depth direction from about 70 Ω · cm on the surface to about 200 Ω · cm in the vicinity of the interface with the support substrate 1. This is considered to occur because the carriers are absorbed from the SOI layer 3 to the BOX layer 2 at the interface with the BOX layer 2 when the SOI substrate 100 is formed. This spread resistance measurement value is sufficiently lower than that when the BOX layer 2 is affected (Comparative Example 1), and it can be seen that the BOX layer 2 is hardly affected.

In Comparative Example 1, the resistivity of the SOI layer 3 showed a high resistivity exceeding 10,000 Ω · cm from the surface to the vicinity of the interface of the BOX layer 2. From this, it can be seen that the BOX layer 2 formed under the SOI layer 3 is strongly influenced.
In addition, the measurement result of the spreading resistance in the comparative example 2 is shown in FIG.
In Comparative Example 2, the resistivity of the SOI layer 3 showed a high resistivity of about 10,000 Ω · cm from the surface to the vicinity of the interface with the support substrate 1. Although the value is smaller than that of Comparative Example 1, it is higher than that of Example 1. With 5% concentration of hydrofluoric acid, the BOX layer 2 under the SOI wrap surface 13 can be sufficiently removed by etching. It can be seen that the BOX layer 2 remaining under the SOI layer 3 is affected.

(Example 2, Comparative Example 3)
An SOI substrate is prepared in which a p-type support substrate having a resistivity of 9 to 18 Ω · cm and a p-type SOI layer having a resistivity of 9 to 18 Ω · cm and a thickness of 20 nm are bonded to each other with a BOX layer having a thickness of 145 nm interposed therebetween. .
First, ten locations are selected from the surface of this SOI substrate, and measurement is performed using a two-probe of a spread resistance measuring device (Comparative Example 3).
Next, sand blasting is performed from the surface side of the SOI layer, and a plurality of holes that lead to at least the BOX layer are formed in a partial region of the SOI substrate.
Then, the SOI substrate is treated with hydrofluoric acid having a concentration of 10% to 50%.
The SOI substrate prepared in this manner is removed from the surface of the portion of the SOI layer that is in contact with the support substrate after the BOX layer is removed by the hydrofluoric acid etching process, and two probes of the spread resistance measuring device are used. (Example 2).

In Example 2, each part spreads and the resistivity of resistance measurement falls within the range of 200 Ω · cm or less. This spread resistance measurement value is sufficiently lower than that when the BOX layer is affected (Comparative Example 3), and it can be seen that the spread resistance is hardly affected by the BOX layer.
Moreover, in Comparative Example 3, any part spreads and the resistivity of the resistance measurement shows a high value of about 10,000 Ω · cm. It can be seen that this spread resistance measurement value is affected by the BOX layer formed under the SOI layer.

  In addition, this invention is not limited to the said form. The above-described embodiment is an exemplification, and the present invention has substantially the same configuration as the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.

It is a schematic process drawing which shows the measuring method of the spreading resistance of 1st Embodiment. It is a schematic process drawing which shows the measuring method of the spreading resistance of 2nd Embodiment. It is a spreading resistance measurement result of Example 1. It is a spreading resistance measurement result of the comparative example 1.

Explanation of symbols

1, 1 '... support substrate, 2, 2' ... buried oxide layer, 3, 3 '... SOI layer,
10: Angle wrap surface, 11: Substrate wrap surface, 12 ... BOX wrap surface,
13 ... SOI wrap surface, 14 ... Boundary between SOI layer surface and SOI wrap surface,
21, 221... Hole, 100, 100 ′, SOI substrate, 110, SOI chip 1000, 1000 ′, two probes for spreading resistance measuring machine.

Claims (9)

  A method for measuring the spread resistance of an SOI layer, the step of cutting out an SOI chip from an SOI substrate having a support substrate, an SOI layer, and a buried oxide film layer formed between the support substrate and the SOI layer And performing an angle wrapping process in which an end portion of the SOI chip is angle-wrapped to expose the SOI layer and the buried oxide layer on the surface, the angle-wrapped SOI chip is treated with hydrofluoric acid, and the angle A hydrofluoric acid treatment step of etching and removing the buried oxide film layer under the SOI layer exposed in the lapping step is performed, and the spread resistance of the SOI layer portion in contact with the support substrate is measured after the buried oxide film layer is removed. A method for measuring the spreading resistance of an SOI layer.   2. The SOI layer according to claim 1, further comprising a hole forming step of forming at least a hole leading to the buried oxide film layer from a surface side of the SOI layer, wherein the hydrofluoric acid treatment step is performed after the hole forming step. Spread resistance measurement method.   A method for measuring a spreading resistance of an SOI layer, comprising: a supporting substrate; an SOI layer; and a buried oxide film layer formed between the supporting substrate and the SOI layer, wherein at least the buried oxide film A hole forming step for forming a hole leading to the layer from the surface side of the SOI layer, treating the SOI substrate with hydrofluoric acid, and etching away the buried oxide film layer under the hole and the surrounding SOI layer A method for measuring a spreading resistance of an SOI layer, comprising: performing a hydrofluoric acid treatment step, and measuring a spreading resistance of a surface of the SOI layer in contact with the support substrate after the buried oxide film layer is removed.   The expansion of the SOI layer according to claim 2 or 3, wherein, in the hole forming step, the hole is formed by irradiating a surface of the SOI layer with laser light or applying sand blasting. Resistance measurement method.   4. The method for measuring a spread resistance of an SOI layer according to claim 2, wherein, in the hole forming step, the hole is formed by performing sand blasting on a surface of the SOI layer and then performing selective etching. 5. . An SOI chip having a support substrate, an SOI layer, and a buried oxide film layer formed between the support substrate and the SOI layer, wherein at least the SOI chip is cut out from the SOI substrate. There is an angle wrap surface for spreading resistance measurement at the end of the SOI chip , and the buried oxide film layer under the SOI layer in the portion constituting the angle wrap surface is lacking, An SOI chip, wherein the SOI layer in the part constituting the angle wrap surface and the support substrate are in contact with each other.   The SOI chip according to claim 6, wherein a hole is formed in the surface of the SOI layer adjacent to the angle wrap surface so as to communicate with the surface of the support substrate.   The SOI chip according to claim 7, wherein the hole is formed by laser light irradiation or sandblasting.   The SOI chip according to claim 7, wherein the hole is formed by sandblasting and selective etching.

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