JP4784064B2 - Matrix device, driving method of matrix device, electro-optical device, electronic apparatus - Google Patents

Description

  The present invention relates to a matrix device that sequentially selects functional elements (for example, electrophoretic elements) arranged in a matrix and a driving method thereof.

  Matrix devices that sequentially select functional elements arranged in a matrix and operate so as to exhibit a predetermined function are used in various devices. As such a device, for example, there is an electrophoresis apparatus disclosed in Japanese Patent Laid-Open No. 2002-169190 (Patent Document 1). In addition to the electrophoresis device, the matrix device is used in various devices such as a liquid crystal display device, an electroluminescence display device, or a capacitance detection device that is a component of a fingerprint sensor or the like.

  The matrix device as described above is normally connected to a plurality of scanning lines and data lines arranged orthogonally to each other and the intersections of the scanning lines and data lines to control the current or voltage supply state to the functional elements. The selection transistor is provided. Typically, in a matrix device, scanning lines are selected one by one by sequentially outputting scanning line selection pulses. However, in reality, a delay occurs in the rise time and fall time of the scanning line selection pulse due to the influence of the wiring resistance, parasitic capacitance, and the like. Therefore, before and after the scanning line selection pulse is switched, two adjacent scans are scanned. Lines may be selected at the same time. In addition, the data line data is usually switched at the same time as the scanning line is switched. However, at this time, a signal delay occurs due to the influence of parasitic capacitance, wiring resistance, or the gate capacitance of the data buffer, and the data line potential is changed. There may be periods of instability.

  The inconveniences described above are particularly noticeable when an element having a memory property such as an electrophoretic element is employed as a functional element. This is because, when an electrophoretic element or the like is employed, the integrated value of the potential of the data line in the period from the start to the end of the selection of the scanning line is reflected in the final behavior (operation) of the functional element. . As described above, when two scanning lines are simultaneously selected or there is a time when the data line potential is unstable during the scanning line selection period, all changes in the data line potential during that period are accumulated in the functional element as a history. As a result, a good operating state cannot be secured. For example, when an electrophoretic element is employed as a functional element to configure a display device (electro-optical device), display quality such as a reduction in contrast is deteriorated.

JP 2002-169190 A

  SUMMARY OF THE INVENTION An object of the present invention is to provide a technique capable of ensuring a good operation state of each functional element in a matrix device including a plurality of functional elements arranged in a matrix.

The matrix device of the present invention includes M row lines, N column lines provided so as to intersect with the M row lines, the M row lines, and the N column lines. A functional element provided at each intersection; row selection means for sequentially selecting the M number of row lines; and column selection means for sequentially selecting the N number of column lines. After selecting one of the row lines, the row line to be selected next is selected through a row line non-selection period in which none of the M row lines is selected. The row selection means includes a scanning shift register having a plurality of output stages, and the odd-numbered output stage and the even-numbered output on the odd-numbered one of the plurality of output stages. and stage are connected to one provided that the row lines every two stages, shifting the scanning shift register Scan clock signal being configured are not selected any of the row lines while in the high potential logic, said row selection means, be those switching based on the row lines for selecting a row reference signal The matrix device is characterized in that a duty ratio of the row reference signal is a ratio between a row line selection period and the row line non-selection period.

  According to such a configuration, it is configured such that a non-selection period in which no row line (for example, a scanning line) is selected is selected between the selection of one row line and the selection of the next row line. Therefore, it is possible to ensure a good operating state of each functional element.

  The electro-optical device according to the present invention is an electro-optical device using the matrix device described above, wherein the functional element is configured as an electrophoretic element. Note that as the functional element, an EL (electroluminescence) element, a liquid crystal element, an electron-emitting element that emits light by applying electrons generated by application of an electric field to a light-emitting plate, or the like may be employed.

  According to such a configuration, a good operating state of the electrophoretic element is ensured, so that the contrast of the electro-optical device (display device) can be improved and display quality can be improved.

  The electronic apparatus of the present invention is an electronic apparatus including the above-described electro-optical device. Here, “electronic device” refers to a device in general having a certain function, and its configuration is not particularly limited. For example, electronic paper, electronic book, IC card, mobile phone, video camera, personal computer, head mount A display, a rear-type or front-type projector, a fax machine with a display function, a digital camera finder, a portable TV, a PDA, an electronic notebook, and the like are included.

The driving method of the matrix device of the present invention includes M row lines, N column lines provided so as to intersect with the row lines, the M row lines, and the N column lines. A matrix device driving method comprising: a functional element provided at each intersection; a first step of selecting any one of the M row lines; and selecting any of the row lines A second process in which a row line non-selection period is not performed, and a third process of selecting one of the M row lines to be selected next to the row line selected in the first process; The matrix device includes a scan shift register having a plurality of output stages, and the second process includes an odd-numbered output stage of the plurality of output stages and an even number on the odd-numbered one. th output stage is connected to one provided that the row lines every two stages, the scanning Are those scan clock signal to shift the shift register is realized a non-selected state the row lines by the while in the high potential logic are configured not selected any of the row lines, the first In the process and the third process, the row line to be selected is switched based on a row reference signal, and the duty ratio of the row reference signal is determined based on the row line selection time in the first process and the third process and the first process. This is a method of driving a matrix device, characterized in that it is a ratio to the row line non-selection period in two processes.

  According to such a driving method, since one row line is selected and the next row line is selected, the operation is performed so as to pass through a non-selection period in which no row line (for example, a scanning line) is selected. Thus, it is possible to ensure a good operating state of each functional element.

  Hereinafter, an electrophoretic display device to which the present invention is applied will be described as an embodiment of the present invention.

<First Embodiment>
FIG. 1 is a block diagram illustrating the configuration of the electrophoretic display device according to the first embodiment. The electrophoretic display device 1 shown in FIG. 1 includes M scanning lines 32, a scanning driver 20 for sequentially selecting the scanning lines 32, and N data lines 33 provided so as to intersect the scanning lines 32. A data driver 10 for sequentially selecting the data lines 33; an active matrix unit 30 including pixel circuits 31 provided at respective intersections of the scanning lines 32 and the data lines 33 and arranged in a matrix; It is comprised including. The correspondence with the present invention will be described. The scanning line 32 corresponds to a row line, the data line 33 corresponds to a column line, the scanning driver 20 corresponds to a row selection unit, and the data driver 10 serves as a column selection unit. The pixel circuit 31 corresponds to a functional element.

  The data driver 10 includes a data latch 12, a data shift register 11 for sequentially selecting the data latch 12, and a data buffer 13. The scan driver 20 includes a scan shift register 21 for sequentially scanning the scan lines 32, deselection means 22 for deselecting all the scan lines 32, and a scan buffer 23.

  FIG. 2 is a circuit diagram illustrating a detailed configuration of the pixel circuit 31. As shown in FIG. 2, the pixel circuit 31 includes an electrophoretic element 37, a capacitive element 38 for holding the electropolarization state of the electrophoretic element 37, and a switching operation to store charges in the capacitive element 38. And a selection transistor 34. The selection transistor 34 has a gate connected to the scanning line 32, a source connected to the data line 33, and a drain connected to one end of each of the electrophoretic element 37 and the capacitive element 38. The low potential power supply line 36 is connected to the other end of the capacitive element 38.

  FIG. 3 is a circuit diagram illustrating a detailed configuration of the data driver 10. As described above, the data driver 10 includes the data shift register 11, the data latch 12, and the data buffer 13.

  The data shift register 11 has a combination of a clocked inverter 14 that controls the reception of data from the previous stage and an inverter 15 that inverts the output of the clocked inverter 14 in a single stage, and is connected across a plurality of stages. It is configured. The data shift register 11 receives a clock signal CLK and a clock inversion signal CLKB having opposite phases. Each stage is provided with a NAND 16, and its input terminal is connected to the input section of the clocked inverter 14 and the output section of the inverter 15, respectively. Therefore, the NAND 16 latches the start pulse signal SP transferred from the previous stage, and outputs the level L when both the input part of the clocked inverter 14 and the output part of the inverter 15 become the level H. The output of the NAND 16 is inverted by the inverter 17 to the level H.

  The data latch 12 includes a first latch 12a and a second latch 12b. The first latch 12a latches the image data DATA according to the sequential selection signal XSEL {n} (n is a natural number) from the data shift register 11. The second latch 12b latches the signal from each stage of the first latch 12a according to the latch pulse LP.

  The data buffer 13 enhances the driving capability of the signal from the second latch 12b constituting the data latch 12 and outputs it as a signal X {n} (n is a natural number).

  FIG. 4 is a circuit diagram illustrating a detailed configuration of the scan driver 20. As described above, the scan driver 20 includes the scan shift register 21, the non-selection unit 22, and the scan buffer 23. The scan driver 20 operates to select one scan line 32 to be selected next after a non-selection period in which none of the scan lines are selected after any scan line 32 is selected.

  The scanning shift register 21 has two stages on the input side (first stage and second stage), a clocked inverter 24, an inverter 25 that inverts the output of the clocked inverter 24, and an output (to the subsequent stage) of the inverter 25. In combination with a clocked inverter 26 for inversion control. Each stage constituting the scan shift register 21 includes a NAND circuit 27, and its input terminal is connected to the odd-numbered stage output and the even-numbered stage output of the scan shift register 21, respectively. The output of each NAND circuit 27 is increased in driving capability by a buffer, and is output as a scanning line selection pulse YSEL {m} (m is a natural number).

  The non-selection unit 22 includes a plurality of NAND circuits 28, and supplies a non-selection signal to each of the scanning lines 32 to simultaneously switch the scanning lines to a non-selected state. Take on. Specifically, the output signal YSEL from the scan shift register 21 and the non-selection signal YENB are input to the input terminals of each NAND circuit 28. When the potential of the non-selection signal YENB is level L (low potential), all the scanning line selection pulses YSEL are at low potential, that is, in a non-selected state. The output of each NAND circuit 28 is output with a drive capability increased by a buffer. The supply of the non-selection signal YENB is preferably performed at the timing when the scanning line 32 to be selected is switched.

  The scan buffer 23 includes a plurality of inverters 29, and increases the drive capability of the output signal from the non-selection means 22 and outputs it as a signal YSEL {m} '(m is a natural number).

  The electrophoretic display device 1 of the first embodiment has such a configuration, and the operation thereof will be described next.

  FIG. 5 is a timing chart for explaining the operation of the electrophoretic display device 1 according to the first embodiment. The data shift register 11 sequentially transfers the data start pulse XSP at the rising and falling timings of the data clock signal XCLK. As a result, the data latch selection pulse XSEL {n} is sequentially output, and the image data DATA is sequentially taken into the first latch 12a in the data latch 12. When the latch pulse LP is input after the final stage data latch selection pulse XSEL {n} is output, the signal fetched into the first latch 12a is transferred to the second latch 12b, and the signal X {n is transmitted to each data line. } Is output.

  The scan shift register 21 sequentially transfers the scan start pulse YSP at the rise and fall timings of the scan clock signal YCLK. Thereby, the scanning line selection pulse YSEL {m} is sequentially output. When the non-selection signal ENEB is input at the timing shown in the figure, the scanning line selection signal YSEL {m} ′ is output at intervals for the time when the non-selection signal YUNB is at a low potential.

  In other words, in the present embodiment, any one scanning line 32 is selected in the state where the non-selection signal YENB is at a high potential (first process). Thereafter, all the scanning lines 32 are simultaneously brought into a non-selected state by setting the non-selection signal YUNB to a low potential. After a non-selection period during which no scan line 32 is selected (second process), one scan line 32 to be selected next is selected (third process).

Note that the timing at which the non-selection signal YUNB is set to a low potential preferably overlaps with the timing at which the scanning line selection signal YSEL {n} is switched. The non-selection signal YENB the period from fall of the X S P until the stable data line potential, it is preferable that a low potential.

<Second Embodiment>
FIG. 6 is a block diagram illustrating the configuration of the electrophoretic display device according to the second embodiment. In FIG. 6, the same reference numerals are given to components common to the above-described first embodiment, and detailed description of the components will be omitted below. As shown in FIG. 6, the electrophoretic display device 1a according to the second embodiment basically has the same configuration as the electrophoretic display device 1 according to the first embodiment described above. The configuration is different. The scanning driver 20 in this embodiment includes a selection pulse width variable scanning shift register 41 and a scanning buffer 23.

FIG. 7 is a circuit diagram illustrating a detailed configuration of the scan driver 20 according to the second embodiment. The selection pulse width variable scan shift register 41 constituting the scan driver 20 includes m output stages YSEL {m} and 2m shift registers. Two stages on the input side (first stage and second stage) invert control of the clocked inverter 44, the inverter 45 that inverts the output of the clocked inverter 44, and the output of the inverter 45 (output to the subsequent stage). And a clocked inverter 46. The selection pulse width variable scanning shift register 41 includes one NAND circuit 48 for every two stages of the shift register, and the input terminals thereof are the odd-numbered output and the even-numbered output of the selection pulse width variable scanning shift register 41, respectively. Connected to output. The output of each NAND circuit 48 is increased in drive capability by a buffer and is output as a scanning line selection pulse YSEL {m} (m is a natural number). That is, the selection pulse width variable scanning shift register 41 includes a plurality of output stages, and among these, the odd-numbered output and the even-numbered output are connected to one scanning line, and the scanning clock signal is generated. The scanning line selection pulse is not output while the potential is high .

  The electrophoretic display device 1a of the second embodiment has such a configuration, and the operation thereof will be described next.

  FIG. 8 is a timing chart for explaining the operation of the electrophoretic display device 1a of the second embodiment. The data shift register 11 sequentially transfers the data start pulse XSP at the rising and falling timings of the data clock signal XCLK. As a result, the data latch selection pulse XSEL {n} is sequentially output, and the image data DATA is sequentially taken into the first latch 12a in the data latch 12. When the latch pulse LP is input after the final-stage data latch selection pulse XSEL {n} is output, the signal fetched into the first latch 12a is transferred to the second latch 12b and to each data line X {n}. Is output.

  The selection pulse width variable scanning shift register 41 sequentially transfers the scanning start pulse YSP according to the scanning clock signal YCLK. When the scanning clock signal YCLK is input at the timing shown in the drawing, the scanning driver 20 operates as follows. During the period when the scanning clock signal YCLK is at the high potential H, the scanning line selection pulse YSEL {m} ′ is not output to any stage (scanning line non-selected state). A scanning line selection pulse YSEL {m} 'is output at the timing when the scanning line clock signal YCLK falls, and one scanning line is selected. When the scanning clock signal YCLK rises again, the scanning line is not selected. At the timing when the next scanning clock signal YCLK falls, the next scanning line selection pulse is output. In this way, the scanning line selection pulse YSEL {m} ′ is sequentially output at intervals of the period (corresponding to the pulse width of YCLK) during which the scanning clock signal YCLK is at the high potential H. At this time, the pulse width of each scanning line selection pulse YSEL {m} ′ is the same as the period during which the scanning clock signal YCLK is at the low potential L. With the duty ratio of the scanning clock signal (corresponding to the row reference signal), the scanning line selection pulse width (corresponding to the row line selection time) and the interval (corresponding to the row line non-selection period) can be determined.

  That is, in the present embodiment, any one scanning line 32 is selected at the timing when the scanning clock signal YCLK becomes a low potential (first process). Thereafter, all the scanning lines 32 are simultaneously brought into a non-selected state corresponding to a period in which the scanning clock signal YCLK is at a high potential. After a non-selection period during which none of the scanning lines 32 is selected (second process), one scanning line 32 to be selected next is selected at the timing when the scanning clock signal YCLK again becomes a low potential (first step). 3 processes).

  Note that the latch pulse XLP is desirably output during a period in which the scan clock signal YCLK is at the high potential H.

<Third Embodiment>
FIG. 9 is a perspective view illustrating an example of an electronic apparatus including the electrophoretic display device according to the first or second embodiment, and a so-called electronic paper is illustrated as an example of the electronic apparatus. As shown in FIG. 9A, the electronic paper 100 of this embodiment includes an electrophoretic display device 1 (or 1a) as a display unit 101. FIG. 9B shows an example in which the electronic paper 100 is folded in half, and the electrophoretic display device 1 (or 1a) is provided as the display portions 101a and 101b. In addition to the exemplary electronic paper, the electrophoretic display device 1 (or 1a) can be applied to various electronic devices (for example, an IC card, a PDA, an electronic notebook, etc.) including a display unit.

  According to each of the embodiments described above, a configuration is adopted in which a non-selection period in which no row line (for example, a scanning line) is selected is selected between the selection of one row line and the selection of the next row line. Therefore, it is possible to ensure a good operating state of each functional element.

  In addition, since a good operating state of the electrophoretic element is ensured, it is possible to improve the contrast of the electrophoretic display device and improve the display quality.

  In addition, this invention is not limited to the content of each embodiment mentioned above, A various deformation | transformation implementation is possible within the scope of the summary of this invention. For example, in each of the above-described embodiments, description has been given by taking an example of an electrophoretic display device configured using a matrix device and adopting an electrophoretic element as a functional element. Various things, such as a liquid crystal display element and an organic electroluminescent element, can be employ | adopted.

It is a block diagram explaining the structure of the electrophoretic display device of 1st Embodiment. It is a circuit diagram explaining the detailed structure of a pixel circuit. It is a circuit diagram explaining the detailed structure of a data driver. It is a circuit diagram explaining the detailed structure of a scanning driver. 3 is a timing chart for explaining the operation of the electrophoretic display device according to the first embodiment. It is a block diagram explaining the structure of the electrophoretic display device of 2nd Embodiment. It is a circuit diagram explaining the detailed structure of the scanning driver of 2nd Embodiment. 10 is a timing chart for explaining the operation of the electrophoretic display device of the second embodiment. It is a perspective view explaining the example of an electronic device provided with an electrophoretic display device.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Electrophoretic display apparatus, 10 ... Data driver, 11 ... Data shift register, 12 ... Data latch, 13 ... Data buffer, 20 ... Scan driver, 21 ... Scan shift register, 22 ... Deselecting means, 23 ... Scan buffer , 30 ... Active matrix part, 31 ... Pixel circuit, 32 ... Scan line, 33 ... Data line, 100 ... Electronic paper

Claims (4)

M row lines,
N column lines provided crossing each of the M row lines;
A functional element provided at each intersection of the M row lines and the N column lines;
Row selection means for sequentially selecting the M row lines;
Column selecting means for sequentially selecting the N column lines;
The row selection means is selected next through a row line non-selection period in which none of the M row lines is selected after selecting any one of the M row lines. Is configured to select a single row line,
The row selection means includes a scan shift register having a plurality of output stages,
It said plurality of odd-numbered output stages of the output stage and the even-numbered output stage of the upper odd one is connected before Symbol row lines Ru provided one for each two stages, the scanning shift register Any of the row lines is not selected while the scanning clock signal for shifting is at high potential logic ,
The row selection means switches the row line to be selected based on a row reference signal,
A matrix device, wherein a duty ratio of the row reference signal is a ratio between a row line selection period and the row line non-selection period.   An electro-optical device comprising the matrix device according to claim 1 and an electrophoretic element as the functional element.   An electronic apparatus comprising the electro-optical device according to claim 2. M row lines, N column lines provided crossing each of the row lines, and functional elements provided at intersections of the M row lines and the N column lines, A matrix device driving method comprising:
A first process of selecting any one of the M row lines;
A second process through a row line non-selection period in which none of the M row lines is selected;
A third step of selecting one row line to be selected next to the row line selected in the first step among the M row lines;
Including
The matrix device includes a scanning shift register having a plurality of output stages,
The second process includes
It said plurality of odd-numbered output stages of the output stage and the even-numbered output stage of the upper odd one is connected before Symbol row lines Ru provided one for each two stages, the scanning shift register The row line non-selection period is realized by being configured not to select any of the row lines while the scanning clock signal for shifting the signal is at a high potential logic ,
In the first process and the third process, the row line to be selected is switched based on a row reference signal,
The duty ratio of the row reference signal is a ratio between a row line selection time in the first process and the third process and a row line non-selection period in the second process. Driving method.

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