JP4742726B2 - Electronic device and electronic device - Google Patents

Description

  The present invention relates to an electronic device such as an electro-optical device, and an electronic apparatus.

  In recent years, an organic EL (Electronic Luminescence) element has attracted attention as a next-generation light-emitting device that replaces a conventional LCD (Liquid Crystal Display) element. The organic EL element has excellent characteristics as a display panel, such as being less self-luminous and less dependent on viewing angle, and having low power consumption because it does not require a backlight or reflected light. .

  As a conventional circuit (for example, Patent Document 1) for driving such an organic EL element, for example, a configuration shown in FIG. In this circuit, the drain of the drive transistor Tr1 is connected to a current-type driven element L (organic EL element) via a hole injection electrode. The switching transistor Tr3 has a gate connected to the scanning line S, a source connected to the data line D, and a drain connected to the gate of the driving transistor Tr1 and one end of the capacitive element C. The other end of the capacitive element C is connected to the power supply line V. The switching transistor Tr3 is on / off controlled by a selection potential supplied from the scanning line S to the gate, and charges are stored in the capacitor element C by the signal voltage supplied from the data line D during the on period.

  Then, a voltage is applied to the gate of the drive transistor Tr1 by the voltage between the terminals of the capacitive element C generated by this charge, and a current Ids corresponding to this voltage is supplied from the power supply line V to the driven element L. Note that the conductance between the source and the drain of the drive transistor Tr1 is controlled according to the voltage applied to the gate of the drive transistor Tr1, and thereby the luminance of the organic EL element as the driven element L is determined.

International Publication No. WO98 / 36407 Pamphlet

  However, in the manufacturing process of the display panel to which the above circuit is applied, the characteristics of the driven element L constituting the pixel can be relatively uniform across the pixels of the display panel. Regarding characteristics, it is difficult to homogenize over each pixel of the display panel according to various conditions such as film quality, film thickness, impurity concentration, diffusion region, material of gate insulating film, film thickness, operating temperature, and the like of the semiconductor film.

  Here, when each transistor in the circuit is composed of thin film transistors, the characteristics of each transistor are likely to vary. In particular, when a display panel is configured using the above circuit, the drain-source relationship with respect to the gate voltage of the drive transistor Tr1. Variation in current characteristics becomes a problem. That is, even when a common voltage is applied to the gate of the drive transistor Tr1 of each pixel, the amount of current flowing through the organic EL element varies from pixel to pixel due to the presence of the above-described variation, resulting in uneven emission luminance of each pixel. The image quality of the display panel will be significantly impaired.

  Under such circumstances, there is a need for a circuit for compensating for variations in driving transistors that drive current-type driven elements.

  The electronic device according to the present invention has a remarkable effect on the above problem.

  An electronic device according to the present invention is provided along a plurality of first signal lines, a plurality of second signal lines, a plurality of unit circuits, and an extending direction of the plurality of first signal lines. A plurality of power supply lines, and each of the plurality of unit circuits includes a drive transistor including a first terminal, a second terminal, and a first gate, and the plurality of second signal lines. A conduction state between the first terminal and the second terminal is set by a data signal supplied to each of the plurality of unit circuits via one second signal line. .

  In the above electronic device, it is preferable that the second terminal is connected to one of the plurality of power supply lines.

  In the electronic device, each of the plurality of unit circuits further includes a driven element, and the one power supply line and the driven element are electrically connected via the driving transistor. preferable.

  In the above electronic device, each of the plurality of unit circuits further includes a switching transistor having a second gate, and the second gate of the switching transistor is included in the plurality of first signal lines. Preferably, the switching transistor is connected to one first signal line, and either the source or the drain of the switching transistor is connected to the one second signal line.

  In the electronic device, it is preferable that a data current is supplied as the data signal, and the data current flows through the switching transistor.

  In the above electronic device, each of the plurality of unit circuits further includes a compensation transistor having a third gate, and either the source or the drain of the compensation transistor is connected to the first gate of the drive transistor. It may be connected.

  In the electronic device, the third gate may be connected to either the source or the drain of the compensation transistor.

  In the above electronic device, it is preferable that the number of transistors included in each of the plurality of unit circuits is only three.

  In the electronic device, the transistors included in each of the plurality of unit circuits may be only the driving transistor, the switching transistor, and the compensation transistor.

  In the above electronic device, the conductivity type of the compensation transistor and that of the drive transistor are preferably the same.

  In the above electronic device, the drive transistor is preferably a p-type transistor.

  In the electronic device, in the first period, the gate voltage of the first gate is set, and in the second period, the one power supply line and the driven element are connected via the driving transistor. It is preferable to be electrically connected.

  In the electronic device, a driving current is supplied to the driven element in the second period, and a current level of the driving current corresponds to the gate voltage of the first gate of the driving transistor. It is preferable.

  In the electronic device, the driven element is an electro-optical element, each of the plurality of first signal lines functions as a scanning line, and each of the plurality of second signal lines functions as a data line. May be.

  In the electronic device, an electro-optic element having the same color may be disposed as the driven element along each of the plurality of first signal lines.

  Another electronic device according to the present invention is provided along a plurality of first signal lines, a plurality of second signal lines, a plurality of unit circuits, and an extending direction of the plurality of first signal lines. A plurality of first power lines and a plurality of second power lines, each of the plurality of unit circuits including a driven element, a driving transistor, and a switching transistor, and the driving The transistor is disposed between the driven element and one second power line of the plurality of second power lines, and is connected to the second signal line via the switching transistor. The driving transistor is set in a conductive state by a data current flowing between one second signal line and one first power line of the plurality of first power lines, and the driven The current level of the drive current supplied to the element is Characterized in that it corresponds to the conduction state of the transistor.

  In the above electronic device, the drive transistor may be a p-type.

  The above electronic device can be mounted on an electronic device.

  The electronic circuit of the present invention includes a driven element, a driving transistor for controlling the amount of current to the driven element, a capacitive element connected to the gate of the driving transistor, a direct connection to the gate, and a diode connection. And a conduction state of the drive transistor is set in accordance with a data current supplied as a data signal that passes through the compensation transistor. According to this configuration, for example, since the compensation transistor is directly connected to the gate of the driving transistor, the two transistors are provided close to each other, so that the characteristics of the two transistors are made uniform or the characteristic ratio is increased. It is easy to adjust. In addition, the data current passing through the compensation transistor is directly reflected in the amount of current controlled by the drive transistor. Here, including the compensation transistor and a first switching transistor connected in series via one of the source and the drain, the other of the source and the drain of the first switching transistor is connected to the signal line Preferably, the data current passes through the compensation transistor when the signal line and the compensation transistor are electrically connected via the first switching transistor.

  In order to achieve the above object, the present invention includes a driven element, a driving transistor for controlling a current amount to the driven element, a capacitive element connected to a gate of the driving transistor, and the driving transistor. A first switching transistor connected to the gate of the first switching transistor; a first signal line connected to the gate of the first switching transistor; and a source or a drain of the first switching transistor. A unit circuit comprising a second signal line and a power supply line to which a power supply voltage is applied, wherein the unit circuit is connected in series between the power supply line and one of the source and the drain of the first switching transistor. A compensation transistor and a second switching transistor connected, the compensation transistor being diode-connected; Serial gate of the second switching transistor and said configuration being connected to a different third signal line and the first signal line. The present invention also provides a driven element that is current-driven, a driving transistor that controls the amount of current to the driven element, a capacitive element that is connected to the gate of the driving transistor, and a gate that is connected to the gate of the driving transistor. First switching transistor, a first signal line connected to the gate of the first switching transistor, and a second signal connected to either the source or drain of the first switching transistor Compensation connected in series between the power supply line and one of the source and drain of the first switching transistor, and a unit circuit including a power supply line to which a power supply voltage is applied A transistor and a second switching transistor, wherein the compensation transistor is diode-connected and the second switch is The gate of Tsu quenching transistor is characterized structure connected to the first signal line. In any configuration, it is possible to compensate for variations in the drive transistor. Here, when comparing the former and the latter, in the configuration according to the latter, since the gates of the first and second switching transistors are connected to the same first signal line, the third signal line is unnecessary. Thus, the number of wirings can be reduced. Note that a diode-connected transistor refers to a transistor in which either the source or the drain is connected to the gate. In the former configuration, it is preferable that a period in which both the first switching transistor and the second switching transistor are turned on is provided.

  Here, in the configurations according to the former and the latter, it is preferable that the second signal line is a data line that supplies a current as a data signal.

  Further, a structure in which electric charge corresponding to the amount of current flowing through the compensation transistor is stored in the capacitor element may be employed.

  It is also preferable that the current characteristics between the source and the drain with respect to the gate voltage are substantially the same in the driving transistor and the compensation transistor, but the amount of current flowing through the compensation transistor is larger than the amount of current controlled by the driving transistor. It may be a configuration.

  Furthermore, it is desirable that the driven element is an organic electroluminescence element.

  The drive transistor, the first and second switching transistors, and the compensation transistor are each preferably a thin film transistor, but the drive transistor is preferably a p-channel type with little secular change.

  In order to achieve the above object, the present invention provides a first switching in which either a source or a drain is connected to a data line while being turned on or off according to a scanning signal supplied to the first scanning line. A compensation transistor and a second switching transistor connected in series between a transistor, a power supply line to which a power supply voltage is applied, and either the source or the drain of the first switching transistor, the diode being a diode A compensation transistor that functions, a second switching transistor that is turned on or off in response to a scanning signal supplied to a second scanning line different from the first scanning line, and a gate that is a source of the first switching transistor Or a drive transistor connected to either one of the drains to drive the driven element When, characterized an arrangement for and a capacitor element for holding the gate voltage of the driving transistor.

  In addition, the present invention turns on or off according to a scanning signal supplied to the first scanning line, and has a first switching transistor in which either the source or the drain is connected to the data line, and the power supply voltage is A compensation transistor and a second switching transistor connected in series between the applied power line and either the source or the drain of the first switching transistor, the compensation transistor functioning as a diode; A second switching transistor that is turned on or off in accordance with a scanning signal supplied to the first scanning line; and a gate connected to either the source or the drain of the first switching transistor, and a driven element And a gate voltage of the driving transistor is maintained. It characterized an arrangement for and a capacitive element. In any configuration, it is possible to compensate for variations in the drive transistor. Here, comparing the former with the latter, in the configuration according to the latter, the gates of the first and second switching transistors are connected to the same scanning line, so that the second scanning line becomes unnecessary, and the wiring The number can be reduced.

  In order to achieve the above object, the present invention provides a switching transistor which is turned on or off in accordance with a scanning signal supplied to a scanning line and whose source or drain is connected to a data line, and the switching transistor Compensation functioning as a diode between the first power supply line to which the first power supply voltage is applied and at least one of the source and the drain of the switching transistor during at least part or all of the period during which the transistor is turned on A transistor and a gate connected to the other of the source and drain of the switching transistor and one of its own source or drain connected to a second power supply line to which a second power supply voltage is applied, And a gate voltage of the driving transistor is maintained. It characterized an arrangement for and a capacitive element.

  In addition, the present invention provides a compensation in which a gate is connected to a scanning line to which a scanning signal is supplied, a switching transistor in which either the source or the drain is connected to the data line, and a gate is connected to the source or the drain. Either a source or a drain of a first power supply line to which a first power supply voltage is applied in at least a part or all of a period in which the switching transistor is turned on in response to the scanning signal And a compensation transistor having one of the source and drain of the switching transistor connected to the other of the source and drain of the switching transistor, and a gate connected to the other of the source and drain of the switching transistor Either one of its own source or drain A driving transistor for driving a driven element connected to a second power supply line to which a power supply voltage of 2 is applied; and a capacitor element having one end connected to the gate of the driving transistor. . In any configuration, it is possible to compensate for variations in the driving transistor and to reduce one transistor.

  Here, it is desirable that the first power supply voltage and the second power supply voltage are substantially equal.

  In addition, various electronic devices such as an electro-optical device, a storage device, and a sensor device may be configured by using at least one unit circuit. For example, if the unit circuit is used as a pixel circuit, an electro-optical device can be configured. Such an electro-optical device may be mounted on an electronic apparatus.

  To achieve the above object, the present invention provides an electronic circuit including a plurality of unit circuits, each of the plurality of unit circuits including a driving transistor including a first terminal and a second terminal, and a third transistor. And a fourth terminal, the compensation transistor having the third terminal connected to the gate of the driving transistor, a fifth terminal and a sixth terminal, the gate of the driving transistor and the third terminal A switching transistor having the fifth terminal connected to the terminal, and a charge amount corresponding to a current flowing through the compensation transistor and the switching transistor, and one end connected to the gate of the driving transistor A capacitor element, and the fourth terminal is connected to a first power line together with the fourth terminal of another unit circuit among the plurality of unit circuits, The second terminal is connected to a second power supply line, and includes a control circuit that sets the first power supply line to a plurality of potentials, or controls disconnection / connection between the first power supply line and the power supply potential. Features the configuration. According to this configuration, the threshold voltage of the driving transistor can be compensated with a simple configuration.

  In this electronic circuit, in each of the unit circuits, there are no transistors other than the drive transistor, the compensation transistor, and the switching transistor. Therefore, the number of transistors to be used can be reduced by one compared with the conventional one while compensating for the threshold voltage of the driving transistor.

  In this electronic circuit, the gate of the compensation transistor is connected to the third terminal. Therefore, the current flowing through the driving transistor can be controlled by the voltage charged in the capacitor element.

  In this electronic circuit, the drive transistor and the compensation transistor have the same conductivity type. According to this, the driving transistor can be easily compensated.

  In this electronic circuit, an electronic element is connected to the first terminal. Since the threshold voltage of the driving transistor is compensated, the value of the current flowing through the electronic element can be accurately controlled. Note that the electronic element is a driven element that is current-driven.

  In this electronic circuit, the control circuit is a transistor including a seventh terminal and an eighth terminal, the seventh terminal is connected to a power supply, and the eighth terminal is connected to the first power supply line. Has been. According to this, the control circuit can be easily configured.

  In this electronic circuit, at least the potentials of the first power supply line and the second power supply line are set to substantially the same potential during a period in which a current flows through the compensation transistor and the switching transistor. Has been. According to this, a voltage substantially equal to the threshold voltage of the drive transistor generated by the compensation transistor can be reliably supplied to the gate of the drive transistor.

  In this electronic circuit, the first power supply line and the second power supply line can be electrically connected to a power supply having the same potential. According to this, the voltages supplied to the first power supply line and the second power supply line can be easily made substantially equal.

  In this electronic circuit, the threshold voltage of the driving transistor is set so as not to be higher than the threshold voltage of the compensation transistor. According to this, the threshold voltage of the driving transistor can be reliably compensated.

  In this electronic circuit, it is preferable that the amount of current flowing through the compensation transistor is larger than the amount of current controlled by the driving transistor. According to this configuration, when the switching transistor is turned on, electric charge corresponding to the amount of current flowing through the switching transistor and the compensation transistor can be quickly accumulated in the capacitor element.

  For example, various electronic devices such as an electro-optical device, a storage device, and a sensor device may be configured using at least one of the electronic circuits described above.

  In addition, the present invention is an electro-optical device including a plurality of unit circuits, each of the plurality of unit circuits including a driving transistor including a first terminal and a second terminal, a third terminal, and a third terminal 4, a compensation transistor having the third terminal connected to the gate of the driving transistor, a fifth terminal and a sixth terminal, the gate of the driving transistor and the third terminal having the terminal A switching transistor connected to a fifth terminal; an electro-optic element connected to the first terminal; and a charge amount corresponding to a current flowing through the compensation transistor and the switching transistor; A first power supply line connected to the fourth terminal including at least one other of the plurality of unit circuits. The unit circuit is also commonly connected to the fourth terminal, the second terminal is connected to a second power supply line, and the first power supply line is set to a plurality of potentials, or the first power supply A control circuit for controlling disconnection / connection between the line and the power supply potential is provided. According to this, since the number of transistors used is reduced by one as compared with the conventional one while compensating for the threshold voltage of the driving transistor, it is possible to improve the aperture ratio and improve the display quality. In addition, since the number of transistors constituting the unit circuit can be reduced by one as compared with the conventional one, the yield can be improved.

  In this electro-optical device, the electro-optical element is an organic EL element. According to this, by reducing the number of transistors used as compared with the conventional one, the light opening rate is high, and the luminance gradation of the organic EL element can be accurately controlled.

  In this electro-optical device, the control circuit is a transistor including a seventh terminal and an eighth terminal, the seventh terminal is connected to a power supply, and the eighth terminal is connected to the first power supply line. It is connected. It is possible to easily configure a unit in which the number of transistors used is reduced by one as compared with the conventional one while compensating for the threshold voltage of the driving transistor.

  In this electro-optical device, at least the potentials of the first power supply line and the second power supply line are substantially equal during a period in which a current flows through the compensation transistor and the switching transistor. Is set. According to this, a voltage substantially equal to the threshold voltage of the drive transistor generated by the compensation transistor can be reliably supplied to the gate of the drive transistor. In the electro-optical device, the first power supply line and the second power supply line can be electrically connected to a power supply having the same potential. According to this, the voltages supplied to the first power supply line and the second power supply line connected to the unit circuit can be easily made substantially equal.

  In this electro-optical device, the threshold voltage of the drive transistor is set so as not to be higher than the threshold voltage of the compensation transistor. According to this, the threshold voltage of the driving transistor can be reliably compensated. Therefore, the luminance gradation of the electro-optic element can be controlled with high accuracy.

  The present invention relates to a plurality of scanning lines, a plurality of data lines, unit circuits respectively arranged corresponding to intersections of the plurality of scanning lines and the plurality of data lines, and a plurality of first power supplies. Each of the unit circuits includes a driving transistor including a first terminal and a second terminal, a third terminal and a fourth terminal, and a gate of the driving transistor. A compensation transistor having the third terminal connected thereto, a switching transistor having a fifth terminal and a sixth terminal, the gate of the drive transistor and the third terminal being connected to the third terminal, A charge amount corresponding to a current value flowing through the electro-optic element connected to the first terminal, the compensation transistor and the switching transistor, and the gate of the drive transistor And the gates of the switching transistors included in the series of unit circuits are commonly connected to one scanning line, and the fourth terminal in the series of unit circuits is connected to one first power supply line. A control circuit is provided which is connected in common and sets each of the first power supply lines to a plurality of potentials, or controls disconnection / connection between one first power supply line and the power supply potential. According to this, since the number of transistors used is reduced by one compared with the conventional one while compensating the threshold voltage of all the drive transistors provided in the unit circuit, the aperture ratio is improved and the display quality is improved. It becomes possible to make it high. In addition, since the number of transistors constituting the unit circuit can be reduced by one as compared with the conventional one, the yield can be improved.

  In the electro-optical device, the second terminals in the series of unit circuits are commonly connected to one second power supply line. According to this, it becomes possible to improve display quality.

  In this electro-optical device, the gate of the compensation transistor is connected to its third terminal. According to this, a voltage substantially equal to the threshold voltage of the drive transistor generated by the compensation transistor can be reliably supplied to the gate of the drive transistor.

  In this electro-optical device, the electro-optical element is an organic EL element. According to this, the luminance gradation of the organic EL element can be controlled with high accuracy. In this electro-optical device, electro-optical elements of the same color are arranged along the scanning line. According to this, the aperture ratio can be further improved.

  The present invention includes a driving transistor including a first terminal and a second terminal, a compensation transistor including a third terminal and a fourth terminal, wherein the third terminal is connected to a gate of the driving transistor, A switching transistor including a fifth terminal and a sixth terminal, the gate of the driving transistor and the third terminal being connected to the fifth terminal, and a capacitor having one end connected to the gate of the driving transistor And a fourth terminal in the series of unit circuits is a method for driving an electronic circuit commonly connected to the first power supply line, and each of the fourth terminals of the series of unit circuits. Are electrically connected to a predetermined potential, and each of the switching transistors included in the series of unit circuits is turned on, whereby the current flowing through the compensation transistor is Holding a charge amount corresponding to the capacitor element, applying a voltage according to the charge amount to the drive transistor, and setting a conduction state between the first terminal and the second terminal; Electrically disconnecting each of the fourth terminals of the series of unit circuits from the predetermined potential. According to this, the electronic circuit can be driven by compensating the threshold voltage of the driving transistor.

  The present invention includes a driving transistor including a first terminal and a second terminal, a compensation transistor including a third terminal and a fourth terminal, wherein the third terminal is connected to a gate of the driving transistor, A switching transistor including a fifth terminal and a sixth terminal, the gate of the driving transistor and the third terminal being connected to the fifth terminal, and an electro-optic element connected to the first terminal; And a switching circuit included in a series of unit circuits each including a unit circuit including a capacitive element having one end connected to the gate of the driving transistor, corresponding to each intersection of the plurality of scanning lines and the plurality of data lines. A driving method of an electro-optical device in which a gate of a transistor is commonly connected to one scanning line, and a fourth terminal in the series of unit circuits is commonly connected to one first power line. Then, each of the fourth terminals of the series of unit circuits is electrically connected to a predetermined potential, and a scanning signal is supplied to each of the gates of the switching transistors included in the series of unit circuits to turn them on. During a period of electrical connection with a corresponding data line of a plurality of data lines, a charge amount corresponding to the current level of the current flowing through the compensation transistor is held in the capacitor element, and a voltage corresponding to the charge amount is set. Applying to the first gate to set a conduction state between the first terminal and the second terminal; and connecting each of the fourth terminals of the series of unit circuits from the predetermined potential. Electrically disconnecting. According to this, the electro-optical device can be driven by compensating the threshold voltage of the driving transistor.

  Since the electronic device according to the present invention is mounted with the electronic circuit or the electro-optical device, the threshold voltage of the driving transistor in the circuit can be compensated, and one transistor is used as compared with the conventional one. Since it can reduce, the yield of an electronic device can be improved.

  As described above, according to the present invention, it is possible to supply a target current to a current-type driven element such as an organic EL element without being affected by variations in driving transistors. .

Embodiments of the present invention will be described below with reference to the drawings.
<First Embodiment>
First, a first embodiment of the present invention will be described. FIG. 1 is a diagram illustrating a configuration of an electro-optical device to which the unit circuit according to the first embodiment is applied. As shown in this figure, in this electro-optical device, a plurality of scanning lines (S1, S2, S3,...) And a plurality of data lines (D1, D2, D3,...) Intersect each other. The pixel circuits 20 which are examples of the unit circuit according to the present embodiment are provided in a matrix at each of the intersections.

  The scanning line driving circuit 130 applies the selection potential Vsel to the scanning lines S1, S2, S3,. The data line driving circuit 140 supplies a data current Idata as a data signal to the data lines D1, D2, D3,.

  In FIG. 1, a power supply line V described later is omitted. In this description, the part where the pixel circuits 20 are arranged in a matrix may be called a display panel. In the present embodiment, one pixel to be displayed corresponds to one pixel circuit 20, but one pixel may be displayed by a plurality of sub-pixels.

  FIG. 2A is a circuit diagram showing a detailed configuration of the pixel circuit 20 as a unit circuit according to the present embodiment. It should be noted that the pixel circuit in this figure is one of those corresponding to the intersection of a general scanning line S and data line D.

  In this figure, the driven element L is, for example, a current-driven organic EL element, and is represented as a diode in this figure. In addition to the driven element L, this unit circuit includes a driving transistor Tr1, a switching transistor Tr2 (second switching transistor), a switching transistor Tr3 (first switching transistor), a compensation transistor Tr4, and a capacitive element C that accumulates charges. Is included. Among them, the drive transistor Tr1 and the compensation transistor Tr4 are both p-channel thin film transistors (TFTs) with little deterioration over time, and the switching transistors Tr2 and Tr3 are n-channel TFTs.

  Note that the selection of the p-channel or n-channel conductivity type for each transistor is not limited to the one shown here. In addition, the switching transistors Tr2 and Tr3 may have different conductivity types (whether they are n-channel type or p-channel type). However, when the conductivity types of the switching transistors Tr2 and Tr3 are different from each other, a scanning line having a logic level exclusive to the scanning line S is separately provided, and a switching transistor having a p-channel type is provided. Need to connect the gates.

  One end of the driven element L is connected to the drain of the driving transistor Tr1 through a hole injection electrode (not shown), while the other end of the driven element L is connected to the cathode E.

  The source of the driving transistor Tr1 is connected to the power supply line V, and the gate thereof is connected to one end of the capacitive element C, the drain of the switching transistor Tr3, and the drain of the transistor Tr4. The other end of the capacitive element C is connected to the power supply line V.

  The drain of the compensation transistor Tr4 is connected to its own gate. Therefore, the compensation transistor Tr4 is diode-connected.

  The drain and gate of the compensation transistor Tr4 are connected to one end of the capacitive element C (the gate of the driving transistor Tr1 and the drain of the switching transistor Tr3), and the source of the compensation transistor Tr4 is connected to the source of the switching transistor Tr2. Has been. The drain of the switching transistor Tr2 is connected to the power supply line V. The source of the switching transistor Tr3 is connected to the data line D, and the gates of the switching transistors Tr2 and Tr3 are connected to the scanning line S, respectively.

Next, the operation of the unit circuit shown in FIG. The switching transistors Tr2 and Tr3 are ON / OFF controlled by a selection potential Vsel applied to each gate via the scanning line S. In this embodiment, since the switching transistors Tr2 and Tr3 are both n-channel type, they are turned on when the selection potential Vsel is at a high level. When the data current Idata is supplied via the data line D when the switching transistors Tr2 and Tr3 are on, the potentials of the gate and the source of the compensation transistor Tr4 become equal.
Vgs (potential difference between gate and source) = Vds (potential difference between drain and source)
Thus, the charge corresponding to this state is stored in the capacitive element C, whereby the voltage between the terminals of the capacitive element C is applied to the gate of the drive transistor Tr1. That is, the gate voltage of the drive transistor Tr1 is controlled by the amount of the data current Idata supplied from the data line D, and the current amount between the drain and source of the drive transistor Tr1 is thereby controlled, and the current Ids flowing through the driven element L. Will be controlled.

  In the above circuit, the drive transistor Tr1 and the compensation transistor Tr4 form a so-called current mirror circuit, and the value of the current Ids between the drain and source of the drive transistor Tr1, that is, the current supplied to the driven element L Is proportional to the amount of current between the drain and source of the compensation transistor Tr4.

  The ratio of the current Ids between the drain and source of the drive transistor Tr1 and the data current Idata flowing between the drain and source of the compensation transistor Tr4 is determined by the characteristics of the drive transistor Tr1 and the compensation transistor Tr4. Accordingly, the drive coefficient Tr1 and the compensation transistor Tr4 are driven by matching the gain coefficient (the amount of current flowing through the transistor when a constant voltage is applied to the gate and source of the transistor), which is one of the characteristics of the drive transistor Tr1 and the compensation transistor Tr4. The current Ids flowing through the transistor Tr1 can be matched with the data current Idata flowing through the compensation transistor Tr4. In particular, in this embodiment, since the drain of the compensation transistor Tr4 is directly connected to the gate of the drive transistor Tr1, the data current Idata passing through the compensation transistor Tr4 is directly reflected in the current Ids controlled by the drive transistor. , The consistency between the two can be improved.

  For this reason, if the display panel is configured so that the gain coefficients of the drive transistor Tr1 and the compensation transistor Tr4 match, even if the drive transistor Tr1 formed for each pixel of the display panel varies, the display panel The same current Ids can be supplied to the driven element L included in each pixel. Therefore, luminance unevenness due to characteristic variations of the drive transistor Tr1 can be suppressed.

  As is well known, in the manufacturing process of the display panel including the driven element L, it is easy to make the characteristics of adjacent transistors coincide with each other. As described above, in the present embodiment, the drain of the compensation transistor Tr4 is close enough to be directly connected to the gate of the drive transistor Tr1. For this reason, in the same pixel circuit, it is not difficult to configure the drive transistors Tr1 and the compensation transistors Tr4 to have the same gain coefficient. Therefore, manufacturing a display panel with less luminance unevenness is possible. It is relatively easy.

  In this embodiment, the gate voltage of the drive transistor Tr1 is set according to the data current Idata supplied from the data line drive circuit 140. The drive transistor Tr1 and the compensation transistor Tr4 constitute a so-called current mirror circuit. Therefore, the fluctuation of the current Ids between the drain and source of the drive transistor Tr1 due to a temperature change or the like is suppressed, and stabilization is also achieved.

  In the circuit of FIG. 2A, the compensation transistor Tr4 is interposed between the switching transistor Tr2 and the switching transistor Tr3. However, as shown in FIG. You may make it interpose between. In this circuit as well, the drain-source current Ids of the drive transistor Tr1 is determined by the data current Idata flowing through the compensation transistor Tr4, as in the circuit shown in FIG.

  FIG. 3 is a timing chart for explaining the operation of the unit circuit shown in FIG.

  First, the selection potential Vsel supplied from the scanning line driving circuit 130 to the scanning line S is set to the high level, while the data line driving circuit 140 supplies the data current Idata to the data line D.

  When the selection potential Vsel becomes a high level, both the switching transistors Tr2 and Tr3 are turned on, so that the data current Idata passes through the path of the power supply line V, the switching transistor Tr2, the compensation transistor Tr4, the switching transistor Tr3, and the data line D. Flowing.

  The gate voltage of the drive transistor Tr1 is determined according to the data current Idata, the current Ids corresponding to the gate voltage is supplied from the power supply line V, and the driven element L emits light. Held by element C. Therefore, even when the selection potential Vsel becomes a low level and both the switching transistors Tr2 and Tr3 are turned off, the current Ids corresponding to the held gate voltage continues to flow to the driven element L. Therefore, the driven element L This light emission state is maintained until the next time the selection potential Vsel becomes high level again.

  Incidentally, the gain coefficients of the drive transistor Tr1 and the compensation transistor Tr4 constituting the current mirror circuit are not limited to the case where they are matched as described above, and the size and scanning of the display panel to which this unit circuit is applied. It can be appropriately set according to various requirements such as frequency.

  For example, the gain coefficient of the compensation transistor Tr4 may be larger than the gain coefficient of the drive transistor Tr1. According to such a configuration, the current Idata flowing through the compensation transistor Tr4 is larger than the current Ids flowing through the drive transistor Tr1, so that the time required for charge accumulation in the capacitive element C can be shortened. For this reason, it is possible to cope with an increase in the scanning frequency required with an increase in the number of pixels of the display panel and an increase in size.

  On the contrary, the gain coefficient of the compensation transistor Tr4 may be smaller than the gain coefficient of the drive transistor Tr1. According to this configuration, the data current Idata generated by the compensation transistor Tr4 is smaller than the current Ids generated by the drive transistor Tr1, so that the power consumed when the charge is accumulated in the capacitive element C can be suppressed.

  Further, in FIG. 2A or 2B, the gates of the switching transistors Tr2 and Tr3 in the pixel circuits 20 in the same row are connected to the same scanning line S. The present invention is not limited to this configuration, and a scanning line different from the scanning line S is provided, that is, two scanning lines are provided per row, and the gates of the switching transistors Tr2 and Tr3 are connected to different scanning lines S. It is also good. Here, when both configurations are compared, the configuration according to the former (the configuration having one scanning line per pixel circuit 20 in one row) is the second configuration (the configuration having two scanning lines per pixel circuit 20 in one row). Compared with the configuration having a line), the area required for the wiring can be reduced, so that the aperture ratio can be easily improved by securing an effective optical area.

  Next, a manufacturing process of the pixel circuit 20 will be described with reference to a manufacturing process of TFTs and pixels.

First, amorphous silicon is formed on the glass substrate 1 by PECVD using SiH ₄ or LPCVD using Si ₂ H ₆ , and the amorphous silicon is formed by laser irradiation such as excimer laser or solid phase growth. The polycrystalline silicon layer 2 is formed by polycrystallization (see FIG. 4A).

  After the polycrystalline silicon layer 2 is patterned to form the gate insulating film 3, a gate 4 is further formed (see FIG. 4B).

  Subsequently, impurities such as phosphorus and boron are implanted into the polycrystalline silicon layer 2 in a self-aligning manner using the gate 4 as a mask to form transistors 5a and 5b. Here, the conductivity types of the transistors 5a and 5b are p-type and n-type, respectively. After the first interlayer insulating film 6 is formed, a contact hole is opened, and further, a source and a drain 7 are formed (see FIG. 4C).

  Then, after the second interlayer insulating film 8 is formed, a contact hole is opened, and a pixel electrode 9 made of ITO (Indium Tin Oxide) is formed (see FIG. 4D).

  An adhesion layer 10 is formed so as to cover the second interlayer insulating film 8 and the pixel electrode 9 thus formed, and an opening is formed corresponding to the light emitting region. Further, the interlayer layer 11 is formed, and an opening is formed corresponding to the light emitting region (see FIG. 5A).

Next, the wettability of the substrate surface is controlled by plasma treatment such as oxygen plasma or CF ₄ plasma. Thereafter, the hole injection layer 12 and the light emitting layer 13 are formed by a liquid phase process or a vacuum process, respectively. Examples of the liquid phase process include spin coating, squeegee coating, and an ink jet process. Examples of the vacuum process include sputtering and vapor deposition. Further, the cathode 14 containing a metal such as aluminum is formed. Finally, the sealing layer 15 is formed to complete the organic EL element (see FIG. 5B).

Here, the role of the adhesion layer 10 is to improve the adhesion between the substrate and the interlayer layer 11 and to obtain an accurate light emitting area. The role of the interlayer layer 11 is to reduce the parasitic capacitance by moving the cathode 14 away from the gate 4, the source and the drain 7, and when forming the hole injection layer 12 and the light emitting layer 13 by a liquid phase process. It is to control wettability so that accurate patterning can be performed. An electron transport layer (not shown) may be provided on the light emitting layer 13.
Second Embodiment
In the first embodiment described above, for example, by forming the drive transistor Tr1 and the compensation transistor Tr4 to have the same gain coefficient, the current Ids between the drain and the source of the drive transistor Tr1 is changed to the drain of the compensation transistor Tr4. The data current Idata flowing between the sources could be matched. For this reason, even if characteristic variation occurs in the drive transistor Tr1, the current Ids having the same magnitude can be supplied to the driven element L over each pixel, and luminance unevenness caused by characteristic variation of the drive transistor can be suppressed. It has become possible.

  However, in the first embodiment, as is apparent from FIG. 2A or 2B, a total of four transistors are required in one pixel. For this reason, when viewed as a display panel, the yield and the aperture ratio are likely to decrease by the number of transistors.

  Therefore, a second embodiment will be described in which the number of transistors required in one pixel is reduced after suppressing the luminance unevenness due to the characteristic variation of the drive transistor Tr1.

  FIG. 6 is a block diagram showing a configuration of an organic EL display to which the unit circuit according to the second embodiment is applied.

  As shown in this figure, the organic EL display 100 includes a signal generation circuit 110, a display panel unit 120, a scanning line driving circuit 130, a data line driving circuit 140, and a power supply line control circuit 150.

  The signal generation circuit 110, the scanning line driving circuit 130, the data line driving circuit 140, and the power supply line control circuit 150 in the organic EL display 100 may be configured by independent electronic components. For example, the signal generation circuit 110, the scanning line driving circuit 130, the data line driving circuit 140, and the power supply line control circuit 150 may each be configured by a one-chip semiconductor integrated circuit device. In addition, all or part of the signal generation circuit 110, the scanning line driving circuit 130, the data line driving circuit 140, and the power supply line control circuit 150 is configured by a programmable IC chip, and the function is determined by a program written in the IC chip. It may be realized by software.

  The signal generation circuit 110 creates a scanning control signal and a data control signal for displaying an image on the display panel unit 120 based on image data from an external device (not shown). The signal generation circuit 110 outputs the scanning control signal to the scanning line driving circuit 130 and outputs the data control signal to the data line driving circuit 140. Further, the signal generation circuit 110 outputs a timing control signal to the power supply line control circuit 150.

  FIG. 7 is a diagram illustrating an internal configuration of the display panel unit 120 and the data line driving circuit 140. As shown in this figure, the display panel unit 120 includes M data lines Xm (m = 1 to M; m is an integer) extending along the column direction and N scanning lines extending along the row direction. Each pixel circuit 200 as a unit circuit is provided at a position corresponding to an intersection with Yn (n = 1 to N; n is an integer). That is, the pixel circuits 200 are arranged in a matrix by being connected to the data lines Xm extending along the column direction and the scanning lines Yn extending along the row direction to constitute an electronic circuit. .

  Further, a first power supply line L1 and a second power supply line L2 are provided for each row along the row direction (extending direction of the scanning line).

  The pixel circuit 200 includes an organic EL element 210 similar to the driven element L of the first embodiment. The pixel circuit 200 for one row is connected to the first power supply line L1 and the second power supply line L2 corresponding to the row. That is, the pixel circuits 200 for one row share the first power supply line L1 and the second power supply line L2.

  Here, the first power supply line L1 in each row is indirectly connected to the voltage supply line VL through the transistor Q, but the second power supply line L2 in each row is directly connected to the voltage supply line VL. The driving voltage Vdd is supplied to the pixel circuit 200 by being connected to VL.

  The scanning line driving circuit 130 selects one scanning line in order from among the plurality of scanning lines Yn according to the scanning control signal output from the signal generation circuit 110, and selects the selected scanning line. Is supplied.

  The data line driving circuit 140 includes a line driver 230 for each data line, and one line driver 230 is connected to one end of the corresponding data line. Here, the line driver 230 generates the data current Idata based on the data control signal output from the signal generation circuit 110 and supplies the data current Idata to the corresponding data line.

  Generally speaking, the m-th line driver 230 indicates the luminance of the organic EL element 210 included in the pixel circuit 200 located in the n-th row and m-th column when the n-th scanning line Yn is selected. The data current Idata to be supplied is supplied to the m-th data line Xm.

  In the pixel circuit 200, as described later, when an internal state is set according to the data current Idata supplied to the corresponding data line, a drive current supplied to the organic EL element 210 according to the internal state. Ids is controlled.

  The power supply line control circuit 150 supplies a power supply line control signal to the power supply line control line F provided for each row to control on / off of the transistors Q in each row. Specifically, based on the scanning control signal output from the signal generation circuit 110, the power supply line control circuit 150 completely matches the scanning signal indicating the selection of the scanning line of the row with respect to the power supply line control signal of a certain row. Or generated so that the selected states partially overlap in time, and supplied to the power supply line control line F corresponding to the row.

  FIG. 8 is a circuit diagram illustrating a detailed configuration of the pixel circuit 200 as a unit circuit according to the second embodiment. In this figure, among the pixel circuits 200, one corresponding to the intersection of the scanning line Yn in the nth row and the data line Xm in the mth column is illustrated.

  As shown in FIG. 8, the pixel circuit 200 includes three transistors and one capacitor. Specifically, the pixel circuit 200 includes a drive transistor Trd, a compensation transistor Trc, a switching transistor Trs, and a holding capacitor C1 as a capacitive element.

  In this embodiment, the conductivity type of the drive transistor Trd and the compensation transistor Trc is p-type (p-channel), and the conductivity type of the switching transistor Trs is n-type (n-channel). The selection of the conductivity type is not limited to that shown here. Further, the transistor included in the pixel circuit 200 is usually formed of a TFT (Thin Film Transistor).

  The drain (first terminal) of the drive transistor Trd is connected to the anode of the organic EL element 210. The cathode of the organic EL element 210 is grounded. The source (second terminal) of the drive transistor Trd is connected to the second power supply line L2. The second power supply line L2 is connected to a voltage supply line VL provided on the right end side of the display panel unit 120. The gate (first gate) of the drive transistor Trd is connected to the node N. The node N is a connection point between the gate of the drive transistor Trd, one end of the holding capacitor C1, the drain of the switching transistor Trs, and the drain of the compensation transistor Trc. The other end of the holding capacitor C1 is connected to the source of the drive transistor Trd, that is, the second power supply line L2.

  The drain (sixth terminal) of the switching transistor Trs is connected to the data line Xm, and the drain (fifth terminal) is connected to the node N. The gate of the switching transistor Trs is connected to the scanning line Yn. Therefore, when the scanning signal indicating that the scanning line Yn is selected is supplied to the scanning line Yn (when the scanning signal becomes high level), the switching transistor Trs is turned on.

  Not only the drain (third terminal) of the compensation transistor Trc but also its gate is connected to the node N. The source (fourth terminal) of the compensation transistor Trc is connected to the first power supply line L1. Therefore, the compensation transistor Trc functions as a diode having a forward direction from the first power supply line L1 to the node N.

  The transistors arranged and formed in each pixel circuit 200 are usually composed of TFTs (thin film transistors).

  The first power supply line L1 is connected to the voltage supply line VL via a transistor Q as a control circuit. The first power line L1 and the second power line L2 constitute the power line L.

  The gate of the transistor Q is connected to the power supply line control line F. The transistor Q is either in an electrically disconnected state (off state) or in an electrically connected state (on state) in accordance with a power line control signal supplied from the power line control circuit 150 via the power line control line F. It becomes. Since the conductivity type of the transistor Q is p-type (p-channel), the transistor Q is turned on when the power supply line control signal becomes low level.

  Next, a driving method of the pixel circuit 200 in the organic EL display 100 will be described with reference to FIG. FIG. 9 is a timing chart for explaining this driving method.

  First, in the data writing period Trp, when a scanning signal indicating selection of the scanning line Yn is supplied by the scanning line driving circuit 130 (when the scanning line Yn becomes high level), the switching transistor Trs is turned on. In accordance with such supply of the scanning signal, a low-level power supply line control signal for turning on the transistor Q is supplied to the power supply line control line F, so that the transistor Q is also turned on in the data write period Trp. .

  Therefore, a current flows through a path including the voltage supply line VL, the transistor Q, the first power supply line L1, the compensation transistor Trc, the switching transistor Trs, and the data line Xm. The current flowing at this time is the data current Idata generated by the line driver 230, that is, the data current Idata that indicates the luminance of the organic EL element 210 included in the pixel circuit 200 of n rows and m columns.

  Then, a voltage VC1 corresponding to the data current Idata flowing at this time is generated at the node N, held in the holding capacitor C1, and applied to the gate of the drive transistor Trd. For this reason, the drive current Ids flows through the drive transistor Trd, and the organic EL element 210 starts to emit light.

  Next, when the data writing period Trp ends and reaches the light emission period Tel, the scanning line Yn becomes low level. For this reason, the switching transistor Trs is turned off. Since the power supply line control signal changes to a high level in accordance with the state transition of such a scanning signal, the transistor Q is also turned off. Even when both the switching transistor Trs and the transistor Q are turned off, the voltage VC1 held by the holding capacitor C1 is applied to the gate of the driving transistor Trd. This is maintained until the scanning line Yn is selected again (until the transistor Q is turned on again).

  Such an operation is also executed simultaneously in each of the pixel circuits 200 for one row corresponding to the scanning line Yn. Further, regarding the entire pixel circuit 200, the scanning lines in the first, second, third,.

  Further, the data writing period Trp and the light emission period Tel form a driving cycle Tc. The driving cycle Tc means a cycle in which the luminance of the organic EL element 210 is updated once, and is synonymous with a so-called frame period (vertical scanning period).

  In order to briefly explain the operation mechanism of the pixel circuit, if the threshold voltage Vth2 of the compensation transistor Trc is considered, the potential Vn at the node N is the voltage VC1 generated in the holding capacitor C1. And a value obtained by subtracting the threshold voltage Vth2 of the compensation transistor Trc from the drive voltage Vdd (Vn = Vdd−Vth2). That is, it is expressed by the following formula (1).

Vg = VC1 + Vdd−Vth2 (1)
Since the gate-source voltage Vgs of the drive transistor Trd is the difference (Vg−Vs) between the gate potential Vg and the source potential Vs (= Vdd) of the drive transistor Trd, the gate-source voltage Vgs of the drive transistor. Can be transformed as shown in the following equation (2).

Vgs = Vg−Vs (2)
Substituting Vg and Vs (= Vdd) shown in equation (1) into equation (2), the following equation (3) is obtained.

Vgs = VC1 + Vdd−Vth2−Vdd
= VC1-Vth2 (3)
Here, as described above, if the threshold voltage Vth2 of the compensation transistor Trc is substantially equal to the threshold voltage Vth1 of the drive transistor Trd, the gate-source voltage Vgs expressed by the equation (3) is expressed by the following equation (4). Can be expressed as:

Vgs = VC1-Vth1 (4)
On the other hand, the current Ids flowing between the source and drain of the drive transistor Trd is expressed by the following equation (5).

Ids = (1/2) β (−Vgs−Vth1) ² (5)
Β in this equation is a gain coefficient,
β = (μAW / L)
Indicated by Here, μ represents carrier mobility, A represents gate capacitance, W represents channel width, and L represents channel length.

Substituting Vgs shown in equation (4) into equation (5),
Ids = (1/2) β (−VC1 + Vth1−Vth1) ²
= (1/2) β (−VC1) ² (6)
As can be seen from Equation (6), the current Ids flowing between the source and drain of the drive transistor Trd is determined only by the voltage VC1 generated in the holding capacitor C1.

  In general, it is easy to align the threshold characteristics and the like of transistors adjacent to each other. For this reason, since it is easy to align the threshold voltage characteristics of the compensation transistor Trc and the drive transistor Trd that are very close to each other as in the same pixel circuit, the drive current Ids that flows through the organic EL element 210 is changed to the threshold voltage of the drive transistor Trd. It can be determined by the data current Idata without depending on the characteristics.

  That is, also in the second embodiment, since the drain of the compensation transistor Trc is directly connected to the gate of the drive transistor Trd, as a result of proximity, it is easy to make the characteristics of both transistors uniform and pass through the compensation transistor Trc. The data current Idata to be reflected is directly reflected on the current Ids controlled by the drive transistor Trd, so that the consistency between the two can be improved.

  Therefore, even if the threshold voltage of the drive transistor Trd differs for each pixel circuit 200 in the display panel unit 120 due to variations, the current Ids flowing through the organic EL element 210 is not affected. It is possible to suppress the luminance unevenness as in the first embodiment.

  Furthermore, in the second embodiment, the number of transistors formed in one pixel circuit 200 is three, and can be reduced by one compared with four in the pixel circuit 20 of the first embodiment. For this reason, according to the second embodiment, it is possible to suppress the luminance unevenness due to the characteristic variation of the drive transistor, and to suppress the yield reduction due to the defect of the transistor, and the opening area per pixel. Can be ensured and the aperture ratio can be improved.

  In the second embodiment, it may be set as appropriate as in the first embodiment. For example, the gain coefficient of the compensation transistor Trc may be larger than the gain coefficient of the drive transistor Trd. According to such a configuration, the current Idata flowing through the compensation transistor Trc is larger than the current Ids flowing through the drive transistor Trd, so that the time required for charge accumulation in the capacitive element C can be shortened. For this reason, it is possible to cope with an increase in the scanning frequency required with an increase in the number of pixels of the display panel and an increase in size.

  On the contrary, the gain coefficient of the compensation transistor Trc may be smaller than the gain coefficient of the drive transistor Trd. According to this configuration, the data current Idata generated by the compensation transistor Trc is smaller than the current Ids generated by the drive transistor Trd, so that it is possible to suppress power consumed during charge accumulation in the capacitive element C.

  In the second embodiment, it is preferable that the switching transistor Trs and the transistor Q are both set to be in the on state during the data write period Trp and set to be in the off state during the light emission period Tel. Not. In addition, the drive current Ids is preferably set so that it does not flow through the organic EL element 210 during the data write period Trp but flows during the light emission period Tel, but is not particularly limited thereto.

  By increasing the channel width of the compensation transistor Trc and the like with respect to the drive transistor Trd, the data current Idata is supplied even when low-gradation data is supplied compared to the case where the size of the drive transistor Trd and the compensation transistor Trc is the same. Since a relatively high current can be used, an operation delay due to parasitic capacitance or the like can be suppressed.

  In the pixel circuit 200, the threshold voltage Vth1 of the drive transistor Trd is preferably set to be equal to or higher than the threshold voltage Vth2 of the compensation transistor Trc, but the present invention is not limited to this. For example, when the organic EL element 210 emits light even in the data writing period Trp, the threshold voltage Vth1 of the drive transistor Trd may be set to be lower than the threshold voltage Vth2 of the compensation transistor Trc.

  In addition, the period in which the power supply line control signal is supplied and the period in which the scanning signal is supplied are set to be completely or partially overlapped in time. That is, the transistor Q is set to be in an on state in substantially the same period as the data writing period Trp. However, by supplying the power supply line control signal for turning on the transistor Q before the scanning signal indicating the selection of the scanning line, the gate voltage of the driving transistor Trd set by the data current Idata is set by the driving voltage Vdd. This can be desirable because it can be suppressed from changing.

  In FIG. 7, the voltage supply line VL is provided on the right end side of the display panel unit 120. However, the present invention is not limited to this. For example, the voltage supply line VL may be provided on the left end side of the display panel unit 120. Although the transistor Q and the voltage supply line VL are configured separately from the power supply line control circuit 150, they may be provided inside the power supply line control circuit 150.

Furthermore, although the transistor Q is used as the control circuit, a switch that can be switched between a low potential and a high potential may be provided instead of the transistor Q. In order to improve the driving capability of the driving transistor Trd, the impedance of the second power supply line L2 and the voltage supply line VL may be sufficiently lowered by using a voltage follower circuit including a buffer circuit and a source follower circuit.
<Application of Second Embodiment>
In the display panel shown in FIG. 7, for the sake of simplification of explanation, an example in which gradation display is performed in a single color has been described. However, when the function as an actual display panel is considered, color display is required. May be. Therefore, an electro-optical device for color display will be described as an application example of the second embodiment.

  FIG. 10 is a block diagram illustrating a configuration of an electro-optical device according to this application example. The electro-optical device in FIG. 10 is an organic EL display using an organic EL element as an electro-optical element. The same components as those in FIG. 7 are given the same reference numerals, and detailed description thereof is omitted.

  In FIG. 10, a display panel unit 120 includes a red pixel circuit 200R having an organic EL element 210 that emits red light, a green pixel circuit 200G having an organic EL element 210 that emits green light, The pixel circuit 200B for blue has the organic EL element 210 which radiates | emits blue light.

  Here, in the display panel unit 120, the red pixel circuit 200R is arranged in the first row, the green pixel circuit 200G is arranged in the second row, and the blue pixel circuit 200B is arranged in the third row. The red pixel circuit 200R is arranged in the fourth row, and this arrangement is repeated thereafter. That is, the same color pixel circuits are arranged for one row along the extending direction of the scanning lines, and the same color pixel circuits for one row connect the scanning lines, the first power supply lines L1 and the second power supply lines L2. I also use it.

  The circuit configurations of the pixel circuits 200R, 200G, and 200B for each color are the same as the circuit configuration of the pixel circuit 200 shown in FIG.

  In this application example, three voltage supply lines are provided to supply a dedicated drive voltage for each color. That is, the voltage supply line VLR supplies the drive voltage VddR of the red pixel circuit 200R, the voltage supply line VLG supplies the drive voltage VddG of the green pixel circuit 200G, and the voltage supply line VLB is the blue pixel circuit. A drive voltage VddB of 200B is supplied.

  Further, the first power supply line L1 and the second power supply line L2 are provided for each row along the row direction. Here, the first power supply line L1 corresponding to the red pixel circuit 200R located in the same row is indirectly connected to the voltage supply line VLR via the transistor QR, and when the transistor QR is turned on. While supplying the drive voltage VddR, the second power supply line L2 is directly connected to the voltage supply line VLR and always supplies the drive voltage VddR.

  The same applies to the green pixel circuit 200G and the blue pixel circuit 200B located in the same row. That is, the first power supply line L1 for the green pixel circuit 200G located in the same row supplies the drive voltage VddG when the transistor QG is turned on, while the second power supply line L2 always supplies the drive voltage VddG. The first power supply line L1 for the blue pixel circuit 200G that is supplied and located in the same row supplies the drive voltage VddB when the transistor QB is turned on, while the second power supply line L2 VddB is always supplied.

  Next, a driving method of the pixel circuits 200R, 200G, and 200B in the electro-optical device according to the application example will be described.

  First, when the scanning line Y1 of the first row is selected and a scanning signal indicating that fact is supplied (when the scanning line Y1 becomes high level), each of the red pixel circuits 200R located in the first row The switching transistor Trs is turned on. When such a scanning signal is supplied, the power supply line control signal in the first row becomes a low level, so that the transistor QR in the first row is also turned on.

  Further, in accordance with the supply of the scanning signal, the data current Idata that indicates the luminance of the organic EL element 210 included in the pixel circuit 200R in the first row is supplied to the data line of each column.

  Therefore, in each of the pixel circuits 200R in the first row, charges corresponding to the data current Idata are accumulated in the holding capacitor C1, thereby holding the gate voltage of the driving transistor Trd. Accordingly, the drive transistor Trd starts to supply the drive current Ids corresponding to the gate voltage to the red organic EL element 210, and thereby the red organic EL element 210 starts to emit light.

  Subsequently, when the scanning line Y2 in the second row is selected and a scanning signal indicating that fact is supplied (when the scanning line Y2 becomes high level), each of the green pixel circuits 200G located in the second row The switching transistor Trs is turned on. When such a scanning signal is supplied, the power supply line control signal in the second row becomes a low level, so that the transistors QG in the second row are also turned on.

  In synchronization with the supply of the scanning signal, the data current Idata that indicates the luminance of the organic EL element 210 included in the pixel circuit 200G in the second row is supplied to the data line of each column.

  Therefore, in each of the pixel circuits 200G in the second row, the charge corresponding to the data current Idata is accumulated in the holding capacitor C1, thereby holding the gate voltage of the driving transistor Trd. Accordingly, the drive transistor Trd starts to supply the drive current Ids corresponding to the gate voltage to the green organic EL element 210, and thereby the green organic EL element 210 starts to emit light.

  When the second row scanning line Y2 is selected, the switching transistor Trs and the transistor QR are both turned off in each of the pixel circuits 200R in the first row, but the driving transistor Trd is connected to the holding capacitor C1. Since the drive current Ids corresponding to the gate voltage held by is supplied to the red organic EL element 210, the light emission state of the red organic EL element 210 is maintained.

  Next, when the scanning line Y3 in the third row is selected and a scanning signal indicating that fact is supplied (when the scanning line Y3 becomes high level), each of the blue pixel circuits 200B located in the third row The switching transistor Trs is turned on. When such a scanning signal is supplied, the power supply line control signal in the third row becomes low level, so that the transistors QB in the third row are also turned on.

  In synchronization with the supply of the scanning signal, the data current Idata that indicates the luminance of the organic EL element 210 included in the pixel circuit 200B in the third row is supplied to the data line of each column.

  Therefore, in each of the pixel circuits 200G in the third row, the charge corresponding to the data current Idata is accumulated in the holding capacitor C1, thereby holding the gate voltage of the driving transistor Trd. Accordingly, the drive transistor Trd starts to supply the drive current Ids corresponding to the gate voltage to the blue organic EL element 210, and thereby the blue organic EL element 210 starts to emit light.

  When the third row scanning line Y3 is selected, the switching transistor Trs and the transistor QR are both turned off in each of the pixel circuits 200R in the second row, but the driving transistor Trd is connected to the holding capacitor C1. Since the driving current Ids corresponding to the gate voltage held by is supplied to the green organic EL element 210, the light emission state of the green organic EL element 210 is maintained.

  Thereafter, when the same operation is repeated in order up to the fourth, fifth, sixth,..., Nth rows, the first scanning line Y1 is selected again, and the data (data current Idata accumulated in the holding capacitor C1) is selected. The electric charge according to (1) is rewritten.

  Thus, also in the organic EL display 100 according to the application example, the same effect as that of the second embodiment can be obtained.

  In general, since the luminous efficiencies of the red, green, and blue organic EL elements 210 are different from each other, it may be necessary to set an optimum value for each driving voltage. In the application example, the pixel circuits of the same color are arranged in the same row, and the first power supply line L1 and the second power supply line L2 are shared to supply the driving voltage for each color. It is easy to set an optimum driving voltage for each color. In addition, the organic EL element 210 may deteriorate over time due to long-term light emission and the like, and it may be necessary to reset the drive voltage for each color. In application examples, the drive voltage is reset for each color. Setting is also easy.

In the above-described first and second embodiments and application examples thereof, the pixel circuit is exemplified as the unit circuit (electronic circuit). However, the unit circuit (electronic circuit) may be applied to a storage device such as a RAM (especially MRAM). Moreover, although the organic EL element was mentioned as an example as a driven element, an inorganic EL element may be sufficient and LED and FED may be sufficient. Furthermore, a sensor element such as a light detection element may be used.
<Electronic equipment>
Next, some examples of an electronic apparatus to which the electro-optical device including the unit circuit according to the first and second embodiments and application examples thereof are applied will be described.

  FIG. 11 is a perspective view showing a configuration of a mobile personal computer to which the electro-optical device is applied. As shown in this figure, the electro-optical device 300 including the unit circuit according to the embodiment is also used as a display unit of a personal computer 2100. The main body 2104 of the personal computer 2100 is provided with a keyboard 2102.

  FIG. 12 is a perspective view illustrating a configuration of a mobile phone to which the electro-optical device 300 is applied. In this figure, a cellular phone 2200 includes the above-described electro-optical device 300 as well as a plurality of operation buttons 2202, as well as an earpiece 2204 and a mouthpiece 2206.

  FIG. 13 is a perspective view illustrating a configuration of a digital still camera in which the above-described electro-optical device 300 is applied to a viewfinder. The silver salt camera sensitizes the film with the optical image of the subject, while the digital still camera 2300 generates and stores an imaging signal by photoelectrically converting the optical image of the subject with an imaging device such as a CCD (Charge Coupled Device). To do. Here, the above-described electro-optical device 300 is provided on the back surface of the main body 2302 in the digital still camera 2300. Since the electro-optical device 300 performs display based on the imaging signal, it functions as a finder for displaying the subject. A light receiving unit 2304 including an optical lens and a CCD is provided on the front side (the back side in FIG. 13) of the main body 2302.

  When the photographer confirms the subject image displayed on the electro-optical device 300 and presses the shutter button 2306, the CCD image pickup signal at that time is transferred and stored in the memory of the circuit board 2308.

  In the digital still camera 2300, a video signal output terminal 2312 for external display and an input / output terminal 2314 for data communication are provided on the side surface of the case 2302.

  The electronic apparatus to which the electro-optical device is applied includes a personal computer shown in FIG. 11, a mobile phone shown in FIG. 12, a digital still camera shown in FIG. Examples include a finder type and a monitor direct-view type video tape recorder, a car navigation device, a pager, an electronic notebook, a calculator, a word processor, a workstation, a video phone, a POS terminal, and a device equipped with a touch panel. It goes without saying that the electro-optical device according to the embodiment is applicable as a display unit of these various electronic devices.

1 is a block diagram illustrating a configuration of an electro-optical device to which a unit circuit according to a first example of the invention is applied. FIG. (A), (b) is a figure which shows the structure of the pixel circuit as a unit circuit, respectively. 3 is a timing chart for explaining a driving method of the pixel circuit. (A)-(c) is a figure which shows a part of manufacturing process of the same electro-optical apparatus, respectively. (A) And (b) is a figure which shows a part of manufacturing process of the same electro-optical apparatus, respectively. FIG. 6 is a block diagram illustrating a configuration of an electro-optical device to which a unit circuit according to a second example of the invention is applied. It is a figure which shows the structure of the display panel etc. in the same electro-optical apparatus. It is a figure which shows the structure of the pixel circuit as the unit circuit. 3 is a timing chart for explaining a driving method of the pixel circuit. It is a figure which shows structures, such as a display panel, among the electro-optical apparatuses which concern on the application example of 2nd Embodiment. 1 is a perspective view illustrating a configuration of a mobile personal computer to which an electro-optical device including a unit circuit according to an embodiment is applied. It is a perspective view which shows the structure of the mobile telephone to which the same electro-optical apparatus is applied. It is a perspective view which shows the structure of the digital still camera to which the same electro-optical device is applied. It is a figure which shows an example of the conventional unit circuit which drives a current type driven element.

Explanation of symbols

C: Capacitor L ... Driven element Tr1 ... Drive transistor Tr2 ... Switching transistor (second switching transistor)
Tr3... Switching transistor (first switching transistor)
Tr4 ... compensation transistor V ... power supply line D ... data line S ... scanning line

Claims (11)

A plurality of scan lines;
Multiple data lines,
A plurality of unit circuits;
A plurality of first and second power supply lines provided along an extending direction of the plurality of scanning lines and for supplying a driving voltage to the plurality of unit circuits;
A transistor for controlling the supply of the drive voltage to the first power line;
Including
Each of the plurality of unit circuits is
A drive transistor including a first source, a first drain and a first gate;
A switching transistor comprising a second source, a second drain and a second gate;
A compensation transistor comprising a third source, a third drain and a third gate, wherein the third drain is connected to the first gate;
Based on one data line of the plurality of data lines and a data signal supplied via the switching transistor, a conduction state between the first source and the first drain is set,
The third gate of the compensation transistor is connected to the third drain;
The third source of the compensation transistor is connected to the first power line;
An electronic device, wherein a first source of the driving transistor is connected to the second power supply line. The electronic device according to claim 1,
Each of the plurality of unit circuits further includes a driven element,
The second power line and the driven element are electrically connected via the driving transistor;
An electronic device characterized by the above. The electronic device according to claim 1 or 2,
The second gate of the switching transistor is connected to one of the plurality of scanning lines;
The second source of the switching transistor is connected to the one data line;
An electronic device characterized by the above. The electronic device according to claim 3.
A data current is supplied as the data signal,
The data current flows through the switching transistor;
An electronic device characterized by the above. The electronic device according to claim 1,
The transistors included in each of the plurality of unit circuits are only the drive transistor, the switching transistor, and the compensation transistor.
An electronic device characterized by the above. The electronic device according to claim 1,
The conductivity type of the compensation transistor and the driving transistor are the same,
An electronic device characterized by the above. The electronic device according to claim 2.
In the first period, the gate voltage of the first gate is set,
In the second period, a driving current is supplied from the second power supply line to the driven element . Oite the electronic device according to claim 7,
The current level of the drive current corresponds to the gate voltage of the first gate of the drive transistor;
An electronic device characterized by the above. The electronic device according to claim 2.
The electronic device according to claim 1, wherein the driven element is an electro-optical element. The electronic device according to claim 9.
An electro-optic element of the same color is disposed as the driven element along each of the plurality of scanning lines,
An electronic device characterized by the above. Mounting the electronic device according to claim 1;
Electronic equipment characterized by

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