JP4720704B2 - Power supply switching circuit - Google Patents

Description

  The present invention relates to a power supply switching circuit that switches between a main power supply and a backup power supply and supplies them to a load.

  Mobile devices such as mobile phones, which have become popular in recent years, normally operate with the main power supply, but even when the main power supply voltage drops, the real-time clock with clock and calendar clocking functions and data backup Therefore, it is necessary to maintain the operation of the backup memory or the like. Therefore, in addition to the main power supply, the mobile device is equipped with a backup power supply such as a secondary battery or a capacitor, and even if the voltage of the main power supply drops and the mobile device cannot perform its main function, The real-time clock or the like can continue to operate with a backup power source.

  As a backup power source in a cellular phone, for example, a secondary battery represented by a lithium ion battery is used. In addition, in order to charge such a secondary battery, a constant voltage circuit is built in the mobile phone. A secondary battery is required to have a long life and be appropriately charged by a constant voltage circuit.

  In general, the voltage of the main power supply is constantly monitored. For example, when the voltage of the main power supply drops below a predetermined value, the power supply for driving the real-time clock or the like is switched from the main power supply to the backup power supply. Such a power supply monitoring function and switching function may be included in a real-time clock module incorporating a real-time clock function.

In order to realize the power supply monitoring function and the switching function as described above, for example, a power supply switching circuit as shown in FIG. 5 can be considered. The power switching circuit includes a comparator 703 which compares the reference voltage _{V DET} a voltage _{V CC} of the main power source, an inverter 704 for inverting the output signal of the comparator 703, than the voltage _{V CC} of the main power supply reference voltage _{V DET} A P-channel MOS transistor 701 that supplies the main power supply voltage V _CC to a load such as a real-time clock when it is large, and a backup power supply voltage V _BK as a load when the main power supply voltage V _CC is smaller than the reference voltage V _DET And a P-channel MOS transistor 702 to be supplied. The voltage supplied to the load is shown as V _OUT .

FIG. 6 is a waveform diagram showing changes in voltages in the power supply switching circuit shown in FIG. As shown in FIG. 6, when the voltage V _CC of the main power supply becomes larger than the reference voltage V _DET , the voltage V _CC of the main power supply is supplied to the load, and when the voltage V _{CC of the} main power supply becomes smaller than the reference voltage V _DET. The voltage V _{BK of the} backup power supply is supplied to the load.

However, even if the main power supply voltage V _CC is greater than the reference voltage V _DET , if the backup power supply voltage V _BK is higher than the main power supply voltage V _CC and the difference exceeds the threshold voltage of the transistor 702, The transistor 702 is not turned off, and a current flows from the backup power source to the load, consuming the battery power.

  As a related technique, the following Patent Document 1 has a P-channel MOS transistor for supplying main power to a load, and the transistor is controlled based on a first control signal when the main power is turned on. Disclosed is a power supply switching circuit for supplying a main power source to a load by turning on the power source and supplying a sub power source to the load by turning off the transistor based on a first control signal when the main power source is turned off. Yes.

  The power supply switching circuit outputs a second control signal at a high voltage power supply level or a low voltage power supply level based on a first control signal to turn on / off the transistor, a voltage of the main power supply, A comparison circuit that performs level comparison with the voltage of the sub power supply, and a selection circuit that selects the higher voltage of the main power supply and the sub power supply as a high voltage power supply based on the output signal of the comparison circuit, and supplies the high voltage power supply to the control circuit Including. According to this power supply switching circuit, it is described that malfunction of a P-channel MOS transistor for supplying main power to a load can be prevented, and switching between main power and sub power can be performed reliably.

  Patent Document 2 below discloses a diode between two MOS transistor substrates that select one of two different voltages supplied to two input terminals and supply the load to the load, and the respective input terminals. And a switch circuit in which power is supplied from the substrate to a control circuit such as a comparator. According to this switch circuit, it is described that both of the two switch transistors can be turned off in accordance with an external signal, and the output terminal can be floated.

However, in both Patent Document 1 and Patent Document 2, in a power supply switching circuit that selects one of the main power supply and the backup power supply based on the comparison result between the voltage of the main power supply and the reference voltage and connects to the load. No particular mention is made of solving the problem that even when the main power supply is selected when the main power supply voltage drops below the backup power supply voltage, current flows from the backup power supply to the load.
Japanese Patent No. 3538480 (first page, FIGS. 1 and 2) Japanese Patent No. 2733796 (2nd page, FIG. 1)

  Accordingly, in view of the above points, the present invention provides a mains switching circuit that selects one of a main power source and a backup power source based on a comparison result between a voltage of a main power source and a reference voltage and connects the load to a load. An object is to prevent a current from flowing from a backup power source to a load even when a main power source is selected when the voltage of the power source drops below the voltage of the backup power source.

In order to solve the above-described problem, a power supply switching circuit according to one aspect of the present invention compares a first power supply voltage supplied from a main power supply with a second power supply voltage supplied from a backup power supply, and compares them. A first comparison circuit that outputs a logic signal representing a result, a first level conversion circuit that converts the level of the logic signal output from the first comparison circuit, and a first power supply voltage and a reference voltage are compared. From the second comparison circuit that outputs a logic signal representing the comparison result, the second level conversion circuit that converts the level of the logic signal output from the second comparison circuit, and the first level conversion circuit A selection circuit that selects a higher one of the first power supply voltage and the second power supply voltage based on the output logic signal and supplies the selected one to at least the first and second level conversion circuits; the logic signal output from the level conversion circuit of Zui it, as well as one selected by the output of a first power source voltage and a second power supply voltage, comprising a switching circuit for supplying at least first and second comparator circuits, first and second The power supply voltage selected by the selection circuit from the value defined by the power supply voltage selected by the switching circuit by the level conversion circuit of the second level by the level conversion circuit of the logic signal output from the first and second comparison circuits Respectively converted to the values specified by .

Here, the selection circuit operates by being supplied with the power supply voltage selected by the selection circuit, and is supplied with an inverter for inverting the logic signal output from the first level conversion circuit, and the first power supply voltage. A first P-channel having a source, a drain and a back gate connected to the output terminal of the selection circuit, and a gate to which a logic signal output from one of the inverter and the first level conversion circuit is supplied A first diode having a MOS transistor, an anode connected to the source of the first P-channel MOS transistor, a cathode connected to the back gate of the first P-channel MOS transistor, and a second power supply voltage a source supplied, a drain and a back gate connected to the output terminal of the selection circuit, an inverter and of the first level converting circuit A second P-channel MOS transistor having a gate to which a logic signal output from one side is supplied, an anode connected to a source of the second P-channel MOS transistor, and a back gate of the second P-channel MOS transistor And a second diode having a cathode connected to the terminal.

Alternatively, the switching circuit operates by being supplied with the power supply voltage selected by the selection circuit, and an inverter that inverts the logic signal output from the second level conversion circuit, and a source to which the first power supply voltage is supplied. A first P-channel MOS transistor having a drain and a back gate connected to the output terminal of the switching circuit, and a gate to which a logic signal output from one of the inverter and the second level conversion circuit is supplied A first diode having an anode connected to the source of the first P-channel MOS transistor, a cathode connected to the back gate of the first P-channel MOS transistor, and a second power supply voltage. and a source that, second and a gate of the logic signals outputted from the other of the inverter and the second level converter is supplied A second diode having a P-channel MOS transistor, an anode connected to the drain of the second P-channel MOS transistor, and a cathode connected to the back gate of the second P-channel MOS transistor; A logic signal output from the other one of the source connected to the drain of the channel MOS transistor, the drain and back gate connected to the output terminal of the switching circuit, and the inverter and the second level conversion circuit is supplied. A third P-channel MOS transistor having a gate; an anode connected to a source of the third P-channel MOS transistor; and a cathode connected to a back gate of the third P-channel MOS transistor. A diode may be included.

  In the above, the power supply switching circuit is a constant voltage circuit for charging the backup rechargeable battery that generates the second power supply voltage, and divides the output voltage of the constant voltage circuit to generate the feedback voltage. And a differential amplifier circuit that operates by being supplied with the power supply voltage selected by the selection circuit and generates an output voltage by performing differential amplification based on the second reference voltage and the feedback voltage. A voltage circuit may be further provided.

  According to the present invention, the selection circuit selects the higher one of the first power supply voltage and the second power supply voltage based on the logic signal output from the first detection circuit, and at least the first and second power supply voltages are selected. Since the switching circuit selects one of the first power supply voltage and the second power supply voltage based on the logic signal output from the second detection circuit. When the main power supply voltage drops below the backup power supply voltage, current can be prevented from flowing from the backup power supply to the load even if the main power supply is selected.

The best mode for carrying out the present invention will be described below in detail with reference to the drawings. The same constituent elements are denoted by the same reference numerals, and the description thereof is omitted.
FIG. 1 is a block diagram showing a configuration of a mobile phone including a power supply switching circuit according to an embodiment of the present invention. As shown in FIG. 1, the mobile phone 10 includes a main functional circuit 100 for performing wireless communication, a real-time clock circuit 200 that operates as a real-time clock, a backup memory 300, a power supply switching circuit 400, a CPU 500, And a power supply circuit 600. In addition to the main power source, a backup power source is incorporated as a power source used in the mobile phone 10.

  The main function circuit 100 includes, for example, an input circuit used by a user of the mobile phone 10 to perform button operations, a display circuit such as a display, a transmission / reception circuit that performs wireless transmission / reception, and a memory that stores data. Contains.

  The real-time clock circuit 200 has a timekeeping function such as time or calendar, and has a built-in crystal resonator for generating a clock signal necessary for the timekeeping function. In some cases, a semiconductor integrated circuit incorporating the real-time clock circuit 200 and the power supply switching circuit 400 is manufactured and used as a general-purpose real-time clock module 200a.

  The backup memory 300 is a memory that stores data when the mobile phone 10 performs a backup operation, and is configured by, for example, an SRAM (Static Random Access Memory).

The power supply switching circuit 400 constantly monitors the power supply voltage _VCC supplied from the main power supply, and when detecting that the power supply voltage _VCC falls below the reference voltage _VDET , the real-time clock circuit 200 and the backup memory 300 are detected. Is switched from the main power supply to the backup power supply (power supply voltage V _BK ). In FIG. 1, the power supply voltage output from the power supply switching circuit 400 is shown as _VOUT .

Accordingly, even when the main function circuit 100 and the CPU 500 do not operate because the power switch is turned off or the voltage _{VCC of the} main power supply decreases, the real-time clock circuit 200 and the backup memory 300 operate with the backup power supply. Therefore, the clocking function and data backup function are maintained. The power supply switching circuit 400 outputs a constant voltage _VBAT in order to charge a secondary battery used as a backup power supply.

The CPU 500 controls the main function circuit 100, the real time clock circuit 200, the backup memory 300, and the constant voltage circuit 440. Power supply circuit 600 includes, for example, a stabilized power supply circuit such as a series regulator, based on the power supply voltage V _CC supplied from the main power source, for supplying a power supply voltage required for the main functional circuit 100 and CPU 500.

In the power supply switching circuit 400, the detection circuit 410 compares the voltage V _{CC of the} main power supply with the voltage V _{BK of the} backup power supply, outputs a first logic signal representing the comparison result, and also outputs the voltage V _{CC of the} main power supply. And the reference voltage V _DET are compared, and a second logic signal representing the comparison result is output. In the first and second logic signals, the high-level potential is defined by the higher of the main power supply voltage _VCC and the backup power supply voltage _VBK .

The selection circuit 420 selects the higher one of the main power supply voltage _VCC and the backup power supply voltage _VBK based on the first logic signal, and outputs the selected voltage as the power supply voltage _VCH . The power supply voltage V _CH is supplied to the detection circuit 410, the switching circuit 430, and the constant voltage circuit 440. Switching circuit 430, based on the second logic signal, and select one of the voltage V _BK voltage V _CC and the backup power supply of the main power supply, and outputs the selected voltage as the supply voltage V _OUT. The power supply voltage _VOUT is supplied to the real time clock circuit 200 and the backup memory 300.

  FIG. 2 is a circuit diagram showing a detailed configuration of the power supply switching circuit shown in FIG. The comparison circuit 411 and the level conversion circuit 412 constitute a first detection circuit, and the comparison circuit 413 and the level conversion circuit 414 constitute a second detection circuit. In FIG. 2, the constant voltage circuit 440 is omitted.

The comparison circuits 411 and 413 are constituted by, for example, a comparator, and operate by being supplied with the power supply voltage _VOUT from the switching circuit 430. In the present embodiment, it is assumed that the power supply potential _VSS is the ground potential (0 V).

The comparison circuit 411 compares the voltage V _{CC of the} main power supply with the voltage V _{BK of the} backup power supply, and outputs a logic signal representing the comparison result. Further, the comparison circuit 413 compares the voltage V _{CC of the} main power supply with the reference voltage V _DET and outputs a logic signal indicating the comparison result. The reference voltage V _DET may be generated in an external circuit, but may be generated in the power supply switching circuit 400 using, for example, a resistor and a Zener diode.

Level conversion circuits 412 and 414 is constituted by a general level shifter, with the power supply voltage _{V OUT} from the switching circuit 430 is supplied, the power supply voltage _{V CH} from the selection circuit 420 operates is supplied. The level conversion circuit 412 converts the high-level potential of the logic signal output from the comparison circuit 411 from a value specified by the power supply voltage _VOUT to a value specified by the power supply voltage _VCH . Similarly, the level conversion circuit 414 converts the high-level potential of the logic signal output from the comparison circuit 413 from a value specified by the power supply voltage _VOUT to a value specified by the power supply voltage _VCH . Incidentally, the comparison circuits 411 and 413 may supply power voltage _{V CH} outputted from the selection circuit 420, in which case, can be omitted level conversion circuit 412 and 414.

Selection circuit 420 includes P-channel MOS transistors 421 and 422 and an inverter 423. The voltage V _{CC of the} main power supply is supplied to the source of the transistor 422, and the voltage V _{BK of the} backup power supply is supplied to the source of the transistor 421. In addition, a logic signal output from the level conversion circuit 412 is supplied to the gate of the transistor 421, and a logic signal output from the inverter 423 is supplied to the gate of the transistor 422. The drain of the transistor 421 and the drain of the transistor 422 are commonly connected to the node N1, and the power supply voltage _VCH is extracted from the node N1. The power supply voltage V _CH is supplied to the inverter circuit 423, the level conversion circuits 412 and 414, the inverter 434 in the switching circuit 430, and the constant voltage circuit 440.

  In addition, a back gate (for example, corresponding to an N well) of the transistor 421 is connected to the drain, and a parasitic diode 424 having the source of the transistor 421 as an anode and the back gate as a cathode is formed. Similarly, the back gate of the transistor 422 is connected to the drain, and a parasitic diode 425 having the source of the transistor 422 as an anode and the back gate as a cathode is formed.

Switching circuit 430 includes P channel MOS transistors 431 to 433 and an inverter 434. The voltage V _{CC of the} main power supply is supplied to the source of the transistor 433, and the voltage V _{BK of the} backup power supply is supplied to the source of the transistor 431. In addition, a logic signal output from the level conversion circuit 414 is supplied to the gates of the transistors 431 and 432, and a logic signal output from the inverter 434 is supplied to the gate of the transistor 433. The drain of the transistor 431 is connected to the source of the transistor 432. Further, the drain of the transistor 432 and the drain of the transistor 433 are commonly connected to the node N2, and the power supply voltage _VOUT is extracted from the node N2. The power supply voltage _VOUT is supplied to the comparison circuits 411 and 413, the level conversion circuits 412 and 414, the external real-time clock circuit 200, and the backup memory 300.

  A back gate of the transistor 431 is connected to the source, and a parasitic diode 435 is formed with the drain of the transistor 431 as an anode and the back gate as a cathode. Similarly, a back gate of the transistor 432 is connected to the drain, and a parasitic diode 436 is formed with the source of the transistor 432 as an anode and the back gate as a cathode. Further, a back gate of the transistor 433 is connected to the drain, and a parasitic diode 437 is formed with the source of the transistor 433 as an anode and the back gate as a cathode.

Next, the operation of the power supply switching circuit 400 shown in FIG. 2 will be described with reference to FIG. FIG. 3 is a waveform diagram showing changes in each voltage in the power supply switching circuit shown in FIG. In FIG. 3, the voltage _{V CC} of the main power supply, a voltage _{V BK} of the backup power supply, and the power supply voltage _{V CH} which is selected in the selection circuit 420, is shown and the supply voltage _{V OUT} to be selected in the switching circuit 430 Yes.

First, in period T1, when the power switch is turned on and the primary battery is connected to the power supply switching circuit 400 and the main power supply voltage _VCC rises, current flows through the diodes 425 and 437, and the power supply voltages _VCH and VCH _OUT rises. As a result, the comparison circuits 411 and 413, the level conversion circuits 412 and 414, and the inverters 423 and 434 start operation.

The comparison circuit 411 outputs a high level logic signal because the voltage V _{CC of the} main power supply is larger than the voltage V _{BK of the} backup power supply. Further, the level conversion circuit 412 supplies a high level logic signal to the selection circuit 420. In the selection circuit 420, a high-level logic signal is applied to the gate of the transistor 421, the transistor 421 is turned off, and a logic signal inverted to a low level by the inverter 423 is applied to the gate of the transistor 422, so that the transistor 422 is Turn on. Therefore, the power supply voltage _{V CH} is equal to the voltage _{V CC} of the main power supply. As a result, the diode 425 is cut off.

The comparison circuit 413 outputs a high-level logic signal because the voltage V _{CC of the} main power supply is larger than the reference voltage V _DET . Further, the level conversion circuit 414 supplies a high level logic signal to the switching circuit 430. In the switching circuit 430, a high-level logic signal is applied to the gates of the transistors 431 and 432, the transistors 431 and 432 are turned off, and a logic signal inverted to a low level by the inverter 434 is applied to the gate of the transistor 433. The transistor 433 is turned on. Therefore, the power supply voltage V _OUT becomes equal to the main power supply voltage _VCC . As a result, the diode 437 is cut off.

In the period T2, the voltage V _CC of the main power supply reaches the voltage V _CC 1 and the power supply voltages V _CH and V _OUT also reach the voltage V _CC 1. Further, since the power supply voltage V _CH is also supplied to the constant voltage circuit 440, a constant voltage circuit 440 starts operating to charge the secondary battery as a backup power supply. As a result, the voltage V _{BK of the} backup power supply rises from 0V to the voltage V _BK 1. In the present embodiment, when the main power source and the backup power source start up normally, V _CC 1> V _BK 1 is _satisfied .

After the elapse of the period T2, the voltage V _{CC of the} main power supply decreases and becomes lower than the voltage V _{BK of the} backup power supply. Accordingly, the comparison circuit 411 outputs a low level logic signal, and the level conversion circuit 412 supplies the low level logic signal to the selection circuit 420. In the selection circuit 420, a low-level logic signal is applied to the gate of the transistor 421, the transistor 421 is turned on, a logic signal inverted to a high level by the inverter 423 is applied to the gate of the transistor 422, and the transistor 422 is Turn off. Therefore, the power supply voltage V _CH becomes equal to the voltage V _BK 1.

When the voltage V _{CC of the} main power supply is larger than the reference voltage V _DET , the comparison circuit 413 still outputs a high level (V _CC ) logic signal, and the level conversion circuit 414 further changes the level of the logic signal to V Shift from _CC to V _BK 1 and supply to switching circuit 430. In the switching circuit 430, a high level (V _BK 1) logic signal is applied to the gates of the transistors 431 and 432, the transistors 431 and 432 are turned off, and the logic signal inverted to a low level by the inverter 434 is output from the transistor 433. Applied to the gate, the transistor 433 is turned on. Therefore, the power supply voltage _VOUT remains at the voltage _VCC .

Here, the transistor 431 of the switching circuit 430 can sufficiently satisfy the OFF condition because the voltage V _BK 1 applied to the gate is equal to the voltage V _BK 1 applied to the source. Further, the transistor 431 and the transistor 432 are connected in series, and the parasitic diode 435 and the parasitic diode 436 are connected in opposite directions, so that the backup power supply and the output terminal (node N2) are connected via the parasitic diode. A flowing current can also be prevented.

In the period T3, the voltage V _CC of the main power supply becomes smaller than the reference voltage V _DET and decreases to the voltage V _CC 2. The comparison circuit 413 outputs a low level logic signal, and the level conversion circuit 414 supplies the low level logic signal to the switching circuit 430. In the switching circuit 430, a low-level logic signal is applied to the gates of the transistors 431 and 432, the transistors 431 and 432 are turned on, and a logic signal inverted to a high level by the inverter 434 is applied to the gate of the transistor 433. The transistor 433 is turned off. Therefore, the power supply voltage V _OUT becomes equal to the voltage V _BK 1.

In the period T4, the voltage V _CC of the main power supply increases again to the voltage V _CC 1, but the voltage V _{BK of the} backup power supply decreases to the voltage V _BK 2. The comparison circuit 411 outputs a high level logic signal because V _CC 1> V _BK 2. Thereby, in the selection circuit 420, the voltage V _CC 1 is selected as the power supply voltage V _CH . The comparison circuit 413 outputs a high level signal because V _CC 1> V _DET . Thereby, in the switching circuit 430, the voltage V _CC 1 is selected as the power supply voltage V _OUT .

In the period T5, the voltage _{V CC} of the main power source is lowered to a voltage _{V CC} 3, it becomes smaller than the voltage _{V BK} 2 and the reference voltage _{V DET.} The comparison circuit 411 outputs a low level logic signal because V _CC 3 <V _BK 2. Therefore, in the selection circuit 420, the voltage _{V BK} 2 is selected as the power supply voltage _{V CH.} The comparison circuit 413 outputs a low level logic signal because V _CC 3 <V _DET . Accordingly, in the switching circuit 430, the voltage V _BK 2 is selected as the power supply voltage V _OUT .

  FIG. 4 is a circuit diagram showing a configuration of the constant voltage circuit shown in FIG. Constant voltage circuit 440 includes P channel MOS transistors 441, 442, 447 and 448, N channel MOS transistors 443 to 446 and 449, resistors 451 to 453, and a capacitor 454. Here, the back gate of the transistor 448 is connected to the source, and a parasitic diode 450 is formed with the drain as an anode and the back gate as a cathode.

The transistors 441 and 442 constitute a current mirror circuit, the transistors 443 and 444 constitute a differential pair, the transistor 445 constitutes a constant current source, and constitute a differential amplifier circuit as a whole. That is, the difference between the reference voltage V _REF supplied from the external circuit or the internal circuit to the gate of the transistor 443 and the feedback voltage supplied to the gate of the transistor 444 is amplified, and the drain of the transistor 441 and the drain of the transistor 443 are amplified. The voltage at the connection point is output to the gate of the transistor 448.

The voltage output from the drain of the transistor 448 is supplied to the secondary battery as the constant voltage V _BAT through the current limiting resistor 451. The drain of the transistor 448 is connected to one end of the resistor 452, and the other end of the resistor 452 is connected to one end of the resistor 453. A feedback voltage extracted from a connection point between the resistor 452 and the resistor 453 is applied to the gate of the transistor 444. A phase compensation capacitor 454 is inserted between the drain and gate of the transistor 448.

Furthermore, as the switch, the transistor 446 is connected between the transistor 445 and the power supply potential _{V SS,} the transistor 449 is connected between the resistor 453 and the power supply potential _{V SS,} and the source and gate of the transistor 447 the transistor 448 Connected between. These transistors turn on / off the operation of the constant voltage circuit 440 in accordance with a control signal CTL supplied from the outside. That is, when the control signal CTL is activated to a high level, the transistors 446 and 449 are turned on, the transistor 447 is turned off, and the constant voltage circuit 440 is operated, while the control signal CTL is deactivated to a low level. Once the operation is completed, the operation of the constant voltage circuit 440 stops.

Here, the power supply voltage V _CH outputted from the selection circuit 420 is used as a power supply voltage of the constant voltage circuit 440 for charging the secondary battery. If the voltage V _CC of the main power supply shown in FIG. 2 is used as the power supply voltage of the constant voltage circuit 440, if the voltage V _CC of the main power source becomes lower than the voltage V _BK of the backup power supply, backup power supply (2 Current flows from the secondary battery to the main power supply via the parasitic diode 450, and the secondary battery consumes unnecessary power. However, according to the present embodiment, as the power supply voltage of the constant voltage circuit 440, the power supply voltage _VCH that does not drop below the backup power supply voltage _VBK is used. Does not flow. Therefore, unnecessary power consumption of the secondary battery can be prevented.

1 is a block diagram showing a mobile phone including a power supply switching circuit according to an embodiment of the present invention. The circuit diagram which shows the detailed structure of the power supply switching circuit shown in FIG. FIG. 3 is a waveform diagram showing changes in voltages in the power supply switching circuit shown in FIG. 2. The circuit diagram which shows the structure of the constant voltage circuit shown in FIG. The circuit diagram which shows the structural example of a power supply switching circuit. The wave form diagram which shows the change of each voltage in the power supply switching circuit shown in FIG.

Explanation of symbols

  10 mobile phone, 100 main function circuit, 200 real time clock circuit, 200a real time clock module, 300 backup memory, 400 power supply switching circuit, 410 detection circuit, 411, 413 comparison circuit, 412, 414 level conversion circuit, 420 selection circuit, 421, 422, 431-433 P channel MOS transistor, 423, 434 inverter, 424, 425, 435-437, 450 diode, 430 switching circuit, 440 constant voltage circuit, 441, 442, 447, 448 P channel MOS transistor, 443 446, 449 N channel MOS transistor, 451-453 resistance, 454 capacitor, 500 CPU, 600 power supply circuit

Claims (4)

A first comparison circuit for comparing a first power supply voltage supplied from a main power supply with a second power supply voltage supplied from a backup power supply and outputting a logic signal representing a comparison result;
A first level conversion circuit for converting the level of a logic signal output from the first comparison circuit;
A second comparison circuit that compares the first power supply voltage with the reference voltage and outputs a logic signal representing a comparison result;
A second level conversion circuit for converting the level of the logic signal output from the second comparison circuit;
Based on the logic signal output from the first level conversion circuit, the higher one of the first power supply voltage and the second power supply voltage is selected, and at least the first and second level conversion circuits are selected. A selection circuit to supply to,
Based on the logic signal output from the second level conversion circuit, one of the first power supply voltage and the second power supply voltage is selected and output , and at least the first and second comparisons are performed. A switching circuit for supplying to the circuit;
And the first and second level conversion circuits define a high level potential of the logic signal output from the first and second comparison circuits by a power supply voltage selected by the switching circuit. A power supply switching circuit for converting each value into a value defined by a power supply voltage selected by the selection circuit. The selection circuit comprises:
An inverter that operates by being supplied with a power supply voltage selected by the selection circuit and inverts a logic signal output from the first level conversion circuit;
A logic signal output from one of a source to which a first power supply voltage is supplied, a drain and a back gate connected to the output terminal of the selection circuit, the inverter and the first level conversion circuit A first P-channel MOS transistor having a gate supplied thereto;
A first diode having an anode connected to a source of the first P-channel MOS transistor and a cathode connected to a back gate of the first P-channel MOS transistor;
A logic signal output from the other of the source to which the second power supply voltage is supplied, the drain and back gate connected to the output terminal of the selection circuit, the inverter and the first level conversion circuit is provided. A second P-channel MOS transistor having a gate supplied thereto;
A second diode having an anode connected to a source of the second P-channel MOS transistor and a cathode connected to a back gate of the second P-channel MOS transistor;
Including, power supply switching circuit according to claim 1 Symbol placement. The switching circuit is
An inverter that operates by being supplied with a power supply voltage selected by the selection circuit and inverts a logic signal output from the second level conversion circuit;
A logic signal output from one of a source to which a first power supply voltage is supplied, a drain and a back gate connected to the output terminal of the switching circuit, the inverter and the second level conversion circuit is provided. A first P-channel MOS transistor having a gate supplied thereto;
A first diode having an anode connected to a source of the first P-channel MOS transistor and a cathode connected to a back gate of the first P-channel MOS transistor;
A second P-channel MOS transistor having a source to which a second power supply voltage is supplied, and a gate to which a logic signal output from the other of the inverter and the second level conversion circuit is supplied;
A second diode having an anode connected to the drain of the second P-channel MOS transistor and a cathode connected to the back gate of the second P-channel MOS transistor;
Output from the other of the source connected to the drain of the second P-channel MOS transistor, the drain and back gate connected to the output terminal of the switching circuit, the inverter and the second level conversion circuit A third P-channel MOS transistor having a gate to which a logic signal to be supplied is supplied;
A third diode having an anode connected to a source of the third P-channel MOS transistor and a cathode connected to a back gate of the third P-channel MOS transistor;
The power supply switching circuit according to claim 1, comprising: A constant voltage circuit for charging a backup rechargeable battery that generates a second power supply voltage, the voltage dividing circuit for dividing the output voltage of the constant voltage circuit to generate a feedback voltage, and the selection circuit The constant voltage circuit further includes a differential amplifier circuit that operates by being supplied with the selected power supply voltage and generates an output voltage by performing differential amplification based on the second reference voltage and the feedback voltage. The power supply switching circuit according to any one of claims 1 to 3 .

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