JP4683233B2 - Manufacturing method of semiconductor wafer - Google Patents

Description

The present invention relates to a method for manufacturing a semiconductor wafer with improved haze level, and more particularly to a cleaning process thereof.

In conventional semiconductor silicon wafer manufacturing, a slicing process for slicing a silicon single crystal rod manufactured by a single crystal manufacturing apparatus to obtain a thin disk-shaped wafer, and cracking or chipping of the wafer obtained by the slicing process. In order to prevent the chamfering, the chamfering process of chamfering the outer peripheral edge portion, the lapping process of lapping the chamfered wafer and flattening the chamfered wafer, and the etching process of removing the processing strain remaining on the chamfered and lapped wafer surface, A primary polishing step in which the surface of the etched wafer is brought into sliding contact with a polishing cloth to perform rough polishing mainly for the purpose of adjusting the flatness, and several to several tens of nm of the surface of the primary polished wafer. Final polishing process mainly aimed at improving the surface roughness (so-called haze) with wavelength, and cleaning the polished wafer Final washing step of removing the abrasive and foreign matter adhering to the wafer Te is performed.
In addition, a heat treatment or a surface grinding process is performed as necessary, and addition, omission, replacement, repetition, or the like of processes is performed according to the purpose.

  Here, the primary polishing process will be described in more detail. The primary polishing performed as rough polishing is polishing performed to increase the flatness of the wafer surface after the etching process or the surface grinding process, in order to correct the shape. Done. For polishing cloth used for rough polishing, for example, an Asker C hardness (polyester felt (structure is random structure) impregnated with polyurethane (Asker rubber hardness tester C type which is a kind of spring hardness tester) A relatively hard material having a measured value) of about 80 is used. A polishing cloth is affixed on a rotatable surface plate, and an abrasive containing colloidal silica is used in an alkali-based aqueous solution. The wafer is rubbed against the polishing cloth while supplying the abrasive between the wafer and the polishing cloth. Thus, polishing is performed. Under the conditions used in such rough polishing such as primary polishing, the polishing cloth is hard, so that a minute scratch on the wafer surface called scratch may occur.

  On the other hand, final polishing is the final step of wafer polishing processing, and it aims to reduce the unevenness of several to several tens of nm level called haze to obtain a mirror surface and to remove scratches generated by rough polishing. It is a process. In final polishing, a suede-like artificial leather made of soft urethane foam is attached to a rotatable surface plate, and a wafer containing colloidal silica is supplied to the alkaline base aqueous solution. This is done by rubbing.

  Here, a polishing apparatus used for finish polishing is shown in FIG. In FIG. 2, the polishing apparatus includes a rotary platen 2, a wafer holder 3, and an abrasive supply device 5. The rotating surface plate 2 has a rotating surface plate main body, and a polishing cloth 4 is pasted on the upper surface thereof. The rotating surface plate 2 is rotated at a predetermined rotation speed by a rotating shaft. The wafer holder 3 holds the wafer 1 on the lower surface thereof by vacuum suction or the like and is rotated by the rotating shaft and simultaneously presses the wafer 1 against the polishing cloth 4 with a predetermined load. The abrasive supply device 5 supplies an abrasive onto the polishing cloth at a predetermined flow rate from an abrasive supply tank (not shown), and this abrasive is supplied between the wafer 1 and the polishing cloth 4 so that the wafer 1 is Polished.

  The polishing cloth used for finish polishing is generally softer than the polishing cloth used for rough polishing, so it is difficult for scratches to occur. However, if the polishing pressure is increased, scratches tend to occur. In particular, it is carried out at a relatively low polishing pressure.

  Next, the cleaning process will be described. Many cleaning processes such as RCA cleaning comprising a combination of removal of foreign substances on the surface with chemicals and rinsing with pure water are used.

A typical process procedure of such an RCA cleaning process is shown below.
1) SC-1 cleaning (ammonia: hydrogen peroxide solution: water = 1: 1: 5-7)
2) Pure water rinse 3) Hydrofluoric acid cleaning 4) Pure water rinse 5) SC-2 cleaning (hydrochloric acid: hydrogen peroxide water: water = 1: 1 to 2: 6 to 8)
6) Pure water rinse 7) Spin dry The pure water rinse process may be repeated a plurality of times.
In addition, cleaning without using a chemical solution has been performed, and cleaning methods using brush cleaning or a two-fluid nozzle have been proposed (see, for example, JP-A-2003-22993).

  In recent years, as semiconductor devices have been highly integrated, the minimum line width of the circuit itself has become a level of 0.13 μm or less, and the size of the problem of particles adhering to the wafer surface has also become a level of 47 nm or more.

On the other hand, a surface roughness having a wavelength of several to several tens of nanometers called haze remains on the surface of the semiconductor silicon wafer manufactured by the above manufacturing method even after finishing polishing and cleaning. If haze remains on the wafer surface in this way, the particle counter that measures the number of particles recognizes the haze as particles. This tendency increases as the particle size to be measured decreases. For example, when trying to measure the number of particles having a size of 47 nm or more on the surface of a wafer manufactured by a conventional method, it is difficult to measure the actual number of particles due to the influence of haze.

  The present invention has been made in view of such problems, and a method for manufacturing a semiconductor wafer and a semiconductor wafer in which the haze level is improved to such an extent that particles having a size of, for example, 47 nm or more attached to the wafer surface can be reliably measured. Is intended to provide.

  The present invention has been made to solve the above problems, and is a method for manufacturing a semiconductor wafer, at least a primary polishing step of roughly polishing a raw material wafer, and finish polishing the primary polished wafer. A semiconductor wafer comprising: a final polishing step; and a cleaning step for cleaning the finish-polished wafer, wherein chemical cleaning is performed with an etching allowance of 0.2 to 1.0 nm in the cleaning step. A manufacturing method is provided.

  In this way, in the cleaning process for cleaning the wafer after the finish polishing process, chemical cleaning with an etching allowance of 0.2 to 1.0 nm can be performed to minimize deterioration of the haze level of the wafer. A semiconductor wafer capable of reliably measuring particles having a size of 47 nm or more adhering to the wafer surface can be manufactured.

  In this case, in the cleaning step, it is preferable to perform chemical cleaning with an etching allowance of 0.2 to 1.0 nm after performing mechanical cleaning by applying a mechanical force.

  After performing mechanical cleaning in this way, particles on the wafer surface can be reduced by performing chemical cleaning with an etching allowance of 0.2 to 1.0 nm.

  In the cleaning step, it is preferable to perform chemical cleaning with an etching allowance of 0.2 to 1.0 nm simultaneously with mechanical cleaning.

  Thus, by performing chemical cleaning with an etching allowance of 0.2 to 1.0 nm simultaneously with mechanical cleaning, particles on the wafer surface can be further reduced.

  In the cleaning step, the first chemical cleaning is performed simultaneously with the mechanical cleaning, and then the second chemical cleaning is further performed so that the total etching cost by the first and second chemical cleaning is 0.2 to 0.2. It can be 1.0 nm.

  In this way, the first chemical cleaning is performed simultaneously with the mechanical cleaning, and then the second chemical cleaning is further performed, so that the total etching allowance by the first and second chemical cleaning is 0.2 to 1.0 nm. It is good.

  In the cleaning step, it is preferable to perform chemical cleaning with an etching allowance of 0.2 to 1.0 nm after performing mechanical cleaning following ozone cleaning for cleaning the wafer with ozone water.

  As described above, after performing mechanical cleaning subsequent to ozone cleaning, by performing chemical cleaning with an etching allowance of 0.2 to 1.0 nm, organic substances attached to the wafer can be easily peeled off. .

  In the cleaning step, chemical cleaning with an etching allowance of 0.2 to 1.0 nm can be performed simultaneously with mechanical cleaning, following ozone cleaning.

  Thus, by performing chemical cleaning with an etching allowance of 0.2 to 1.0 nm simultaneously with mechanical cleaning following ozone cleaning, particles on the wafer surface can be further reduced.

  In the cleaning step, the ozone cleaning is followed by the mechanical cleaning and the first chemical cleaning at the same time, and then the second chemical cleaning is performed and the total etching by the first and second chemical cleaning is performed. The cost can be set to 0.2 to 1.0 nm.

  Thus, the ozone cleaning is followed by the mechanical cleaning and the first chemical cleaning at the same time, and then the second chemical cleaning is performed to reduce the total etching cost by the first and second chemical cleanings to zero. It is good also as 2-1.0 nm.

  The chemical cleaning is preferably cleaning with a mixed aqueous solution of ammonia water, hydrogen peroxide water and water.

  In this way, the chemical cleaning is performed with a mixed aqueous solution of ammonia water, hydrogen peroxide water, and water, so that the desired etching allowance can be ensured, and particles on the wafer surface can be further reduced. .

  The mechanical cleaning is preferably a two-fluid cleaning in which two or more fluids are mixed to clean the wafer.

  Thus, the mechanical cleaning is a two-fluid cleaning, whereby particles on the wafer surface can be further reduced.

  Moreover, it is preferable that the temperature of the ozone water in the said ozone cleaning shall be 50 degreeC or more.

  Thus, by setting the temperature of the ozone water in the ozone cleaning to 50 ° C. or higher, the cleaning power can be improved, and organic substances and particles on the wafer surface can be further reduced.

The present invention also provides a mirror-polished semiconductor wafer having a haze of 5 ppb or less and a particle size of 47 nm or more of 0.15 particles / cm ² or less.

  Such a semiconductor wafer is an unprecedented high quality semiconductor wafer with few haze and minute particles.

As described above, according to the present invention, it is possible to manufacture a semiconductor wafer whose haze level is improved to such an extent that particles having a size of 47 nm or more attached to the surface of the semiconductor wafer can be reliably measured.

It is a flowchart explaining roughly an example of the manufacturing method of the semiconductor wafer of this invention. It is an example of the finish polishing apparatus used with the manufacturing method of a semiconductor wafer. It is an example of the washing | cleaning apparatus which can be used with the manufacturing method of the semiconductor wafer of this invention. (a) is a flow diagram schematically illustrating an example of a method of manufacturing a semiconductor wafer of the present invention, (b) is a flow schematically illustrating another example of a method of manufacturing a semiconductor wafer of the present invention. FIG.

Hereinafter, although this invention is demonstrated in detail, this invention is not limited to these.
On the surface of a semiconductor silicon wafer manufactured by a conventional manufacturing method, a surface roughness having a wavelength of several to several tens of nm called haze remains even after finishing polishing and cleaning. Since the particle counter recognizes this haze as particles, for example, even if it is attempted to measure the number of particles having a size of 47 nm or more, which has recently been required, reliable measurement has not been possible. RCA cleaning is performed in the conventional cleaning after finish polishing, and it is found that the remaining haze level is further deteriorated to about 30 ppb or more by finishing polishing by etching the wafer with a machining allowance of about 4 nm or more. did. Therefore, as a result of repeated investigations, the inventors have made the etching allowance in the cleaning process smaller than the conventional 0.2 to 1.0 nm, thereby minimizing the deterioration of the haze level of the wafer. The inventors have found that the number of particles adhering to can be measured and completed the present invention.

  Such a method for manufacturing a semiconductor wafer according to the present invention will be described below with reference to FIG. 1 as an example of manufacturing a silicon wafer.

  First, a silicon single crystal ingot pulled up by a single crystal pulling apparatus (not shown) is sliced at a right angle or at an angle with respect to the rod axis direction to obtain a plurality of thin disk-shaped wafers (slicing step). The wafer obtained by the slicing step is chamfered at its outer peripheral edge in order to prevent cracking and chipping (chamfering step). Subsequently, the wafer is mechanically ground (lapping process) in order to remove the work-affected layer induced on the wafer surface layer by the cutting process in the slicing process and to flatten the wafer (lapping process). Further, the wafer is etched in order to remove the processing distortion generated on the wafer surface layer in the above process (etching process).

Subsequently, rough polishing is performed to further planarize the surface of the etched wafer (primary polishing step). This rough polishing (primary polishing) may be composed of two stages or three or more stages. For example, it is possible to polish using a coarse abrasive at the first stage and a finer abrasive after the second stage.
Further, the surface of the wafer is polished by using a polishing apparatus as shown in FIG. 2 to obtain a mirror surface with reduced level irregularities called haze, and scratches generated in the primary polishing are removed (finishing) Polishing process).

  The semiconductor silicon wafer that has been subjected to final polishing is cleaned to remove the abrasive and the like (cleaning step). In the cleaning process after the finish polishing, the present invention prevents chemical degradation by setting the etching allowance to 0.2 to 1.0 nm, thereby preventing the haze level from deteriorating and the wafer surface having a size of 47 nm or more. It is characterized in that particles can be measured. In this case, it is possible to further reduce particles by performing mechanical cleaning before chemical cleaning. If combined with ozone cleaning, it is also effective in removing organic substances, and a higher quality semiconductor wafer can be obtained. Hereinafter, the cleaning process performed in the present invention will be described in detail by taking as an example the case of performing ozone cleaning, mechanical cleaning, and chemical cleaning in this order.

FIG. 3 shows an example of a cleaning apparatus used in the cleaning process.
First, ozone cleaning is performed. In ozone cleaning, pure water 8 containing, for example, 5 to 100 ppm of ozone is sprayed from the nozzle 10 toward the rotating wafer 1. At this time, the nozzle 10 scans in the radial direction of the wafer. By performing ozone cleaning in this way, contaminants such as organic substances adhering to the wafer surface can be effectively removed. Further, at this time, it is preferable to set the temperature of the ozone water to 50 ° C. or higher because the cleaning power is improved and contaminants can be further removed.

Next, mechanical cleaning is performed. The mechanical cleaning means removing by applying mechanical / physical force to impurities (particles, etc.) adhering to the wafer surface, and examples thereof include brush cleaning and two-fluid cleaning. In this two-fluid cleaning, two or more fluids are mixed and the mixed fluid is sprayed onto the wafer surface to remove impurities. For example, ultrapure water 7 to which carbon dioxide (CO ₂ ) is added and nitrogen gas (N ₂ ) 6 are mixed by a two-fluid cleaning nozzle 9, and the wafer 1 rotates while scanning the nozzle in the radial direction of the wafer. Spray on the surface. If ultrapure water to which carbon dioxide is added is used as a cleaning liquid in this way, static electricity generated by friction between the processing surface of the semiconductor wafer and the cleaning liquid can be suppressed. In addition, nitrogen (N ₂ ), which is an inert gas, is suitable as the gas used as the gas, but air, argon (Ar), or the like can also be used.

Next, chemical cleaning is performed. Chemical cleaning refers to chemically dissolving and decomposing and removing particles, organic substances, abrasives, metal impurities, etc. adhering to the wafer surface.
Here, as an example of chemical cleaning, cleaning using a mixed aqueous solution of low-concentration aqueous ammonia, hydrogen peroxide, and water is performed.
As for the cleaning solution, the normal SC-1 cleaning used in the RCA cleaning uses an ammonia water: hydrogen peroxide solution: water composition ratio of 1: 1: 5, whereas 1: 1: 10 to 200. Use one.
By immersing the wafer in a cleaning solution tank filled with this cleaning solution, cleaning is performed using a mixed aqueous solution of low-concentration ammonia water, hydrogen peroxide water, and water. At this time, the cleaning time is adjusted so that the etching allowance is 0.2 to 1.0 nm. When the etching allowance is less than 0.2 nm, the abrasive or the like cannot be completely removed and the particle level deteriorates. In addition, when the etching allowance is larger than 1.0 nm, the haze level is deteriorated and the measurement of particles is hindered. Therefore, chemical cleaning is performed with an etching allowance of 0.2 to 1.0 nm in this way, the haze level of the wafer is improved, and the number of particles having a size of 47 nm or more attached to the wafer surface is reliably measured. It can be so.
As another example of chemical cleaning, chemical cleaning may be performed using an alkaline solution such as diluted KOH (for example, 0.1 wt% to 10 wt%) or diluted NaOH (for example, 0.1 wt% to 10 wt%). it can.

  Finally, the wafer is dried. Although the drying method is not particularly limited, for example, a wafer is placed on a mounting table in which a groove having a cavity and an opening is formed, and the moisture adhering to the wafer surface is reduced from the opening by reducing the pressure of the cavity. So-called suction drying, in which drying is performed by forcibly taking, or spin drying, in which water is sprinkled off from the wafer using centrifugal force, can be performed. A semiconductor silicon wafer is obtained as described above.

  Moreover, although the case where mechanical washing | cleaning and chemical washing | cleaning were performed separately was demonstrated in the said washing | cleaning process, you may perform mechanical washing | cleaning and chemical washing | cleaning simultaneously. For example, as shown in FIG. 4A, chemical cleaning with an etching allowance of 0.2 to 1.0 nm may be performed simultaneously with mechanical cleaning, following ozone cleaning. Alternatively, as shown in FIG. 4 (b), the ozone cleaning is followed by the mechanical cleaning and the first chemical cleaning at the same time, and then the second chemical cleaning is performed. The total etching allowance by chemical cleaning may be 0.2 to 1.0 nm.

  When performing mechanical cleaning and chemical cleaning at the same time, for example, in the above two-fluid cleaning, a mixed aqueous solution of ammonia water, hydrogen peroxide water and water is used instead of ultrapure water and gas is mixed therewith. Thus, chemical cleaning having an etching action can be performed simultaneously with mechanical cleaning.

  In addition, even when these mechanical cleaning and chemical cleaning are performed simultaneously, combining ozone cleaning as shown in FIGS. 4 (a) and 4 (b) is effective in removing organic matter. A higher quality semiconductor wafer can be obtained. However, this ozone cleaning can be omitted.

A semiconductor wafer obtained by the above method has a haze of 5 ppb or less and particles having a size of 47 nm or more of 0.15 / cm ² or less (100 wafers or less for a 300 mm diameter wafer). It is possible to obtain a high-quality semiconductor wafer with a small amount.

Examples of the present invention will be described below, but the present invention is not limited thereto.
Example 1
A single crystal having a diameter of 300 mm and an orientation {100} was pulled by the Czochralski method, and this was sliced and chamfered and lapped to prepare a silicon wafer.
This silicon wafer was etched by a conventional method to obtain an etched wafer.

Next, while supplying a polishing liquid containing a colloidal silica-based abrasive to the polishing cloth of the polishing apparatus, the etched wafer was brought into sliding contact with the polishing cloth to perform primary polishing.
In addition, a suede-like artificial leather made of soft foamed urethane is affixed on a rotatable surface plate, and the wafer is slidably contacted while supplying an abrasive containing colloidal silica to an alkaline base aqueous solution. And finish polished.

Next, the cleaning process was performed in the order of ozone cleaning, two-fluid cleaning, and chemical cleaning. For the ozone cleaning and the two-fluid cleaning, the cleaning device shown in FIG. 3 was used.
First, in the ozone cleaning, normal temperature pure water containing 20 ppm ozone was sprayed from the nozzle 10 toward the wafer 1 rotating at 60 rpm at a flow rate of 1.2 L / min. At this time, the distance between the nozzle 10 and the wafer 1 was 30 mm, and the angle of the nozzle 10 was 75 °. The nozzle 10 was scanned so that one reciprocation was 30 seconds in the radial direction of the wafer.

In the subsequent two-fluid cleaning, ultrapure water added with carbon dioxide (CO ₂ ) is supplied to the nozzle 9 at 0.2 L / min · 0.5 MPa and nitrogen (N ₂ ) at 235 L / mim · 0.4 MPa. The mixed fluid was sprayed toward the wafer 1 rotating at 1800 rpm. At this time, the distance between the nozzle 9 and the wafer 1 was 20 mm, and the angle of the nozzle 9 was 90 °. The nozzle 9 was scanned so that one round trip in the radial direction of the wafer was 30 seconds.

The next chemical cleaning was performed by filling a water purification tank with a cleaning solution having a composition ratio of ammonia water: hydrogen peroxide water: water of 1: 1: 100 and immersing the wafer in the cleaning solution. At this time, the etching allowance was adjusted to be 0.2 nm.
Subsequently, the wafer was dried by spin drying to obtain a semiconductor wafer.

(Example 2)
A silicon wafer obtained by slicing a silicon single crystal similar to that in Example 1 was chamfered, lapped, etched, and subjected to primary polishing and final polishing. Furthermore, this wafer was subjected to a cleaning process in the order of ozone cleaning, two-fluid cleaning, and chemical cleaning under the same conditions as in Example 1 except that the etching allowance for chemical cleaning was 0.5 nm. Subsequently, the wafer was dried to obtain a semiconductor wafer.

(Example 3)
The silicon wafer obtained by slicing the same silicon single crystal as in Example 1 is chamfered,
Lapping, etching, and primary polishing / finish polishing were performed. Further, this wafer was subjected to a cleaning process in the order of ozone cleaning, two-fluid cleaning, and chemical cleaning under the same conditions as in Example 1 except that the etching allowance for chemical cleaning was 1.0 nm. Subsequently, the wafer was dried to obtain a semiconductor wafer.

Example 4
A silicon wafer obtained by slicing a silicon single crystal similar to that in Example 1 was chamfered, lapped, etched, and subjected to primary polishing and final polishing. Further, this wafer was subjected to a cleaning process in the order of ozone cleaning, two-fluid cleaning, and chemical cleaning under the same conditions as in Example 1 except that the temperature of ozone water for ozone cleaning was 40 ° C. Subsequently, the wafer was dried to obtain a semiconductor wafer.

(Example 5)
A silicon wafer obtained by slicing a silicon single crystal similar to that in Example 1 was chamfered, lapped, etched, and subjected to primary polishing and final polishing. Further, this wafer was subjected to a cleaning process in the order of ozone cleaning, two-fluid cleaning, and chemical cleaning under the same conditions as in Example 1 except that the temperature of ozone water for ozone cleaning was 50 ° C. Subsequently, the wafer was dried to obtain a semiconductor wafer.

(Example 6)
A silicon wafer obtained by slicing a silicon single crystal similar to that in Example 1 was chamfered, lapped, etched, and subjected to primary polishing and final polishing. Further, this wafer was subjected only to chemical cleaning under the same conditions as in Example 1 as a cleaning process. Subsequently, the wafer was dried to obtain a semiconductor wafer.

(Example 7)
A silicon wafer obtained by slicing the same silicon single crystal as in Example 1 was chamfered, lapped, etched, and subjected to primary polishing and final polishing. The wafer was subjected to ozone cleaning similar to that in Example 1 and then subjected to two-fluid cleaning. In this two-fluid cleaning, a cleaning solution having a composition ratio of ammonia water: hydrogen peroxide water: water of 1: 1: 100 is used instead of the ultrapure water of Example 1, and chemical cleaning is performed simultaneously with mechanical cleaning. Went. At this time, the etching allowance was adjusted to be 0.2 nm. Subsequently, the wafer was dried by spin drying to obtain a semiconductor wafer.

(Example 8)
A silicon wafer obtained by slicing the same silicon single crystal as in Example 1 was chamfered, lapped, etched, and subjected to primary polishing and final polishing. This wafer was subjected to ozone cleaning under the same conditions as in Example 7 except that the etching allowance for chemical cleaning was set to 1.0 nm, followed by two-fluid cleaning (chemical cleaning simultaneously with mechanical cleaning). Subsequently, the wafer was dried by spin drying to obtain a semiconductor wafer.

Example 9
A silicon wafer obtained by slicing the same silicon single crystal as in Example 1 was chamfered, lapped, etched, and subjected to primary polishing and final polishing. The wafer was subjected to ozone cleaning similar to that in Example 1 and then subjected to two-fluid cleaning. In the two-fluid cleaning, a cleaning solution having a composition ratio of ammonia water: hydrogen peroxide water: water of 1: 1: 100 is used instead of the ultrapure water of Example 1, and the first cleaning is performed simultaneously with the mechanical cleaning. Chemical cleaning was performed. Further, the second chemical cleaning was performed by filling a water purification tank with a cleaning solution having a composition ratio of ammonia water: hydrogen peroxide water: water of 1: 1: 100 and immersing the wafer in the cleaning solution. At this time, the total etching allowance of the first and second chemical cleaning was adjusted to be 0.2 nm. Subsequently, the wafer was dried by spin drying to obtain a semiconductor wafer.

(Example 10)
A silicon wafer obtained by slicing the same silicon single crystal as in Example 1 was chamfered, lapped, etched, and subjected to primary polishing and final polishing. The wafer was subjected to ozone cleaning under the same conditions as in Example 9 except that the total etching allowance of the first and second chemical cleaning was adjusted to 1.0 nm, and then two-fluid cleaning (mechanical cleaning and At the same time, a first chemical cleaning was performed, and then a second chemical cleaning was performed. Subsequently, the wafer was dried by spin drying to obtain a semiconductor wafer.

(Comparative Example 1)
A silicon wafer obtained by slicing a silicon single crystal similar to that in Example 1 was chamfered, lapped, etched, and subjected to primary polishing and final polishing. Furthermore, this wafer was subjected to a conventional RCA cleaning process. The RCA cleaning was performed by immersing the wafer in a cleaning solution tank filled with a cleaning solution in the order of SC-1 cleaning, hydrofluoric acid cleaning, and SC-2 cleaning. The mixing ratio of the cleaning solution used for SC-1 cleaning was ammonia: hydrogen peroxide solution: water = 1: 1: 5, and the mixing ratio of the cleaning solution used for SC-2 cleaning was hydrochloric acid: hydrogen peroxide solution. : Water = 1: 1: 6. The etching allowance for SC-1 cleaning was adjusted to 4 nm.
Subsequently, the wafer was dried to obtain a semiconductor wafer.

(Comparative Example 2)
A silicon wafer obtained by slicing a silicon single crystal similar to that in Example 1 was chamfered, lapped, etched, and subjected to primary polishing and final polishing. Further, this wafer was subjected to cleaning steps in the order of ozone cleaning and two-fluid cleaning under the same conditions as in Example 1 without performing chemical cleaning. Subsequently, the wafer was dried to obtain a semiconductor wafer.

(Comparative Example 3)
A silicon wafer obtained by slicing a silicon single crystal similar to that in Example 1 was chamfered, lapped, etched, and subjected to primary polishing and final polishing. Further, this wafer was subjected to a cleaning process in the order of ozone cleaning, two-fluid cleaning, and chemical cleaning under the same conditions as in Example 1 except that the etching allowance for chemical cleaning was 1.5 nm. Subsequently, the wafer was dried to obtain a semiconductor wafer.

(Evaluation methods)
The haze level and the number of particles of the semiconductor wafers obtained in the above examples and comparative examples were measured in the DWO mode of a surface inspection apparatus (trade name: SP1) manufactured by KLA TENCOR. The obtained results are shown in Table 1.

  Comparing the results of Examples 1 to 10 and Comparative Example 1, the haze of the wafer manufactured using the cleaning process according to the present invention is significantly improved compared to the wafer manufactured using the conventional RCA cleaning. . Therefore, it was confirmed that the production method of the present invention was effective in improving the haze of the wafer and measuring the number of fine particles adhering to the wafer surface.

Further, when Examples 1 to 3 were compared with Comparative Examples 1 and 3, compared with Examples 1 to 3 where the etching allowance in chemical cleaning was 0.2 to 1.0 nm, 4 nm and 1.5 nm were set. The haze levels of Comparative Examples 1 and 3 are very bad. Therefore, it was confirmed that limiting the etching allowance to 0.2 to 1.0 nm has a high effect on improving the haze level of the wafer.
Further, when Example 4 and Example 5 are compared, in Example 5 in which the temperature of ozone water for ozone cleaning is 50 ° C. or higher, the number of particles is considerably improved, and the temperature of ozone water is 50 ° C. or higher. It has been confirmed that this has a high effect on reducing the number of particles.
Further, when Example 1 and Example 6 were compared, it was confirmed that ozone cleaning and two-fluid cleaning contributed to particle reduction.
Moreover, when Example 1 and Example 7 and 9 were compared, it has confirmed that the particle was reducing by performing chemical cleaning simultaneously with mechanical cleaning.
Similarly, even when Example 3 was compared with Examples 8 and 10, it was confirmed that particles were reduced by performing chemical cleaning simultaneously with mechanical cleaning.
Further, as in Comparative Example 2, particles cannot be removed unless chemical cleaning is performed.

The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has substantially the same configuration as the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.
For example, the semiconductor wafer to which the present invention can be applied is not limited to a silicon wafer, but can also be applied to a compound semiconductor wafer or the like.

Claims (3)

A method for manufacturing a semiconductor wafer, at least a primary polishing step for rough polishing a raw material wafer, a final polishing step for final polishing the primary polished wafer, and a cleaning step for cleaning the final polished wafer In the cleaning step, following the ozone cleaning, mechanical cleaning is performed by applying a mechanical force, and at the same time, chemical cleaning is performed with an etching allowance of 0.2 to 1.0 nm. The mechanical cleaning is a two-fluid cleaning in which two or more kinds of fluids are mixed to clean the wafer, and the chemical cleaning is cleaning with a mixed aqueous solution of ammonia water, hydrogen peroxide water, and water. A method for manufacturing a semiconductor wafer. A method for manufacturing a semiconductor wafer, at least a primary polishing step for rough polishing a raw material wafer, a final polishing step for final polishing the primary polished wafer, and a cleaning step for cleaning the final polished wafer In the cleaning step, following the ozone cleaning, the first chemical cleaning is performed simultaneously with the mechanical cleaning in which mechanical force is applied to perform cleaning, and then the second chemical cleaning is further performed. The total etching allowance by the first and second chemical cleaning is 0.2 to 1.0 nm, and the mechanical cleaning is a two-fluid cleaning in which two or more fluids are mixed to clean the wafer, A method for producing a semiconductor wafer, wherein the chemical cleaning is cleaning with a mixed aqueous solution of ammonia water, hydrogen peroxide water and water. The method for manufacturing a semiconductor wafer according to claim 1, wherein the temperature of the ozone water in the ozone cleaning is 50 ° C. or more.

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